February 2013 - U-Boot

[U-Boot] [PATCH 0/2] ARM: mmu: Set domain permissions to client access
by R Sricharan 28 Mar '13

28 Mar '13

Currently for ARM based cpu's, mmu pagetable attributes are set with manager permissions for all 4GB address space. Because of this the 'execute never (XN)' permission is never checked on read sensitive regions which results in speculative aborts. This series changes the domain permissions of the full 4GB space to client access for OMAP socs. This avoids all the speculative aborts that are currently seen on OMAP5 secure devices. Tested on OMAP5 SDP (HS) soc. This series depends on [1] the patch sent by <Vincent Stehle <v-stehle(a)ti.com> [1] http://www.mail-archive.com/u-boot@lists.denx.de/msg102709.html R Sricharan (2): ARM: mmu: Introduce weak dram_bank_setup function ARM: mmu: Set domain permissions to client access arch/arm/cpu/armv7/cache_v7.c | 3 ++ arch/arm/cpu/armv7/omap-common/hwinit-common.c | 35 ++++++++++++++++++++++++ arch/arm/include/asm/cache.h | 1 + arch/arm/include/asm/system.h | 14 ++++++++++ arch/arm/lib/cache-cp15.c | 13 ++++++++- 5 files changed, 65 insertions(+), 1 deletion(-) -- 1.7.9.5

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[U-Boot] [PATCH 0/9 v2] Fix and Re-organise PWM Timer
by Akshay Saraswat 28 Mar '13

28 Mar '13

This patch set tries to fix few bugs in timer and re-organises PWM clock code. Changes since v1: - Patch-1: Added "Acked-by: Simon Glass". - Patch-2: Added "Acked-by: Simon Glass". - Patch-3: Added "Acked-by: Simon Glass". - Patch-4: Added "Acked-by: Simon Glass". - Patch-5: Added "Acked-by: Simon Glass". - Patch-6: None. - Patch-7: Fixed few nits. - Patch-8: Added "Acked-by: Simon Glass". - Patch-9: Restored get_pwm_clk call in case of non-exynos5 cpu. Akshay Saraswat (9): Exynos: Change get_timer() to work correctly Exynos: Add timer_get_us function Exynos: pwm: Fix two bugs in the exynos pwm configuration code Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4 Exynos: Tidy up the pwm_config function in the exynos pwm driver Exynos: Add peripherial id for pwm Exynos: clock: Add generic api to get the clk freq Exynos: clock: Correct pwm source clk selection Exynos: pwm: Use generic api to get pwm clk freq arch/arm/cpu/armv7/exynos/clock.c | 138 ++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/s5p-common/pwm.c | 57 +++++++----- arch/arm/cpu/armv7/s5p-common/timer.c | 117 ++++++++++++------------- arch/arm/include/asm/arch-exynos/clk.h | 17 ++++ arch/arm/include/asm/arch-exynos/periph.h | 5 ++ board/samsung/smdk5250/setup.h | 2 +- 6 files changed, 249 insertions(+), 87 deletions(-) -- 1.8.0

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[U-Boot] [PATCH 00/13] video: exynos: Add DT support for exynos_fb and exynos_dp drivers
by Ajay Kumar 27 Mar '13

27 Mar '13

Ajay Kumar (13): [PATCH 01/13] video: exynos_fb: Remove callbacks from the driver [PATCH 02/13] video: exynos_dp: Remove callbacks from the driver [PATCH 03/13] video: exynos_fb: Make fimd_ctrl global [PATCH 04/13] EXYNOS: FDT: Add compatible strings for FIMD [PATCH 05/13] video: exynos_fb: add DT support for FIMD driver [PATCH 06/13] EXYNOS5: Add device node for FIMD [PATCH 07/13] SMDK5250: Add device node for FIMD [PATCH 08/13] video: exynos_dp: Make dp_regs global [PATCH 09/13] EXYNOS5: FDT: Add compatible strings for FIMD [PATCH 10/13] video: exynos_dp: Add function to parse DP DT node [PATCH 11/13] EXYNOS5: Add device node for DP [PATCH 12/13] SMDK5250: Add device node for DP [PATCH 13/13] SMDK5250: Use statically defined structures only in non DT case arch/arm/dts/exynos5250.dtsi | 13 ++ arch/arm/include/asm/arch-exynos/dp_info.h | 1 - board/samsung/dts/exynos5250-smdk5250.dts | 40 +++++ board/samsung/smdk5250/smdk5250.c | 16 +- board/samsung/trats/trats.c | 6 +- board/samsung/universal_c210/universal.c | 23 +-- doc/device-tree-bindings/video/exynos-dp.txt | 69 ++++++++ doc/device-tree-bindings/video/exynos-fb.txt | 92 +++++++++++ drivers/video/exynos_dp.c | 76 ++++++++- drivers/video/exynos_dp_lowlevel.c | 69 +++----- drivers/video/exynos_dp_lowlevel.h | 1 + drivers/video/exynos_fb.c | 230 +++++++++++++++++++++++++-- drivers/video/exynos_fimd.c | 44 +++-- include/fdtdec.h | 2 + include/lcd.h | 9 -- lib/fdtdec.c | 2 + 16 files changed, 574 insertions(+), 119 deletions(-) create mode 100644 doc/device-tree-bindings/video/exynos-dp.txt create mode 100644 doc/device-tree-bindings/video/exynos-fb.txt -- 1.8.0

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[U-Boot] [PATCH 0/4] EXYNOS5: Enable dwmmc
by Amar 27 Mar '13

27 Mar '13

This patch set enables the dwmmc for Exynos5250 on SMDK5250. Also does the required driver changes. This patch set is based on: "EXYNOS: mmc: support DesignWare Controller for Samsung-SoC" "Exynos: clock: support get_mmc_clk for exynos" Amar (4): MMC: DWMMC: Modified fifo size computation MMC: EXYNOS: Added call back function for clock get EXYNOS: CLOCK: Initialised the local variable SMDK5250: Initialise and enable dwmmc channels arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- board/samsung/smdk5250/smdk5250.c | 32 ++++++++++++++++++++++++++------ drivers/mmc/dw_mmc.c | 2 ++ drivers/mmc/exynos_dw_mmc.c | 13 ++++++++++++- include/configs/smdk5250.h | 4 ++-- 5 files changed, 44 insertions(+), 11 deletions(-)

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[U-Boot] [PATCH] EXYNOS5: Add L2 Cache Support.
by Rajeshwari Shinde 27 Mar '13

27 Mar '13

This patch set adds L2 Cache Support to EXYNOS. Signed-off-by: Arun Mankuzhi <arun.m(a)samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s(a)samsung.com> --- arch/arm/cpu/armv7/exynos/soc.c | 37 +++++++++++++++++++++++++++++++++++++ 1 files changed, 37 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/soc.c b/arch/arm/cpu/armv7/exynos/soc.c index ab65b8d..676a388 100644 --- a/arch/arm/cpu/armv7/exynos/soc.c +++ b/arch/arm/cpu/armv7/exynos/soc.c @@ -23,6 +23,14 @@ #include <common.h> #include <asm/io.h> +#include <asm/system.h> + +enum l2_cache_params { + CACHE_TAG_RAM_SETUP = (1<<9), + CACHE_DATA_RAM_SETUP = (1<<5), + CACHE_TAG_RAM_LATENCY = (2<<6), + CACHE_DATA_RAM_LATENCY = (2<<0) +}; void reset_cpu(ulong addr) { @@ -36,3 +44,32 @@ void enable_caches(void) dcache_enable(); } #endif + +#ifndef CONFIG_SYS_L2CACHE_OFF +/* + * Set L2 cache parameters + */ +static void exynos5_set_l2cache_params(void) +{ + unsigned int val = 0; + + asm volatile("mrc p15, 1, %0, c9, c0, 2\n" : "=r"(val)); + + val |= CACHE_TAG_RAM_SETUP | + CACHE_DATA_RAM_SETUP | + CACHE_TAG_RAM_LATENCY | + CACHE_DATA_RAM_LATENCY; + + asm volatile("mcr p15, 1, %0, c9, c0, 2\n" : : "r"(val)); +} + +/* + * Sets L2 cache related parameters before enabling data cache + */ +void v7_outer_cache_enable(void) +{ + if (cpu_is_exynos5()) + exynos5_set_l2cache_params(); +} +#endif + -- 1.7.4.4

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[U-Boot] [PATCH] Initialise correct GPMC WAITx irq for AM33xx
by Mark Jackson 26 Mar '13

26 Mar '13

Currently WAIT0 irq is reset and then WAIT1 irq is enabled. Fix it such that WAIT0 irq is enabled instead. Signed-off-by: Mark Jackson <mpfj(a)newflow.co.uk> --- arch/arm/cpu/armv7/am33xx/mem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c index b8f54ab..b86b0de 100644 --- a/arch/arm/cpu/armv7/am33xx/mem.c +++ b/arch/arm/cpu/armv7/am33xx/mem.c @@ -83,7 +83,7 @@ void gpmc_init(void) /* global settings */ writel(0x00000008, &gpmc_cfg->sysconfig); writel(0x00000100, &gpmc_cfg->irqstatus); - writel(0x00000200, &gpmc_cfg->irqenable); + writel(0x00000100, &gpmc_cfg->irqenable); writel(0x00000012, &gpmc_cfg->config); /* * Disable the GPMC0 config set by ROM code -- 1.7.9.5

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[U-Boot] [PATCH 0/5] Add splash screen for CM-T35
by Nikita Kiryanov 26 Mar '13

26 Mar '13

This patchset adds splash screen support for CM-T35. It includes the ability to initialize the display subsystem either using predefines (selected via env variable "displaytype"), or user supplied configuration options, also stored in an environment variables and pointed to by displaytype. The splash image data is currently read from NAND. As a preparation for the above functionality, this patch set introduces new DSS #defines and an option for board-specific splash screen preparation, which can be invoked in lcd_logo() right before displaying the splash screen (typical use case: load the image data in time for it to be displayed). Nikita Kiryanov (5): omap3: add useful dss defines lcd: add option for board specific splash screen preparation cm-t35: add support for dvi displays cm-t35: add support for user defined lcd parameters cm-t35: add support for loading splash image from NAND README | 8 + arch/arm/include/asm/arch-omap3/dss.h | 35 +++ board/cm_t35/Makefile | 1 + board/cm_t35/cm_t35.c | 64 +++++ board/cm_t35/display.c | 420 +++++++++++++++++++++++++++++++++ common/lcd.c | 15 ++ include/configs/cm_t35.h | 10 + include/lcd.h | 1 + 8 files changed, 554 insertions(+) create mode 100644 board/cm_t35/display.c -- 1.7.10.4

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[U-Boot] [PATCH v0 0/4] env: reworking + default/import individual vars
by Gerlando Falauto 24 Mar '13

24 Mar '13

This is a resubmission (after removing remove checkpatch errors) of http://lists.denx.de/pipermail/u-boot/2011-September/102875.html Here I am proposing a set of changes in the behaviour of the environment import/set_to_default functions. PATCH 1: Add a "new" himport_ex() function (reworking of himport_r which is now a wrapper around it), which has 3 new arguments: "nvars", "vars":, number and list of variables to take into account (0 means ALL) "apply" callback function which is in charge of checking whether a variable can be overwritten, and possibly immediately apply the changes. This parameter would be either set to NULL (in which case nothing should change wrt to the past -- i.e. environment is blindly imported) or to "env_check_apply()" function, whose code was taken away from _do_env_set(). This would be useful, for instance, for "baudrate" or "stdin,stderr,stdout", whose changes would not otherwise be effective until the next reboot. The idea is that there should be a single place where all the checks are to be performed. So the same function env_check_apply() is called from _do_env_set() as well (thus keeping the previous behavior). PATCH 2: Add the same behaviour when deleting variables. Not quite sure whether this makes sense or not. PATCH 3: Add the code for setting individual variables to default PATCH 4: Impolement importing of individual variables (also taking into account "-f" for forcing). Gerlando Falauto (4): Groundwork for generalization of env interface env: check and apply changes on delete/destroy env: implement selective "env default" env: implement "env import -n var[,var...]" README | 2 + common/cmd_nvedit.c | 231 ++++++++++++++++++++++++++++++++-------------- common/env_common.c | 29 ++++++- include/config_cmd_all.h | 1 + include/environment.h | 12 +++ include/search.h | 19 ++++- lib/hashtable.c | 68 ++++++++++++- 7 files changed, 284 insertions(+), 78 deletions(-)

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[U-Boot] [PATCH v2] mxs: spl_mem_init: Align DDR2 init with FSL bootlets source
by Fabio Estevam 23 Mar '13

23 Mar '13

From: Fabio Estevam <fabio.estevam(a)freescale.com> Currently the following kernel hang happens when loading a 2.6.35 kernel from Freeescale on a mx28evk board: RPC: Registered tcp transport module. RPC: Registered tcp NFSv4.1 backchannel transport module. Bus freq driver module loaded IMX usb wakeup probe usb h1 wakeup device is registered mxs_cpu_init: cpufreq init finished ... Loading the same kernel using the bootlets from the imx-bootlets-src-10.12.01 package, the hang does not occur. Comparing the DDR2 initialization from the bootlets code against the U-boot one, we can notice some mismatches, and after applying the same initialization into U-boot the 2.6.35 kernel can boot normally. Also tested with 'mtest' command, which runs succesfully. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v1: - Fix tabs/space confusion and only show the real context changes arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index f8392f6..2195dce 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -45,17 +45,17 @@ static uint32_t dram_vals[] = { 0x00000000, 0x00000000, 0x00010101, 0x01010101, 0x000f0f01, 0x0f02020a, 0x00000000, 0x00010101, 0x00000100, 0x00000100, 0x00000000, 0x00000002, - 0x01010000, 0x05060302, 0x06005003, 0x0a0000c8, - 0x02009c40, 0x0000030c, 0x0036a609, 0x031a0612, + 0x01010000, 0x07080403, 0x06005003, 0x0a0000c8, + 0x02009c40, 0x0002030c, 0x0036a609, 0x031a0612, 0x02030202, 0x00c8001c, 0x00000000, 0x00000000, 0x00012100, 0xffff0303, 0x00012100, 0xffff0303, 0x00012100, 0xffff0303, 0x00012100, 0xffff0303, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000612, 0x01000F02, - 0x06120612, 0x00000200, 0x00020007, 0xf5014b27, - 0xf5014b27, 0xf5014b27, 0xf5014b27, 0x07000300, - 0x07000300, 0x07000300, 0x07000300, 0x00000006, + 0x06120612, 0x00000200, 0x00020007, 0xf4004a27, + 0xf4004a27, 0xf4004a27, 0xf4004a27, 0x07000300, + 0x07000300, 0x07400300, 0x07400300, 0x00000005, 0x00000000, 0x00000000, 0x01000000, 0x01020408, 0x08040201, 0x000f1133, 0x00000000, 0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04, @@ -76,14 +76,14 @@ static uint32_t dram_vals[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00010000, 0x00020304, - 0x00000004, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00010000, 0x00030404, + 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01010000, 0x01000000, 0x03030000, 0x00010303, 0x01020202, 0x00000000, 0x02040303, 0x21002103, 0x00061200, - 0x06120612, 0x04320432, 0x04320432, 0x00040004, + 0x06120612, 0x04420442, 0x04420442, 0x00040004, 0x00040004, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00010001 + 0x00000000, 0xffffffff /* * i.MX23 DDR at 133MHz -- 1.7.9.5

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[U-Boot] [PATCH 1/1 v3] console: USB: KBD: Fix incorrect autoboot timeout
by Jim Lin 21 Mar '13

21 Mar '13

Autoboot timeout defined by CONFIG_BOOTDELAY will not be accurate if CONFIG_USB_KEYBOARD and CONFIG_SYS_USB_EVENT_POLL are defined in configuration file and when tstc() function for checking key pressed takes longer time than 10 ms (e.g., 50 ms) to finish. Signed-off-by: Jim Lin <jilin(a)nvidia.com> --- Changes in v2: - use do-while and get_timer to count timeout. Changes in v3: - revert original udelay(10000); for safety. common/main.c | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/common/main.c b/common/main.c index b145f85..dcd2a42 100644 --- a/common/main.c +++ b/common/main.c @@ -225,6 +225,7 @@ static inline int abortboot(int bootdelay) { int abort = 0; + unsigned long ts; #ifdef CONFIG_MENUPROMPT printf(CONFIG_MENUPROMPT); @@ -248,11 +249,10 @@ int abortboot(int bootdelay) #endif while ((bootdelay > 0) && (!abort)) { - int i; - --bootdelay; - /* delay 100 * 10ms */ - for (i=0; !abort && i<100; ++i) { + /* delay 1000 ms */ + ts = get_timer(0); + do { if (tstc()) { /* we got a key press */ abort = 1; /* don't auto boot */ bootdelay = 0; /* no more delay */ @@ -264,7 +264,7 @@ int abortboot(int bootdelay) break; } udelay(10000); - } + } while (!abort && get_timer(ts) < 1000); printf("\b\b\b%2d ", bootdelay); } -- 1.7.3 ----------------------------------------------------------------------------------- This email message is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply email and destroy all copies of the original message. -----------------------------------------------------------------------------------

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