February 2013 - U-Boot

[U-Boot] [PATCH] am33xx: pcm051: Remove wp pin mux for sd-card
by Lars Poeschel 19 Feb '13

19 Feb '13

From: Lars Poeschel <poeschel(a)lemonage.de> The pcm051 does not have the wp pin connected to the sd-card socket. Therefore remove the pinmux for the pin. The was a carry-over from the am335x evm code. Signed-off-by: Lars Poeschel <poeschel(a)lemonage.de> --- board/phytec/pcm051/mux.c | 1 - 1 file changed, 1 deletion(-) diff --git a/board/phytec/pcm051/mux.c b/board/phytec/pcm051/mux.c index 2cda331..74a873e 100644 --- a/board/phytec/pcm051/mux.c +++ b/board/phytec/pcm051/mux.c @@ -35,7 +35,6 @@ static struct module_pin_mux mmc0_pin_mux[] = { {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ - {OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */ {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ {-1}, }; -- 1.7.10.4

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[U-Boot] [PATCH 1/2] beagle: expansion boards: retry i2c_read with 16bit addressing
by Robert Nelson 19 Feb '13

19 Feb '13

Some expansion boards now ship with at24 eeproms that need to communicate via 16bit addressing. Signed-off-by: Robert Nelson <robertcnelson(a)gmail.com> --- board/ti/beagle/beagle.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index b829a79..9493c6b 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -227,6 +227,14 @@ static unsigned int get_expansion_id(void) i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, sizeof(expansion_config)); + /* retry reading configuration data with 16bit addressing */ + if ((expansion_config.device_vendor == 0xFFFFFF00) || + (expansion_config.device_vendor == 0xFFFFFFFF)) { + printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n"); + i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config, + sizeof(expansion_config)); + } + i2c_set_bus_num(TWL4030_I2C_BUS); return expansion_config.device_vendor; -- 1.7.10.4

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[U-Boot] [PATCH 1/2] da8xx: ea20: Add the configuration define for the exact SoC variant
by Tomas Novotny 19 Feb '13

19 Feb '13

Signed-off-by: Tomas Novotny <tomas(a)novotny.cz> Cc: Tom Rini <trini(a)ti.com> Cc: Stefano Babic <sbabic(a)denx.de> --- The second patch in this series adds pinmux for the da830. This pinmux is selected when CONFIG_SOC_DA850 is not set. Although ea20 has its own gpio pinmux (because gpio_request() is not used), this patch is added to prevent possible problems in the future. include/configs/ea20.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/ea20.h b/include/configs/ea20.h index d3eb596..03dfe0a 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -42,6 +42,7 @@ #define CONFIG_MACH_DAVINCI_DA850_EVM #define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ +#define CONFIG_SOC_DA850 /* TI DA850 SoC */ #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE -- 1.7.7

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[U-Boot] [PATCH] am335x_evm: Fix CPSW ethernet on GP EVM and EVM-SK
by Tom Rini 19 Feb '13

19 Feb '13

In commit cfd4ff6 we implemented part of advisory 1.0.10 (internal delay for RGMII mode not supported). This in turn however requires that we set the tx clock delay feature in the PHY itself. Signed-off-by: Tom Rini <trini(a)ti.com> --- board/ti/am335x/board.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index b9ac1d5..48e6896 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -73,6 +73,11 @@ static inline int board_is_idk(void) return !strncmp(header.config, "SKU#02", 6); } +static int board_is_gp_evm(void) +{ + return !strncmp("A33515BB", header.name, 8); +} + int board_is_evm_15_or_later(void) { return (!strncmp("A33515BB", header.name, 8) && @@ -466,6 +471,28 @@ int board_eth_init(bd_t *bis) printf("Error %d registering CPSW switch\n", rv); else n += rv; + + /* + * + * CPSW RGMII Internal Delay Mode is not supported in all PVT + * operating points. So we must set the TX clock delay feature + * in the AR8051 PHY. Since we only support a single ethernet + * device in U-Boot, we only do this for the first instance. + */ +#define AR8051_PHY_DEBUG_ADDR_REG 0x1d +#define AR8051_PHY_DEBUG_DATA_REG 0x1e +#define AR8051_DEBUG_RGMII_CLK_DLY_REG 0x5 +#define AR8051_RGMII_TX_CLK_DLY 0x100 + + if (board_is_evm_sk() || board_is_gp_evm()) { + const char *devname; + devname = miiphy_get_current_dev(); + + miiphy_write(devname, 0x0, AR8051_PHY_DEBUG_ADDR_REG, + AR8051_DEBUG_RGMII_CLK_DLY_REG); + miiphy_write(devname, 0x0, AR8051_PHY_DEBUG_DATA_REG, + AR8051_RGMII_TX_CLK_DLY); + } #endif try_usbether: #if defined(CONFIG_USB_ETHER) && !defined(CONFIG_SPL_BUILD) -- 1.7.9.5

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[U-Boot] [PATCH 0/5] am335x_evm: Misc environment enhancements
by Tom Rini 19 Feb '13

19 Feb '13

Hey all, The bulk of this series adds environemnt variables to better support working with NAND, SPI or ethernet. In the case of SPI we also add a spiboot target which will change environment to be looked for on SPI rather than NAND. This also documents how to use the network SPL options. -- Tom

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[U-Boot] RFD: ARM: enable HYP mode on OMAP5
by Ian Molton 19 Feb '13

19 Feb '13

Hi folks, My colleague Clemens Fischer, and I were able to bring up the OMAP5 CPU in HYP mode with the following patch to u-boot. Obviously the patch is not production grade yet, but we feel that it would be of use to discuss how best to integrate the code into u-boot. The code wakes up CPU1 before putting CPU0 into HYP mode, and CPU1 goes back to sleep once it has entered HYP mode itself. With this patch, a near-unmodified mainline linux kernel (patched for ARM KVM only) will boot up with HYP mode enabled. Many thanks to Marc and Christoffer for their help getting KVM up and running! Comments are welcome. -Ian

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[U-Boot] [PATCH] ARM: atmel: add at91sam9g20ek_2mmc nand boot support
by Bo Shen 19 Feb '13

19 Feb '13

Add at91sam9g20_2mmc nand boot support. on this board, there is no dataflash, so disable it change one commet for at91sam9g20ek board Signed-off-by: Bo Shen <voice.shen(a)atmel.com> --- board/atmel/at91sam9260ek/at91sam9260ek.c | 7 ++++++- boards.cfg | 1 + include/configs/at91sam9260ek.h | 2 ++ 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 2555672..3aa394a 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -157,13 +157,18 @@ int board_early_init_f(void) int board_init(void) { +#ifdef CONFIG_AT91SAM9G20EK_2MMC + /* arch number of AT91SAM9G20EK_2MMC-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK_2MMC; +#else #ifdef CONFIG_AT91SAM9G20EK - /* arch number of AT91SAM9260EK-Board */ + /* arch number of AT91SAM9G20EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK; #else /* arch number of AT91SAM9260EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK; #endif +#endif /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; diff --git a/boards.cfg b/boards.cfg index e4b0d44..fa863dc 100644 --- a/boards.cfg +++ b/boards.cfg @@ -95,6 +95,7 @@ at91sam9g10ek_nandflash arm arm926ejs at91sam9261ek atmel at91sam9g20ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS0 at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS1 at91sam9g20ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_NANDFLASH +at91sam9g20ek_2mmc_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH at91sam9m10g45ek_nandflash arm arm926ejs at91sam9m10g45ek atmel at91 at91sam9m10g45ek:AT91SAM9M10G45,SYS_USE_NANDFLASH at91sam9rlek_dataflash arm arm926ejs at91sam9rlek atmel at91 at91sam9rlek:AT91SAM9RL,SYS_USE_DATAFLASH at91sam9rlek_nandflash arm arm926ejs at91sam9rlek atmel at91 at91sam9rlek:AT91SAM9RL,SYS_USE_NANDFLASH diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index f921fac..02696b3 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -126,6 +126,7 @@ #endif /* DataFlash */ +#ifndef CONFIG_AT91SAM9G20EK_2MMC #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) @@ -133,6 +134,7 @@ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ #define AT91_SPI_CLK 15000000 +#endif #ifdef CONFIG_AT91SAM9G20EK #define DATAFLASH_TCSS (0x22 << 16) -- 1.7.9.5

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[U-Boot] [PATCH v2 00/11] Add BF60x processor support to Blackfin architecture.
by Sonic Zhang 19 Feb '13

19 Feb '13

From: Sonic Zhang <sonic.zhang(a)analog.com> ADSP-BF60x is the new generation Blackfin® dual-core processor announced by Analog Devices in late March, 2012. This patch set adds BF60x processor support to Das U-Boot Blackfin architecture. For more information, see http://blackfin.uclinux.org . The v2 patches 1) fix most checkpatch issues mentioned by Wolfgang 2) remove unrelated dma structure change patch 3) replace unreable macro in dma and uart structures with normal types. 4) replace unreable macro in uart peripheral portmux configuration with clear inline function. 5) clean up and merge redundant #ifdef's 6) spearate declarations and code by a blankline 7) remove the values for variables in blackfin config headers whose values are useless 8) replace run-time variable with new macro when adding 4M byte CPLB entries. Bob Liu (5): Blackfin: bf60x: new processor header files Blackfin: bf60x: add dma support Blackfin: bf60x: support big cplb page Blackfin: bf60x: add gpio support Blackfin: bf60x: add hw watchdog support Scott Jiang (1): Blackfin: spi: add bf6xx spi driver Sonic Zhang (4): Blackfin: bf60x: Port blackfin core architecture code to boot on bf60x. Blackfin: bf60x: add serial support blackfin: bf609: add board and headers files to support bf609 Blackfin: bf60x: add rsi/sdh support Steven Miao (1): Blackfin: bf60x: add resume from hibernate MAINTAINERS | 3 +- arch/blackfin/cpu/cpu.c | 4 +- arch/blackfin/cpu/gpio.c | 36 +- arch/blackfin/cpu/initcode.c | 385 ++- arch/blackfin/cpu/initcode.h | 52 + arch/blackfin/cpu/reset.c | 6 + arch/blackfin/cpu/serial.c | 81 +- arch/blackfin/cpu/serial.h | 222 +-- arch/blackfin/cpu/serial1.h | 338 ++ arch/blackfin/cpu/serial4.h | 159 + arch/blackfin/cpu/start.S | 2 + arch/blackfin/include/asm/blackfin_cdef.h | 3 + arch/blackfin/include/asm/blackfin_def.h | 5 + arch/blackfin/include/asm/blackfin_local.h | 3 + arch/blackfin/include/asm/config-pre.h | 4 + arch/blackfin/include/asm/cplb.h | 31 +- arch/blackfin/include/asm/dma.h | 81 +- arch/blackfin/include/asm/gpio.h | 2 +- arch/blackfin/include/asm/mach-bf533/BF531_def.h | 1 + arch/blackfin/include/asm/mach-bf561/BF561_def.h | 1 + arch/blackfin/include/asm/mach-bf609/BF609_cdef.h | 551 +++ arch/blackfin/include/asm/mach-bf609/BF609_def.h | 3758 ++++++++++++++++++++ arch/blackfin/include/asm/mach-bf609/anomaly.h | 103 + arch/blackfin/include/asm/mach-bf609/def_local.h | 5 + arch/blackfin/include/asm/mach-bf609/gpio.h | 151 + arch/blackfin/include/asm/mach-bf609/portmux.h | 257 ++ arch/blackfin/include/asm/mach-bf609/ports.h | 103 + arch/blackfin/include/asm/mach-common/bits/cgu.h | 80 + arch/blackfin/include/asm/mach-common/bits/dde.h | 88 + arch/blackfin/include/asm/mach-common/bits/dma.h | 54 +- arch/blackfin/include/asm/mach-common/bits/mpu.h | 6 +- arch/blackfin/include/asm/mach-common/bits/pll.h | 5 + arch/blackfin/include/asm/mach-common/bits/sdh.h | 38 +- .../blackfin/include/asm/mach-common/bits/spi6xx.h | 240 ++ arch/blackfin/include/asm/mach-common/bits/uart4.h | 66 + arch/blackfin/lib/board.c | 25 +- arch/blackfin/lib/clocks.c | 112 +- arch/blackfin/lib/string.c | 97 +- board/bf609-ezkit/Makefile | 55 + board/bf609-ezkit/bf609-ezkit.c | 67 + boards.cfg | 1 + common/cmd_reginfo.c | 19 +- drivers/mmc/bfin_sdh.c | 68 +- drivers/spi/Makefile | 1 + drivers/spi/bfin_spi6xx.c | 308 ++ include/configs/bf609-ezkit.h | 162 + include/configs/bfin_adi_common.h | 12 +- 47 files changed, 7455 insertions(+), 396 deletions(-) create mode 100644 arch/blackfin/cpu/serial1.h create mode 100644 arch/blackfin/cpu/serial4.h create mode 100644 arch/blackfin/include/asm/mach-bf609/BF609_cdef.h create mode 100644 arch/blackfin/include/asm/mach-bf609/BF609_def.h create mode 100644 arch/blackfin/include/asm/mach-bf609/anomaly.h create mode 100644 arch/blackfin/include/asm/mach-bf609/def_local.h create mode 100644 arch/blackfin/include/asm/mach-bf609/gpio.h create mode 100644 arch/blackfin/include/asm/mach-bf609/portmux.h create mode 100644 arch/blackfin/include/asm/mach-bf609/ports.h create mode 100644 arch/blackfin/include/asm/mach-common/bits/cgu.h create mode 100644 arch/blackfin/include/asm/mach-common/bits/dde.h create mode 100644 arch/blackfin/include/asm/mach-common/bits/spi6xx.h create mode 100644 arch/blackfin/include/asm/mach-common/bits/uart4.h create mode 100644 board/bf609-ezkit/Makefile create mode 100644 board/bf609-ezkit/bf609-ezkit.c create mode 100644 drivers/spi/bfin_spi6xx.c create mode 100644 include/configs/bf609-ezkit.h

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[U-Boot] : M29EW write buffer issue
by Jagannadha Sutradharudu Teki 19 Feb '13

19 Feb '13

Hi, The M29EW devices seem to report the CFI information wrong when it's in 8 bit mode. Due to this the buffer size detected as 1024 bytes instead of 256. I tried to fix this bug to initialize the 256 for these flash devices. But when I tried to get the information from flash. Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors AMD Standard command set, Manufacturer ID: 0xFF, Device ID: 0xFF Erase timeout: 4096 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 1024 bytes Seems like the Manu.ID of this flash is 0x89, it got detected as 0xFF. Is there any issues on cfi_flash.c respective of M29EW flashes, please let me know your inputs. Thanks, Jagan. This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.

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[U-Boot] Steps to bring up uboot for pxa300 arm
by answerme 19 Feb '13

19 Feb '13

Hi all I have arm board pxa 300 xcale .Can anyone send a link what are the major steps required to bring up board Thanks -- View this message in context: http://u-boot.10912.n7.nabble.com/Steps-to-bring-up-uboot-for-pxa300-arm-tp… Sent from the U-Boot mailing list archive at Nabble.com.

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