November 2013 - U-Boot

[U-Boot] [PATCH V2 1/2] driver:usb:s3c_udc: add support for Exynos4x12
by Piotr Wilczek 02 Dec '13

02 Dec '13

This patch add new defines for usb phy for Exynos4x12. Signed-off-by: Piotr Wilczek <p.wilczek(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> CC: Minkyu Kang <mk7.kang(a)samsung.com> --- Changes for v2: - no changes drivers/usb/gadget/regs-otg.h | 5 +++++ drivers/usb/gadget/s3c_udc_otg.c | 10 ++++++++-- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/usb/gadget/regs-otg.h b/drivers/usb/gadget/regs-otg.h index 84bfcc5..ac5d112 100644 --- a/drivers/usb/gadget/regs-otg.h +++ b/drivers/usb/gadget/regs-otg.h @@ -226,6 +226,11 @@ struct s3c_usbotg_reg { #define CLK_SEL_12MHZ (0x2 << 0) #define CLK_SEL_48MHZ (0x0 << 0) +#define EXYNOS4X12_ID_PULLUP0 (0x01 << 3) +#define EXYNOS4X12_COMMON_ON_N0 (0x01 << 4) +#define EXYNOS4X12_CLK_SEL_12MHZ (0x02 << 0) +#define EXYNOS4X12_CLK_SEL_24MHZ (0x05 << 0) + /* Device Configuration Register DCFG */ #define DEV_SPEED_HIGH_SPEED_20 (0x0 << 0) #define DEV_SPEED_FULL_SPEED_20 (0x1 << 0) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 7e20209..cecd280 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -36,6 +36,7 @@ #include "regs-otg.h" #include <usb/lin_gadget_compat.h> + /***********************************************************/ #define OTG_DMA_MODE 1 @@ -167,8 +168,13 @@ void otg_phy_init(struct s3c_udc *dev) writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN) &~FORCE_SUSPEND_0), &phy->phypwr); - writel((readl(&phy->phyclk) &~(ID_PULLUP0 | COMMON_ON_N0)) | - CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */ + if (s5p_cpu_id == 0x4412) + writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 | + EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ, + &phy->phyclk); /* PLL 24Mhz */ + else + writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) | + CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */ writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST)) | PHY_SW_RST0, &phy->rstcon); -- 1.7.9.5

4 15

[U-Boot] [PATCH] alsa-lib: dlmisc: Add a fake dl lib head file when dl lib is not supported by the toolchain.
by Sonic Zhang 02 Dec '13

02 Dec '13

From: sonic <sonic(a)htpc.(none)> The FLAT GNU toolchain doesn't include the dlfcn.h header file. Signed-off-by: Sonic Zhang <sonic.adi(a)gmail.com> --- include/dlmisc.h | 24 ++++++++++++++++++++++++ modules/mixer/simple/sbasedl.c | 4 ++++ src/mixer/simple_abst.c | 4 ++++ 3 files changed, 32 insertions(+) create mode 100644 include/dlmisc.h diff --git a/include/dlmisc.h b/include/dlmisc.h new file mode 100644 index 0000000..3be8d43 --- /dev/null +++ b/include/dlmisc.h @@ -0,0 +1,24 @@ +/* + * This library is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as + * published by the Free Software Foundation; either version 2.1 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __ALSA_DLMISC_H +#define __ALSA_DLMISC_H + +#define RTLD_NOW 0x00002 +#define RTLD_GLOBAL 0x00100 + +#endif diff --git a/modules/mixer/simple/sbasedl.c b/modules/mixer/simple/sbasedl.c index 494802f..511bebf 100644 --- a/modules/mixer/simple/sbasedl.c +++ b/modules/mixer/simple/sbasedl.c @@ -27,7 +27,11 @@ #include <fcntl.h> #include <sys/ioctl.h> #include <math.h> +#ifdef HAVE_LIBDL #include <dlfcn.h> +#else +#include <dlmisc.h> +#endif #include "config.h" #include "asoundlib.h" #include "mixer_abst.h" diff --git a/src/mixer/simple_abst.c b/src/mixer/simple_abst.c index 9e9aaf5..dd951fe 100644 --- a/src/mixer/simple_abst.c +++ b/src/mixer/simple_abst.c @@ -34,7 +34,11 @@ #include <fcntl.h> #include <sys/ioctl.h> #include <math.h> +#ifdef HAVE_LIBDL #include <dlfcn.h> +#else +#include <dlmisc.h> +#endif #include "config.h" #include "asoundlib.h" #include "mixer_simple.h" -- 1.7.9.5

1 1

[U-Boot] [PATCH] arm: atmel: eb_cpux9k2: config clean up
by Jens Scharsig (BuS Elektronik) 01 Dec '13

01 Dec '13

From: "Jens Scharsig (BuS Elektronik)" <esw(a)bus-elektronik.de> * remove mature defines from board config Signed-off-by: Jens Scharsig (BuS Elektronik) <esw(a)bus-elektronik.de> --- include/configs/eb_cpux9k2.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index 2d8c42c..f7e70aa 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -41,10 +41,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */ #define CONFIG_STANDALONE_LOAD_ADDR 0x21000000 -#define CONFIG_SYS_BOOT_SIZE 0x00 /* 0 KBytes */ -#define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1 -#define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */ - #define CONFIG_BOOT_RETRY_TIME 30 #define CONFIG_CMDLINE_EDITING -- 1.8.1.4

2 1

[U-Boot] [PATCH] arm: atmel: sam9m10g45ek: let CONFIG_SYS_NO_FLASH at proper position
by Bo Shen 01 Dec '13

01 Dec '13

In config_cmd_default.h, it will use CONFIG_SYS_NO_FLASH to decide whether include CONFIG_CMD_FLASH and CONFIG_CMD_IMLS. So, if the CONFIG_SYS_NO_FLASH defined later than include/config_cmd_default.h, These two commands will be included always. So move CONFIG_SYS_NO_FLASH definition to proper position. Signed-off-by: Bo Shen <voice.shen(a)atmel.com> --- include/configs/at91sam9m10g45ek.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 2095fe6..eb86239 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -77,6 +77,10 @@ /* * Command line configuration. */ + +/* No NOR flash */ +#define CONFIG_SYS_NO_FLASH + #include <config_cmd_default.h> #undef CONFIG_CMD_BDI #undef CONFIG_CMD_FPGA @@ -97,9 +101,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) -/* No NOR flash */ -#define CONFIG_SYS_NO_FLASH - /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_NAND_ATMEL -- 1.7.9.5

2 1

[U-Boot] [PATCH v2] arm926ejs, at91: add common phy_reset function
by Heiko Schocher 01 Dec '13

01 Dec '13

add common phy reset code into a common function. Signed-off-by: Heiko Schocher <hs(a)denx.de> Cc: Andreas Bießmann <andreas.devel(a)googlemail.com> Cc: Bo Shen <voice.shen(a)atmel.com> Cc: Jens Scharsig <esw(a)bus-elektronik.de> Cc: Sergey Lapin <slapin(a)ossfans.org> Cc: Stelian Pop <stelian(a)popies.net> Cc: Albin Tonnerre <albin.tonnerre(a)free-electrons.com> Cc: Eric Benard <eric(a)eukrea.com> Cc: Markus Hubig <mhubig(a)imko.de> --- - changes for v2: - add comment from Andreas Bießmann: - constify timeout - add some more comment - add Markus Hubig to Copyright - removed makefile changes - add CONFIG_AT91_WANTS_COMMON_PHY - rebased against commit c2e5e802ecb7ab668ce9911b210ed68c804b349f - Patch based on the spl v4 patchset from Bo Shen, see: http://lists.denx.de/pipermail/u-boot/2013-November/167235.html --- arch/arm/cpu/at91-common/Makefile | 1 + arch/arm/cpu/at91-common/phy.c | 57 +++++++++++++++++++++++++ arch/arm/include/asm/arch-at91/at91_common.h | 1 + board/BuS/vl_ma2sc/vl_ma2sc.c | 18 +------- board/afeb9260/afeb9260.c | 18 +------- board/atmel/at91sam9260ek/at91sam9260ek.c | 19 +-------- board/atmel/at91sam9263ek/at91sam9263ek.c | 19 +-------- board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 19 +-------- board/bluewater/snapper9260/snapper9260.c | 16 +------ board/calao/sbc35_a9g20/sbc35_a9g20.c | 19 +-------- board/eukrea/cpu9260/cpu9260.c | 18 +------- board/taskit/stamp9g20/stamp9g20.c | 31 +------------- include/configs/afeb9260.h | 2 +- include/configs/at91sam9260ek.h | 1 + include/configs/at91sam9263ek.h | 1 + include/configs/at91sam9m10g45ek.h | 1 + include/configs/cpu9260.h | 1 + include/configs/sbc35_a9g20.h | 1 + include/configs/snapper9260.h | 1 + include/configs/stamp9g20.h | 1 + include/configs/vl_ma2sc.h | 1 + 21 files changed, 79 insertions(+), 167 deletions(-) create mode 100644 arch/arm/cpu/at91-common/phy.c diff --git a/arch/arm/cpu/at91-common/Makefile b/arch/arm/cpu/at91-common/Makefile index d97053f..5b97838 100644 --- a/arch/arm/cpu/at91-common/Makefile +++ b/arch/arm/cpu/at91-common/Makefile @@ -8,4 +8,5 @@ # SPDX-License-Identifier: GPL-2.0+ # +obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o obj-$(CONFIG_SPL_BUILD) += mpddrc.o spl.o diff --git a/arch/arm/cpu/at91-common/phy.c b/arch/arm/cpu/at91-common/phy.c new file mode 100644 index 0000000..3b6c60c --- /dev/null +++ b/arch/arm/cpu/at91-common/phy.c @@ -0,0 +1,57 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian(a)popies.net> + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2012 + * Markus Hubig <mhubig(a)imko.de> + * IMKO GmbH <www.imko.de> + * + * Copyright (C) 2013 DENX Software Engineering, hs(a)denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/sizes.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <watchdog.h> + +void at91_phy_reset(void) +{ + unsigned long erstl; + unsigned long start = get_timer(0); + unsigned long const timeout = 1000; /* 1000ms */ + at91_rstc_t *rstc = (at91_rstc_t *)ATMEL_BASE_RSTC; + + erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; + + /* + * Need to reset PHY -> 500ms reset + * Reset PHY by pulling the NRST line for 500ms to low. To do so + * disable user reset for low level on NRST pin and poll the NRST + * level in reset status register. + */ + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) | + AT91_RSTC_MR_URSTEN, &rstc->mr); + + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); + + /* Wait for end of hardware reset */ + while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) { + /* avoid shutdown by watchdog */ + WATCHDOG_RESET(); + mdelay(10); + + /* timeout for not getting stuck in an endless loop */ + if (get_timer(start) >= timeout) { + puts("*** ERROR: Timeout waiting for PHY reset!\n"); + break; + } + }; + + /* Restore NRST value */ + writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr); +} diff --git a/arch/arm/include/asm/arch-at91/at91_common.h b/arch/arm/include/asm/arch-at91/at91_common.h index 3ca4d5b..59e2f43 100644 --- a/arch/arm/include/asm/arch-at91/at91_common.h +++ b/arch/arm/include/asm/arch-at91/at91_common.h @@ -26,5 +26,6 @@ void at91_plla_init(u32 pllar); void at91_mck_init(u32 mckr); void at91_pmc_init(void); void mem_init(void); +void at91_phy_reset(void); #endif /* AT91_COMMON_H */ diff --git a/board/BuS/vl_ma2sc/vl_ma2sc.c b/board/BuS/vl_ma2sc/vl_ma2sc.c index e2ae6fd..412ff3b 100644 --- a/board/BuS/vl_ma2sc/vl_ma2sc.c +++ b/board/BuS/vl_ma2sc/vl_ma2sc.c @@ -16,7 +16,6 @@ #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_pio.h> -#include <asm/arch/at91_rstc.h> #include <asm/arch/at91sam9263.h> #include <asm/arch/gpio.h> #include <asm/arch/at91_common.h> @@ -76,25 +75,12 @@ static void vl_ma2sc_nand_hw_init(void) #ifdef CONFIG_MACB static void vl_ma2sc_macb_hw_init(void) { - unsigned long erstl; at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; - at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC; + /* Enable clock */ writel(1 << ATMEL_ID_EMAC, &pmc->pcer); - erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; - - /* Need to reset PHY -> 500ms reset */ - writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) | - AT91_RSTC_MR_URSTEN, &rstc->mr); - - writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); - /* Wait for end hardware reset */ - while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) - ; - - /* Restore NRST value */ - writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr); + at91_phy_reset(); at91_macb_hw_init(); } diff --git a/board/afeb9260/afeb9260.c b/board/afeb9260/afeb9260.c index e1b1c10..ea9575d 100644 --- a/board/afeb9260/afeb9260.c +++ b/board/afeb9260/afeb9260.c @@ -13,7 +13,6 @@ #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> -#include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/io.h> #include <asm/arch/hardware.h> @@ -67,8 +66,6 @@ static void afeb9260_macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; - struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; - unsigned long erstl; /* Enable EMAC clock */ @@ -94,20 +91,7 @@ static void afeb9260_macb_hw_init(void) pin_to_mask(AT91_PIN_PA28), &pioa->pudr); - erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; - - /* Need to reset PHY -> 500ms reset */ - writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | - AT91_RSTC_MR_URSTEN, &rstc->mr); - writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); - - /* Wait for end hardware reset */ - while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) - ; - /* Restore NRST value */ - writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, - &rstc->mr); - + at91_phy_reset(); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 263de49..7f14af1 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -12,7 +12,6 @@ #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> -#include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <atmel_mci.h> @@ -73,8 +72,6 @@ static void at91sam9260ek_macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; - struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; - unsigned long erstl; /* Enable EMAC clock */ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); @@ -98,21 +95,7 @@ static void at91sam9260ek_macb_hw_init(void) pin_to_mask(AT91_PIN_PA28), &pioa->pudr); - erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; - - /* Need to reset PHY -> 500ms reset */ - writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | - AT91_RSTC_MR_URSTEN, &rstc->mr); - - writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); - - /* Wait for end hardware reset */ - while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) - ; - - /* Restore NRST value */ - writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, - &rstc->mr); + at91_phy_reset(); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 2e9246f..d42a173 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -12,7 +12,6 @@ #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> -#include <asm/arch/at91_rstc.h> #include <asm/arch/at91_matrix.h> #include <asm/arch/at91_pio.h> #include <asm/arch/clk.h> @@ -82,10 +81,9 @@ static void at91sam9263ek_nand_hw_init(void) #ifdef CONFIG_MACB static void at91sam9263ek_macb_hw_init(void) { - unsigned long erstl; at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; - at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC; + /* Enable clock */ writel(1 << ATMEL_ID_EMAC, &pmc->pcer); @@ -97,23 +95,10 @@ static void at91sam9263ek_macb_hw_init(void) * * PHY has internal pull-down */ - writel(1 << 25, &pio->pioc.pudr); writel((1 << 25) | (1 <<26), &pio->pioe.pudr); - erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; - - /* Need to reset PHY -> 500ms reset */ - writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) | - AT91_RSTC_MR_URSTEN, &rstc->mr); - - writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); - /* Wait for end hardware reset */ - while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) - ; - - /* Restore NRST value */ - writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr); + at91_phy_reset(); /* Re-enable pull-up */ writel(1 << 25, &pio->pioc.puer); diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c index 6a071f6..b7e2efd 100644 --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c @@ -12,7 +12,6 @@ #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> -#include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/clk.h> #include <lcd.h> @@ -88,8 +87,6 @@ static void at91sam9m10g45ek_macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; - struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; - unsigned long erstl; /* Enable clock */ writel(1 << ATMEL_ID_EMAC, &pmc->pcer); @@ -107,21 +104,7 @@ static void at91sam9m10g45ek_macb_hw_init(void) pin_to_mask(AT91_PIN_PA13), &pioa->pudr); - erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; - - /* Need to reset PHY -> 500ms reset */ - writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | - AT91_RSTC_MR_URSTEN, &rstc->mr); - - writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); - - /* Wait for end hardware reset */ - while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) - ; - - /* Restore NRST value */ - writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, - &rstc->mr); + at91_phy_reset(); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA15) | diff --git a/board/bluewater/snapper9260/snapper9260.c b/board/bluewater/snapper9260/snapper9260.c index 8a6919d..bfde129 100644 --- a/board/bluewater/snapper9260/snapper9260.c +++ b/board/bluewater/snapper9260/snapper9260.c @@ -14,7 +14,6 @@ #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> -#include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <net.h> #include <netdev.h> @@ -31,8 +30,6 @@ static void macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; - struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; - unsigned long erstl; /* Enable clock */ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); @@ -54,18 +51,7 @@ static void macb_hw_init(void) /* Enable ethernet power */ pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0); - /* Need to reset PHY -> 500ms reset */ - erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; - writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | - AT91_RSTC_MR_URSTEN, &rstc->mr); - writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); - - /* Wait for end hardware reset */ - while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) - ; - - /* Restore NRST value */ - writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr); + at91_phy_reset(); /* Bring the ethernet out of reset */ pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1); diff --git a/board/calao/sbc35_a9g20/sbc35_a9g20.c b/board/calao/sbc35_a9g20/sbc35_a9g20.c index ecf261c..2074a93 100644 --- a/board/calao/sbc35_a9g20/sbc35_a9g20.c +++ b/board/calao/sbc35_a9g20/sbc35_a9g20.c @@ -15,7 +15,6 @@ #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> -#include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) @@ -77,8 +76,6 @@ static void sbc35_a9g20_macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; - struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; - unsigned long erstl; /* Enable EMAC clock */ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); @@ -102,21 +99,7 @@ static void sbc35_a9g20_macb_hw_init(void) pin_to_mask(AT91_PIN_PA28), &pioa->pudr); - erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; - - /* Need to reset PHY -> 500ms reset */ - writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | - AT91_RSTC_MR_URSTEN, &rstc->mr); - - writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); - - /* Wait for end hardware reset */ - while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) - ; - - /* Restore NRST value */ - writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, - &rstc->mr); + at91_phy_reset(); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | diff --git a/board/eukrea/cpu9260/cpu9260.c b/board/eukrea/cpu9260/cpu9260.c index 5e1524e..274f72d 100644 --- a/board/eukrea/cpu9260/cpu9260.c +++ b/board/eukrea/cpu9260/cpu9260.c @@ -17,7 +17,6 @@ #include <asm/arch/at91_common.h> #include <asm/arch/at91_matrix.h> #include <asm/arch/at91_pmc.h> -#include <asm/arch/at91_rstc.h> #include <asm/arch/at91_pio.h> #include <asm/arch/clk.h> #include <asm/arch/hardware.h> @@ -89,29 +88,14 @@ static void cpu9260_nand_hw_init(void) #ifdef CONFIG_MACB static void cpu9260_macb_hw_init(void) { - unsigned long rstcmr; at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; - at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC; /* Enable clock */ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1); - rstcmr = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; - - /* Need to reset PHY -> 500ms reset */ - writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0xD) | - AT91_RSTC_MR_URSTEN, &rstc->mr); - - writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); - - /* Wait for end hardware reset */ - while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) - ; - - /* Restore NRST value */ - writel(AT91_RSTC_KEY | rstcmr | AT91_RSTC_MR_URSTEN, &rstc->mr); + at91_phy_reset(); at91_macb_hw_init(); } diff --git a/board/taskit/stamp9g20/stamp9g20.c b/board/taskit/stamp9g20/stamp9g20.c index 704a63b..27cdf77 100644 --- a/board/taskit/stamp9g20/stamp9g20.c +++ b/board/taskit/stamp9g20/stamp9g20.c @@ -19,7 +19,6 @@ #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> -#include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <watchdog.h> @@ -67,8 +66,6 @@ static void stamp9G20_nand_hw_init(void) static void stamp9G20_macb_hw_init(void) { struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; - struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; - unsigned long erstl; /* Enable the PHY Chip via PA26 on the Stamp 2 Adaptor */ at91_set_gpio_output(AT91_PIN_PA26, 0); @@ -91,33 +88,7 @@ static void stamp9G20_macb_hw_init(void) pin_to_mask(AT91_PIN_PA28), &pioa->pudr); - erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; - - /* Need to reset PHY -> 500ms reset */ - writel(AT91_RSTC_KEY | (AT91_RSTC_MR_ERSTL(13) & - ~AT91_RSTC_MR_URSTEN), &rstc->mr); - writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); - - /* Wait for end of hardware reset */ - unsigned long start = get_timer(0); - unsigned long timeout = 1000; /* 1000ms */ - - while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) { - - /* avoid shutdown by watchdog */ - WATCHDOG_RESET(); - mdelay(10); - - /* timeout for not getting stuck in an endless loop */ - if (get_timer(start) >= timeout) { - puts("*** ERROR: Timeout waiting for PHY reset!\n"); - break; - }; - }; - - /* Restore NRST value */ - writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, - &rstc->mr); + at91_phy_reset(); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 5e71898..14bac15 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -106,7 +106,7 @@ /* Ethernet */ #define CONFIG_MACB #define CONFIG_RESET_PHY_R - +#define CONFIG_AT91_WANTS_COMMON_PHY #define CONFIG_NET_RETRY_COUNT 20 /* USB */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 1c4bb81..73917b0 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -181,6 +181,7 @@ #define CONFIG_RMII 1 #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R 1 +#define CONFIG_AT91_WANTS_COMMON_PHY /* USB */ #define CONFIG_USB_ATMEL diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 0a1969d..b9aa036 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -275,6 +275,7 @@ #define CONFIG_RMII 1 #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R 1 +#define CONFIG_AT91_WANTS_COMMON_PHY /* USB */ #define CONFIG_USB_ATMEL diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 2095fe6..aaaa8ec 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -120,6 +120,7 @@ #define CONFIG_RMII #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R +#define CONFIG_AT91_WANTS_COMMON_PHY /* USB */ #define CONFIG_USB_EHCI diff --git a/include/configs/cpu9260.h b/include/configs/cpu9260.h index ccf36a5..22c0a09 100644 --- a/include/configs/cpu9260.h +++ b/include/configs/cpu9260.h @@ -310,6 +310,7 @@ #define CONFIG_RMII #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_MACB_SEARCH_PHY +#define CONFIG_AT91_WANTS_COMMON_PHY /* LEDS */ /* Status LED */ diff --git a/include/configs/sbc35_a9g20.h b/include/configs/sbc35_a9g20.h index cbcd4e1..7e16c45 100644 --- a/include/configs/sbc35_a9g20.h +++ b/include/configs/sbc35_a9g20.h @@ -115,6 +115,7 @@ #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R #define CONFIG_MACB_SEARCH_PHY +#define CONFIG_AT91_WANTS_COMMON_PHY /* USB */ #define CONFIG_USB_ATMEL diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 5436bae..5b957f0 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -59,6 +59,7 @@ #define CONFIG_RMII #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R +#define CONFIG_AT91_WANTS_COMMON_PHY #define CONFIG_TFTP_PORT #define CONFIG_TFTP_TSIZE diff --git a/include/configs/stamp9g20.h b/include/configs/stamp9g20.h index 248e657..51339b1 100644 --- a/include/configs/stamp9g20.h +++ b/include/configs/stamp9g20.h @@ -145,6 +145,7 @@ #ifdef CONFIG_MACB # define CONFIG_RMII /* use reduced MII inteface */ # define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */ +#define CONFIG_AT91_WANTS_COMMON_PHY /* BOOTP and DHCP options */ # define CONFIG_BOOTP_BOOTFILESIZE diff --git a/include/configs/vl_ma2sc.h b/include/configs/vl_ma2sc.h index 1489080..aacb84c 100644 --- a/include/configs/vl_ma2sc.h +++ b/include/configs/vl_ma2sc.h @@ -330,6 +330,7 @@ #define CONFIG_RMII #define CONFIG_NET_MULTI #define CONFIG_NET_RETRY_COUNT 5 +#define CONFIG_AT91_WANTS_COMMON_PHY #define CONFIG_OVERWRITE_ETHADDR_ONCE -- 1.8.3.1

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[U-Boot] [PATCH v4 0/7] arm: atmel: sama5d3: enable spl boot from SD card
by Bo Shen 01 Dec '13

01 Dec '13

This patch series enable spl boot from SD card, it only can boot u-boot itself. Changes in v4: - Using blank replace table after defined - Align the register define with datasheet - constify the ram_address and ddr configuration value - Add comments to DDR refresh timing register. Changes in v3: - Correct the clock enable code, the ID can not OR - Move to at91 common folder - Move plla and mck configure to spl.c file Changes in v2: - Move spl related code to at91-common folder Bo Shen (7): arm: atmel: sama5d3: correct the ID for DBGU and PIT arm: at91: pm9261: remove undefined bit in mckr arm: atmel: sama5d3: correct the error define of DIV arm: atmel: sama5d3: the offset of MULA is 18 arm: atmel: sama5d3: early enable PIO peripherals arm: atmel: add ddr2 initialization function arm: atmel: sama5d3: spl boot from fat fs SD card arch/arm/cpu/Makefile | 1 + arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/at91/sama5d3_devices.c | 2 +- arch/arm/cpu/armv7/at91/timer.c | 2 +- arch/arm/cpu/at91-common/Makefile | 11 +++ arch/arm/cpu/at91-common/mpddrc.c | 124 +++++++++++++++++++++++++ arch/arm/cpu/at91-common/spl.c | 90 ++++++++++++++++++ arch/arm/cpu/at91-common/u-boot-spl.lds | 50 ++++++++++ arch/arm/include/asm/arch-at91/at91_common.h | 4 + arch/arm/include/asm/arch-at91/at91_pmc.h | 8 +- arch/arm/include/asm/arch-at91/atmel_mpddrc.h | 115 +++++++++++++++++++++++ arch/arm/include/asm/arch-at91/spl.h | 20 ++++ board/atmel/sama5d3xek/sama5d3xek.c | 91 ++++++++++++++++++ include/configs/pm9261.h | 6 +- include/configs/sama5d3xek.h | 34 +++++++ 15 files changed, 551 insertions(+), 9 deletions(-) create mode 100644 arch/arm/cpu/at91-common/Makefile create mode 100644 arch/arm/cpu/at91-common/mpddrc.c create mode 100644 arch/arm/cpu/at91-common/spl.c create mode 100644 arch/arm/cpu/at91-common/u-boot-spl.lds create mode 100644 arch/arm/include/asm/arch-at91/atmel_mpddrc.h create mode 100644 arch/arm/include/asm/arch-at91/spl.h -- 1.7.9.5

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[U-Boot] Pull request for u-boot-marvell.git
by Prafulla Wadaskar 01 Dec '13

01 Dec '13

Hi Albert, Please kindly pull The following changes since commit 12eba1b49380988fd87cc0b3af44014cca8b71c4: Jeroen Hofstee (1): README: update ARM register usage are available in the git repository at: u-boot-marvell.git master branch. Holger Brunck (2): arm/km: drop unneeded define arm/km: make local function startup_allowed static Karlheinz Jerg (1): arm/km: add support for km_kirkwood_128m16 board board/keymile/km_arm/km_arm.c | 6 +----- boards.cfg | 1 + include/configs/km_kirkwood.h | 10 ++++++++++ 3 files changed, 12 insertions(+), 5 deletions(-) Regards... Prafulla . . .

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[U-Boot] [PATCH v2 0/9] Pending patches for merging
by Otavio Salvador 30 Nov '13

30 Nov '13

This sends all the patches I've been keeping in my tree and are awaiting to be applied. Basically: * Wandboard LCD support and environment changes * mx28evk environment changes * SabreSD eMMC installation support * IOMUX fix * FDT loadaddr fix Changes in v2: - Change loadaddr to allow use with more than 1G of RAM Otavio Salvador (9): wandboard: add Future Eletronics 7" WVGA LCD extension board wandboard: Use '0' as bootdelay but interruptable wandboard: Pass 'quiet' bootparam by default mx6sabresd: Add eMMC specific environment to allow U-Boot update imx: Easy enabling of SION per-pin using MUX_MODE_SION helper macro mx28evk: Use 512k for fdt partition to align it mx28evk: Add 'nandboot' environment command mx28evk: Extend environment to easy write of NAND system ARM: mx6: Change the FDT loading address to avoid overlaping arch/arm/include/asm/imx-common/iomux-v3.h | 2 + board/wandboard/wandboard.c | 240 ++++++++++++++++++++++++++--- include/configs/cgtqmx6eval.h | 2 +- include/configs/mx28evk.h | 55 ++++++- include/configs/mx6sabre_common.h | 25 ++- include/configs/mx6sabresd.h | 2 + include/configs/nitrogen6x.h | 2 +- include/configs/udoo.h | 2 +- include/configs/wandboard.h | 40 ++++- 9 files changed, 337 insertions(+), 33 deletions(-) -- 1.8.4.3

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[U-Boot] How to write jffs2 image to spi nor flash?
by Axel Lin 30 Nov '13

30 Nov '13

Hi list, I use "sf erase" + "sf write" commands to write root image to spi nor flash. It works for writing a ext2 image. However, if I use the same commands to write a jffs2 image I got a lot of "Magic bitmask 0x1985 not found at..." messages and "jffs2: inflate returned -3". jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f780: 0x4bbb instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f784: 0x50f2 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f788: 0x4230 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f78c: 0x76ac instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f790: 0x439c instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f794: 0xd9b9 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f798: 0x73d3 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f79c: 0x5758 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f7a0: 0x1b47 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f7a4: 0xf908 instead jffs2: Further such events for this erase block will not be printed So how to correctly write a jffs2 image to spi nor flash in u-boot? Thanks, Axel

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[U-Boot] Can a standalone application send data via Ethernet in U-Boot?
by rvijay435 29 Nov '13

29 Nov '13

In Linux, we have sendto and recvfrom calls to send and receive data from the external devices connected via Ethernet. Now I am executing my code on U-Boot as a standalone application. I need to replace these socket calls which should be independent of OS. Are there any APIs/drivers provided in U-Boot so that I can use them directly and transfer the data to and from the Target Board? If so where should I check for a processor specific driver? I am unable to find it. The board which I am using is a customized one based on MPC8548E processor. -- View this message in context: http://u-boot.10912.n7.nabble.com/Can-a-standalone-application-send-data-vi… Sent from the U-Boot mailing list archive at Nabble.com.

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