July 2012 - U-Boot

[U-Boot] [PATCH] fdt: Include arch specific gpio.h
by Michal Simek 13 Jul '12

13 Jul '12

Also include arch specific gpio.h which can contain gpio function implementation. Signed-off-by: Michal Simek <monstr(a)monstr.eu> CC: Simon Glass <sjg(a)chromium.org> --- lib/fdtdec.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/lib/fdtdec.c b/lib/fdtdec.c index cc09e06..b12eb77 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -25,6 +25,7 @@ #include <fdtdec.h> /* we need the generic GPIO interface here */ +#include <asm/gpio.h> #include <asm-generic/gpio.h> DECLARE_GLOBAL_DATA_PTR; -- 1.7.0.4

3 14

[U-Boot] [RFC][PATCH] net: nfs: extend NFS_TIMEOUT
by Tetsuyuki Kobayashi 12 Jul '12

12 Jul '12

I tried nfs command on KZM-A9-GT board and it fails every time with "ERROR: Cannot umount". Current NFS_TIMEOUT value is 2000UL. It seems too short. I changed this to 10000UL then it succeeds. Signed-off-by: Tetsuyuki Kobayashi <koba(a)kmckk.co.jp> --- net/nfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/net/nfs.c b/net/nfs.c index 5b99763..390c6ee 100644 --- a/net/nfs.c +++ b/net/nfs.c @@ -31,7 +31,7 @@ #define HASHES_PER_LINE 65 /* Number of "loading" hashes per line */ #define NFS_RETRY_COUNT 30 -#define NFS_TIMEOUT 2000UL +#define NFS_TIMEOUT 10000UL static int fs_mounted; static unsigned long rpc_id; -- 1.7.9.5

5 19

[U-Boot] Intro guide for configuring U-Boot for a custom board?
by Luciano Moretti 12 Jul '12

12 Jul '12

I've currently got a custom Freescale P2020 board that I'd like to evaluate Das U-Boot on. Is there a good guide to defining a configuration for a new board somewhere? Most of what I see in the documentation assumes that you are using an evaluation board that U-Boot has already been compiled & tested on. I'm looking for something that enumerates the configuration options and provides a short-list of things that need to be configured for a board to work. Thank you for your assistance.

2 1

[U-Boot] [V4] arm: Fix to mistake clean the memory space
by Zhong Hongbo 12 Jul '12

12 Jul '12

From: Zhong Hongbo <bocui107(a)gmail.com> In currently, when __bss_start is equal to __bss_end__, The bss loop will clear all the things in memory space. But just only when __bss_end__ greater than __bss_start__, we do the clear bss section operation. Signed-off-by: Zhong Hongbo <bocui107(a)gmail.com> --- Change for V1 - Fixed bss clear operation, no just skip it. - Adjust the commit information Change for V2 - Modify all the bss clean operation for arm platform - Adjust the title Change for V3 - Modify the history information and the tag ot the patch --- arch/arm/cpu/arm1136/start.S | 8 +++++--- arch/arm/cpu/arm1176/start.S | 9 +++++---- arch/arm/cpu/arm720t/start.S | 8 +++++--- arch/arm/cpu/arm920t/start.S | 8 +++++--- arch/arm/cpu/arm925t/start.S | 8 +++++--- arch/arm/cpu/arm946es/start.S | 8 +++++--- arch/arm/cpu/arm_intcm/start.S | 8 +++++--- arch/arm/cpu/armv7/start.S | 8 +++++--- arch/arm/cpu/ixp/start.S | 8 +++++--- arch/arm/cpu/lh7a40x/start.S | 8 +++++--- arch/arm/cpu/pxa/start.S | 8 +++++--- arch/arm/cpu/s3c44b0/start.S | 8 +++++--- arch/arm/cpu/sa1100/start.S | 8 +++++--- 13 files changed, 65 insertions(+), 40 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index c0db96c..2483c63 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -251,10 +251,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: #endif /* #ifndef CONFIG_SPL_BUILD */ /* diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 848144a..d613641 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -351,11 +351,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l - + b clbss_l +clbss_e: #ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 540e3c2..3b97e80 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -228,10 +228,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 8c5612c..9b8604e 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -271,10 +271,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index dbb93ef..1a54416 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -265,10 +265,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 89ba558..b4d1d2d 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -236,10 +236,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - blo clbss_l + b clbss_l +clbss_e: #endif /* diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index 2033b36..b85e7d4 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -232,10 +232,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 22a3ced..aee27fd 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -259,10 +259,12 @@ clear_bss: #endif mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: /* * We are done. Do not return, instead branch to second part of board diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index cb32121..59c359a 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -334,10 +334,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 62de8b8..bd68cd4 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -245,10 +245,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: #endif /* diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index ba0de8f..33c73f6 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -258,10 +258,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: #endif /* #ifndef CONFIG_SPL_BUILD */ /* diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index a29d5b4..8daf26c 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -217,10 +217,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index 92546d8..bcea2a8 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -221,10 +221,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: #endif /* -- 1.7.5.4

3 2

[U-Boot] [PATCH] beagle: only call DSS code when #defined CONFIG_VIDEO_OMAP3
by Peter Meerwald 12 Jul '12

12 Jul '12

From: Peter Meerwald <p.meerwald(a)bct-electronic.com> Signed-off-by: Peter Meerwald <p.meerwald(a)bct-electronic.com> --- board/ti/beagle/beagle.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index a02a350..f13f1be 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -245,6 +245,7 @@ unsigned int get_expansion_id(void) return expansion_config.device_vendor; } +#ifdef CONFIG_VIDEO_OMAP3 /* * Configure DSS to display background color on DVID * Configure VENC to display color bar on S-Video @@ -299,6 +300,7 @@ static void beagle_dvi_pup(void) break; } } +#endif /* * Routine: misc_init_r @@ -483,9 +485,11 @@ int misc_init_r(void) dieid_num_r(); +#ifdef CONFIG_VIDEO_OMAP3 beagle_dvi_pup(); beagle_display_init(); omap3_dss_enable(); +#endif return 0; } -- 1.7.5.4

3 4

[U-Boot] [PATCH] powerpc/mpc85xx: Change NMG_CPU_A011 workaround condition
by York Sun 12 Jul '12

12 Jul '12

This erratum applies to the following SoCs: P4080 rev 1.0, 2.0, fixed in rev 3.0 P2041 rev 1.0, 1.1, fixed in rev 2.0 P3041 rev 1.0, 1.1, fixed in rev 2.0. Workaround for erratum NMG_CPU_A011 is now enabled by default. It can be disabled by hwconfig with syntax: fsl_cpu_a011:disable Signed-off-by: York Sun <yorksun(a)freescale.com> --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 18 +++++++++++------- arch/powerpc/cpu/mpc85xx/release.S | 2 +- 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 026fa63..58b10fb 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -317,14 +317,15 @@ int cpu_init_r(void) * CPU22 and NMG_CPU_A011 share the same workaround. * CPU22 applies to P4080 rev 1.0, 2.0, fixed in 3.0 * NMG_CPU_A011 applies to P4080 rev 1.0, 2.0, fixed in 3.0 - * also applies to P3041 rev 1.0, 1.1, P2041 rev 1.0, 1.1 - * NMG_CPU_A011 is activated by hwconfig with syntax: - * fsl_cpu_a011:enable + * also applies to P3041 rev 1.0, 1.1, P2041 rev 1.0, 1.1, both + * fixed in 2.0. NMG_CPU_A011 is activated by default and can + * be disabled by hwconfig with syntax: + * + * fsl_cpu_a011:disable */ extern int enable_cpu_a011_workaround; #ifdef CONFIG_SYS_P4080_ERRATUM_CPU22 - enable_cpu_a011_workaround = - (SVR_SOC_VER(svr) != SVR_P4080 || SVR_MAJ(svr) < 3); + enable_cpu_a011_workaround = (SVR_MAJ(svr) < 3); #else char buffer[HWCONFIG_BUFFER_SIZE]; char *buf = NULL; @@ -332,9 +333,12 @@ int cpu_init_r(void) if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0) buf = buffer; - if (hwconfig_arg_cmp_f("fsl_cpu_a011", "enable", buf) > 0) { + if (hwconfig_arg_cmp_f("fsl_cpu_a011", "disable", buf) > 0) + enable_cpu_a011_workaround = 0; + else { enable_cpu_a011_workaround = - (SVR_SOC_VER(svr) != SVR_P4080 || SVR_MAJ(svr) < 3); + (SVR_SOC_VER(svr) == SVR_P4080 && SVR_MAJ(svr) < 3) || + (SVR_SOC_VER(svr) != SVR_P4080 && SVR_MAJ(svr) < 2); } #endif if (enable_cpu_a011_workaround) { diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S index b8d4a37..1555a9b 100644 --- a/arch/powerpc/cpu/mpc85xx/release.S +++ b/arch/powerpc/cpu/mpc85xx/release.S @@ -359,7 +359,7 @@ __spin_table: .align L1_CACHE_SHIFT .global enable_cpu_a011_workaround enable_cpu_a011_workaround: - .long 0 + .long 1 /* Fill in the empty space. The actual reset vector is * the last word of the page */ -- 1.7.0.4

1 0

[U-Boot] Ethernet on PandaBoard
by Gary Thomas 12 Jul '12

12 Jul '12

I just tried rev 211e47549b668c7cdd8658c0413a272f0d0495d4 (v2012.07-rc1) for my PandaBoard. Sadly, this is failing when I try to use the onboard ethernet (EHCI USB based) controller: U-Boot SPL 2012.07-rc1 (Jul 11 2012 - 06:56:00) OMAP4430 ES2.2 OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img U-Boot 2012.07-rc1 (Jul 11 2012 - 06:56:00) CPU : OMAP4430 ES2.2 Board: OMAP4 Panda I2C: ready DRAM: 1 GiB MMC: OMAP SD/MMC: 0 Using default environment In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 Panda # usb start (Re)start USB... USB: Register 1313 NbrPorts 3 data abort pc : [<bff9acb0>] lr : [<bff9ac91>] sp : bff08e28 ip : 0000000f fp : 00000000 r10: bff0a370 r9 : 00000002 r8 : bff08f68 r7 : bffbb070 r6 : 00000000 r5 : bffaee04 r4 : 00001313 r3 : bffaee04 r2 : 98000000 r1 : 0000000a r0 : 00000019 Flags: Nzcv IRQs off FIQs off Mode SVC_32 Resetting CPU ... Anyone else see this? Ideas? How do I map these addresses (PC=0xbff9acb0) to the ones in my u-boot ELF image (so I can figure out what went wrong)? Thanks -- ------------------------------------------------------------ Gary Thomas | Consulting for the MLB Associates | Embedded world ------------------------------------------------------------

3 14

[U-Boot] [PATCH v4] Correct corrupted NAND Flash access on KARO TX25 modules
by Gachet Daniel 12 Jul '12

12 Jul '12

Hi Scott and Stefano, You will find below the newest patch for the NAND flash access problem on the TX25 module. I hope this version is fulfilling all your expectations. Cordially, Daniel diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 936186f..08fbb12 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -48,6 +48,17 @@ * Reading or writing a 2K or 4K page requires only 1 FDI/FDO cycle. * Also some of registers are moved and/or changed meaning as seen below. */ +/* + * NAND Flash access mode on MX25 + * + * The MX25 NAND Flash Controller supports two modes to access the Flash: + * a) symmetric mode (one Flash clock cycle per access) or + * b) asymmetric mode (two Flash clock cycles per access) + * + * By default the NAND Flash Controller is configured in the symmetric mode. + * To select the asymmetric mode, the configuration option + * CONFIG_SYS_NAND_MXC_NFC_TWO_CYCLES has to be selected. + */ #if defined(CONFIG_MX31) || defined(CONFIG_MX27) #define MXC_NFC_V1 #elif defined(CONFIG_MX25) || defined(CONFIG_MX35) @@ -1290,7 +1301,9 @@ static void mxc_setup_config1(void) uint16_t tmp; tmp = readw(&host->regs->nfc_config1); +#ifndef CONFIG_SYS_NAND_MXC_NFC_TWO_CYCLES tmp |= NFC_ONE_CYCLE; +#endif tmp |= NFC_4_8N_ECC; writew(tmp, &host->regs->nfc_config1); if (host->pagesize_2k) diff --git a/include/configs/tx25.h b/include/configs/tx25.h index 6821528..8fa51cb 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -109,6 +109,7 @@ /* NAND */ #define CONFIG_NAND_MXC #define CONFIG_NAND_MXC_V1_1 +#define CONFIG_SYS_NAND_MXC_NFC_TWO_CYCLES /* 2 cycles to access NAND Flash */ #define CONFIG_MXC_NAND_REGS_BASE (0xBB000000) #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE (0xBB000000)

2 1

[U-Boot] [V3] arm: Fix to mistake clean the memory space
by Zhong Hongbo 12 Jul '12

12 Jul '12

From: Zhong Hongbo <bocui107(a)gmail.com> In currently, when __bss_start is equal to __bss_end__, The bss loop will clear all the things in memory space. But just only when __bss_end__ greater than __bss_start__, we do the clear bss section operation. Signed-off-by: Zhong Hongbo <bocui107(a)gmail.com> --- Change for V2 - Fixed bss clear operation, no just skip it. - Adjust the commit information Change for V3 - Modify all the bss clean operation for arm platform - Adjust the title --- arch/arm/cpu/arm1136/start.S | 8 +++++--- arch/arm/cpu/arm1176/start.S | 9 +++++---- arch/arm/cpu/arm720t/start.S | 8 +++++--- arch/arm/cpu/arm920t/start.S | 8 +++++--- arch/arm/cpu/arm925t/start.S | 8 +++++--- arch/arm/cpu/arm946es/start.S | 8 +++++--- arch/arm/cpu/arm_intcm/start.S | 8 +++++--- arch/arm/cpu/armv7/start.S | 8 +++++--- arch/arm/cpu/ixp/start.S | 8 +++++--- arch/arm/cpu/lh7a40x/start.S | 8 +++++--- arch/arm/cpu/pxa/start.S | 8 +++++--- arch/arm/cpu/s3c44b0/start.S | 8 +++++--- arch/arm/cpu/sa1100/start.S | 8 +++++--- 13 files changed, 65 insertions(+), 40 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index c0db96c..2483c63 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -251,10 +251,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: #endif /* #ifndef CONFIG_SPL_BUILD */ /* diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 848144a..d613641 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -351,11 +351,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l - + b clbss_l +clbss_e: #ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 540e3c2..3b97e80 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -228,10 +228,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 8c5612c..9b8604e 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -271,10 +271,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index dbb93ef..1a54416 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -265,10 +265,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 89ba558..b4d1d2d 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -236,10 +236,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - blo clbss_l + b clbss_l +clbss_e: #endif /* diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index 2033b36..b85e7d4 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -232,10 +232,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 22a3ced..aee27fd 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -259,10 +259,12 @@ clear_bss: #endif mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: /* * We are done. Do not return, instead branch to second part of board diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index cb32121..59c359a 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -334,10 +334,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 62de8b8..bd68cd4 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -245,10 +245,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: #endif /* diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index ba0de8f..33c73f6 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -258,10 +258,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: #endif /* #ifndef CONFIG_SPL_BUILD */ /* diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index a29d5b4..8daf26c 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -217,10 +217,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index 92546d8..bcea2a8 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -221,10 +221,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x00000000 /* clear */ -clbss_l:str r2, [r0] /* clear loop... */ +clbss_l:cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: #endif /* -- 1.7.5.4

3 5

Re: [U-Boot] [PATCH v2] arm: cm4008, cm41xx: set gd->ram_size in dram_init
by Yann Vernier 12 Jul '12

12 Jul '12

On Thursday 05 July 2012 16:48:22 you wrote: > On 05.07.2012 14:11, Yann Vernier wrote: > > Leave dram_init_banksize to set up the bank info data. > > ram_size was previously uninitialized. Also, generalize > > lowlevel assembly to support more RAM options. > > > > Signed-off-by: Yann Vernier <yann.vernier(a)orsoc.se> > > --- > > > > Changes for v2: > > - Update to use CONFIG_SYS_SDRAM_ constants > > - Update cm41xx also > > - Map SDRAM to match configuration > > > > --- > > > > arch/arm/cpu/arm920t/ks8695/lowlevel_init.S | 8 +++----- > > board/cm4008/cm4008.c | 5 +++-- > > board/cm41xx/cm41xx.c | 5 +++-- > > include/configs/cm4008.h | 5 ++--- > > include/configs/cm41xx.h | 5 ++--- > > 5 files changed, 13 insertions(+), 15 deletions(-) > > > > diff --git a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S > > b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S index e9f1227..df13de6 > > 100644 > > --- a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S > > +++ b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S > > > > @@ -131,11 +131,9 @@ highflash: > > * before relocating, we have to setup RAM timing > > */ > > > > ldr r1, =(KS8695_IO_BASE+KS8695_SDRAM_CTRL0) > > > > -#if (PHYS_SDRAM_1_SIZE == 0x02000000) > > - ldr r2, =0x7fc0000e /* 32MB */ > > -#else > > - ldr r2, =0x3fc0000e /* 16MB */ > > -#endif > > + /* 8 column address bits, 4 banks, 32 bits data width */ > > + ldr r2, > > =((CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE-0x10000)<<(22-16) | \ + > > (CONFIG_SYS_SDRAM_BASE>>(16-12) | 0x00e)) > > ugh ... magic. Will it work for every possible setting? > How about one setting CONFIG_SYS_SDRAM_BASE != 0x0? I the base address > related to register content in any way? > > Would be great to have a little documentation here why it is shifted > that way, unfortunately I can not find a KS8695 spec in the net. Don't > get me wrong it is ok to do so. I think it is way better than hard > coding the values like before but would be great to understand why it is > done that way. > > Best regards > > Andreas Bießmann It's not a guarded secret, although it is far from obvious where to find it. One way is micrel.com - Products - Ethernet ICs / ARM based SOC's - HW Design Kit. Within that zip file, KS8695X_EVAL_HW_RV4.0_DP/RegDescription/KS8695X Register Description v1.1.pdf My personal thought on the matter is that the existing code is rather heavy on magic numbers, ergo the comment once I figured out what the first ROM reconfiguration was even for. The memory mapping registers allow you to reconfigure the address recognition for each memory region. The low 16 bits are not configurable, so you can only relocate to 64KiB aligned addresses. Bits 25-16 are configured as an inclusive range, with the top value in bits 31-22 of the register, and the bottom in bits 21-12. The lower bits configure things like SDRAM geometry or SRAM/ROM access times, with one value meaning disabled. Come to think of it, I fear I've miscalculated where the high region actually is. That comment in lowlevel_init should read 48MB and 32MB, not 768 and 512. I'll fix that and insert a little more explanatory text.

4 7