June 2012 - U-Boot

[U-Boot] [PATCH 1/1] tegra: seaboard: Initialize multiple USB controllers at once
by Jim Lin 14 Jun '12

14 Jun '12

From: Jim Lin <jilin(a)nvidia.com> Add support for command line "usb reset" or "usb start" to initialize , "usb stop" to stop multiple USB controllers at once. Other commands like "usb tree" also support multiple controllers. New added definitions in header file are: CONFIG_USB_INIT_MULTI CONFIG_USB_MAX_CONTROLLER_COUNT Signed-off-by: Jim Lin <jilin(a)nvidia.com> --- arch/arm/cpu/armv7/tegra2/usb.c | 15 +++ arch/arm/include/asm/arch-tegra2/usb.h | 4 + common/cmd_usb.c | 10 ++ common/usb.c | 108 ++++++++++++++++++ common/usb_hub.c | 4 + drivers/usb/host/ehci-hcd.c | 192 ++++++++++++++++++++++++++++++++ drivers/usb/host/ehci-tegra.c | 17 +++- drivers/usb/host/ehci.h | 5 + include/configs/seaboard.h | 2 + include/usb.h | 12 ++ 10 files changed, 368 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/armv7/tegra2/usb.c b/arch/arm/cpu/armv7/tegra2/usb.c index c80de7f..3d2cfb9 100644 --- a/arch/arm/cpu/armv7/tegra2/usb.c +++ b/arch/arm/cpu/armv7/tegra2/usb.c @@ -352,7 +352,11 @@ int tegrausb_start_port(unsigned portnum, u32 *hccr, u32 *hcor) if (portnum >= port_count) return -1; +#ifdef CONFIG_USB_INIT_MULTI + tegrausb_stop_port(portnum); +#else tegrausb_stop_port(); +#endif set_host_mode(&port[portnum]); usbctlr = port[portnum].reg; @@ -362,6 +366,16 @@ int tegrausb_start_port(unsigned portnum, u32 *hccr, u32 *hcor) return 0; } +#ifdef CONFIG_USB_INIT_MULTI +int tegrausb_stop_port(unsigned portnum) +{ + struct usb_ctlr *usbctlr; + + if (portnum >= port_count) + return -1; + + usbctlr = port[portnum].reg; +#else int tegrausb_stop_port(void) { struct usb_ctlr *usbctlr; @@ -370,6 +384,7 @@ int tegrausb_stop_port(void) return -1; usbctlr = port[port_current].reg; +#endif /* Stop controller */ writel(0, &usbctlr->usb_cmd); diff --git a/arch/arm/include/asm/arch-tegra2/usb.h b/arch/arm/include/asm/arch-tegra2/usb.h index 638033b..119d7b4 100644 --- a/arch/arm/include/asm/arch-tegra2/usb.h +++ b/arch/arm/include/asm/arch-tegra2/usb.h @@ -247,6 +247,10 @@ int tegrausb_start_port(unsigned portnum, u32 *hccr, u32 *hcor); * * @return 0 if ok, -1 if no port was active */ +#ifdef CONFIG_USB_INIT_MULTI +int tegrausb_stop_port(unsigned portnum); +#else int tegrausb_stop_port(void); +#endif #endif /* _TEGRA_USB_H_ */ diff --git a/common/cmd_usb.c b/common/cmd_usb.c index 9eba271..4c01a78 100644 --- a/common/cmd_usb.c +++ b/common/cmd_usb.c @@ -553,7 +553,17 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } if (strncmp(argv[1], "tree", 4) == 0) { printf("\nDevice Tree:\n"); +#ifdef CONFIG_USB_INIT_MULTI + for (i = 0; i < USB_MAX_DEVICE; i++) { + dev = usb_get_dev_index(i); + if (dev == NULL) + break; + if (dev->parent == NULL) + usb_show_tree(dev); + } +#else usb_show_tree(usb_get_dev_index(0)); +#endif return 0; } if (strncmp(argv[1], "inf", 3) == 0) { diff --git a/common/usb.c b/common/usb.c index 1ec30bc..b4275c5 100644 --- a/common/usb.c +++ b/common/usb.c @@ -81,6 +81,86 @@ char usb_started; /* flag for the started/stopped USB status */ */ static void usb_scan_devices(void); +#ifdef CONFIG_USB_INIT_MULTI +/*************************************************************************** + * Init USB Device + */ + +int usb_init(void) +{ + void *ctrl; + int i; + struct usb_device *dev; + + running = 0; + dev_index = 0; + asynch_allowed = 1; + usb_hub_reset(); + + /* first make all devices unknown */ + for (i = 0; i < USB_MAX_DEVICE; i++) { + memset(&usb_dev[i], 0, sizeof(struct usb_device)); + usb_dev[i].devnum = -1; + } + + /* init low_level USB */ + printf("USB: "); + for (i = 0; i < CONFIG_USB_MAX_CONTROLLER_COUNT; i++) { + /* init low_level USB */ + ctrl = usb_lowlevel_init(i); + /* + * if lowlevel init is OK, scan the bus for devices + * i.e. search HUBs and configure them + */ + if (ctrl) { + running = 1; + + printf("scanning bus for devices... "); + dev = usb_alloc_new_device(ctrl); + /* + * device 0 is always present + * (root hub, so let it analyze) + */ + if (dev) + usb_new_device(dev); + } + } + + if (running) { + if (!dev_index) + printf("No USB Device found\n"); + else + printf("%d USB Device(s) found\n", dev_index); +#ifdef CONFIG_USB_KEYBOARD + drv_usb_kbd_init(); +#endif + USB_PRINTF("scan end\n"); + usb_started = 1; + return 0; + } else { + printf("Error, couldn't init Lowlevel part\n"); + usb_started = 0; + return -1; + } +} + +/****************************************************************************** + * Stop USB this stops the LowLevel Part and deregisters USB devices. + */ +int usb_stop(void) +{ + int i; + + if (usb_started) { + asynch_allowed = 1; + usb_started = 0; + usb_hub_reset(); + for (i = 0; i < CONFIG_USB_MAX_CONTROLLER_COUNT; i++) + usb_lowlevel_stop(i); + } + return 0; +} +#else /*************************************************************************** * Init USB Device */ @@ -126,6 +206,7 @@ int usb_stop(void) } return res; } +#endif /* * disables the asynch behaviour of the control message. This is used for data @@ -747,7 +828,31 @@ struct usb_device *usb_get_dev_index(int index) return &usb_dev[index]; } +#ifdef CONFIG_USB_INIT_MULTI +/* Save input pointer 'controller' into device structure. + * returns a pointer of a new device structure or NULL, if + * no device struct is available + */ +struct usb_device *usb_alloc_new_device(void *controller) +{ + int i; + USB_PRINTF("New Device %d\n", dev_index); + if (dev_index == USB_MAX_DEVICE) { + printf("ERROR, too many USB Devices, max=%d\n", USB_MAX_DEVICE); + return NULL; + } + /* default Address is 0, real addresses start with 1 */ + usb_dev[dev_index].devnum = dev_index + 1; + usb_dev[dev_index].maxchild = 0; + for (i = 0; i < USB_MAXCHILDREN; i++) + usb_dev[dev_index].children[i] = NULL; + usb_dev[dev_index].parent = NULL; + usb_dev[dev_index].controller = controller; + dev_index++; + return &usb_dev[dev_index - 1]; +} +#else /* returns a pointer of a new device structure or NULL, if * no device struct is available */ @@ -769,6 +874,7 @@ struct usb_device *usb_alloc_new_device(void) return &usb_dev[dev_index - 1]; } +#endif /* * By the time we get here, the device has gotten a new device ID @@ -940,6 +1046,7 @@ int usb_new_device(struct usb_device *dev) return 0; } +#ifndef CONFIG_USB_INIT_MULTI /* build device Tree */ static void usb_scan_devices(void) { @@ -964,5 +1071,6 @@ static void usb_scan_devices(void) #endif USB_PRINTF("scan end\n"); } +#endif /* EOF */ diff --git a/common/usb_hub.c b/common/usb_hub.c index e0edaad..6c27761 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -243,7 +243,11 @@ void usb_hub_port_connect_change(struct usb_device *dev, int port) mdelay(200); /* Allocate a new device struct for it */ +#ifdef CONFIG_USB_INIT_MULTI + usb = usb_alloc_new_device(dev->controller); +#else usb = usb_alloc_new_device(); +#endif if (portstatus & USB_PORT_STAT_HIGH_SPEED) usb->speed = USB_SPEED_HIGH; diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 38d6ae0..7d9d33a 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -29,12 +29,25 @@ #include "ehci.h" +#ifdef CONFIG_USB_INIT_MULTI +static struct ehci_ctrl { + struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ + volatile struct ehci_hcor *hcor; + int rootdev; + uint16_t portreset; + struct QH qh_list __attribute__((aligned(32))); + struct QH qh_pool __attribute__((aligned(32))); + struct qTD td_pool[3] __attribute__((aligned (32))); + int ntds; +} ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT]; +#else int rootdev; struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ volatile struct ehci_hcor *hcor; static uint16_t portreset; static struct QH qh_list __attribute__((aligned(32))); +#endif static struct descriptor { struct usb_hub_descriptor hub; @@ -230,7 +243,11 @@ static void ehci_free(void *p, size_t sz) } +#ifdef CONFIG_USB_INIT_MULTI +static int ehci_reset(volatile struct ehci_hcor *hcor) +#else static int ehci_reset(void) +#endif { uint32_t cmd; uint32_t tmp; @@ -266,6 +283,33 @@ out: return ret; } +#ifdef CONFIG_USB_INIT_MULTI +static void *ehci_alloc(struct ehci_ctrl *ctrl, size_t sz, size_t align) +{ + void *p; + + switch (sz) { + case sizeof(struct QH): + p = &ctrl->qh_pool; + ctrl->ntds = 0; + break; + case sizeof(struct qTD): + if (ctrl->ntds == 3) { + debug("out of TDs\n"); + return NULL; + } + p = &ctrl->td_pool[ctrl->ntds]; + ctrl->ntds++; + break; + default: + debug("unknown allocation size\n"); + return NULL; + } + + memset(p, 0, sz); + return p; +} +#else static void *ehci_alloc(size_t sz, size_t align) { static struct QH qh __attribute__((aligned(32))); @@ -294,6 +338,7 @@ static void *ehci_alloc(size_t sz, size_t align) memset(p, 0, sz); return p; } +#endif static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz) { @@ -336,6 +381,10 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, uint32_t cmd; int timeout; int ret = 0; +#ifdef CONFIG_USB_INIT_MULTI + struct ehci_ctrl *ctrl = dev->controller; + volatile struct ehci_hcor *hcor = ctrl->hcor; +#endif debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe, buffer, length, req); @@ -346,12 +395,20 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, le16_to_cpu(req->value), le16_to_cpu(req->value), le16_to_cpu(req->index)); +#ifdef CONFIG_USB_INIT_MULTI + qh = (struct QH *) ehci_alloc(ctrl, sizeof(struct QH), 32); +#else qh = ehci_alloc(sizeof(struct QH), 32); +#endif if (qh == NULL) { debug("unable to allocate QH\n"); return -1; } +#ifdef CONFIG_USB_INIT_MULTI + qh->qh_link = cpu_to_hc32((uint32_t)&ctrl->qh_list | QH_LINK_TYPE_QH); +#else qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); +#endif c = (usb_pipespeed(pipe) != USB_SPEED_HIGH && usb_pipeendpoint(pipe) == 0) ? 1 : 0; endpt = (8 << 28) | @@ -376,7 +433,11 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)); if (req != NULL) { +#ifdef CONFIG_USB_INIT_MULTI + td = ehci_alloc(ctrl, sizeof(struct qTD), 32); +#else td = ehci_alloc(sizeof(struct qTD), 32); +#endif if (td == NULL) { debug("unable to allocate SETUP td\n"); goto fail; @@ -398,7 +459,11 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, } if (length > 0 || req == NULL) { +#ifdef CONFIG_USB_INIT_MULTI + td = ehci_alloc(ctrl, sizeof(struct qTD), 32); +#else td = ehci_alloc(sizeof(struct qTD), 32); +#endif if (td == NULL) { debug("unable to allocate DATA td\n"); goto fail; @@ -422,7 +487,11 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, } if (req != NULL) { +#ifdef CONFIG_USB_INIT_MULTI + td = ehci_alloc(ctrl, sizeof(struct qTD), 32); +#else td = ehci_alloc(sizeof(struct qTD), 32); +#endif if (td == NULL) { debug("unable to allocate ACK td\n"); goto fail; @@ -440,10 +509,17 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, tdp = &td->qt_next; } +#ifdef CONFIG_USB_INIT_MULTI + ctrl->qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH); + + /* Flush dcache */ + ehci_flush_dcache(&ctrl->qh_list); +#else qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH); /* Flush dcache */ ehci_flush_dcache(&qh_list); +#endif usbsts = ehci_readl(&hcor->or_usbsts); ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f)); @@ -466,7 +542,11 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, timeout = USB_TIMEOUT_MS(pipe); do { /* Invalidate dcache */ +#ifdef CONFIG_USB_INIT_MULTI + ehci_invalidate_dcache(&ctrl->qh_list); +#else ehci_invalidate_dcache(&qh_list); +#endif token = hc32_to_cpu(vtd->qt_token); if (!(token & 0x80)) break; @@ -490,7 +570,12 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, goto fail; } +#ifdef CONFIG_USB_INIT_MULTI + ctrl->qh_list.qh_link = cpu_to_hc32((uint32_t)&ctrl->qh_list + | QH_LINK_TYPE_QH); +#else qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); +#endif token = hc32_to_cpu(qh->qh_overlay.qt_token); if (!(token & 0x80)) { @@ -561,6 +646,11 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, int len, srclen; uint32_t reg; uint32_t *status_reg; +#ifdef CONFIG_USB_INIT_MULTI + struct ehci_ctrl *ctrl = dev->controller; + struct ehci_hccr *hccr = ctrl->hccr; + volatile struct ehci_hcor *hcor = ctrl->hcor; +#endif if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) { printf("The request port(%d) is not configured\n", @@ -633,7 +723,11 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, break; case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): debug("USB_REQ_SET_ADDRESS\n"); +#ifdef CONFIG_USB_INIT_MULTI + ctrl->rootdev = le16_to_cpu(req->value); +#else rootdev = le16_to_cpu(req->value); +#endif break; case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: debug("USB_REQ_SET_CONFIGURATION\n"); @@ -683,7 +777,11 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, tmpbuf[2] |= USB_PORT_STAT_C_ENABLE; if (reg & EHCI_PS_OCC) tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT; +#ifdef CONFIG_USB_INIT_MULTI + if (ctrl->portreset & (1 << le16_to_cpu(req->index))) +#else if (portreset & (1 << le16_to_cpu(req->index))) +#endif tmpbuf[2] |= USB_PORT_STAT_C_RESET; srcptr = tmpbuf; @@ -735,8 +833,13 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, ret = handshake(status_reg, EHCI_PS_PR, 0, 2 * 1000); if (!ret) +#ifdef CONFIG_USB_INIT_MULTI + ctrl->portreset |= + 1 << le16_to_cpu(req->index); +#else portreset |= 1 << le16_to_cpu(req->index); +#endif else printf("port(%d) reset error\n", le16_to_cpu(req->index) - 1); @@ -768,7 +871,11 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC; break; case USB_PORT_FEAT_C_RESET: +#ifdef CONFIG_USB_INIT_MULTI + ctrl->portreset &= ~(1 << le16_to_cpu(req->index)); +#else portreset &= ~(1 << le16_to_cpu(req->index)); +#endif break; default: debug("unknown feature %x\n", le16_to_cpu(req->value)); @@ -804,6 +911,82 @@ unknown: return -1; } +#ifdef CONFIG_USB_INIT_MULTI +int usb_lowlevel_stop(int index) +{ + return ehci_hcd_stop(index); +} + +void *usb_lowlevel_init(int index) +{ + uint32_t reg; + uint32_t cmd; + struct ehci_hccr *hccr; + volatile struct ehci_hcor *hcor; + struct QH *qh_list; + + if (ehci_hcd_init(index, &hccr, (struct ehci_hcor **)&hcor) != 0) + return NULL; + + /* EHCI spec section 4.1 */ + if (ehci_reset(hcor) != 0) + return NULL; + +#if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET) + if (ehci_hcd_init(index, &hccr, (struct ehci_hcor **)&hcor) != 0) + return NULL; +#endif + ehcic[index].hccr = hccr; + ehcic[index].hcor = hcor; + qh_list = &ehcic[index].qh_list; + + /* Set head of reclaim list */ + memset(qh_list, 0, sizeof(*qh_list)); + qh_list->qh_link = cpu_to_hc32((uint32_t)qh_list | QH_LINK_TYPE_QH); + qh_list->qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12)); + qh_list->qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE); + qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); + qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); + qh_list->qh_overlay.qt_token = cpu_to_hc32(0x40); + + /* Set async. queue head pointer. */ + ehci_writel(&hcor->or_asynclistaddr, (uint32_t)qh_list); + + reg = ehci_readl(&hccr->cr_hcsparams); + descriptor.hub.bNbrPorts = HCS_N_PORTS(reg); + printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts); + /* Port Indicators */ + if (HCS_INDICATOR(reg)) + descriptor.hub.wHubCharacteristics |= 0x80; + /* Port Power Control */ + if (HCS_PPC(reg)) + descriptor.hub.wHubCharacteristics |= 0x01; + + /* Start the host controller. */ + cmd = ehci_readl(&hcor->or_usbcmd); + /* + * Philips, Intel, and maybe others need CMD_RUN before the + * root hub will detect new devices (why?); NEC doesn't + */ + cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); + cmd |= CMD_RUN; + ehci_writel(&hcor->or_usbcmd, cmd); + + /* take control over the ports */ + cmd = ehci_readl(&hcor->or_configflag); + cmd |= FLAG_CF; + ehci_writel(&hcor->or_configflag, cmd); + /* unblock posted write */ + cmd = ehci_readl(&hcor->or_usbcmd); + mdelay(5); + reg = HC_VERSION(ehci_readl(&hccr->cr_capbase)); + printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff); + + ehcic[index].rootdev = 0; + + return ehcic + index; +} +#else int usb_lowlevel_stop(void) { return ehci_hcd_stop(); @@ -872,6 +1055,7 @@ int usb_lowlevel_init(void) return 0; } +#endif int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, @@ -889,14 +1073,22 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int length, struct devrequest *setup) { +#ifdef CONFIG_USB_INIT_MULTI + struct ehci_ctrl *ctrl = dev->controller; +#endif if (usb_pipetype(pipe) != PIPE_CONTROL) { debug("non-control pipe (type=%lu)", usb_pipetype(pipe)); return -1; } +#ifdef CONFIG_USB_INIT_MULTI + if (usb_pipedevice(pipe) == ctrl->rootdev) { + if (ctrl->rootdev == 0) +#else if (usb_pipedevice(pipe) == rootdev) { if (rootdev == 0) +#endif dev->speed = USB_SPEED_HIGH; return ehci_submit_root(dev, pipe, buffer, length, setup); } diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index a7e105b..f676902 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009 NVIDIA Corporation + * Copyright (c) 2009-2012 NVIDIA Corporation * * See file CREDITS for list of people who contributed to this * project. @@ -34,6 +34,12 @@ * Create the appropriate control structures to manage * a new EHCI host controller. */ +#ifdef CONFIG_USB_INIT_MULTI +int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) +{ + return tegrausb_start_port(index, hccr, hcor); +} +#else int ehci_hcd_init(void) { u32 our_hccr, our_hcor; @@ -50,13 +56,22 @@ int ehci_hcd_init(void) return 0; } +#endif /* * Destroy the appropriate control structures corresponding * the the EHCI host controller. */ +#ifdef CONFIG_USB_INIT_MULTI +int ehci_hcd_stop(int index) +{ + tegrausb_stop_port(index); + return 0; +} +#else int ehci_hcd_stop(void) { tegrausb_stop_port(); return 0; } +#endif diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index cc00ce4..059827a 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h @@ -201,7 +201,12 @@ struct QH { }; /* Low level init functions */ +#ifdef CONFIG_USB_INIT_MULTI +int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor); +int ehci_hcd_stop(int index); +#else int ehci_hcd_init(void); int ehci_hcd_stop(void); +#endif #endif /* USB_EHCI_H */ diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index f46740e..0c66e16 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -107,6 +107,8 @@ #define CONFIG_USB_EHCI_TEGRA #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB +#define CONFIG_USB_INIT_MULTI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 /* USB networking support */ #define CONFIG_USB_HOST_ETHER diff --git a/include/usb.h b/include/usb.h index 48e4bcd..018567c 100644 --- a/include/usb.h +++ b/include/usb.h @@ -128,6 +128,9 @@ struct usb_device { int portnr; struct usb_device *parent; struct usb_device *children[USB_MAXCHILDREN]; +#ifdef CONFIG_USB_INIT_MULTI + void *controller; /* hardware controller private data */ +#endif }; /********************************************************************** @@ -141,8 +144,13 @@ struct usb_device { defined(CONFIG_USB_OMAP3) || defined(CONFIG_USB_DA8XX) || \ defined(CONFIG_USB_BLACKFIN) || defined(CONFIG_USB_AM35X) +#ifdef CONFIG_USB_INIT_MULTI +void *usb_lowlevel_init(int index); +int usb_lowlevel_stop(int index); +#else int usb_lowlevel_init(void); int usb_lowlevel_stop(void); +#endif int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int transfer_len); int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, @@ -370,7 +378,11 @@ void usb_hub_reset(void); int hub_port_reset(struct usb_device *dev, int port, unsigned short *portstat); +#ifdef CONFIG_USB_INIT_MULTI +struct usb_device *usb_alloc_new_device(void *controller); +#else struct usb_device *usb_alloc_new_device(void); +#endif int usb_new_device(struct usb_device *dev); #endif /*_USB_H_ */ -- 1.7.3 nvpublic

3 2

[U-Boot] FW: Is RSA algorithm support for the software authentication in u-boot?
by Surendra Barku Dhobale 14 Jun '12

14 Jun '12

From: Surendra Barku Dhobale Sent: Thursday, June 14, 2012 6:02 PM To: 'U-Boot(a)lists.denx.de' Subject: Is RSA algorithm support for the software authentication in u-boot? Hi , I am looking for the RSA , public key authentication for the images like u-boot.img ,uImage from the u-boot. In u-boot already support for the SHA1 and md5,that's great!!!. But I want to use RSA algorithm for more security and official firmware releases. Is there any support for that in u-boot?. Or we have to integrate it.? Please gives us the suggestions... Surendra. **************** CAUTION - Disclaimer ***************** This e-mail contains PRIVILEGED AND CONFIDENTIAL INFORMATION intended solely for the use of the addressee(s). If you are not the intended recipient, please notify the sender by e-mail and delete the original message. Further, you are not to copy, disclose, or distribute this e-mail or its contents to any other person and any such actions are unlawful. This e-mail may contain viruses. Infosys has taken every reasonable precaution to minimize this risk, but is not liable for any damage you may sustain as a result of any virus in this e-mail. You should carry out your own virus checks before opening the e-mail or attachment. Infosys reserves the right to monitor and review the content of all messages sent to or from this e-mail address. Messages sent to or from this e-mail address may be stored on the Infosys e-mail system. ***INFOSYS******** End of Disclaimer ********INFOSYS***

2 1

[U-Boot] Is RSA algorithm support for the software authentication in u-boot?
by Surendra Barku Dhobale 14 Jun '12

14 Jun '12

Hi , I am looking for the RSA , public key authentication for the images like u-boot.img ,uImage from the u-boot. In u-boot already support for the SHA1 and md5,that's great!!!. But I want to use RSA algorithm for more security and official firmware releases. Is there any support for that in u-boot?. Or we have to integrate it.? Please gives us the suggestions... Surendra. **************** CAUTION - Disclaimer ***************** This e-mail contains PRIVILEGED AND CONFIDENTIAL INFORMATION intended solely for the use of the addressee(s). If you are not the intended recipient, please notify the sender by e-mail and delete the original message. Further, you are not to copy, disclose, or distribute this e-mail or its contents to any other person and any such actions are unlawful. This e-mail may contain viruses. Infosys has taken every reasonable precaution to minimize this risk, but is not liable for any damage you may sustain as a result of any virus in this e-mail. You should carry out your own virus checks before opening the e-mail or attachment. Infosys reserves the right to monitor and review the content of all messages sent to or from this e-mail address. Messages sent to or from this e-mail address may be stored on the Infosys e-mail system. ***INFOSYS******** End of Disclaimer ********INFOSYS***

1 0

[U-Boot] [RFC v2 1/3] imx-common/cmd_resetmode.c: add imx resetmode command
by Troy Kisky 14 Jun '12

14 Jun '12

This is useful for forcing the ROM's usb downloader to activate upon a watchdog reset. Or, you can boot from either SD Card. Currently, support added for MX53 and MX6Q Signed-off-by: Troy Kisky <troy.kisky(a)boundarydevices.com> Note: MX53 support untested. --- arch/arm/cpu/armv7/imx-common/Makefile | 4 +- arch/arm/cpu/armv7/imx-common/cmd_resetmode.c | 152 +++++++++++++++++++++++++ arch/arm/cpu/armv7/mx5/soc.c | 31 +++++ arch/arm/cpu/armv7/mx6/soc.c | 36 ++++++ arch/arm/include/asm/arch-mx5/imx-regs.h | 18 +++ arch/arm/include/asm/arch-mx6/imx-regs.h | 21 ++++ arch/arm/include/asm/imx-common/resetmode.h | 36 ++++++ 7 files changed, 297 insertions(+), 1 deletions(-) create mode 100644 arch/arm/cpu/armv7/imx-common/cmd_resetmode.c create mode 100644 arch/arm/include/asm/imx-common/resetmode.h diff --git a/arch/arm/cpu/armv7/imx-common/Makefile b/arch/arm/cpu/armv7/imx-common/Makefile index e5ff375..aed8262 100644 --- a/arch/arm/cpu/armv7/imx-common/Makefile +++ b/arch/arm/cpu/armv7/imx-common/Makefile @@ -27,7 +27,9 @@ include $(TOPDIR)/config.mk LIB = $(obj)libimx-common.o -COBJS = timer.o cpu.o speed.o +COBJS-y = timer.o cpu.o speed.o +COBJS-$(CONFIG_CMD_RESETMODE) += cmd_resetmode.o +COBJS := $(sort $(COBJS-y)) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/arch/arm/cpu/armv7/imx-common/cmd_resetmode.c b/arch/arm/cpu/armv7/imx-common/cmd_resetmode.c new file mode 100644 index 0000000..d1c50e1 --- /dev/null +++ b/arch/arm/cpu/armv7/imx-common/cmd_resetmode.c @@ -0,0 +1,152 @@ +/* + * Copyright (C) 2012 Boundary Devices Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <asm/errno.h> +#include <asm/io.h> +#include <asm/imx-common/resetmode.h> +#include <malloc.h> + +const struct reset_mode *modes[2]; + +const struct reset_mode *search_modes(char *arg) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(modes); i++) { + const struct reset_mode *p = modes[i]; + if (p) { + while (p->name) { + if (!strcmp(p->name, arg)) + return p; + p++; + } + } + } + return NULL; +} + +int create_usage(char *dest) +{ + int i; + int size = 0; + + for (i = 0; i < ARRAY_SIZE(modes); i++) { + const struct reset_mode *p = modes[i]; + if (p) { + while (p->name) { + int len = strlen(p->name); + if (dest) { + memcpy(dest, p->name, len); + dest += len; + *dest++ = '|'; + } + size += len + 1; + p++; + } + } + } + if (dest) + dest[-1] = 0; + return size; +} + +int do_resetmode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + const struct reset_mode *p; + + if (argc < 2) + return CMD_RET_USAGE; + p = search_modes(argv[1]); + if (!p) + return CMD_RET_USAGE; + reset_mode_apply(p->cfg_val); + return 0; +} + +U_BOOT_CMD( + resetmode, 2, 0, do_resetmode, + NULL, + ""); + +void add_board_resetmodes(const struct reset_mode *p) +{ + int size; + char *dest; + + if (__u_boot_cmd_resetmode.usage) { + free(__u_boot_cmd_resetmode.usage); + __u_boot_cmd_resetmode.usage = NULL; + } + + modes[0] = p; + modes[1] = soc_reset_modes; + size = create_usage(NULL); + dest = malloc(size); + if (dest) { + create_usage(dest); + __u_boot_cmd_resetmode.usage = dest; + } +} + +int do_resetmode_cmd(char *arg) +{ + const struct reset_mode *p; + + p = search_modes(arg); + if (!p) { + printf("%s not found\n", arg); + return CMD_RET_FAILURE; + } + reset_mode_apply(p->cfg_val); + do_reset(NULL, 0, 0, NULL); + return 0; +} + +int do_bootmmc0(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + return do_resetmode_cmd("mmc0"); +} + +int do_bootmmc1(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + return do_resetmode_cmd("mmc1"); +} + +int do_download_mode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + return do_resetmode_cmd("usb"); +} + +U_BOOT_CMD( + bootmmc0, 1, 0, do_bootmmc0, + "boot to mmc 0", + ""); + +U_BOOT_CMD( + bootmmc1, 1, 0, do_bootmmc1, + "boot to mmc 1", + ""); + +U_BOOT_CMD( + download_mode, 1, 0, do_download_mode, + "start rom loader", + ""); diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c index 3f5a4f7..9cd363b 100644 --- a/arch/arm/cpu/armv7/mx5/soc.c +++ b/arch/arm/cpu/armv7/mx5/soc.c @@ -30,6 +30,7 @@ #include <asm/errno.h> #include <asm/io.h> +#include <asm/imx-common/resetmode.h> #if !(defined(CONFIG_MX51) || defined(CONFIG_MX53)) #error "CPU_TYPE not defined" @@ -115,3 +116,33 @@ void set_chipselect_size(int const cs_size) writel(reg, &iomuxc_regs->gpr1); } + +#ifdef CONFIG_MX53 +void reset_mode_apply(unsigned cfg_val) +{ + writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr); +} +/* + * cfg_val will be used for + * Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0] + * + * If bit 28 of LPGR is set upon watchdog reset, + * bits[25:0] of LPGR will move to SBMR. + */ +const struct reset_mode soc_reset_modes[] = { + {"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)}, + /* usb or serial download */ + {"usb", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x13)}, + {"sata", MAKE_CFGVAL(0x28, 0x00, 0x00, 0x12)}, + {"escpi1:0", MAKE_CFGVAL(0x38, 0x20, 0x00, 0x12)}, + {"escpi1:1", MAKE_CFGVAL(0x38, 0x20, 0x04, 0x12)}, + {"escpi1:2", MAKE_CFGVAL(0x38, 0x20, 0x08, 0x12)}, + {"escpi1:3", MAKE_CFGVAL(0x38, 0x20, 0x0c, 0x12)}, + /* 4 bit bus width */ + {"esdhc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x12)}, + {"esdhc2", MAKE_CFGVAL(0x40, 0x20, 0x08, 0x12)}, + {"esdhc3", MAKE_CFGVAL(0x40, 0x20, 0x10, 0x12)}, + {"esdhc4", MAKE_CFGVAL(0x40, 0x20, 0x18, 0x12)}, + {NULL, 0}, +}; +#endif diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 90f2088..5d94492 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -29,6 +29,7 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> +#include <asm/imx-common/resetmode.h> u32 get_cpu_rev(void) { @@ -143,3 +144,38 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) } #endif + +void reset_mode_apply(unsigned cfg_val) +{ + unsigned reg; + struct src_regs *psrc = (struct src_regs *)SRC_BASE_ADDR; + writel(cfg_val, &psrc->gpr9); + reg = readl(&psrc->gpr10); + if (cfg_val) + reg |= 1 << 28; + else + reg &= ~(1 << 28); + writel(reg, &psrc->gpr10); +} +/* + * cfg_val will be used for + * Boot_cfg4[7:0]:Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0] + * After reset, if GPR10[28] is 1, ROM will copy GPR9[25:0] + * to SBMR1, which will determine the boot device. + */ +const struct reset_mode soc_reset_modes[] = { + {"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)}, + /* reserved value should start rom usb */ + {"usb", MAKE_CFGVAL(0x01, 0x00, 0x00, 0x00)}, + {"sata", MAKE_CFGVAL(0x20, 0x00, 0x00, 0x00)}, + {"escpi1:0", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x08)}, + {"escpi1:1", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x18)}, + {"escpi1:2", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x28)}, + {"escpi1:3", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x38)}, + /* 4 bit bus width */ + {"esdhc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)}, + {"esdhc2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, + {"esdhc3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"esdhc4", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index cef4190..4f27c00 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -456,6 +456,24 @@ struct src { u32 simr; }; +struct srtc_regs { + u32 lpscmr; /* 0x00 */ + u32 lpsclr; /* 0x04 */ + u32 lpsar; /* 0x08 */ + u32 lpsmcr; /* 0x0c */ + u32 lpcr; /* 0x10 */ + u32 lpsr; /* 0x14 */ + u32 lppdr; /* 0x18 */ + u32 lpgr; /* 0x1c */ + u32 hpcmr; /* 0x20 */ + u32 hpclr; /* 0x24 */ + u32 hpamr; /* 0x28 */ + u32 hpalr; /* 0x2c */ + u32 hpcr; /* 0x30 */ + u32 hpisr; /* 0x34 */ + u32 hpienr; /* 0x38 */ +}; + /* CSPI registers */ struct cspi_regs { u32 rxdata; diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index e165810..5acc9ca 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -445,5 +445,26 @@ struct iomuxc_base_regs { u32 daisy[104]; /* 0x7b0..94c */ }; +struct src_regs { + u32 scr; /* 0x00 */ + u32 sbmr1; /* 0x04 */ + u32 srsr; /* 0x08 */ + u32 reserved1; /* 0x0c */ + u32 reserved2; /* 0x10 */ + u32 sisr; /* 0x14 */ + u32 simr; /* 0x18 */ + u32 sbmr2; /* 0x1c */ + u32 gpr1; /* 0x20 */ + u32 gpr2; /* 0x24 */ + u32 gpr3; /* 0x28 */ + u32 gpr4; /* 0x2c */ + u32 gpr5; /* 0x30 */ + u32 gpr6; /* 0x34 */ + u32 gpr7; /* 0x38 */ + u32 gpr8; /* 0x3c */ + u32 gpr9; /* 0x40 */ + u32 gpr10; /* 0x44 */ +}; + #endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */ diff --git a/arch/arm/include/asm/imx-common/resetmode.h b/arch/arm/include/asm/imx-common/resetmode.h new file mode 100644 index 0000000..76216d0 --- /dev/null +++ b/arch/arm/include/asm/imx-common/resetmode.h @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2012 Boundary Devices Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ASM_RESETMODE_H +#define _ASM_RESETMODE_H +#define MAKE_CFGVAL(cfg1, cfg2, cfg3, cfg4) \ + ((cfg4) << 24) | ((cfg3) << 16) | ((cfg2) << 8) | (cfg1) + +struct reset_mode { + const char *name; + unsigned cfg_val; +}; + +void add_board_resetmodes(const struct reset_mode *p); +void reset_mode_apply(unsigned cfg_val); +extern const struct reset_mode soc_reset_modes[]; +#endif -- 1.7.5.4

1 0

[U-Boot] [RFC v2 2/3] mx6qsabrelite: add resetmode support
by Troy Kisky 14 Jun '12

14 Jun '12

This allows a watchdog reset to start the ROM's usb downloader, or boot from an sdcard. Signed-off-by: Troy Kisky <troy.kisky(a)boundarydevices.com> squash sabrelite --- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 14 ++++++++++++++ include/configs/mx6qsabrelite.h | 3 +++ 2 files changed, 17 insertions(+), 0 deletions(-) diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 29cbfed..ae2dc95 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -28,6 +28,7 @@ #include <asm/arch/clock.h> #include <asm/errno.h> #include <asm/gpio.h> +#include <asm/imx-common/resetmode.h> #include <mmc.h> #include <fsl_esdhc.h> #include <micrel.h> @@ -434,10 +435,23 @@ static void preboot_keys(void) } #endif +#ifdef CONFIG_CMD_RESETMODE +static const struct reset_mode board_reset_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + int misc_init_r(void) { #ifdef CONFIG_PREBOOT preboot_keys(); #endif + +#ifdef CONFIG_CMD_RESETMODE + add_board_resetmodes(board_reset_modes); +#endif return 0; } diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index feabc05..5165843 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -111,6 +111,9 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 +/* Miscellaneous commands */ +#define CONFIG_CMD_RESETMODE + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 -- 1.7.5.4

1 1

[U-Boot] mx53loco build fails with CONFIG_VIDEO disabled
by Vikram Narayanan 13 Jun '12

13 Jun '12

Hello, mx53loco build fails when CONFIG_VIDEO and its friends disabled. I can send a patch fixing this. I _really_ don't like ifdef -ing a lot of stuff. Instead I'd feel to have a separate file in the directory which does this LCD init and FB init call, and let the makefile handle the conditional compilation. @Fabio: As you've pushed this stuff, I'd like to have your opinions on splitting this into a separate file. Regards, Vikram

3 5

[U-Boot] [PATCH] powerpc/CoreNet: add tool to support pbl image build.
by Shaohui Xie 13 Jun '12

13 Jun '12

From: Shaohui Xie <b21989(a)freescale.com> Provides a tool to build boot Image for PBL(Pre boot loader) which is used on Freescale CoreNet SoCs, PBL can be used to load some instructions and/or data for pre-initialization. The default output image is u-boot.pbl, for more details please refer to doc/README.pblimage. Signed-off-by: Shaohui Xie <b21989(a)freescale.com> --- rebased to lasted tree. Makefile | 5 + board/freescale/corenet_ds/config.mk | 26 +++ board/freescale/corenet_ds/pblimage.cfg | 60 ++++++ common/image.c | 1 + doc/README.pblimage | 140 +++++++++++++ include/image.h | 1 + tools/Makefile | 2 + tools/mkimage.c | 5 + tools/mkimage.h | 2 + tools/pblimage.c | 329 +++++++++++++++++++++++++++++++ tools/pblimage.h | 36 ++++ 11 files changed, 607 insertions(+), 0 deletions(-) create mode 100644 board/freescale/corenet_ds/config.mk create mode 100644 board/freescale/corenet_ds/pblimage.cfg create mode 100644 doc/README.pblimage create mode 100644 tools/pblimage.c create mode 100644 tools/pblimage.h diff --git a/Makefile b/Makefile index 57ad45b..99f993a 100644 --- a/Makefile +++ b/Makefile @@ -416,6 +416,10 @@ $(obj)u-boot.kwb: $(obj)u-boot.bin $(obj)tools/mkimage -n $(CONFIG_SYS_KWD_CONFIG) -T kwbimage \ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) -d $< $@ +$(obj)u-boot.pbl: $(obj)u-boot.bin + $(obj)tools/mkimage -n $(CONFIG_PBL_CONFIG) -T pblimage \ + -d $< $@ + $(obj)u-boot.sha1: $(obj)u-boot.bin $(obj)tools/ubsha1 $(obj)u-boot.bin @@ -773,6 +777,7 @@ clobber: tidy $(obj)cscope.* $(obj)*.*~ @rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL-y) @rm -f $(obj)u-boot.kwb + @rm -f $(obj)u-boot.pbl @rm -f $(obj)u-boot.imx @rm -f $(obj)u-boot.ubl @rm -f $(obj)u-boot.ais diff --git a/board/freescale/corenet_ds/config.mk b/board/freescale/corenet_ds/config.mk new file mode 100644 index 0000000..72464dc --- /dev/null +++ b/board/freescale/corenet_ds/config.mk @@ -0,0 +1,26 @@ +# +# Copyright 2012 Freescale Semiconductor, Inc. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +ifeq ($(CONFIG_RAMBOOT_PBL), y) +CONFIG_PBL_CONFIG = $(SRCTREE)/$(CONFIG_BOARDDIR)/pblimage.cfg +ALL-y += $(obj)u-boot.pbl +endif diff --git a/board/freescale/corenet_ds/pblimage.cfg b/board/freescale/corenet_ds/pblimage.cfg new file mode 100644 index 0000000..898fe6d --- /dev/null +++ b/board/freescale/corenet_ds/pblimage.cfg @@ -0,0 +1,60 @@ +# +# Copyright 2012 Freescale Semiconductor, Inc. +# Written-by: Shaohui Xie<b21989(a)freescale.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.pblimage for more details about how-to configure +# and create PBL boot image +# + +#PBL preamble and RCW header +aa55aa55 010e0100 +#64 bytes RCW data for P4080, replace it when building image +#for P3041DS or P5020DS. +4c580000 00000000 18185218 0000cccc +40464000 3c3c2000 58000000 61000000 +00000000 00000000 00000000 008b6000 +00000000 00000000 00000000 00000000 + +#PBI commands +#Initialize CPC1 +09010000 00200400 +09138000 00000000 +091380c0 00000100 +09010100 00000000 +09010104 fff0000b +09010f00 08000000 +09010000 80000000 +#Configure LAW for CPC1 +09000d00 00000000 +09000d04 fff00000 +09000d08 81000013 +09000010 00000000 +09000014 ff000000 +09000018 81000000 +#Initialize eSPI controller +09110000 80000403 +09110020 2d170008 +09110024 00100008 +09110028 00100008 +0911002c 00100008 +#Flush PBL data +09138000 00000000 +091380c0 00000000 diff --git a/common/image.c b/common/image.c index 202c8a1..afc7155 100644 --- a/common/image.c +++ b/common/image.c @@ -147,6 +147,7 @@ static const table_entry_t uimage_type[] = { { IH_TYPE_SCRIPT, "script", "Script", }, { IH_TYPE_STANDALONE, "standalone", "Standalone Program", }, { IH_TYPE_UBLIMAGE, "ublimage", "Davinci UBL image",}, + { IH_TYPE_PBLIMAGE, "pblimage", "Freescale PBL Boot Image",}, { -1, "", "", }, }; diff --git a/doc/README.pblimage b/doc/README.pblimage new file mode 100644 index 0000000..73d90f1 --- /dev/null +++ b/doc/README.pblimage @@ -0,0 +1,140 @@ +------------------------------------------------------------------ +Freescale PBL(pre-boot loader) Boot Image generation using mkimage +------------------------------------------------------------------ + +This document describes the U-Boot feature as it +is implemented for the Freescale CoreNet SoC. + +The CoreNet SoC's can boot directly from eSPI FLASH, SD/MMC. + +for more details refer section 5 Pre-boot loader specifications. + +Building PBL Boot Image and boot steps +-------------------------------------- + +1. Building PBL Boot Image. + The default Image is u-boot.pbl. Before build the iamge, make sure + rcw data in pblimage.cfg is suitable for the platform, if not, this + need to be fixed in step 2. + + For eSPI boot: + To build the eSPI boot image for P4080DS: + make P4080DS_SPIFLASH + + To build the eSPI boot image for P3041DS: + make P3041DS_SPIFLASH + + To build the eSPI boot image for P5020DS: + make P5020DS_SPIFLASH + + For SD boot: + To build the SD boot image for P4080DS: + make P4080DS_SDCARD + + To build the SD boot image for P3041DS: + make P3041DS_SDCARD + + To build the SD boot image for P5020DS: + make P5020DS_SDCARD + + For Nand boot(P4080DS does not have Nand chip): + To build the PBL boot image for P3041DS: + make P3041DS_NAND + + To build the PBL boot image for P5020DS: + make P5020DS_NAND + + +2. Command below provided a way to re-build the PBL boot image if the +configuration file needes to be modified while the u-boot.bin does not +need to be re-build. + +Command syntax: +-------------- +./tools/mkimage -n <board specific configuration file> \ + -T pblimage -d <input_raw_binary> <output_pblboot_file> + +for ex. +./tools/mkimage -n ./board/freescale/corenet_ds/pblimage.cfg \ + -T pblimage -d u-boot.bin u-boot.pbl + + +3. pblimage support available with mkimage utility will generate Freescale PBL +boot image that can be flashed on the board eSPI flash, SD/MMC. Following steps +described how to boot from eSPI flash, SD/MMC. + + 1). Boot from eSPI flash + Write u-boot.pbl to eSPI flash from offset 0x0. + for ex in u-boot: + =>tftp 100000 u-boot.pbl + =>sf probe 0 + =>sf erase 0 100000 + =>sf write 100000 0 $filesize + Change SW1[1:5] = off off on off on. + + 2). Boot from SD/MMC + Write u-boot.pbl to SD/MMC from offset 0x1000. + for ex in u-boot: + =>tftp 100000 u-boot.pbl + =>mmcinfo + =>mmc write 100000 8 441 + Change SW1[1:5] = off off on on off. + + 3). Boot from Nand + Write u-boot.pbl to Nand from offset 0x0, Note that in case of eLBC NAND + flash, the address starts from the first good block. + for ex in u-boot: + =>tftp 100000 u-boot.pbl + =>nand info + =>nand erase 0 100000 + =>nand write 100000 0 $filesize + Change SW1[1:5] = off on off off on + Change SW7[1:4] = on off off on + +Board specific configuration file specifications: +------------------------------------------------ +1. This file must present in the $(BOARDDIR) and the name should be + pblimage.cfg (since this is used in Makefile) +2. This file can have empty lines and lines starting with "#" as first + character to put comments + +Typical example of pblimage.cfg file: +----------------------------------- + +#PBL preamble and RCW header +aa55aa55 010e0100 +#64 bytes RCW data for P4080DS, replace it when building image +#for P3041DS or P5020DS +4c580000 00000000 18185218 0000cccc +40464000 3c3c2000 58000000 61000000 +00000000 00000000 00000000 008b6000 +00000000 00000000 00000000 00000000 + +#PBI commands +#Initialize CPC1 +09010000 00200400 +09138000 00000000 +091380c0 00000100 +09010100 00000000 +09010104 fff0000b +09010f00 08000000 +09010000 80000000 +#Configure LAW for CPC1 +09000d00 00000000 +09000d04 fff00000 +09000d08 81000013 +09000010 00000000 +09000014 ff000000 +09000018 81000000 +#Initialize eSPI controller +09110000 80000403 +09110020 2d170008 +09110024 00100008 +09110028 00100008 +0911002c 00100008 +#Flush PBL data +09138000 00000000 +091380c0 00000000 + +------------------------------------------------ +Author: Shaohui Xie<b21989(a)freescale.com> diff --git a/include/image.h b/include/image.h index bbf80f0..0913e35 100644 --- a/include/image.h +++ b/include/image.h @@ -164,6 +164,7 @@ #define IH_TYPE_OMAPIMAGE 12 /* TI OMAP Config Header Image */ #define IH_TYPE_AISIMAGE 13 /* TI Davinci AIS Image */ #define IH_TYPE_KERNEL_NOLOAD 14 /* OS Kernel Image, can run from any load address */ +#define IH_TYPE_PBLIMAGE 15 /* Freescale PBL Boot Image */ /* * Compression Types diff --git a/tools/Makefile b/tools/Makefile index 64bcc4d..26f4927 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -90,6 +90,7 @@ OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o OBJ_FILES-$(CONFIG_XWAY_SWAP_BYTES) += xway-swap-bytes.o NOPED_OBJ_FILES-y += aisimage.o NOPED_OBJ_FILES-y += kwbimage.o +NOPED_OBJ_FILES-y += pblimage.o NOPED_OBJ_FILES-y += imximage.o NOPED_OBJ_FILES-y += omapimage.o NOPED_OBJ_FILES-y += mkenvimage.o @@ -203,6 +204,7 @@ $(obj)mkimage$(SFX): $(obj)aisimage.o \ $(obj)image.o \ $(obj)imximage.o \ $(obj)kwbimage.o \ + $(obj)pblimage.o \ $(obj)md5.o \ $(obj)mkimage.o \ $(obj)os_support.o \ diff --git a/tools/mkimage.c b/tools/mkimage.c index eeb1b10..ef76d94 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -150,6 +150,8 @@ main (int argc, char **argv) int retval = 0; struct image_type_params *tparams = NULL; + /* Init Freescale PBL Boot image generation/list support */ + init_pbl_image_type(); /* Init Kirkwood Boot image generation/list support */ init_kwb_image_type (); /* Init Freescale imx Boot image generation/list support */ @@ -440,6 +442,9 @@ NXTARG: ; break; } } + } else if (params.type == IH_TYPE_PBLIMAGE) { + /* PBL has special Image format, implements its' own */ + pbl_load_uboot(ifd, &params); } else { copy_file (ifd, params.datafile, 0); } diff --git a/tools/mkimage.h b/tools/mkimage.h index 5fe1a48..a886305 100644 --- a/tools/mkimage.h +++ b/tools/mkimage.h @@ -147,6 +147,8 @@ void mkimage_register (struct image_type_params *tparams); * * Supported image types init functions */ +void pbl_load_uboot(int, struct mkimage_params *); +void init_pbl_image_type(void); void init_ais_image_type(void); void init_kwb_image_type (void); void init_imx_image_type (void); diff --git a/tools/pblimage.c b/tools/pblimage.c new file mode 100644 index 0000000..d0c29a6 --- /dev/null +++ b/tools/pblimage.c @@ -0,0 +1,329 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#define _GNU_SOURCE + +#include "mkimage.h" +#include <image.h> +#include "pblimage.h" + +/* + * PBL can load 64 bytes each time in MAX, so the u-boot need to be splited into + * pieces of 64 bytes, PBL needs a command for each piece, the command looks + * like 81xxxxxx, the "xxxxxx" is offset, it starts from F80000 in our case. + */ +static unsigned int uboot_label = 0x81F80000; +/* + * need to store all bytes in memory for calculating crc32, then write the + * bytes to image file for PBL boot. + */ +static unsigned char mem_buf[600000]; +static unsigned char *pmem_buf = mem_buf; +static int mem_byte_cnt; +static char *fname = "Unknown"; +static int lineno = -1; +static struct pbl_header pblimage_header; + +static union +{ + char c[4]; + unsigned char l; +} endian_test = { {'l', '?', '?', 'b'} }; + +#define ENDIANNESS ((char)endian_test.l) + +static void generate_pbl_cmd(void) +{ + unsigned int val = uboot_label; + uboot_label += 0x40; + int i; + + for (i = 3; i >= 0; i--) { + *pmem_buf++ = (val >> (i * 8)) & 0xff; + mem_byte_cnt++; + } +} + +static void pbl_fget(size_t size, FILE *stream) +{ + unsigned char c; + while (size) { + c = (unsigned char)fgetc(stream); + *pmem_buf++ = c; + mem_byte_cnt++; + size--; + } +} + +/* load splited u-boot with PBI command 81xxxxxx. */ +static void load_uboot(FILE *fp_uboot) +{ + while (uboot_label < 0x82000000) { + generate_pbl_cmd(); + pbl_fget(64, fp_uboot); + } +} + +static void check_get_hexval(char *token) +{ + uint32_t hexval; + int i; + + if (!sscanf(token, "%x", &hexval)) { + printf("Error:%s[%d] - Invalid hex data(%s)\n", fname, + lineno, token); + exit(EXIT_FAILURE); + } + for (i = 3; i >= 0; i--) { + *pmem_buf++ = (hexval >> (i * 8)) & 0xff; + mem_byte_cnt++; + } +} + +static void pbl_parser(char *name) +{ + FILE *fd = NULL; + char *line = NULL; + char *token, *saveptr1, *saveptr2; + size_t len = 0; + + fname = name; + fd = fopen(name, "r"); + if (fd == NULL) { + printf("Error:%s - Can't open\n", fname); + exit(EXIT_FAILURE); + } + + while ((getline(&line, &len, fd)) > 0) { + lineno++; + token = strtok_r(line, "\r\n", &saveptr1); + /* drop all lines with zero tokens (= empty lines) */ + if (token == NULL) + continue; + for (line = token;; line = NULL) { + token = strtok_r(line, " \t", &saveptr2); + if (token == NULL) + break; + /* Drop all text starting with '#' as comments */ + if (token[0] == '#') + break; + check_get_hexval(token); + } + } + if (line) + free(line); + fclose(fd); +} + +static uint32_t crc_table[256]; + +static void make_crc_table(void) +{ + uint32_t mask; + int i, j; + uint32_t poly; /* polynomial exclusive-or pattern */ + + /* + * the polynomial used by PBL is 1 + x1 + x2 + x4 + x5 + x7 + x8 + x10 + * + x11 + x12 + x16 + x22 + x23 + x26 + x32. + */ + poly = 0x04c11db7; + + for (i = 0; i < 256; i++) { + mask = i << 24; + for (j = 0; j < 8; j++) { + if (mask & 0x80000000) + mask = (mask << 1) ^ poly; + else + mask <<= 1; + } + crc_table[i] = mask; + } +} + +unsigned long pbl_crc32(unsigned long crc, const char *buf, unsigned int len) +{ + unsigned int crc32_val = 0xffffffff; + unsigned int xor = 0x0; + int i; + + make_crc_table(); + + for (i = 0; i < len; i++) + crc32_val = (crc32_val << 8) ^ + crc_table[(crc32_val >> 24) ^ (*buf++ & 0xff)]; + + crc32_val = crc32_val ^ xor; + if (crc32_val < 0) { + crc32_val += 0xffffffff; + crc32_val += 1; + } + return crc32_val; +} + +static unsigned int reverse_byte(unsigned int val) +{ + unsigned int temp; + unsigned char *p1; + int j; + + temp = val; + p1 = (unsigned char *)&temp; + for (j = 3; j >= 0; j--) + *p1++ = (val >> (j * 8)) & 0xff; + return temp; +} + +/* write end command and crc command to memory. */ +static void add_end_cmd(void) +{ + unsigned int pbl_end_cmd[4] = {0x09138000, 0x00000000, + 0x091380c0, 0x00000000}; + unsigned int crc32_pbl; + int i; + unsigned char *p = (unsigned char *)&pbl_end_cmd; + + if (ENDIANNESS == 'l') { + for (i = 0; i < 4; i++) + pbl_end_cmd[i] = reverse_byte(pbl_end_cmd[i]); + } + + for (i = 0; i < 16; i++) { + *pmem_buf++ = *p++; + mem_byte_cnt++; + } + + /* Add PBI CRC command. */ + *pmem_buf++ = 0x08; + *pmem_buf++ = 0x13; + *pmem_buf++ = 0x80; + *pmem_buf++ = 0x40; + mem_byte_cnt += 4; + + /* calculated CRC32 and write it to memory. */ + crc32_pbl = pbl_crc32(0, (const char *)mem_buf, mem_byte_cnt); + *pmem_buf++ = (crc32_pbl >> 24) & 0xff; + *pmem_buf++ = (crc32_pbl >> 16) & 0xff; + *pmem_buf++ = (crc32_pbl >> 8) & 0xff; + *pmem_buf++ = (crc32_pbl) & 0xff; + mem_byte_cnt += 4; + + if (((mem_byte_cnt) % 16) != 0) { + for (i = 0; i < 8; i++) { + *pmem_buf++ = 0x0; + mem_byte_cnt++; + } + } + if ((mem_byte_cnt % 16 != 0)) { + printf("Error: Bad size of image file\n"); + exit(EXIT_FAILURE); + } + +} + +void pbl_load_uboot(int ifd, struct mkimage_params *params) +{ + FILE *fp_uboot; + int size; + + /* parse the pblimage.cfg file. */ + pbl_parser(params->imagename); + + fp_uboot = fopen(params->datafile, "r"); + if (fp_uboot == NULL) { + printf("Error: %s open failed\n", params->datafile); + exit(EXIT_FAILURE); + } + + load_uboot(fp_uboot); + add_end_cmd(); + fclose(fp_uboot); + lseek(ifd, 0, SEEK_SET); + + size = mem_byte_cnt; + if (write(ifd, (const void *)&mem_buf, size) != size) { + fprintf(stderr, "Write error on %s: %s\n", + params->imagefile, strerror(errno)); + exit(EXIT_FAILURE); + } +} + +static int pblimage_check_image_types(uint8_t type) +{ + if (type == IH_TYPE_PBLIMAGE) + return EXIT_SUCCESS; + else + return EXIT_FAILURE; +} + +static int pblimage_verify_header(unsigned char *ptr, int image_size, + struct mkimage_params *params) +{ + + struct pbl_header *pbl_hdr = (struct pbl_header *) ptr; + + /* Only a few checks can be done: search for magic numbers */ + if (ENDIANNESS == 'l') { + if (pbl_hdr->preamble != reverse_byte(RCW_PREAMBLE)) + return -FDT_ERR_BADSTRUCTURE; + + if (pbl_hdr->rcwheader != reverse_byte(RCW_HEADER)) + return -FDT_ERR_BADSTRUCTURE; + } else { + if (pbl_hdr->preamble != RCW_PREAMBLE) + return -FDT_ERR_BADSTRUCTURE; + + if (pbl_hdr->rcwheader != RCW_HEADER) + return -FDT_ERR_BADSTRUCTURE; + } + + return 0; +} + +static void pblimage_print_header(const void *ptr) +{ + printf("Image Type: Freescale pbl Boot Image\n"); +} + +static void pblimage_set_header(void *ptr, struct stat *sbuf, int ifd, + struct mkimage_params *params) +{ + /*nothing need to do, pbl_load_uboot takes care of whole file. */ +} + +/* + * pblimage parameters + */ +static struct image_type_params pblimage_params = { + .name = "Freescale PBL Boot Image support", + .header_size = sizeof(struct pbl_header), + .hdr = (void *)&pblimage_header, + .check_image_type = pblimage_check_image_types, + .verify_header = pblimage_verify_header, + .print_header = pblimage_print_header, + .set_header = pblimage_set_header, +}; + +void init_pbl_image_type(void) +{ + mem_byte_cnt = 0; + mkimage_register(&pblimage_params); +} diff --git a/tools/pblimage.h b/tools/pblimage.h new file mode 100644 index 0000000..887d4c9 --- /dev/null +++ b/tools/pblimage.h @@ -0,0 +1,36 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _PBLIMAGE_H_ +#define _PBLIMAGE_H_ + +#define RCW_BYTES 64 +#define RCW_PREAMBLE 0xaa55aa55 +#define RCW_HEADER 0x010e0100 + +struct pbl_header { + uint32_t preamble; + uint32_t rcwheader; + uint8_t rcw_data[RCW_BYTES]; +}; + +#endif /* _PBLIMAGE_H_ */ -- 1.6.4

4 12

[U-Boot] [PATCH] omap4: Use a smaller M,N couple for IVA DPLL
by Sebastien Jan 13 Jun '12

13 Jun '12

Signed-off-by: Sebastien Jan <s-jan(a)ti.com> --- arch/arm/cpu/armv7/omap4/clocks.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c index c568951..1d92e66 100644 --- a/arch/arm/cpu/armv7/omap4/clocks.c +++ b/arch/arm/cpu/armv7/omap4/clocks.c @@ -146,7 +146,7 @@ static const struct dpll_params iva_dpll_params_1862mhz[NUM_SYS_CLKS] = { {727, 14, -1, -1, 4, 7, -1, -1}, /* 19.2 MHz */ {931, 25, -1, -1, 4, 7, -1, -1}, /* 26 MHz */ {931, 26, -1, -1, 4, 7, -1, -1}, /* 27 MHz */ - {412, 16, -1, -1, 4, 7, -1, -1} /* 38.4 MHz */ + {291, 11, -1, -1, 4, 7, -1, -1} /* 38.4 MHz */ }; /* ABE M & N values with sys_clk as source */ -- 1.7.9.5

3 4

[U-Boot] [PATCH 0/7] common/lcd cleanup
by Igor Grinberg 13 Jun '12

13 Jun '12

From: Nikita Kiryanov <nikita(a)compulab.co.il> This patch series attempts to simplify #ifdef complexity in common/lcd.c. It preceeds my future work of adding splash screen support for omap. It was compile tested on Arm and PowerPC using MAKEALL, and is dependant on the following patches: http://patchwork.ozlabs.org/patch/155491/ http://patchwork.ozlabs.org/patch/155492/ http://patchwork.ozlabs.org/patch/155493/ http://patchwork.ozlabs.org/patch/158179/ checkpatch reports warnings on some of the patches: 0001: line over 80 chars Since the original line was over 80 characters already, and there's no good way of shortening it, I left it over 80 chars. 0006: WARNING: use of volatile is usually wrong Since 'volatile' was in the original code I left it in the patch as well. Nikita Kiryanov (7): common lcd: minor coding style changes common lcd: simplify #ifdefs common lcd: simplify bitmap_plot common lcd: simplify lcd_logo common lcd: simplify lcd_display common lcd: simplify core functions common lcd: simplify lcd_display_bitmap common/lcd.c | 422 +++++++++++++++++++++++++++++++--------------------------- 1 files changed, 226 insertions(+), 196 deletions(-)

3 14

[U-Boot] [PATCH 0/8] Minor fixes and start of consolidation onto mxs SoC
by Otavio Salvador 13 Jun '12

13 Jun '12

This patchset include some small fixes found while looking at code to start converting it to use a common mxs SoC code in preparation for inclusion of i.MX23 support. Otavio Salvador (8): m28evk: use same notation to alloc the 128kB stack m28evk: use "M28EVK U-Boot =>" as prompt mx28evk: ensure command definition is in alphabetic order mxsboot: stop referring to i.MX28 as this ought to work for all i.MXS SoCs m28evk: fix board config include guardian macro name mx28evk: fix board config include guardian macro name mxs: reorganize source directory for easy sharing of code in i.MXS SoCs mxs: prefix register acessor macros with 'mxs' prefix arch/arm/cpu/arm926ejs/{mx28 => mxs}/Makefile | 0 arch/arm/cpu/arm926ejs/{mx28 => mxs}/clock.c | 4 +- arch/arm/cpu/arm926ejs/{mx28 => mxs}/iomux.c | 6 +- arch/arm/cpu/arm926ejs/{mx28 => mxs}/mx28.c | 6 +- arch/arm/cpu/arm926ejs/{mx28 => mxs}/mx28_init.h | 0 arch/arm/cpu/arm926ejs/{mx28 => mxs}/spl_boot.c | 0 .../cpu/arm926ejs/{mx28 => mxs}/spl_lradc_init.c | 0 .../arm/cpu/arm926ejs/{mx28 => mxs}/spl_mem_init.c | 0 .../cpu/arm926ejs/{mx28 => mxs}/spl_power_init.c | 0 arch/arm/cpu/arm926ejs/{mx28 => mxs}/start.S | 0 arch/arm/cpu/arm926ejs/{mx28 => mxs}/timer.c | 0 .../arm/cpu/arm926ejs/{mx28 => mxs}/u-boot-spl.lds | 2 +- .../include/asm/{arch-mx28 => arch-mxs}/clock.h | 0 arch/arm/include/asm/{arch-mx28 => arch-mxs}/dma.h | 0 .../arm/include/asm/{arch-mx28 => arch-mxs}/gpio.h | 0 .../include/asm/{arch-mx28 => arch-mxs}/imx-regs.h | 0 .../asm/{arch-mx28 => arch-mxs}/iomux-mx28.h | 0 .../include/asm/{arch-mx28 => arch-mxs}/iomux.h | 0 .../asm/{arch-mx28 => arch-mxs}/regs-apbh.h | 254 ++++++++++---------- .../asm/{arch-mx28 => arch-mxs}/regs-base.h | 0 .../include/asm/{arch-mx28 => arch-mxs}/regs-bch.h | 42 ++-- .../asm/{arch-mx28 => arch-mxs}/regs-clkctrl.h | 58 ++--- .../asm/{arch-mx28 => arch-mxs}/regs-common.h | 34 +-- .../asm/{arch-mx28 => arch-mxs}/regs-digctl.h | 50 ++-- .../asm/{arch-mx28 => arch-mxs}/regs-gpmi.h | 26 +- .../include/asm/{arch-mx28 => arch-mxs}/regs-i2c.h | 28 +-- .../asm/{arch-mx28 => arch-mxs}/regs-lcdif.h | 64 ++--- .../asm/{arch-mx28 => arch-mxs}/regs-lradc.h | 48 ++-- .../asm/{arch-mx28 => arch-mxs}/regs-ocotp.h | 86 +++---- .../asm/{arch-mx28 => arch-mxs}/regs-pinctrl.h | 168 ++++++------- .../asm/{arch-mx28 => arch-mxs}/regs-power.h | 28 +-- .../include/asm/{arch-mx28 => arch-mxs}/regs-rtc.h | 28 +-- .../include/asm/{arch-mx28 => arch-mxs}/regs-ssp.h | 40 +-- .../asm/{arch-mx28 => arch-mxs}/regs-timrot.h | 38 +-- .../include/asm/{arch-mx28 => arch-mxs}/regs-usb.h | 0 .../asm/{arch-mx28 => arch-mxs}/regs-usbphy.h | 20 +- .../asm/{arch-mx28 => arch-mxs}/sys_proto.h | 6 +- boards.cfg | 4 +- doc/README.m28 | 4 +- doc/README.mx28evk | 4 +- drivers/gpio/mxs_gpio.c | 16 +- drivers/usb/host/ehci-mxs.c | 8 +- include/configs/m28evk.h | 14 +- include/configs/mx28evk.h | 12 +- tools/mxsboot.c | 110 ++++----- 45 files changed, 604 insertions(+), 604 deletions(-) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/Makefile (100%) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/clock.c (98%) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/iomux.c (94%) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/mx28.c (97%) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/mx28_init.h (100%) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/spl_boot.c (100%) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/spl_lradc_init.c (100%) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/spl_mem_init.c (100%) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/spl_power_init.c (100%) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/start.S (100%) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/timer.c (100%) rename arch/arm/cpu/arm926ejs/{mx28 => mxs}/u-boot-spl.lds (97%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/clock.h (100%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/dma.h (100%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/gpio.h (100%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/imx-regs.h (100%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/iomux-mx28.h (100%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/iomux.h (100%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-apbh.h (77%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-base.h (100%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-bch.h (92%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-clkctrl.h (89%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-common.h (78%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-digctl.h (79%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-gpmi.h (95%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-i2c.h (94%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-lcdif.h (84%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-lradc.h (96%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-ocotp.h (72%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-pinctrl.h (93%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-power.h (97%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-rtc.h (92%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-ssp.h (95%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-timrot.h (90%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-usb.h (100%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/regs-usbphy.h (95%) rename arch/arm/include/asm/{arch-mx28 => arch-mxs}/sys_proto.h (93%) -- 1.7.10

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