May 2012 - U-Boot

[U-Boot] UBI: volume auto-resize
by Matevz Langus 15 May '12

15 May '12

Hi, I found an interesting situation where I can not decide whether it is a bug or functionality that should not be included at all. If I generate UBI image consisting of 3 Volumes to NAND flash on my board, U-boot does not attach UBI to MTD. This happens only if UBI contains a volume that has auto-resize flag set. U-boot tries to resize it but fails. Just started fixing it, but I have a question. Is it desirable that U-boot changes something in the FS? Would it not be better if U-boot would just read things out (that is all I want, to get uImage and dtb file) and leave the rest to Linux. (Linux handles the procedure without any issues). Any opinion welcome. Creating 1 MTD partitions on "nand0": 0x000000200000-0x000008000000 : "mtd=2" Bad block table found at page 65472, version 0x01 Bad block table found at page 65408, version 0x01 nand_read_bbt: Bad block at 0x0000011a0000 UBI: attaching mtd1 to ubi0 UBI: physical eraseblock size: 131072 bytes (128 KiB) UBI: logical eraseblock size: 129024 bytes UBI: smallest flash I/O unit: 2048 UBI: sub-page size: 512 UBI: VID header offset: 512 (aligned 512) UBI: data offset: 2048 UBI error: ubi_io_write: error -5 while writing 512 bytes to PEB 1003:512, written 0 bytes UBI warning: ubi_eba_write_leb: failed to write VID header to LEB 2147479551:0, PEB 1003 UBI: try another PEB UBI error: ubi_io_write: error -5 while writing 512 bytes to PEB 1003:512, written 0 bytes UBI warning: ubi_eba_write_leb: failed to write VID header to LEB 2147479551:0, PEB 1003 UBI: try another PEB UBI error: ubi_io_write: error -5 while writing 512 bytes to PEB 1003:512, written 0 bytes UBI warning: ubi_eba_write_leb: failed to write VID header to LEB 2147479551:0, PEB 1003 UBI: try another PEB UBI error: ubi_io_write: error -5 while writing 512 bytes to PEB 1003:512, written 0 bytes UBI warning: ubi_eba_write_leb: failed to write VID header to LEB 2147479551:0, PEB 1003 UBI warning: ubi_ro_mode: switch to read-only mode UBI error: autoresize: cannot auto-resize volume 2 UBI error: ubi_init: cannot attach mtd1 UBI error: ubi_init: UBI error: cannot initialize UBI, error -30 UBI init error 30 Best regards, Matevz Langus

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[U-Boot] ATA/CF support on u-boot
by Altunbas Sabri (DC-IA/EAH2) 15 May '12

15 May '12

Hi All, I want to load linux-kernel from ATA/CF How can i do this ? My u-boot Version: uboot-2011.06 Thanx for any hints Best regards

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[U-Boot] Please pull u-boot-ti/master
by Tom Rini 15 May '12

15 May '12

Hello, This replaces my previous pull request and has been build-tested on both ELDK5.2 and 4.1 and the only failures are the expected ones of ELDK4.1+omap4/5 (too old to generate working thumb in this case). omap3_beagle and omap4_panda are boot tested (with 3.4-rc7+b6255ee) to a login prompt and am335x_evm (on beaglebone) is also tested, but not booted to Linux. The following changes since commit 026251a5e825d61d3bcdf6dffcc27d15afd574f4: EXYNOS: Change bits per pixel value proper for u-boot. (2012-04-25 16:23:26 +0900) are available in the git repository at: git://git.denx.de/u-boot-ti.git master for you to fetch changes up to 2e3175ff61dc6f76d2c92c1a207053f03964c4b1: OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer (2012-05-14 09:22:07 -0700) ---------------------------------------------------------------- Enric Balletbo i Serra (2): igep00x0: enable the use of a plain text file igep00x0: change mpurate from 500 to auto Jon Hunter (1): OMAP4: Set fdt_high for OMAP4 devices to enable booting with Device Tree Matt Porter (1): arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx SRICHARAN R (1): OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer Tero Kristo (3): omap4: panda: disable uart2 pads during boot omap4: do not enable fs-usb module omap4: do not enable auxiliary cores Tom Rini (2): ARM: omap3: Set SPL stack size to 8KB, image to 54KB. ARM: omap3: Add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_MMC_SUPPORT MAINTAINERS | 12 ++++++------ arch/arm/cpu/armv7/omap3/clock.c | 16 ++++++++++++++++ arch/arm/cpu/armv7/omap4/clocks.c | 6 ------ board/ti/panda/panda_mux_data.h | 8 ++++---- doc/SPL/README.omap3 | 4 ++-- include/configs/am3517_crane.h | 2 +- include/configs/am3517_evm.h | 2 +- include/configs/devkit8000.h | 2 +- include/configs/igep00x0.h | 30 +++++++++++++++++------------- include/configs/mcx.h | 2 +- include/configs/omap3_beagle.h | 3 ++- include/configs/omap3_evm_common.h | 3 ++- include/configs/omap3_overo.h | 3 ++- include/configs/omap4_common.h | 1 + include/configs/tam3517-common.h | 2 +- include/configs/tricorder.h | 3 ++- 16 files changed, 59 insertions(+), 40 deletions(-) -- Tom

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[U-Boot] pull request for u-boot-tegra/master into ARM master
by Tom Warren 15 May '12

15 May '12

Albert, Please pull u-boot-tegra/master into ARM master. Thanks! (NOTE: './MAKEALL -c armv7' passes w/no new errors/warnings) The following changes since commit 026251a5e825d61d3bcdf6dffcc27d15afd574f4: Donghwa Lee (1): EXYNOS: Change bits per pixel value proper for u-boot. are available in the git repository at: git://git.denx.de/u-boot-tegra master Anton Staff (3): fdt: Add fdtdec functions to read byte array tegra: fdt: Add keyboard controller definition tegra: fdt: Add keyboard definitions for Seaboard Bernie Thompson (1): input: Add support for keyboard matrix decoding from an fdt Jimmy Zhang (3): tegra: Add EMC support for optimal memory timings tegra: Add PMU to manage power supplies tegra: Add EMC settings for Seaboard Lucas Stach (1): tegra2: trivially enable 13 mhz crystal frequency Rakesh Iyer (1): tegra: Add tegra keyboard driver Simon Glass (19): fdt: Add function to locate an array in the device tree fdt: Add function to return next compatible subnode Add abs() macro to return absolute value i2c: Add TPS6586X driver tegra: Move ap20.h header into arch location tegra: Add functions to access low-level Osc/PLL details tegra: Add tegra_get_chip_type() to detect SKU tegra: Add header file for APB_MISC register tegra: Set up PMU for Nvidia boards tegra: Set up warmboot code on Nvidia boards fdt: tegra: Add EMC node to device tree tegra: i2c: Add function to find DVC bus tegra: fdt: Add EMC data for Tegra2 Seaboard tegra: Enable LP0 on Seaboard input: Add linux/input.h for key code support input: Add generic keyboard input handler tegra: Add keyboard support to funcmux tegra: Switch on console mux and use environment for console tegra: Enable keyboard for Seaboard Wei Ni (1): tegra: Turn off power detect in board init Yen Lin (5): Add AES crypto library tegra: Add crypto library for warmboot code tegra: Add flow, gp_padctl, fuse, sdram headers tegra: Add warmboot implementation tegra: Setup PMC scratch info from ap20 setup arch/arm/cpu/armv7/omap4/clocks.c | 2 - arch/arm/cpu/armv7/tegra2/Makefile | 4 + arch/arm/cpu/armv7/tegra2/ap20.c | 44 ++- arch/arm/cpu/armv7/tegra2/board.c | 4 +- arch/arm/cpu/armv7/tegra2/clock.c | 37 ++- arch/arm/cpu/armv7/tegra2/crypto.c | 230 ++++++++ arch/arm/cpu/armv7/tegra2/crypto.h | 36 ++ arch/arm/cpu/armv7/tegra2/emc.c | 286 ++++++++++ arch/arm/cpu/armv7/tegra2/funcmux.c | 16 + arch/arm/cpu/armv7/tegra2/pmu.c | 70 +++ arch/arm/cpu/armv7/tegra2/warmboot.c | 386 +++++++++++++ arch/arm/cpu/armv7/tegra2/warmboot_avp.c | 250 ++++++++ arch/arm/cpu/armv7/tegra2/warmboot_avp.h | 81 +++ arch/arm/dts/tegra20.dtsi | 11 + .../tegra2 => include/asm/arch-tegra2}/ap20.h | 7 + arch/arm/include/asm/arch-tegra2/apb_misc.h | 36 ++ arch/arm/include/asm/arch-tegra2/clk_rst.h | 3 + arch/arm/include/asm/arch-tegra2/clock.h | 22 + arch/arm/include/asm/arch-tegra2/emc.h | 113 ++++ arch/arm/include/asm/arch-tegra2/flow.h | 36 ++ arch/arm/include/asm/arch-tegra2/fuse.h | 39 ++ arch/arm/include/asm/arch-tegra2/gp_padctrl.h | 73 +++ arch/arm/include/asm/arch-tegra2/pmu.h | 30 + arch/arm/include/asm/arch-tegra2/sdram_param.h | 148 +++++ arch/arm/include/asm/arch-tegra2/tegra2.h | 25 + arch/arm/include/asm/arch-tegra2/tegra_i2c.h | 7 + arch/arm/include/asm/arch-tegra2/warmboot.h | 150 +++++ board/nvidia/common/Makefile | 1 + board/nvidia/common/board.c | 42 ++- board/nvidia/common/emc.c | 53 ++ board/nvidia/common/emc.h | 29 + board/nvidia/dts/tegra2-seaboard.dts | 64 +++ drivers/bios_emulator/x86emu/prim_ops.c | 5 - drivers/i2c/tegra_i2c.c | 14 + drivers/input/Makefile | 3 + drivers/input/input.c | 430 ++++++++++++++ drivers/input/key_matrix.c | 208 +++++++ drivers/input/tegra-kbc.c | 375 ++++++++++++ drivers/power/Makefile | 1 + drivers/power/tps6586x.c | 280 +++++++++ include/aes.h | 70 +++ include/common.h | 25 + include/configs/seaboard.h | 16 + include/configs/tegra2-common.h | 26 +- include/fdtdec.h | 71 +++ include/input.h | 147 +++++ include/key_matrix.h | 99 ++++ include/linux/input.h | 155 +++++ include/tegra-kbc.h | 33 ++ include/tps6586x.h | 68 +++ lib/Makefile | 1 + lib/aes.c | 598 ++++++++++++++++++++ lib/fdtdec.c | 53 ++ 53 files changed, 5000 insertions(+), 13 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra2/crypto.c create mode 100644 arch/arm/cpu/armv7/tegra2/crypto.h create mode 100644 arch/arm/cpu/armv7/tegra2/emc.c create mode 100644 arch/arm/cpu/armv7/tegra2/pmu.c create mode 100644 arch/arm/cpu/armv7/tegra2/warmboot.c create mode 100644 arch/arm/cpu/armv7/tegra2/warmboot_avp.c create mode 100644 arch/arm/cpu/armv7/tegra2/warmboot_avp.h rename arch/arm/{cpu/armv7/tegra2 => include/asm/arch-tegra2}/ap20.h (96%) create mode 100644 arch/arm/include/asm/arch-tegra2/apb_misc.h create mode 100644 arch/arm/include/asm/arch-tegra2/emc.h create mode 100644 arch/arm/include/asm/arch-tegra2/flow.h create mode 100644 arch/arm/include/asm/arch-tegra2/fuse.h create mode 100644 arch/arm/include/asm/arch-tegra2/gp_padctrl.h create mode 100644 arch/arm/include/asm/arch-tegra2/pmu.h create mode 100644 arch/arm/include/asm/arch-tegra2/sdram_param.h create mode 100644 arch/arm/include/asm/arch-tegra2/warmboot.h create mode 100644 board/nvidia/common/emc.c create mode 100644 board/nvidia/common/emc.h create mode 100644 drivers/input/input.c create mode 100644 drivers/input/key_matrix.c create mode 100644 drivers/input/tegra-kbc.c create mode 100644 drivers/power/tps6586x.c create mode 100644 include/aes.h create mode 100644 include/input.h create mode 100644 include/key_matrix.h create mode 100644 include/linux/input.h create mode 100644 include/tegra-kbc.h create mode 100644 include/tps6586x.h create mode 100644 lib/aes.c

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[U-Boot] [GIT PULL] Pull request: u-boot-imx
by Stefano Babic 15 May '12

15 May '12

Hi Albert, please pull from u-boot-imx: The following changes since commit 026251a5e825d61d3bcdf6dffcc27d15afd574f4: EXYNOS: Change bits per pixel value proper for u-boot. (2012-04-25 16:23:26 +0900) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master for you to fetch changes up to baff308162c3980e7616b624e19889a4d757aae8: i.MX28: Avoid redefining serial_put[cs]() (2012-05-09 12:49:14 +0200) ---------------------------------------------------------------- Dirk Behme (1): i.MX6: Add ANATOP regulator init Eric Nelson (3): i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow i.MX6: add enable_sata_clock() i.MX6: mx6q_sabrelite: add SATA bindings Fabio Estevam (19): pmic: Add support for the Dialog DA9053 PMIC mx6qsabrelite: No need to set the direction for GPIO3_23 again mx28evk: Allow to booting a dt kernel m28evk: Allow to booting a dt kernel mx28evk: Allow booting a zImage kernel mx6qsabrelite: Allow booting a zImage kernel mx6qarm2: Allow booting a zImage kernel mx31pdk: Allow booting a zImage kernel imx-common: Factor out get_ahb_clk() mx5: Add clock config interface mx53loco: Allow to print CPU information at a later stage mx53loco: Add support for 1GHz operation for DA9053-based boards pmic: dialog: Avoid name conflicts mx53loco: Add mc34708 support and set mx53 frequency at 1GHz mx53loco: Turn on VUSB regulator mx53loco: Add CONFIG_REVISION_TAG mx53loco: Remove unneeded gpio_set_value() spi: mxs: Introduce spi_cs_is_valid() spi: mxs: Allow other chip selects to work Lauri Hintsala (1): mx28evk: add NAND support Marek Vasut (17): M28: Enable FDT support Revert "i.MX28: Enable additional DRAM address bits" M28: Scan only first 512 MB of DRAM to avoid memory wraparound i.MX28: Add delay after CPU bypass is cleared FEC: Abstract out register setup M28EVK: Implement support for new board V2.0 M28EVK: Add SD update command i.MX28: Improve passing of data from SPL to U-Boot i.MX28: Implement boot pads sampling and reporting i.MX28: Add LCDIF register definitions i.MX28: Shut down the LCD controller before reset i.MX28: Add LRADC register definitions i.MX28: Add LRADC init to i.MX28 SPL i.MX28: Reorder battery status functions in SPL i.MX28: Add battery boot components to SPL i.MX28: Check if WP detection is implemented at all i.MX28: Avoid redefining serial_put[cs]() Stefano Babic (9): Define UART4 and UART5 base addresses NET: fec_mxc.c: Add a way to disable auto negotiation MX5: Add definitions for SATA controller SATA: check for return value from sata functions MX53: add function to set SATA clock to internal SATA: add driver for MX5 / MX6 SOCs MX53: Add support to ESG ima3 board MX53: mx53loco: Add SATA support MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged Timo Ketola (7): i.MX25: esdhc: Add mxc_get_clock infrastructure i.MX25: This architecture has a GPIO4 too imx: nand: Support flash based BBT i.MX25: usb: Set PORTSCx register imx: usb: There is no such register i.MX2: Include asm/types.h in arch-mx25/imx-regs.h imx: Add u-boot.imx as target for ARM9 i.MX SOCs Wolfgang Grandegger (1): USB: ehci-mx6: Fix broken IO access arch/arm/cpu/arm926ejs/config.mk | 6 + arch/arm/cpu/arm926ejs/mx25/generic.c | 27 + arch/arm/cpu/arm926ejs/mx28/Makefile | 2 +- arch/arm/cpu/arm926ejs/mx28/mx28.c | 29 +- arch/arm/cpu/arm926ejs/mx28/mx28_init.h | 4 + arch/arm/cpu/arm926ejs/mx28/spl_boot.c | 57 ++ arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c | 86 ++ arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 14 +- arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 224 +++-- arch/arm/cpu/armv7/imx-common/cpu.c | 15 +- arch/arm/cpu/armv7/mx5/clock.c | 493 +++++++++- arch/arm/cpu/armv7/mx6/clock.c | 50 +- arch/arm/cpu/armv7/mx6/soc.c | 30 + arch/arm/include/asm/arch-mx25/clock.h | 23 + arch/arm/include/asm/arch-mx25/imx-regs.h | 3 + arch/arm/include/asm/arch-mx28/imx-regs.h | 2 + arch/arm/include/asm/arch-mx28/regs-lcdif.h | 212 +++++ arch/arm/include/asm/arch-mx28/regs-lradc.h | 400 ++++++++ arch/arm/include/asm/arch-mx28/sys_proto.h | 30 + arch/arm/include/asm/arch-mx5/clock.h | 7 +- arch/arm/include/asm/arch-mx5/crm_regs.h | 6 + arch/arm/include/asm/arch-mx5/imx-regs.h | 11 + arch/arm/include/asm/arch-mx5/iomux.h | 4 +- arch/arm/include/asm/arch-mx5/sys_proto.h | 3 + arch/arm/include/asm/arch-mx6/clock.h | 1 + .../asm/arch-mx6/{ccm_regs.h => crm_regs.h} | 2 +- arch/arm/include/asm/arch-mx6/imx-regs.h | 9 + arch/arm/include/asm/arch-mx6/iomux-v3.h | 111 +++ arch/arm/include/asm/arch-mx6/sys_proto.h | 5 +- board/denx/m28evk/m28evk.c | 20 +- board/denx/m28evk/spl_boot.c | 8 +- board/esg/ima3-mx53/Makefile | 41 + board/esg/ima3-mx53/ima3-mx53.c | 302 ++++++ board/esg/ima3-mx53/imximage.cfg | 108 +++ board/freescale/mx28evk/iomux.c | 21 + board/freescale/mx53loco/mx53loco.c | 146 ++- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 155 +++- boards.cfg | 1 + common/cmd_sata.c | 9 +- drivers/block/Makefile | 1 + drivers/block/dwc_ahsata.c | 969 ++++++++++++++++++++ drivers/block/dwc_ahsata.h | 335 +++++++ drivers/gpio/mxc_gpio.c | 3 +- drivers/misc/Makefile | 1 + drivers/misc/pmic_dialog.c | 37 + drivers/mmc/mxsmmc.c | 3 +- drivers/mtd/nand/mxc_nand.c | 33 + drivers/net/fec_mxc.c | 88 +- drivers/spi/mxs_spi.c | 23 +- drivers/usb/host/ehci-mx6.c | 5 +- drivers/usb/host/ehci-mxc.c | 4 - include/ahci.h | 5 +- include/configs/ima3-mx53.h | 269 ++++++ include/configs/m28evk.h | 15 +- include/configs/mx28evk.h | 13 + include/configs/mx31pdk.h | 1 + include/configs/mx53loco.h | 29 +- include/configs/mx6qarm2.h | 1 + include/configs/mx6qsabrelite.h | 17 + include/dialog_pmic.h | 187 ++++ include/fsl_pmic.h | 11 + include/pmic.h | 1 + 62 files changed, 4523 insertions(+), 205 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/mx28/spl_lradc_init.c create mode 100644 arch/arm/include/asm/arch-mx28/regs-lcdif.h create mode 100644 arch/arm/include/asm/arch-mx28/regs-lradc.h rename arch/arm/include/asm/arch-mx6/{ccm_regs.h => crm_regs.h} (99%) create mode 100644 board/esg/ima3-mx53/Makefile create mode 100644 board/esg/ima3-mx53/ima3-mx53.c create mode 100644 board/esg/ima3-mx53/imximage.cfg create mode 100644 drivers/block/dwc_ahsata.c create mode 100644 drivers/block/dwc_ahsata.h create mode 100644 drivers/misc/pmic_dialog.c create mode 100644 include/configs/ima3-mx53.h create mode 100644 include/dialog_pmic.h Regards, Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

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[U-Boot] [PATCH] ATMEL/PIO: Enable new feature of PIO on Atmel device
by Bo Shen 15 May '12

15 May '12

Enable new PIO feature supported by Atmel SoC. Using CPU_HAS_PIO3 micro to enable PIO new feature. Signed-off-by: Bo Shen <voice.shen(a)atmel.com> --- arch/arm/include/asm/arch-at91/at91_pio.h | 71 ++++++++++++++++- drivers/gpio/at91_gpio.c | 123 ++++++++++++++++++++++++++++- 2 files changed, 191 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-at91/at91_pio.h b/arch/arm/include/asm/arch-at91/at91_pio.h index 416cabf..4ceedee 100644 --- a/arch/arm/include/asm/arch-at91/at91_pio.h +++ b/arch/arm/include/asm/arch-at91/at91_pio.h @@ -66,14 +66,50 @@ typedef struct at91_port { u32 puer; /* 0x64 Pull-up Enable Register */ u32 pusr; /* 0x68 Pad Pull-up Status Register */ u32 reserved4; +#if defined(CPU_HAS_PIO3) + u32 abcdsr1; /* 0x70 Peripheral ABCD Select Register 1 */ + u32 abcdsr2; /* 0x74 Peripheral ABCD Select Register 2 */ + u32 reserved5[2]; + u32 ifscdr; /* 0x80 Input Filter SCLK Disable Register */ + u32 ifscer; /* 0x84 Input Filter SCLK Enable Register */ + u32 ifscsr; /* 0x88 Input Filter SCLK Status Register */ + u32 scdr; /* 0x8C SCLK Divider Debouncing Register */ + u32 ppddr; /* 0x90 Pad Pull-down Disable Register */ + u32 ppder; /* 0x94 Pad Pull-down Enable Register */ + u32 ppdsr; /* 0x98 Pad Pull-down Status Register */ + u32 reserved6; /* */ +#else u32 asr; /* 0x70 Select A Register */ u32 bsr; /* 0x74 Select B Register */ u32 absr; /* 0x78 AB Select Status Register */ u32 reserved5[9]; /* */ +#endif u32 ower; /* 0xA0 Output Write Enable Register */ u32 owdr; /* 0xA4 Output Write Disable Register */ - u32 owsr; /* OxA8 utput Write Status Register */ + u32 owsr; /* OxA8 Output Write Status Register */ +#if defined(CPU_HAS_PIO3) + u32 reserved7; /* */ + u32 aimer; /* 0xB0 Additional INT Modes Enable Register */ + u32 aimdr; /* 0xB4 Additional INT Modes Disable Register */ + u32 aimmr; /* 0xB8 Additional INT Modes Mask Register */ + u32 reserved8; /* */ + u32 esr; /* 0xC0 Edge Select Register */ + u32 lsr; /* 0xC4 Level Select Register */ + u32 elsr; /* 0xC8 Edge/Level Status Register */ + u32 reserved9; /* 0xCC */ + u32 fellsr; /* 0xD0 Falling /Low Level Select Register */ + u32 rehlsr; /* 0xD4 Rising /High Level Select Register */ + u32 frlhsr; /* 0xD8 Fall/Rise - Low/High Status Register */ + u32 reserved10; /* */ + u32 locksr; /* 0xE0 Lock Status */ + u32 wpmr; /* 0xE4 Write Protect Mode Register */ + u32 wpsr; /* 0xE8 Write Protect Status Register */ + u32 reserved11[5]; /* */ + u32 schmitt; /* 0x100 Schmitt Trigger Register */ + u32 reserved12[63]; +#else u32 reserved6[85]; +#endif } at91_port_t; typedef union at91_pio { @@ -94,6 +130,13 @@ typedef union at91_pio { #ifdef CONFIG_AT91_GPIO int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup); int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup); +#if defined(CPU_HAS_PIO3) +int at91_set_c_periph(unsigned port, unsigned pin, int use_pullup); +int at91_set_d_periph(unsigned port, unsigned pin, int use_pullup); +int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div); +int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on); +int at91_set_pio_disable_schmitt_trig(unsigned port, unsigned pin); +#endif int at91_set_pio_input(unsigned port, unsigned pin, int use_pullup); int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on); int at91_set_pio_output(unsigned port, unsigned pin, int value); @@ -137,11 +180,37 @@ int at91_get_pio_value(unsigned port, unsigned pin); #define PIO_PUER 0x64 /* Pull-up Enable Register */ #define PIO_PUSR 0x68 /* Pull-up Status Register */ #define PIO_ASR 0x70 /* Peripheral A Select Register */ +#define PIO_ABCDSR1 0x70 /* Peripheral ABCD Select Register 1 */ #define PIO_BSR 0x74 /* Peripheral B Select Register */ +#define PIO_ABCDSR2 0x74 /* Peripheral ABCD Select Register 2 */ #define PIO_ABSR 0x78 /* AB Status Register */ +#define PIO_IFSCDR 0x80 /* Input Filter Slow Clock Disable Register */ +#define PIO_IFSCER 0x84 /* Input Filter Slow Clock Enable Register */ +#define PIO_IFSCSR 0x88 /* Input Filter Slow Clock Status Register */ +#define PIO_SCDR 0x8c /* Slow Clock Divider Debouncing Register */ +#define PIO_SCDR_DIV (0x3fff << 0) /* Slow Clock Divider Mask */ +#define PIO_PPDDR 0x90 /* Pad Pull-down Disable Register */ +#define PIO_PPDER 0x94 /* Pad Pull-down Enable Register */ +#define PIO_PPDSR 0x98 /* Pad Pull-down Status Register */ #define PIO_OWER 0xa0 /* Output Write Enable Register */ #define PIO_OWDR 0xa4 /* Output Write Disable Register */ #define PIO_OWSR 0xa8 /* Output Write Status Register */ +#define PIO_AIMER 0xb0 /* Additional INT Modes Enable Register */ +#define PIO_AIMDR 0xb4 /* Additional INT Modes Disable Register */ +#define PIO_AIMMR 0xb8 /* Additional INT Modes Mask Register */ +#define PIO_ESR 0xc0 /* Edge Select Register */ +#define PIO_LSR 0xc4 /* Level Select Register */ +#define PIO_ELSR 0xc8 /* Edge/Level Status Register */ +#define PIO_FELLSR 0xd0 /* Falling Edge/Low Level Select Register */ +#define PIO_REHLSR 0xd4 /* Rising Edge/ High Level Select Register */ +#define PIO_FRLHSR 0xd8 /* Fall/Rise - Low/High Status Register */ +#define PIO_SCHMITT 0x100 /* Schmitt Trigger Register */ + +#define ABCDSR_PERIPH_A 0x0 +#define ABCDSR_PERIPH_B 0x1 +#define ABCDSR_PERIPH_C 0x2 +#define ABCDSR_PERIPH_D 0x3 + #endif #endif diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c index be2a026..64dfd6c 100644 --- a/drivers/gpio/at91_gpio.c +++ b/drivers/gpio/at91_gpio.c @@ -86,7 +86,14 @@ int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup) mask = 1 << pin; writel(mask, &pio->port[port].idr); at91_set_pio_pullup(port, pin, use_pullup); +#if defined(CPU_HAS_PIO3) + writel(readl(&pio->port[port].abcdsr1) & ~mask, + &pio->port[port].abcdsr1); + writel(readl(&pio->port[port].abcdsr2) & ~mask, + &pio->port[port].abcdsr2); +#else writel(mask, &pio->port[port].asr); +#endif writel(mask, &pio->port[port].pdr); } return 0; @@ -104,12 +111,63 @@ int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup) mask = 1 << pin; writel(mask, &pio->port[port].idr); at91_set_pio_pullup(port, pin, use_pullup); +#if defined(CPU_HAS_PIO3) + writel(readl(&pio->port[port].abcdsr1) | mask, + &pio->port[port].abcdsr1); + writel(readl(&pio->port[port].abcdsr2) & ~mask, + &pio->port[port].abcdsr2); +#else writel(mask, &pio->port[port].bsr); +#endif writel(mask, &pio->port[port].pdr); } return 0; } +#if defined(CPU_HAS_PIO3) +/* + * mux the pin to the "C" internal peripheral role. + */ +int at91_set_c_periph(unsigned port, unsigned pin, int use_pullup) +{ + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + u32 mask; + + if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { + mask = 1 << pin; + writel(mask, &pio->port[port].idr); + at91_set_pio_pullup(port, pin, use_pullup); + writel(readl(&pio->port[port].abcdsr1) & ~mask, + &pio->port[port].abcdsr1); + writel(readl(&pio->port[port].abcdsr2) | mask, + &pio->port[port].abcdsr2); + writel(mask, &pio->port[port].pdr); + } + return 0; +} + +/* + * mux the pin to the "D" internal peripheral role. + */ +int at91_set_d_periph(unsigned port, unsigned pin, int use_pullup) +{ + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + u32 mask; + + if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { + mask = 1 << pin; + writel(mask, &pio->port[port].idr); + at91_set_pio_pullup(port, pin, use_pullup); + writel(readl(&pio->port[port].abcdsr1) | mask, + &pio->port[port].abcdsr1); + writel(readl(&pio->port[port].abcdsr2) | mask, + &pio->port[port].abcdsr2); + writel(mask, &pio->port[port].pdr); + } + return 0; +} +#endif + /* * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and * configure it for an input. @@ -162,14 +220,75 @@ int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on) if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - if (is_on) + if (is_on) { +#if defined(CPU_HAS_PIO3) + writel(mask, &pio->port[port].ifscdr); +#endif writel(mask, &pio->port[port].ifer); - else + } else writel(mask, &pio->port[port].ifdr); } return 0; } +#if defined(CPU_HAS_PIO3) +/* + * enable/disable the debounce filter. + */ +int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div) +{ + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + u32 mask; + + if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { + mask = 1 << pin; + if (is_on) { + writel(mask, &pio->port[port].ifscer); + writel(div & PIO_SCDR_DIV, &pio->port[port].scdr); + writel(mask, &pio->port[port].ifer); + } else + writel(mask, &pio->port[port].ifdr); + } + return 0; +} + +/* + * enable/disable the pull-down. + * If pull-up already enabled while calling the function, we disable it. + */ +int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on) +{ + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + u32 mask; + + if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { + mask = 1 << pin; + writel(mask, &pio->port[port].pudr); + if (is_on) + writel(mask, &pio->port[port].ppder); + else + writel(mask, &pio->port[port].ppddr); + } + return 0; +} + +/* + * disable Schmitt trigger + */ +int at91_set_pio_disable_schmitt_trig(unsigned port, unsigned pin) +{ + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + u32 mask; + + if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { + mask = 1 << pin; + writel(readl(&pio->port[port].schmitt) | mask, + &pio->port[port].schmitt); + } + return 0; +} +#endif + /* * enable/disable the multi-driver. This is only valid for output and * allows the output pin to run as an open collector output. -- 1.7.10

2 2

[U-Boot] [PATCH] am33xx: Do not call init_timer twice
by Tom Rini 15 May '12

15 May '12

We do not need to call init_timer both in SPL and U-Boot itself, just SPL needs to initialize the timer. Signed-off-by: Tom Rini <trini(a)ti.com> --- arch/arm/cpu/armv7/am33xx/board.c | 30 ++++++++++++++++-------------- arch/arm/include/asm/arch-am33xx/cpu.h | 2 -- board/ti/am335x/evm.c | 13 +------------ 3 files changed, 17 insertions(+), 28 deletions(-) diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index d64ae69..d15e013 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -40,6 +40,22 @@ struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE; #define UART_SMART_IDLE_EN (0x1 << 0x3) #endif +#ifdef CONFIG_SPL_BUILD +/* Initialize timer */ +static void init_timer(void) +{ + /* Reset the Timer */ + writel(0x2, (&timer_base->tscir)); + + /* Wait until the reset is done */ + while (readl(&timer_base->tiocp_cfg) & 1) + ; + + /* Start the Timer */ + writel(0x1, (&timer_base->tclr)); +} +#endif + /* * early system init of muxing and clocks. */ @@ -88,20 +104,6 @@ void s_init(void) enable_mmc0_pin_mux(); } -/* Initialize timer */ -void init_timer(void) -{ - /* Reset the Timer */ - writel(0x2, (&timer_base->tscir)); - - /* Wait until the reset is done */ - while (readl(&timer_base->tiocp_cfg) & 1) - ; - - /* Start the Timer */ - writel(0x1, (&timer_base->tclr)); -} - #if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index cd002e6..8760cc0 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -213,8 +213,6 @@ struct ctrl_stat { unsigned int resv1[16]; unsigned int statusreg; /* ofset 0x40 */ }; - -void init_timer(void); #endif /* __ASSEMBLY__ */ #endif /* __KERNEL_STRICT_NAMES */ diff --git a/board/ti/am335x/evm.c b/board/ti/am335x/evm.c index 13dc603..5e2d53a 100644 --- a/board/ti/am335x/evm.c +++ b/board/ti/am335x/evm.c @@ -29,17 +29,6 @@ DECLARE_GLOBAL_DATA_PTR; /* * Basic board specific setup */ -int init_basic_setup(void) -{ - /* Initialize the Timer */ - init_timer(); - - /* address of boot parameters */ - gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100; - - return 0; -} - int board_init(void) { enable_uart0_pin_mux(); @@ -49,7 +38,7 @@ int board_init(void) i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif - init_basic_setup(); + gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100; return 0; } -- 1.7.9.5

1 0

[U-Boot] [PATCH 1/2] Add option -r to env import to allow import of text files with CRLF as line endings
by Alexander Holler 15 May '12

15 May '12

When this option is enabled, CRLF is treated like LF when importing environments from text files, which means CRs ('\r') in front of LFs ('\n') are just ignored. Drawback of enabling this option is that (maybe exported) variables which have a trailing CR in their content will get imported without that CR. Signed-off-by: Alexander Holler <holler(a)ahsoftware.de> --- common/cmd_nvedit.c | 17 ++++++++++++++--- common/env_common.c | 4 ++-- include/search.h | 2 +- lib/hashtable.c | 23 +++++++++++++++++++---- 4 files changed, 36 insertions(+), 10 deletions(-) diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index e1ccdd8..f136953 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -793,11 +793,15 @@ sep_err: #ifdef CONFIG_CMD_IMPORTENV /* - * env import [-d] [-t | -b | -c] addr [size] + * env import [-d] [-t [-r] | -b | -c] addr [size] * -d: delete existing environment before importing; * otherwise overwrite / append to existion definitions * -t: assume text format; either "size" must be given or the * text data must be '\0' terminated + * -r: handle CRLF like LF, that means exported variables with + * a content which ends with \r won't get imported. Used + * to import text files created with editors which are using CRLF + * for line endings. Only effective in addition to -t. * -b: assume binary format ('\0' separated, "\0\0" terminated) * -c: assume checksum protected environment format * addr: memory address to read from @@ -812,6 +816,7 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag, int chk = 0; int fmt = 0; int del = 0; + int crlf_is_lf = 0; size_t size; cmd = *argv; @@ -836,6 +841,9 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag, goto sep_err; sep = '\n'; break; + case 'r': /* handle CRLF like LF */ + crlf_is_lf = 1; + break; case 'd': del = 1; break; @@ -851,6 +859,9 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag, if (!fmt) printf("## Warning: defaulting to text format\n"); + if (sep != '\n' && crlf_is_lf ) + crlf_is_lf = 0; + addr = (char *)simple_strtoul(argv[0], NULL, 16); if (argc == 2) { @@ -888,7 +899,7 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag, addr = (char *)ep->data; } - if (himport_r(&env_htab, addr, size, sep, del ? 0 : H_NOCLEAR) == 0) { + if (himport_r(&env_htab, addr, size, sep, del ? 0 : H_NOCLEAR, crlf_is_lf) == 0) { error("Environment import failed: errno = %d\n", errno); return 1; } @@ -974,7 +985,7 @@ U_BOOT_CMD( #if defined(CONFIG_CMD_GREPENV) "env grep string [...] - search environment\n" #endif - "env import [-d] [-t | -b | -c] addr [size] - import environment\n" + "env import [-d] [-t [-r] | | -b | -c] addr [size] - import environment\n" "env print [name ...] - print environment\n" #if defined(CONFIG_CMD_RUN) "env run var [...] - run commands in an environment variable\n" diff --git a/common/env_common.c b/common/env_common.c index c33d22d..9b50ffe 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -182,7 +182,7 @@ void set_default_env(const char *s) } if (himport_r(&env_htab, (char *)default_environment, - sizeof(default_environment), '\0', 0) == 0) + sizeof(default_environment), '\0', 0, 0) == 0) error("Environment import failed: errno = %d\n", errno); gd->flags |= GD_FLG_ENV_READY; @@ -207,7 +207,7 @@ int env_import(const char *buf, int check) } } - if (himport_r(&env_htab, (char *)ep->data, ENV_SIZE, '\0', 0)) { + if (himport_r(&env_htab, (char *)ep->data, ENV_SIZE, '\0', 0, 0)) { gd->flags |= GD_FLG_ENV_READY; return 1; } diff --git a/include/search.h b/include/search.h index ef53edb..053cf07 100644 --- a/include/search.h +++ b/include/search.h @@ -96,7 +96,7 @@ extern ssize_t hexport_r(struct hsearch_data *__htab, extern int himport_r(struct hsearch_data *__htab, const char *__env, size_t __size, const char __sep, - int __flag); + int __flag, int __crlf_is_lf); /* Flags for himport_r() */ #define H_NOCLEAR 1 /* do not clear hash table before importing */ diff --git a/lib/hashtable.c b/lib/hashtable.c index abd61c8..e5fa3c3 100644 --- a/lib/hashtable.c +++ b/lib/hashtable.c @@ -623,9 +623,9 @@ ssize_t hexport_r(struct hsearch_data *htab, const char sep, * (entries separated by newline characters). * * To allow for nicely formatted text input, leading white space - * (sequences of SPACE and TAB chars) is ignored, and entries starting - * (after removal of any leading white space) with a '#' character are - * considered comments and ignored. + * (sequences of SPACE and TAB chars) is ignored, all Carriage Returns + * are ignored and entries starting (after removal of any leading white + * space) with a '#' character are considered comments and ignored. * * [NOTE: this means that a variable name cannot start with a '#' * character.] @@ -639,7 +639,7 @@ ssize_t hexport_r(struct hsearch_data *htab, const char sep, */ int himport_r(struct hsearch_data *htab, - const char *env, size_t size, const char sep, int flag) + const char *env, size_t size, const char sep, int flag, int crlf_is_lf) { char *data, *sp, *dp, *name, *value; @@ -698,6 +698,21 @@ int himport_r(struct hsearch_data *htab, } } + /* Remove all Carriage Returns */ + if(!size) + return 1; /* everything OK */ + if(crlf_is_lf) { + unsigned ignored_crs = 0; + for(;dp < data + size && *dp; ++dp) { + if(*dp == '\r' && + dp < data + size - 1 && *(dp+1) == '\n') + ++ignored_crs; + else + *(dp-ignored_crs) = *dp; + } + size -= ignored_crs; + dp = data; + } /* Parse environment; allow for '\0' and 'sep' as separators */ do { ENTRY e, *rv; -- 1.7.3.4

6 22

[U-Boot] [PATCH] omap4/5: Use CPUDIR for .lds script
by Thomas Weber 14 May '12

14 May '12

Signed-off-by: Thomas Weber <thomas(a)tomweber.eu> --- include/configs/omap4_common.h | 2 +- include/configs/omap5_evm.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index a989721..390ee8a 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -283,7 +283,7 @@ #define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SYS_ENABLE_PADS_ALL diff --git a/include/configs/omap5_evm.h b/include/configs/omap5_evm.h index d3d5263..5bb99b3 100644 --- a/include/configs/omap5_evm.h +++ b/include/configs/omap5_evm.h @@ -266,7 +266,7 @@ #define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" /* * 64 bytes before this address should be set aside for u-boot.img's -- 1.7.10.2

1 0

[U-Boot] [PATCH v2] tegra: override compiler flags for cmd_nvedit
by Allen Martin 14 May '12

14 May '12

Override -march setting for tegra to -march=armv4t for cmd_nvedit.c The recent change to use -march=armv7-a for armv7 caused a regression on tegra because tegra starts boot on a arm7tdmi processor before transferring control to the cortex-a9. While still executing on the arm7tdmi there is a call to getenv_ulong() that causes an illegal instruction exception if cmd_nvedit is compiled for armv7. Signed-off-by: Allen Martin <amartin(a)nvidia.com> --- arch/arm/cpu/armv7/tegra2/config.mk | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/tegra2/config.mk b/arch/arm/cpu/armv7/tegra2/config.mk index fe9ef5b..3f068dc 100644 --- a/arch/arm/cpu/armv7/tegra2/config.mk +++ b/arch/arm/cpu/armv7/tegra2/config.mk @@ -24,10 +24,11 @@ # MA 02111-1307 USA # -# Tegra has an ARMv4T CPU which runs board_init_f(), so we must build this -# file with compatible flags +# Tegra has an ARMv4T CPU which runs board_init_f(), so we must build these +# files with compatible flags ifdef CONFIG_TEGRA2 CFLAGS_arch/arm/lib/board.o += -march=armv4t +CFLAGS_common/cmd_nvedit.o += -march=armv4t endif USE_PRIVATE_LIBGCC = yes -- 1.7.9.5

1 0