April 2012 - U-Boot

[U-Boot] [PATCH v2 00/19] updates for keymile arm boards
by Valentin Longchamp 04 May '12

04 May '12

This patch series updates keymile boards with Kirkwood CPU and adds two new boards. This new boards are kmnusa and kmcoge5un. Also the existing boards with own config files were migrated to the common header km_kirkwood.h. Some small adaption in generic kirkwood code was needed due to two new features on the new board. First one is that the u-boot environment is in the SPI NOR flash and the second one is the direct MAC/MAC connection from the mvgbe interface to an simple switch. Changes for v2: - removed the two patches "spi/kirkwood: add weak functions board_spi_bus_claim/release" and "mvgbe: remove warning for unused methods" from the series as they are were independent from it. The series is however dependent of these two patches. Holger Brunck (13): arm/km: add board type to boards.cfg arm/km: add piggy mac adress offset for mgcoge3un arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATE arm/km: use ARRAY_SIZE macro arm/km: fix wrong comment in SDRAM config for mgcoge3un arm/km: change maintainer for mgcoge3un arm/km: remove CONFIG_RESET_PHY_R km/arm: remove spi toggle command arm/km: add kmnusa board support arm/km: add kmcoge5un board support arm/km: convert mgcoge3un target to km_kirkwood arm/km: remove portl2.h and use km_kirkwood instead arm/km: cleanup km_kirkwood boards Valentin Longchamp (6): arm/km: enable mii cmd arm/km: use correct kw_gpio function for NAND/SPI switching arm/km: implement weak function board_spi_clam_bus/release arm/kirkwood: protect the ENV_SPI #defines arm/km: correct init of 88e6352 switch in the reset_phy function arm/km: enable BOCO2 FPGA download support MAINTAINERS | 4 +- arch/arm/include/asm/arch-kirkwood/config.h | 12 +- board/keymile/common/common.h | 12 + board/keymile/km_arm/128M16-1.cfg | 290 ++++++++++++++++++++++++++ board/keymile/km_arm/256M8-1.cfg | 292 +++++++++++++++++++++++++++ board/keymile/km_arm/Makefile | 8 + board/keymile/km_arm/fpga_config.c | 212 +++++++++++++++++++ board/keymile/km_arm/km_arm.c | 119 +++++++----- board/keymile/km_arm/kwbimage-memphis.cfg | 2 +- board/keymile/km_arm/managed_switch.c | 166 +++++++++++++++ boards.cfg | 10 +- include/configs/km/km_arm.h | 60 ++++-- include/configs/km_kirkwood.h | 157 +++++++++++++-- include/configs/mgcoge3un.h | 86 -------- include/configs/portl2.h | 85 -------- 15 files changed, 1256 insertions(+), 259 deletions(-) create mode 100644 board/keymile/km_arm/128M16-1.cfg create mode 100644 board/keymile/km_arm/256M8-1.cfg create mode 100644 board/keymile/km_arm/fpga_config.c create mode 100644 board/keymile/km_arm/managed_switch.c delete mode 100644 include/configs/mgcoge3un.h delete mode 100644 include/configs/portl2.h

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[U-Boot] [PATCH 0/3] Initialisation Sequence Framework
by Graeme Russ 03 May '12

03 May '12

Well here it is (finally) - My Initialisation Sequence Framework This series is limited to x86 and is controlled by CONFIG_INIT_FUNC so no other arch should be effected. I don't have any cross compilers, so I would appreciate if others could confirm the zero impact assertion Asbestos suit on Fire away ;) Regards, Graeme Graeme Russ (3): init_func: Add fundamental framework init_func: Add x86 support init_func: Use for eNET board Makefile | 34 +- arch/x86/cpu/cpu.c | 3 + arch/x86/cpu/sc520/sc520_sdram.c | 3 + arch/x86/cpu/sc520/sc520_timer.c | 2 + arch/x86/cpu/u-boot.lds | 23 + arch/x86/lib/board.c | 10 +- arch/x86/lib/init_helpers.c | 14 + arch/x86/lib/init_wrappers.c | 11 +- arch/x86/lib/pcat_interrupts.c | 2 + arch/x86/lib/relocate.c | 4 + board/eNET/eNET.c | 5 + common/Makefile | 2 + common/console.c | 3 + common/env_dataflash.c | 1 + common/env_eeprom.c | 1 + common/env_fat.c | 1 + common/env_flash.c | 2 + common/env_mgdisk.c | 1 + common/env_mmc.c | 1 + common/env_nand.c | 1 + common/env_nowhere.c | 1 + common/env_nvram.c | 1 + common/env_onenand.c | 1 + common/env_sf.c | 1 + common/serial.c | 2 + common/stdio.c | 2 + config.mk | 2 + doc/README.INIT_FUNC | 65 ++ include/configs/eNET.h | 1 + include/init_func.h | 37 + tools/Makefile | 6 + tools/mkinitseq.c | 1512 ++++++++++++++++++++++++++++++++++++++ 32 files changed, 1746 insertions(+), 9 deletions(-) create mode 100644 doc/README.INIT_FUNC create mode 100644 include/init_func.h create mode 100644 tools/mkinitseq.c -- 1.7.7.6

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[U-Boot] [PATCH] misc:pmic:trats: Correct procedure of enabling/disabling USB regulators
by Lukasz Majewski 03 May '12

03 May '12

In the MAX8997, LDO regulators needs to preserve previously set voltage values. Signed-off-by: Lukasz Majewski <l.majewski(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> Cc: Minkyu Kang <mk7.kang(a)samsung.com> --- board/samsung/trats/trats.c | 15 +++++++++++---- 1 files changed, 11 insertions(+), 4 deletions(-) diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 10cf5b3..a20268d 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -218,6 +218,7 @@ int board_mmc_init(bd_t *bis) static int s5pc210_phy_control(int on) { int ret = 0; + u32 val = 0; struct pmic *p = get_pmic(); if (pmic_probe(p)) @@ -226,11 +227,17 @@ static int s5pc210_phy_control(int on) if (on) { ret |= pmic_set_output(p, MAX8997_REG_SAFEOUTCTRL, ENSAFEOUT1, LDO_ON); - ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, EN_LDO); - ret |= pmic_reg_write(p, MAX8997_REG_LDO8CTRL, EN_LDO); + ret |= pmic_reg_read(p, MAX8997_REG_LDO3CTRL, &val); + ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, EN_LDO | val); + + ret |= pmic_reg_read(p, MAX8997_REG_LDO8CTRL, &val); + ret |= pmic_reg_write(p, MAX8997_REG_LDO8CTRL, EN_LDO | val); } else { - ret |= pmic_reg_write(p, MAX8997_REG_LDO8CTRL, DIS_LDO); - ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, DIS_LDO); + ret |= pmic_reg_read(p, MAX8997_REG_LDO8CTRL, &val); + ret |= pmic_reg_write(p, MAX8997_REG_LDO8CTRL, DIS_LDO | val); + + ret |= pmic_reg_read(p, MAX8997_REG_LDO3CTRL, &val); + ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, DIS_LDO | val); ret |= pmic_set_output(p, MAX8997_REG_SAFEOUTCTRL, ENSAFEOUT1, LDO_OFF); } -- 1.7.2.3

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[U-Boot] [PATCH 1/5] msm7x30: Add support for low speed uart on msm7x30
by mohamed.haneef＠lntinfotech.com 03 May '12

03 May '12

From: Mohamed Haneef <mohamed.haneef(a)lntinfotech.com> * Support for low speed uart Signed-off-by: Mohamed Haneef <mohamed.haneef(a)lntinfotech.com> --- drivers/serial/Makefile | 1 + drivers/serial/serial_msm_uart.c | 206 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 207 insertions(+), 0 deletions(-) create mode 100644 drivers/serial/serial_msm_uart.c diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 616b857..2801edc 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -55,6 +55,7 @@ COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o COBJS-$(CONFIG_SANDBOX_SERIAL) += sandbox.o COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o +COBJS-$(CONFIG_MSM_UART) += serial_msm_uart.o ifndef CONFIG_SPL_BUILD COBJS-$(CONFIG_USB_TTY) += usbtty.o diff --git a/drivers/serial/serial_msm_uart.c b/drivers/serial/serial_msm_uart.c new file mode 100644 index 0000000..8cafa7a --- /dev/null +++ b/drivers/serial/serial_msm_uart.c @@ -0,0 +1,206 @@ +/* + * (C) Copyright 2012 + * LARSEN & TOUBRO INFOTECH LTD <www.lntinfotech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include <common.h> +#include <asm/arch/iomap.h> +#include <asm/io.h> +#include <asm/types.h> + +#define UART_MR1 0x0000 + +#define UART_MR1_AUTO_RFR_LEVEL0(n) (((n) & 0x3f) << 8) +#define UART_MR1_RX_RDY_CTL (1 << 7) +#define UART_MR1_CTS_CTL (1 << 6) +#define UART_MR1_AUTO_RFR_LEVEL1(n) ((n) & 0x3f) + +#define UART_MR2 0x0004 +#define UART_MR2_ERROR_MODE (1 << 6) +#define UART_MR2_BITS_PER_CHAR_5 (0 << 4) +#define UART_MR2_BITS_PER_CHAR_6 (1 << 4) +#define UART_MR2_BITS_PER_CHAR_7 (2 << 4) +#define UART_MR2_BITS_PER_CHAR_8 (3 << 4) +#define UART_MR2_STOP_BIT_LEN_0563 (0 << 2) +#define UART_MR2_STOP_BIT_LEN_1000 (1 << 2) +#define UART_MR2_STOP_BIT_LEN_1563 (2 << 2) +#define UART_MR2_STOP_BIT_LEN_2000 (3 << 2) +#define UART_MR2_PARITY_MODE_NONE (0) +#define UART_MR2_PARITY_MODE_ODD (1) +#define UART_MR2_PARITY_MODE_EVEN (2) +#define UART_MR2_PARITY_MODE_SPACE (3) + +#define UART_CSR 0x0008 +#define UART_CSR_115200 0xFF +#define UART_CSR_57600 0xEE +#define UART_CSR_38400 0xDD +#define UART_CSR_19200 0xBB + +#define UART_TF 0x000C + +#define UART_CR 0x0010 +#define UART_CR_CMD_NULL (0 << 4) +#define UART_CR_CMD_RESET_RX (1 << 4) +#define UART_CR_CMD_RESET_TX (2 << 4) +#define UART_CR_CMD_RESET_ERR (3 << 4) +#define UART_CR_CMD_RESET_BCI (4 << 4) +#define UART_CR_CMD_START_BREAK (5 << 4) +#define UART_CR_CMD_STOP_BREAK (6 << 4) +#define UART_CR_CMD_RESET_CTS_N (7 << 4) +#define UART_CR_CMD_PACKET_MODE (9 << 4) +#define UART_CR_CMD_MODE_RESET (12 << 4) +#define UART_CR_CMD_SET_RFR_N (13 << 4) +#define UART_CR_CMD_RESET_RFR_ND (14 << 4) +#define UART_CR_TX_DISABLE (1 << 3) +#define UART_CR_TX_ENABLE (1 << 3) +#define UART_CR_RX_DISABLE (1 << 3) +#define UART_CR_RX_ENABLE (1 << 3) + +#define UART_IMR 0x0014 +#define UART_IMR_RXLEV (1 << 4) +#define UART_IMR_TXLEV (1 << 0) + +#define UART_IPR 0x0018 +#define UART_TFWR 0x001C +#define UART_RFWR 0x0020 +#define UART_HCR 0x0024 + +#define UART_MREG 0x0028 +#define UART_NREG 0x002C +#define UART_DREG 0x0030 +#define UART_MNDREG 0x0034 +#define UART_IRDA 0x0038 +#define UART_MISR_MODE 0x0040 +#define UART_MISR_RESET 0x0044 +#define UART_MISR_EXPORT 0x0048 +#define UART_MISR_VAL 0x004C +#define UART_TEST_CTRL 0x0050 + +#define UART_SR 0x0008 +#define UART_SR_HUNT_CHAR (1 << 7) +#define UART_SR_RX_BREAK (1 << 6) +#define UART_SR_PAR_FRAME_ERR (1 << 5) +#define UART_SR_OVERRUN (1 << 4) +#define UART_SR_TX_EMPTY (1 << 3) +#define UART_SR_TX_READY (1 << 2) +#define UART_SR_RX_FULL (1 << 1) +#define UART_SR_RX_READY (1 << 0) + +#define UART_RF 0x000C +#define UART_MISR 0x0010 +#define UART_ISR 0x0014 + + +#if PLATFORM_MSM7X30 +static unsigned uart_base = MSM_UART2_BASE; +#elif PLATFORM_MSM7X27A +static unsigned uart_base = MSM_UART1_BASE; +#else +static unsigned uart_base = MSM_UART3_BASE; +#endif + +#define uwr(v, a) writel(v, uart_base + (a)) +#define urd(a) readl(uart_base + (a)) + +void uart_init(void) +{ + uwr(0x0A, UART_CR); /* disable TX and RX */ + uwr(0x30, UART_CR); /* reset error status */ + uwr(0x10, UART_CR); /* reset receiver */ + uwr(0x20, UART_CR); /* reset transmitter */ +#if PLATFORM_QSD8K || PLATFORM_MSM7X30 || PLATFORM_MSM7X27A + /* TCXO */ + uwr(0x06, UART_MREG); + uwr(0xF1, UART_NREG); + uwr(0x0F, UART_DREG); + uwr(0x1A, UART_MNDREG); +#else + /* TCXO/4 */ + uwr(0xC0, UART_MREG); + uwr(0xAF, UART_NREG); + uwr(0x80, UART_DREG); + uwr(0x19, UART_MNDREG); +#endif + uwr(0x10, UART_CR); /* reset RX */ + uwr(0x20, UART_CR); /* reset TX */ + uwr(0x30, UART_CR); /* reset error status */ + uwr(0x40, UART_CR); /* reset RX break */ + uwr(0x70, UART_CR); /* rest? */ + uwr(0xD0, UART_CR); /* reset */ + uwr(0x7BF, UART_IPR); /* stale timeout = 630 * bitrate */ + uwr(0, UART_IMR); + uwr(115, UART_RFWR); /* RX watermark = 58 * 2 - 1 */ + uwr(10, UART_TFWR); /* TX watermark */ + uwr(0, UART_RFWR); + uwr(UART_CSR_115200, UART_CSR); + uwr(0, UART_IRDA); + uwr(0x1E, UART_HCR); + uwr(16, UART_MR1); + uwr(0x34, UART_MR2); /* 8N1 */ + uwr(0x05, UART_CR); /* enable TX & RX */ + +} + +static int _uart_putc(int port, char c) +{ + while (!(urd(UART_SR) & UART_SR_TX_READY)) + ; + uwr(c, UART_TF); + return 0; +} + +int serial_init(void) +{ + uart_init(); + return 0; +} + +void serial_putc(char c) +{ + if (c == '\n') + _uart_putc(0, '\r'); + _uart_putc(0, c); +} + +void serial_putc_raw(const char c) +{ + _uart_putc(0, c); +} + +void serial_puts(const char *s) +{ + while (*s) + serial_putc(*s++); +} + +int serial_getc() +{ + while (!(urd(UART_SR) & UART_SR_RX_READY)) + ; + return urd(UART_RF); +} + +int serial_tstc() +{ + return urd(UART_SR) & UART_SR_RX_READY; +} + +void serial_setbrg() +{ +} + -- 1.7.1 The contents of this e-mail and any attachment(s) may contain confidential or privileged information for the intended recipient(s). Unintended recipients are prohibited from taking action on the basis of information in this e-mail and using or disseminating the information, and must notify the sender and delete it from their system. L&T Infotech will not accept responsibility or liability for the accuracy or completeness of, or the presence of any virus or disabling code in this e-mail"

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[U-Boot] "make menuconfig" does not work
by hong zhang 03 May '12

03 May '12

List, "make menuconfig" does not work for u-boot under panadaboard. Old mailing list said because of no Kconfig in u-boot tree. Any plan to add Kconfig or any other way to configure u-boot? Thanks for any help! ---henry

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[U-Boot] [PATCH 0/4] usb:gadget:composite: Support for composite gadget framework
by Lukasz Majewski 02 May '12

02 May '12

This patch set provides support for composite gadget framework. Files from Linux kernel (2.6.36) - namely composite.{c|h} have been ported. Some extra "compatibility" code has been added as well. Lukasz Majewski (4): usb:gadget:composite Composite framework - files from Linux kernel usb:gadget:composite: Linux composite.{h/c} code adjustement for u-boot usb:gadget: Wrapper for extracting usb_gadget from linux's device usb:gadget: Extend device struct to device_data pointer drivers/usb/gadget/composite.c | 1253 ++++++++++++++++++++++++++++++++++++++++ include/linux/usb/composite.h | 417 +++++++++++++ include/linux/usb/gadget.h | 6 + 3 files changed, 1676 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/gadget/composite.c create mode 100644 include/linux/usb/composite.h -- 1.7.2.3

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[U-Boot] [PATCH] Exynos: fix cpuinfo and cpu detecting
by Minkyu Kang 02 May '12

02 May '12

Since Exynos architecture have new SoCs, need to fix cpuinfo correctly. Signed-off-by: Minkyu Kang <mk7.kang(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> Tested-by: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Chander Kashyap <chander.kashyap(a)linaro.org> --- arch/arm/cpu/armv7/s5p-common/cpu_info.c | 5 ++- arch/arm/include/asm/arch-exynos/cpu.h | 42 ++++++++++++++++++++---------- arch/arm/include/asm/arch-s5pc1xx/cpu.h | 6 ++++ 3 files changed, 37 insertions(+), 16 deletions(-) diff --git a/arch/arm/cpu/armv7/s5p-common/cpu_info.c b/arch/arm/cpu/armv7/s5p-common/cpu_info.c index 527f32d..1642733 100644 --- a/arch/arm/cpu/armv7/s5p-common/cpu_info.c +++ b/arch/arm/cpu/armv7/s5p-common/cpu_info.c @@ -48,8 +48,9 @@ int print_cpuinfo(void) { char buf[32]; - printf("CPU:\tS5P%X@%sMHz\n", - s5p_cpu_id, strmhz(buf, get_arm_clk())); + printf("CPU:\t%s%X@%sMHz\n", + s5p_get_cpu_name(), s5p_cpu_id, + strmhz(buf, get_arm_clk())); return 0; } diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index ac4ddc7..b1e22f2 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -24,6 +24,7 @@ #define DEVICE_NOT_AVAILABLE 0 +#define EXYNOS_CPU_NAME "Exynos" #define EXYNOS4_ADDR_BASE 0x10000000 /* EXYNOS4 */ @@ -93,29 +94,42 @@ static inline int s5p_get_cpu_rev(void) static inline void s5p_set_cpu_id(void) { - s5p_cpu_id = readl(EXYNOS4_PRO_ID); - s5p_cpu_id = (0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12)); - - /* - * 0xC200: EXYNOS4210 EVT0 - * 0xC210: EXYNOS4210 EVT1 - */ - if (s5p_cpu_id == 0xC200) { - s5p_cpu_id |= 0x10; + unsigned int pro_id = (readl(EXYNOS4_PRO_ID) & 0x00FFF000) >> 12; + + switch (pro_id) { + case 0x200: + /* Exynos4210 EVT0 */ + s5p_cpu_id = 0x4210; s5p_cpu_rev = 0; - } else if (s5p_cpu_id == 0xC210) { - s5p_cpu_rev = 1; + break; + case 0x210: + /* Exynos4210 EVT1 */ + s5p_cpu_id = 0x4210; + break; + case 0x412: + /* Exynos4412 */ + s5p_cpu_id = 0x4412; + break; + case 0x520: + /* Exynos5250 */ + s5p_cpu_id = 0x5250; + break; } } +static inline char *s5p_get_cpu_name(void) +{ + return EXYNOS_CPU_NAME; +} + #define IS_SAMSUNG_TYPE(type, id) \ static inline int cpu_is_##type(void) \ { \ - return s5p_cpu_id == id ? 1 : 0; \ + return (s5p_cpu_id >> 12) == id; \ } -IS_SAMSUNG_TYPE(exynos4, 0xc210) -IS_SAMSUNG_TYPE(exynos5, 0xc520) +IS_SAMSUNG_TYPE(exynos4, 0x4) +IS_SAMSUNG_TYPE(exynos5, 0x5) #define SAMSUNG_BASE(device, base) \ static inline unsigned int samsung_get_base_##device(void) \ diff --git a/arch/arm/include/asm/arch-s5pc1xx/cpu.h b/arch/arm/include/asm/arch-s5pc1xx/cpu.h index 510ead4..2362b99 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/cpu.h +++ b/arch/arm/include/asm/arch-s5pc1xx/cpu.h @@ -23,6 +23,7 @@ #ifndef _S5PC1XX_CPU_H #define _S5PC1XX_CPU_H +#define S5P_CPU_NAME "S5P" #define S5PC1XX_ADDR_BASE 0xE0000000 /* S5PC100 */ @@ -71,6 +72,11 @@ static inline void s5p_set_cpu_id(void) s5p_cpu_id = 0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12); } +static inline char *s5p_get_cpu_name(void) +{ + return S5P_CPU_NAME; +} + #define IS_SAMSUNG_TYPE(type, id) \ static inline int cpu_is_##type(void) \ { \ -- 1.7.5.4

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[U-Boot] [PATCH v2] TRATS: initialize panel_info data structure in board file
by Donghwa Lee 02 May '12

02 May '12

panel_info data structure is gloable variable, so, I have initialized it in board file. If it is initialized in init_panel_info() like existing, it can't be used in drv_lcd_init() in common/lcd.c because init_panel_info() is called after drv_lcd_init(). change of v1: - I had made a mistake that must do not included variables of vidinfo_t data structure was included in the file. So, I removed it. Signed-off-by: Donghwa Lee <dh09.lee(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- board/samsung/trats/trats.c | 71 ++++++++++++++++++++++--------------------- drivers/video/exynos_fb.c | 3 -- 2 files changed, 36 insertions(+), 38 deletions(-) diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 3085de1..084b67a 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -455,43 +455,44 @@ static int mipi_power(void) return 0; } +vidinfo_t panel_info = { + .vl_freq = 60, + .vl_col = 720, + .vl_row = 1280, + .vl_width = 720, + .vl_height = 1280, + .vl_clkp = CONFIG_SYS_HIGH, + .vl_hsp = CONFIG_SYS_LOW, + .vl_vsp = CONFIG_SYS_LOW, + .vl_dp = CONFIG_SYS_LOW, + .vl_bpix = 5, /* Bits per pixel, 2^5 = 32 */ + + /* s6e8ax0 Panel infomation */ + .vl_hspw = 5, + .vl_hbpd = 10, + .vl_hfpd = 10, + + .vl_vspw = 2, + .vl_vbpd = 1, + .vl_vfpd = 13, + .vl_cmd_allow_len = 0xf, + + .win_id = 3, + .cfg_gpio = NULL, + .backlight_on = NULL, + .lcd_power_on = NULL, /* lcd_power_on in mipi dsi driver */ + .reset_lcd = lcd_reset, + .dual_lcd_enabled = 0, + + .init_delay = 0, + .power_on_delay = 0, + .reset_delay = 0, + .interface_mode = FIMD_RGB_INTERFACE, + .mipi_enabled = 1, +}; + void init_panel_info(vidinfo_t *vid) { - vid->vl_freq = 60; - vid->vl_col = 720; - vid->vl_row = 1280; - vid->vl_width = 720; - vid->vl_height = 1280; - vid->vl_clkp = CONFIG_SYS_HIGH; - vid->vl_hsp = CONFIG_SYS_LOW; - vid->vl_vsp = CONFIG_SYS_LOW; - vid->vl_dp = CONFIG_SYS_LOW; - - vid->vl_bpix = 5; - vid->dual_lcd_enabled = 0; - - /* s6e8ax0 Panel */ - vid->vl_hspw = 5; - vid->vl_hbpd = 10; - vid->vl_hfpd = 10; - - vid->vl_vspw = 2; - vid->vl_vbpd = 1; - vid->vl_vfpd = 13; - vid->vl_cmd_allow_len = 0xf; - - vid->win_id = 3; - vid->cfg_gpio = NULL; - vid->backlight_on = NULL; - vid->lcd_power_on = NULL; /* lcd_power_on in mipi dsi driver */ - vid->reset_lcd = lcd_reset; - - vid->init_delay = 0; - vid->power_on_delay = 0; - vid->reset_delay = 0; - vid->interface_mode = FIMD_RGB_INTERFACE; - vid->mipi_enabled = 1; - strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name); s6e8ax0_platform_data.lcd_power = lcd_power; s6e8ax0_platform_data.mipi_power = mipi_power; diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c index a1cf449..96a8ec1 100644 --- a/drivers/video/exynos_fb.c +++ b/drivers/video/exynos_fb.c @@ -44,9 +44,6 @@ short console_row; static unsigned int panel_width, panel_height; -/* LCD Panel data */ -vidinfo_t panel_info; - static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t *vid) { unsigned long palette_size; -- 1.7.4.1

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[U-Boot] Can't read kernel if bad blocks are present in partition
by Alexandre Gambier 02 May '12

02 May '12

Hi, I'm working on a STM chip under linux and U-Boot 1.3.1. Here's my problem. To boot linux up I load the kernel stored in a NAND device. If a bad block is present in the nand I can't load the kernel. To store the kernel I first erase the partition and write the kernel image. During the erase stage, U-Boottells that a bad block has been skipped but everything's fine. NAND erase: device 0 offset 0x520000, size 0x400000 Skipping bad block at 0x005c0000 Erasing at 0x900000 -- 100% complete. OK When I write the kernel image, U-Boottells that everything's fine. NAND write: device 0 offset 0x520000, size 0x400000 4194304 bytes written: OK But when I try to read the kernel, it fails. NAND read: device 0 offset 0x520000, size 0x1a4bff 1723391 bytes read: ERROR I though U-Boot was able to handle bad block when reading back data.. Did I forget to initialize something ? BEst regards. -- Best regards. Alexandre Gambier Fte Maximal France SAS

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[U-Boot] [PATCH 0/2] Replace yaffs2 with new version
by Charles Manning 02 May '12

02 May '12

This patch set replaces fs/yaffs2 with a new version. This new version is faster and also adds the ability to dynamically add yaffs2 mount points which makes configuration far simpler. -- Charles

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