February 2012 - U-Boot

[U-Boot] [PATCH v3 1/5] net: fec_mxc: add 1000 Mbps selection
by Troy Kisky 02 Feb '12

02 Feb '12

Define CONFIG_FEC_QUIRK_ENET_MAC and add to board files mx6qarm2 and mx6qsabrelite. Signed-off-by: Troy Kisky <troy.kisky(a)boundarydevices.com> Acked-by: Dirk Behme <dirk.behme(a)de.bosch.com> --- drivers/net/fec_mxc.c | 21 +++++++++++++++++++-- drivers/net/fec_mxc.h | 2 ++ include/configs/mx6qarm2.h | 1 + include/configs/mx6qsabrelite.h | 1 + 4 files changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index ed73353..7c42b87 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -379,13 +379,14 @@ static int fec_set_hwaddr(struct eth_device *dev) static int fec_open(struct eth_device *edev) { struct fec_priv *fec = (struct fec_priv *)edev->priv; + int speed; debug("fec_open: fec_open(dev)\n"); /* full-duplex, heartbeat disabled */ writel(1 << 2, &fec->eth->x_cntrl); fec->rbd_index = 0; -#if defined(CONFIG_MX6Q) +#ifdef CONFIG_FEC_QUIRK_ENET_MAC /* Enable ENET HW endian SWAP */ writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_DBSWAP, &fec->eth->ecntrl); @@ -428,9 +429,25 @@ static int fec_open(struct eth_device *edev) #endif miiphy_wait_aneg(edev); - miiphy_speed(edev->name, fec->phy_id); + speed = miiphy_speed(edev->name, fec->phy_id); miiphy_duplex(edev->name, fec->phy_id); +#ifdef CONFIG_FEC_QUIRK_ENET_MAC + { + u32 ecr = readl(&fec->eth->ecntrl) & ~FEC_ECNTRL_SPEED; + u32 rcr = (readl(&fec->eth->r_cntrl) & + ~(FEC_RCNTRL_RMII | FEC_RCNTRL_RMII_10T)) | + FEC_RCNTRL_RGMII | FEC_RCNTRL_MII_MODE; + if (speed == _1000BASET) + ecr |= FEC_ECNTRL_SPEED; + else if (speed != _100BASET) + rcr |= FEC_RCNTRL_RMII_10T; + writel(ecr, &fec->eth->ecntrl); + writel(rcr, &fec->eth->r_cntrl); + } +#endif + debug("%s:Speed=%i\n", __func__, speed); + /* * Enable SmartDMA receive task */ diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index 9825eab..af33d21 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -198,6 +198,7 @@ struct ethernet_regs { #define FEC_RCNTRL_FCE 0x00000020 #define FEC_RCNTRL_RGMII 0x00000040 #define FEC_RCNTRL_RMII 0x00000100 +#define FEC_RCNTRL_RMII_10T 0x00000200 #define FEC_TCNTRL_GTS 0x00000001 #define FEC_TCNTRL_HBC 0x00000002 @@ -207,6 +208,7 @@ struct ethernet_regs { #define FEC_ECNTRL_RESET 0x00000001 /* reset the FEC */ #define FEC_ECNTRL_ETHER_EN 0x00000002 /* enable the FEC */ +#define FEC_ECNTRL_SPEED 0x00000020 #define FEC_ECNTRL_DBSWAP 0x00000100 #define FEC_X_WMRK_STRFWD 0x00000100 diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 0962d3c..495a32a 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -61,6 +61,7 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_NET #define CONFIG_FEC_MXC +#define CONFIG_FEC_QUIRK_ENET_MAC #define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index d650ee3..2e9775a 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -61,6 +61,7 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_NET #define CONFIG_FEC_MXC +#define CONFIG_FEC_QUIRK_ENET_MAC #define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII -- 1.7.5.4

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[U-Boot] [PATCH] net: calxedaxgmac: fix build due to missing __aligned definition
by Rob Herring 01 Feb '12

01 Feb '12

From: Rob Herring <rob.herring(a)calxeda.com> Include linux/compiler.h to fix build error due to missing __aligned definition. Signed-off-by: Rob Herring <rob.herring(a)calxeda.com> --- drivers/net/calxedaxgmac.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/net/calxedaxgmac.c b/drivers/net/calxedaxgmac.c index 01b2eee..00e26c2 100644 --- a/drivers/net/calxedaxgmac.c +++ b/drivers/net/calxedaxgmac.c @@ -16,6 +16,7 @@ */ #include <common.h> #include <malloc.h> +#include <linux/compiler.h> #include <linux/err.h> #include <asm/io.h> -- 1.7.5.4

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[U-Boot] [PATCH 1/2] SPL: Add YMODEM over UART load support
by Tom Rini 01 Feb '12

01 Feb '12

From: Matt Porter <mporter(a)ti.com> Adds support for loading U-Boot from UART using YMODEM protocol. If YMODEM support is enabled in SPL and the romcode indicates that SPL loaded via UART then SPL will wait for start of a YMODEM transfer via the console port. Signed-off-by: Matt Porter <mporter(a)ti.com> Signed-off-by: Tom Rini <trini(a)ti.com> --- arch/arm/cpu/armv7/omap-common/Makefile | 3 + arch/arm/cpu/armv7/omap-common/spl.c | 5 ++ arch/arm/cpu/armv7/omap-common/spl_ymodem.c | 76 +++++++++++++++++++++++++++ arch/arm/include/asm/omap_common.h | 3 + common/Makefile | 3 + lib/Makefile | 3 + 6 files changed, 93 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/armv7/omap-common/spl_ymodem.c diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile index 3f7a0b2..447fcd5 100644 --- a/arch/arm/cpu/armv7/omap-common/Makefile +++ b/arch/arm/cpu/armv7/omap-common/Makefile @@ -52,6 +52,9 @@ endif ifdef CONFIG_SPL_MMC_SUPPORT COBJS += spl_mmc.o endif +ifdef CONFIG_SPL_YMODEM_SUPPORT +COBJS += spl_ymodem.o +endif endif ifndef CONFIG_SPL_BUILD diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c index 9c1f7e3..9018787 100644 --- a/arch/arm/cpu/armv7/omap-common/spl.c +++ b/arch/arm/cpu/armv7/omap-common/spl.c @@ -134,6 +134,11 @@ void board_init_r(gd_t *id, ulong dummy) spl_nand_load_image(); break; #endif +#ifdef CONFIG_SPL_YMODEM_SUPPORT + case BOOT_DEVICE_UART: + spl_ymodem_load_image(); + break; +#endif default: printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device); hang(); diff --git a/arch/arm/cpu/armv7/omap-common/spl_ymodem.c b/arch/arm/cpu/armv7/omap-common/spl_ymodem.c new file mode 100644 index 0000000..47663f7 --- /dev/null +++ b/arch/arm/cpu/armv7/omap-common/spl_ymodem.c @@ -0,0 +1,76 @@ +/* + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2011 + * Texas Instruments, <www.ti.com> + * + * Matt Porter <mporter(a)ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <xyzModem.h> +#include <asm/u-boot.h> +#include <asm/utils.h> +#include <asm/arch/sys_proto.h> +#include <asm/omap_common.h> + +#define BUF_SIZE 1024 + +static int getcymodem(void) { + if (tstc()) + return (getc()); + return -1; +} + +void spl_ymodem_load_image(void) +{ + int size = 0; + int err; + int res; + int ret; + connection_info_t info; + char buf[BUF_SIZE]; + ulong store_addr = ~0; + ulong addr = 0; + + info.mode = xyzModem_ymodem; + ret = xyzModem_stream_open(&info, &err); + + if (!ret) { + while ((res = + xyzModem_stream_read(buf, BUF_SIZE, &err)) > 0) { + if (addr == 0) + spl_parse_image_header((struct image_header *)buf); + store_addr = addr + spl_image.load_addr; + size += res; + addr += res; + memcpy((char *)(store_addr), buf, res); + } + } else { + printf("spl: ymodem err - %s\n", xyzModem_error(err)); + hang(); + } + + xyzModem_stream_close(&err); + xyzModem_stream_terminate(false, &getcymodem); + + printf("Loaded %d bytes\n", size); +} diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 34bec45..25f95b4 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -99,6 +99,9 @@ void spl_nand_load_image(void); /* MMC SPL functions */ void spl_mmc_load_image(void); +/* YMODEM SPL functions */ +void spl_ymodem_load_image(void); + #ifdef CONFIG_SPL_BOARD_INIT void spl_board_init(void); #endif diff --git a/common/Makefile b/common/Makefile index 2d9ae8c..0189aac 100644 --- a/common/Makefile +++ b/common/Makefile @@ -184,6 +184,9 @@ COBJS-$(CONFIG_UPDATE_TFTP) += update.o COBJS-$(CONFIG_USB_KEYBOARD) += usb_kbd.o endif +ifdef CONFIG_SPL_BUILD +COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o +endif COBJS-y += console.o COBJS-y += dlmalloc.o COBJS-y += memsize.o diff --git a/lib/Makefile b/lib/Makefile index 35ba7ff..eb60b99 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -54,6 +54,9 @@ else COBJS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += display_options.o endif +ifdef CONFIG_SPL_BUILD +COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o +endif COBJS-y += ctype.o COBJS-y += div64.o COBJS-y += string.o -- 1.7.0.4

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[U-Boot] [PATCH] AM3517: Changed default clock rate for AM3517
by Stefano Babic 01 Feb '12

01 Feb '12

From: Schuyler Patton <spatton(a)ti.com> AM3517: Changed default clock rate for AM3517 Changed #define MPU_M_13_ES2 from 0x1F4 to 0x258, this allows the AM3517 to boot up at 600MHz instead of 500 MHz Signed-off-by: Schuyler Patton <spatton(a)ti.com> CC: Tom Rini <tom.rini(a)gmail.com> CC: Simon Schwarz <simonschwarzcor(a)gmail.com> CC: Stefano Babic <sbabic(a)denx.de> --- This patch was sent to the arago project, but not yet to u-boot ML. arch/arm/include/asm/arch-omap3/clocks_omap3.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/arch-omap3/clocks_omap3.h b/arch/arm/include/asm/arch-omap3/clocks_omap3.h index db29b7c..5925ac4 100644 --- a/arch/arm/include/asm/arch-omap3/clocks_omap3.h +++ b/arch/arm/include/asm/arch-omap3/clocks_omap3.h @@ -72,7 +72,7 @@ #define MPU_FSEL_13_ES1 0x03 #define MPU_M2_13_ES1 0x01 -#define MPU_M_13_ES2 0x1F4 +#define MPU_M_13_ES2 0x258 #define MPU_N_13_ES2 0x0C #define MPU_FSEL_13_ES2 0x03 #define MPU_M2_13_ES2 0x01 -- 1.7.5.4

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[U-Boot] [PATCH] post: new parallel nor flash test
by Vaibhav Kothari 01 Feb '12

01 Feb '12

i am asking about possibility that in function 'write_buff' there is no checking of protect[] status...so how to get sure that over uboot sector is protected or not??? thanks in advanece

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Re: [U-Boot] Memory testing of flash
by vaibhav kothari 01 Feb '12

01 Feb '12

Thnx for the previous post You said that it is not fruitful idea to test flash post test at every boot up as it is reduces the life cycle of flash??is there any mechanism to prevent that? and also i am using spi serial w25x32 flash and i dont know if it is CFI complaint or not but i know the board specific flash data...Do i need to build a board specific flash driver??

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Re: [U-Boot] SPL Linux Boot
by Stefano Babic 01 Feb '12

01 Feb '12

On 30/01/2012 19:05, Tom Rini wrote: Hi Tom, >> OK, doing a MAKEALL for omap3/4/5/am33xx/davinci shows we've got a few >> missing include problems, I'll go fix that up. > > OK, was it when you took over the series that you moved stuff to > common/spl.c ? That idea is breaking, badly, non-omap platforms. I am trying to summarize the different problems we have. Comparing to u-boot-ti, the patchset breaks the following boards: davinci: da850_am18xxevm da850evm hawkboard_nand omap4/5: fixed including spl.h into arch/arm/cpu/armv7/omap-common/boot-common.c mx28: m28evk mx28evk I have not seen other broken boards - let me know if you find something else. On omap4/5 is only a thing of include files, as you reported. A main issue is with davinci, because we have currently two different spl.c (arch/arm/cpu/arm926ejs/davinci/spl.c on davinci). The code can be factorized, if davinci will use preloader_console_init() as omap. The same problem rises with mx28: there is a specific file arch/arm/cpu/arm926ejs/mx28/spl_boot.c, that redefines board_init_f() and board_init_r() - as we try to have a common spl code, this muist be fixed, too. A way can be to add an arch weak function to add arch specific initialization inside board_init_*() functions, if any. Have you seen other issues other what I report now ? Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de =====================================================================

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[U-Boot] [PATCH] i.mx: i.mx5: update imx_get_mac_from_fuse function
by Jason Liu 01 Feb '12

01 Feb '12

FEC does not work on the i.mx51/53evk board, it will hangup In: serial Out: serial Err: serial Net: After bisect, it due to the following commit: be252b6 net: imx: Add multi-FEC support for imx_get_mac_from_fuse has change the imx_get_mac_from_fuse fucntion prototype, but fail to update i.mx5, here it does it. After apply this patch, u-boot works again on i.mx51/53 evk boards. Signed-off-by: Jason Liu <jason.hui(a)linaro.org> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/cpu/armv7/mx5/soc.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c index 1533dd8..3f5a4f7 100644 --- a/arch/arm/cpu/armv7/mx5/soc.c +++ b/arch/arm/cpu/armv7/mx5/soc.c @@ -72,7 +72,7 @@ u32 get_cpu_rev(void) } #if defined(CONFIG_FEC_MXC) -void imx_get_mac_from_fuse(unsigned char *mac) +void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) { int i; struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; -- 1.7.4.1

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[U-Boot] u-boot in debug mode P2020
by Ivan Neskorodev 01 Feb '12

01 Feb '12

Hello I try to run u-boot-2009.11 on the chip P2020 from SDcard. When i run u-boot i see in the terminal: CPU0: P2020E, Version: 2.1, (0x80ea0021) Core: E500, Version: 5.1, (0x80211051) Clock Configuration: CPU0:1200 MHz, CPU1:1200 MHz, CCB:600 MHz, DDR:300 MHz (600 MT/s data rate) (Asynchronous), LBC:37.500 MHz L1: D-cache 32 kB enabled I-cache 32 kB enabled I2C: ready SPI: ready DRAM: 1 GB Failed reading I2C Chip 0x18 on bus 1 And u-boot get stuck. I would like to enable the output to the console debug message. But i can't find how to enable that function. How can i enable the debug output ? Thanks

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[U-Boot] [PATCH v3] arm, arm-kirkwood: disable l2c before linux boot
by Michael Walle 01 Feb '12

01 Feb '12

The decompressor expects the L2 cache to be disabled. This fixes booting some kernels, which have CONFIG_ARM_PATCH_PHYS_VIRT enabled. Signed-off-by: Michael Walle <michael(a)walle.cc> Cc: Albert ARIBAUD <albert.u.boot(a)aribaud.net> Cc: Prafulla Wadaskar <prafulla(a)marvell.com> Cc: Wolfgang Denk <wd(a)denx.de> --- v3: remove unused enable function v2: replace magic number with macro arch/arm/cpu/arm926ejs/cache.c | 9 ++++++++ arch/arm/cpu/arm926ejs/cpu.c | 2 + arch/arm/cpu/arm926ejs/kirkwood/Makefile | 1 + arch/arm/cpu/arm926ejs/kirkwood/cache.c | 34 ++++++++++++++++++++++++++++++ 4 files changed, 46 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/kirkwood/cache.c diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index ee90ab7..504f604 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -68,3 +68,12 @@ void flush_cache(unsigned long start, unsigned long size) { } #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ + +/* + * Stub implementations for l2 cache operations + */ +void __l2_cache_disable(void) +{ +} +void l2_cache_disable(void) + __attribute__((weak, alias("__l2_cache_disable"))); diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c index 5c902df..626384c 100644 --- a/arch/arm/cpu/arm926ejs/cpu.c +++ b/arch/arm/cpu/arm926ejs/cpu.c @@ -50,6 +50,8 @@ int cleanup_before_linux (void) /* turn off I/D-cache */ icache_disable(); dcache_disable(); + l2_cache_disable(); + /* flush I/D-cache */ cache_flush(); diff --git a/arch/arm/cpu/arm926ejs/kirkwood/Makefile b/arch/arm/cpu/arm926ejs/kirkwood/Makefile index 0754297..777006c 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/Makefile +++ b/arch/arm/cpu/arm926ejs/kirkwood/Makefile @@ -30,6 +30,7 @@ COBJS-y = cpu.o COBJS-y += dram.o COBJS-y += mpp.o COBJS-y += timer.o +COBJS-y += cache.o SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cache.c b/arch/arm/cpu/arm926ejs/kirkwood/cache.c new file mode 100644 index 0000000..3e73565 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/kirkwood/cache.c @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2011 Michael Walle + * Michael Walle <michael(a)walle.cc> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ +#include <common.h> +#include <asm/arch/cpu.h> + +#define FEROCEON_EXTRA_FEATURE_L2C_EN (1<<22) + +void l2_cache_disable() +{ + u32 ctrl; + + ctrl = readfr_extra_feature_reg(); + ctrl &= ~FEROCEON_EXTRA_FEATURE_L2C_EN; + writefr_extra_feature_reg(ctrl); +} -- 1.7.2.5

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