November 2012 - U-Boot

[U-Boot] [PATCH 1/2] tegra: Remove unnecessary CONFIG_SYS_NAND_BASE
by Simon Glass 06 Nov '12

06 Nov '12

Now that we are using the new CONFIG_SYS_NAND_SELF_INIT setup, we don't need CONFIG_SYS_NAND_BASE. Punt it. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- include/configs/seaboard.h | 3 --- include/configs/tec.h | 1 - 2 files changed, 0 insertions(+), 4 deletions(-) diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 7680c77..3fca8d9 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -124,7 +124,4 @@ /* Max number of NAND devices */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 - -/* Somewhat oddly, the NAND base address must be a config option */ -#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE #endif /* __CONFIG_H */ diff --git a/include/configs/tec.h b/include/configs/tec.h index 140d2e6..200cf66 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -54,7 +54,6 @@ #define CONFIG_CMD_NAND #define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE /* Environment in NAND, aligned to start of last sector */ #define CONFIG_ENV_IS_IN_NAND -- 1.7.7.3

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[U-Boot] [PATCH v4 0/13] Port of MUSB driver from Linux (changes from Linux)
by Ilya Yanok 06 Nov '12

06 Nov '12

My apologies for double posting -- I was so stupid to forget to fix the Signed-off-by lines.... Current MUSB driver in U-Boot uses old UDC API while new gagdet client drivers need new gadget API. Also current MUSB driver has some significant limitations (like inability to handle tx for endpoints other than ep0). So I think port of new Linux driver is desirable. This is initial port, performed mostly by putting DM and OTG code under #ifndef __UBOOT__ clauses. My intention was to be as close as possible to the original to ease of possible resyncs. Some warnings are suppressed via CFLAGS. There are some style problems but I'm not touching them for now for the above mentioned reason. There is obviously some room for optimisation, some structure fields are unused as well as (probably) some code. This is not a replacement for existing MUSB driver (at least for now), cause there are still consumers of USB serial gadget which uses old API and there is no support for serial with new API for now. OTG and DMA are not supported. Ported drivers include: musb_dsps (should work both with TI AM33xx and TI81xx, tested only on AM33xx), am35x (tested on AM3517 EVM) and omap2plus (should work on OMAP2/3/4, tested on omap3_beagle, omap4_panda doesn't work and needs more work). Others should be easy to port too. Virtual root hub is not implemented but this shouldn't be a big problem as the old code has virtual root hub support enabled only for Blackfin platform. Pathes are rather big because of the original code size (and I didn't delete unused code, just disabled it). So it's probably better to look at changes as compared to Linux code. I prepared such version also, you can find it at [1]. Hopefully it will be also useful if resync with the kernel will be needed in future. [1] https://github.com/yanok/u-boot/tree/musb-changes-from-linux-v4 Changes in v4: - fix indent - minor style fixes Changes in v3: - fix old MUSB code compilation - bugfix: struct musb should be zeroed after alloc - fix musb gadget_chips entry - fix for new multi-interface usb API - use clrsetbits_le32 for USB PHY ops Changes in v2: - add missing linux-compat.h header - added host support - glue code moved from musb_gadget_uboot.c to musb_uboot.c and cleaned up slightly. - added check for malloc return value - define is_{host,peripheral}_capable conditionally to support compilation with only host or gadget enabled - added some more is_{host,peripheral}_capable guards to core code to support compilation with only host or gadget enabled - rename backend config option to CONFIG_USB_MUSB_DSPS - we are providing host support now so add yourself to usb.h Ilya Yanok (13): linux/usb/ch9.h: update with the version from Linux tree usb: use linux/usb/ch9.h instead of usbdescriptors.h musb-new: port of Linux musb driver musb-new: dsps backend driver am33xx: init OTG hardware and new musb gadget driver am335x_evm: enable both musb gadget and host musb-new: am35x backend driver OMAP3: am35x_def.h: add USB defines OMAP3: am35x: add musb functions am3517_evm: switch to musb-new musb-new: omap2plus backend driver omap3_beagle: add musb-new init omap3_beagle: use new MUSB intstead of the old one Makefile | 1 + arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c | 2 +- arch/arm/cpu/armv7/am33xx/board.c | 103 +- arch/arm/cpu/armv7/am33xx/clock.c | 8 + arch/arm/cpu/armv7/omap3/Makefile | 1 + arch/arm/cpu/armv7/omap3/am35x_musb.c | 75 + arch/arm/include/asm/arch-am33xx/cpu.h | 11 +- arch/arm/include/asm/arch-am33xx/hardware.h | 4 + arch/arm/include/asm/arch-omap3/am35x_def.h | 27 + arch/arm/include/asm/arch-omap3/musb.h | 28 + arch/arm/include/asm/omap_musb.h | 32 + arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c | 2 +- arch/powerpc/cpu/mpc5xxx/usb_ohci.c | 2 +- arch/powerpc/cpu/ppc4xx/usb_ohci.c | 2 +- board/logicpd/am3517evm/am3517evm.c | 74 + board/ti/beagle/beagle.c | 43 + common/cmd_usb.c | 2 +- common/usb.c | 4 +- drivers/usb/gadget/config.c | 1 - drivers/usb/gadget/epautoconf.c | 1 - drivers/usb/gadget/ether.c | 1 - drivers/usb/gadget/gadget_chips.h | 4 +- drivers/usb/gadget/s3c_udc_otg.c | 1 - drivers/usb/gadget/usbstring.c | 1 - drivers/usb/host/ehci-hcd.c | 16 +- drivers/usb/host/isp116x-hcd.c | 2 +- drivers/usb/host/ohci-hcd.c | 2 +- drivers/usb/host/sl811-hcd.c | 2 +- drivers/usb/musb-new/Makefile | 39 + drivers/usb/musb-new/am35x.c | 709 +++++++ drivers/usb/musb-new/linux-compat.h | 119 ++ drivers/usb/musb-new/musb_core.c | 2497 +++++++++++++++++++++++++ drivers/usb/musb-new/musb_core.h | 623 ++++++ drivers/usb/musb-new/musb_debug.h | 58 + drivers/usb/musb-new/musb_dma.h | 186 ++ drivers/usb/musb-new/musb_dsps.c | 771 ++++++++ drivers/usb/musb-new/musb_gadget.c | 2333 +++++++++++++++++++++++ drivers/usb/musb-new/musb_gadget.h | 130 ++ drivers/usb/musb-new/musb_gadget_ep0.c | 1089 +++++++++++ drivers/usb/musb-new/musb_host.c | 2400 ++++++++++++++++++++++++ drivers/usb/musb-new/musb_host.h | 114 ++ drivers/usb/musb-new/musb_io.h | 146 ++ drivers/usb/musb-new/musb_regs.h | 645 +++++++ drivers/usb/musb-new/musb_uboot.c | 237 +++ drivers/usb/musb-new/omap2430.c | 626 +++++++ drivers/usb/musb-new/omap2430.h | 56 + drivers/usb/musb-new/usb-compat.h | 88 + drivers/usb/musb/musb_core.h | 3 +- drivers/usb/musb/musb_hcd.c | 5 +- include/configs/am335x_evm.h | 27 + include/configs/am3517_evm.h | 37 +- include/configs/omap3_beagle.h | 13 +- include/linux/usb/ch9.h | 514 ++++- include/linux/usb/musb.h | 162 ++ include/usb.h | 19 +- include/usb/s3c_udc.h | 1 - include/usb_defs.h | 6 - 57 files changed, 14015 insertions(+), 90 deletions(-) create mode 100644 arch/arm/cpu/armv7/omap3/am35x_musb.c create mode 100644 arch/arm/include/asm/arch-omap3/musb.h create mode 100644 arch/arm/include/asm/omap_musb.h create mode 100644 drivers/usb/musb-new/Makefile create mode 100644 drivers/usb/musb-new/am35x.c create mode 100644 drivers/usb/musb-new/linux-compat.h create mode 100644 drivers/usb/musb-new/musb_core.c create mode 100644 drivers/usb/musb-new/musb_core.h create mode 100644 drivers/usb/musb-new/musb_debug.h create mode 100644 drivers/usb/musb-new/musb_dma.h create mode 100644 drivers/usb/musb-new/musb_dsps.c create mode 100644 drivers/usb/musb-new/musb_gadget.c create mode 100644 drivers/usb/musb-new/musb_gadget.h create mode 100644 drivers/usb/musb-new/musb_gadget_ep0.c create mode 100644 drivers/usb/musb-new/musb_host.c create mode 100644 drivers/usb/musb-new/musb_host.h create mode 100644 drivers/usb/musb-new/musb_io.h create mode 100644 drivers/usb/musb-new/musb_regs.h create mode 100644 drivers/usb/musb-new/musb_uboot.c create mode 100644 drivers/usb/musb-new/omap2430.c create mode 100644 drivers/usb/musb-new/omap2430.h create mode 100644 drivers/usb/musb-new/usb-compat.h create mode 100644 include/linux/usb/musb.h -- 1.7.10.2 (Apple Git-33)

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[U-Boot] [PATCH 1/2] part_dos: allocate cacheline aligned buffers
by Thierry Reding 06 Nov '12

06 Nov '12

Some hardware requires the data buffers to be cacheline-aligned to make sure DMA operations can be properly executed. This patch uses the ALLOC_CACHE_ALIGN_BUFFER macro to allocate buffers with proper alignment. The same was already done for EFI partitions in commit f75dd58 "part_efi: dcache: allocate cacheline aligned buffers". Signed-off-by: Thierry Reding <thierry.reding(a)avionic-design.de> --- This fixes boot failures on Avionic Design Plutux and Medcom boards. disk/part_dos.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/disk/part_dos.c b/disk/part_dos.c index b5bcb37..c028aaf 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -87,7 +87,7 @@ static int test_block_type(unsigned char *buffer) int test_part_dos (block_dev_desc_t *dev_desc) { - unsigned char buffer[dev_desc->blksz]; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz); if ((dev_desc->block_read(dev_desc->dev, 0, 1, (ulong *) buffer) != 1) || (buffer[DOS_PART_MAGIC_OFFSET + 0] != 0x55) || @@ -102,7 +102,7 @@ int test_part_dos (block_dev_desc_t *dev_desc) static void print_partition_extended (block_dev_desc_t *dev_desc, int ext_part_sector, int relative, int part_num) { - unsigned char buffer[dev_desc->blksz]; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz); dos_partition_t *pt; int i; @@ -166,7 +166,7 @@ static int get_partition_info_extended (block_dev_desc_t *dev_desc, int ext_part int relative, int part_num, int which_part, disk_partition_t *info) { - unsigned char buffer[dev_desc->blksz]; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz); dos_partition_t *pt; int i; -- 1.7.10

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[U-Boot] [PATCH] pxa: Disable dcache on palmld, palmtc, zipitz2
by Simon Glass 05 Nov '12

05 Nov '12

These platforms don't include dcache support. Define CONFIG_SYS_DCACHE_OFF so that functions don't try to call non-existent routines like flush_dcache_range(). Signed-off-by: Simon Glass <sjg(a)chromium.org> --- include/configs/palmld.h | 3 +++ include/configs/palmtc.h | 3 +++ include/configs/zipitz2.h | 3 +++ 3 files changed, 9 insertions(+), 0 deletions(-) diff --git a/include/configs/palmld.h b/include/configs/palmld.h index c5dd494..3f9802c 100644 --- a/include/configs/palmld.h +++ b/include/configs/palmld.h @@ -28,6 +28,9 @@ #define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ #define CONFIG_PALMLD 1 /* Palm LifeDrive board */ +/* we will never enable dcache, because we have to setup MMU first */ +#define CONFIG_SYS_DCACHE_OFF + /* * Environment settings */ diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h index 9c948c5..64771e7 100644 --- a/include/configs/palmtc.h +++ b/include/configs/palmtc.h @@ -30,6 +30,9 @@ #define CONFIG_CPU_PXA25X 1 /* Intel PXA255 CPU */ #define CONFIG_PALMTC 1 /* Palm Tungsten|C board */ +/* we will never enable dcache, because we have to setup MMU first */ +#define CONFIG_SYS_DCACHE_OFF + /* * Environment settings */ diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index bf6394a..b92f70b 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -41,6 +41,9 @@ #define CONFIG_ENV_ADDR 0x40000 #define CONFIG_ENV_SIZE 0x20000 +/* we will never enable dcache, because we have to setup MMU first */ +#define CONFIG_SYS_DCACHE_OFF + #define CONFIG_SYS_MALLOC_LEN (128*1024) #define CONFIG_ARCH_CPU_INIT -- 1.7.7.3

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Re: [U-Boot] [PATCH v3 2/2] amcore: add support for amcore board
by Wolfgang Denk 05 Nov '12

05 Nov '12

Dear Angelo Dureghello, please make sure to keep the mailing list on Cc: ! In message <20121105153011.GA8705@angel3> you wrote: > > > > board/sysam/amcore/Makefile | 43 ++++ > > > board/sysam/amcore/amcore.c | 168 ++++++++++++++ > > > board/sysam/amcore/config.mk | 23 ++ > > > board/sysam/amcore/flash.c | 444 ++++++++++++++++++++++++++++++++++++ > > > board/sysam/amcore/u-boot.lds | 101 ++++++++ > > > boards.cfg | 1 + > > > include/configs/amcore.h | 213 +++++++++++++++++ > > > include/flash.h | 1 + > > > 8 files changed, 994 insertions(+), 0 deletions(-) > > > > Entry to MAINTAINERS missing. > > > > MAINTAINERS entry has been created in patch 1/2. This is wrong, then. Adding the board maintainer obviously belongs into the patch that adds the board support. > > Did you bother to compile your code? This is a function returning > > "int", but I don't see any return statement. I would expect to see > > compiler warnings here? > > Of course code compile and u-boot works perfect in my board. > Fixed this and will check for all warnings anyway. I don't understand what you are trying to tell me. Do you mean your compiler did not throw any warnings for this code? Or did it, and you ignored the warnings? Note that the build must not produce _any_ compiler warnings. > > > +/* > > > + * For booting Linux, the board info and command line data > > > + * have to be in the first 8 MB of memory, since this is > > > + * the maximum mapped by the Linux kernel during initialization ?? > > > + */ > > > > Is this really the case? > > I copied this config value and related comment from another board. > There are hundreds of boardsxxx.h saying the same. > I didn't try to change this limit and assume the comment is true. There are many boards where this may be correct. But blindly copying stuff around has never been a good idea. > I will figure out if there is a different way > without adding a new flash chip here. Just use the CFI flash driver? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de It's certainly convenient the way the crime (or condition) of stupidity carries with it its own punishment, automatically admisistered without remorse, pity, or prejudice. :-) -- Tom Christiansen in <559seq$ag1$1(a)csnews.cs.colorado.edu>

2 1

[U-Boot] [PATCH v7 0/16] tegra: Add display driver and LCD support for Seaboard
by Simon Glass 05 Nov '12

05 Nov '12

This series adds support for the Tegra2x's display peripheral. This supports the LCD display on Seaboard and we use this to enable console output in U-Boot on the LCD. Configuration is via the device tree. Proposed bindings are included in this series, taken from pwm bindings that should be in linux-next, a Tegra video binding that might be accepted in devicetree-discuss and a proposed video mode binding posted to dri-devel. While I agree EDID is convenient for machines I would prefer to provide a user-friendly way of selecting LCD settings as well, with EDID more as a fallback and auto-detection when available. To improve performance two optimisations are offered: 1. The LCD frame buffer is cached, with the cache being flushed after each newline sent to putc(), and in a few other situations. This dramatically increases performance (around 10x). This requires a few additions to the ARM cache support. 2. The console supports scrolling in steps of more than 1 line. This speeds up scrolling output considerably, particularly commands like 'printenv' which display a lot of output, and particular when the dcache is off. This requires a new CONFIG and a change to the console_scrollup() function. As reported by Stephen Warren: there is one problem with this serial. The display works fine for cold boot, or hitting the physical reset button, but when I execute "reset" at the U-Boot prompt, or "reboot" within Linux, the display is messed up; it looks like the LCD isn't able to sync to the timings sent by the display controller or something similar. Changes in v7: - Add cast on call to tegra_display_probe() - Rebase onto upstream/master - Rename mmu_set_region_dcache() to mmu_set_region_dcache_behaviour() - Rename mmu_set_region_dcache() to mmu_set_region_dcache_behaviour() Changes in v6: - Add an additional delay before enabling the panel - Add an additional delay before enabling the panel - Don't access beyond end of config.panel_timings[] - Set LCD frame buffer to correct address - Add 400ms delay before enabling panel VDD Changes in v5: - Update Tegra PWM binding s/duty cycle/period/ - Make all Tegra LCD fdt nodes disabled by default - Enable required LCD fdt nodes (which are now disabled by default) - Fix CONFIG_CONSOLE_SCROLL_LINES commit title - Fix misleading comments in common/lcd.c Changes in v4: - Moved panel information into panel node (was in rgb node) - Remove LCD frame buffer address property hack - Add CONFIG_PWM_TEGRA to control inclusion of PWM support - Add a little more debugging to the PWM driver - Move code to set up PWM into the PWM commit - Rebase on top of new tegra common directory structure - Adjust fdt binding according to Thierry and Stephen's comments - Remove LCD frame buffer address property hack - Rebase on top of new tegra common directory structure - Change LCD panel GPIOs to be entirely optional - Only indicate that LCD init is complete when all stages complete - Change order of LCD init so that PWM comes first - Use system bit values for enum dcache_option instead of arbitrary numbers - Remove system.h header which is included anyway by most archs - Use lcd_puts() for echoing user input so lcd cached data is flushed - Adjust LCD fdt nodes for new binding - Remove LCD frame buffer address property hack - Use CONFIG_CONSOLE_SCROLL_LINES instead of CONSOLE_SCROLL_LINES - Put default CONFIG_CONSOLE_SCROLL_LINES at top of file - Add CONFIG_BOARD_LATE_INIT to enable LCD - Use CONFIG_CONSOLE_SCROLL_LINES instead of CONSOLE_SCROLL_LINES - Enable separate CONFIG_PWM_TEGRA option Changes in v3: - Remove LPW1 pin which is not needed by display - Add new commit for pwm binding and node - Use displaymode binding for fdt - Bring in proposed tegra display controller binding - Add new panel binding to fit with tegra display controller binding - Rename pwfm driver to pwm - Use new proposed upstream pwm binding - Decode fdt node within the pwm driver - Introduce concept of a pwm channel, rather than separate peripherals - Separate display driver and LCD driver more in fdt - Add probe function to read in fdt parameters in display driver - Move some fdt decode code from LCD driver to SOC display driver - Rename fdt config structures - Use new pwm binding from pre-linux-next - Adjust LCD driver to use new SOC display driver structures - Add separate call to pwm_init() in board_init() - Put the LCD cache flush logic back into lcd_puts() - Handle a cached frame buffer out of normal U-Boot memory - Use new upstream proposed LCD definitions - Fix tiny bug in mult-line lcd scrolling Changes in v2: - Add new patch to use const in pinmux_config_pingroup/table() - Use const where possible in funcmux - Add nvidia prefix to device tree properties - Update LCD driver to deal with new fdt bindings - Use a more generic config CONFIG_LCD_ALIGNMENT for lcd alignment - Put the LCD cache flush logic into lcd_putc() instead of lcd_puts() - Align tegra display using new CONFIG_LCD_ALIGNMENT feature - Update seaboard LCD definitions for new fdt binding Mayuresh Kulkarni (1): tegra: Enable display/lcd support on Seaboard Simon Glass (14): tegra: Use const for pinmux_config_pingroup/table() tegra: Add display support to funcmux tegra: fdt: Add pwm binding and node tegra: fdt: Add LCD definitions for Tegra tegra: Add support for PWM tegra: Add LCD driver tegra: Add LCD support to Nvidia boards arm: Add control over cachability of memory regions lcd: Add CONFIG_LCD_ALIGNMENT to select frame buffer alignment lcd: Add support for flushing LCD fb from dcache after update tegra: Align LCD frame buffer to section boundary tegra: Support control of cache settings for LCD tegra: fdt: Add LCD definitions for Seaboard lcd: Add CONFIG_CONSOLE_SCROLL_LINES option to speed console Wei Ni (1): tegra: Add SOC support for display/lcd README | 16 + arch/arm/cpu/armv7/cache_v7.c | 11 + arch/arm/cpu/armv7/tegra20/Makefile | 2 + arch/arm/cpu/armv7/tegra20/display.c | 409 ++++++++++++++++++ arch/arm/cpu/armv7/tegra20/pwm.c | 101 +++++ arch/arm/cpu/tegra20-common/funcmux.c | 37 ++ arch/arm/cpu/tegra20-common/pinmux.c | 4 +- arch/arm/dts/tegra20.dtsi | 105 +++++ arch/arm/include/asm/arch-tegra20/dc.h | 545 ++++++++++++++++++++++++ arch/arm/include/asm/arch-tegra20/display.h | 152 +++++++ arch/arm/include/asm/arch-tegra20/pinmux.h | 4 +- arch/arm/include/asm/arch-tegra20/pwm.h | 75 ++++ arch/arm/include/asm/system.h | 31 ++ arch/arm/lib/cache-cp15.c | 51 ++- board/nvidia/common/board.c | 24 + board/nvidia/dts/tegra20-seaboard.dts | 33 ++ common/lcd.c | 89 ++++- common/main.c | 12 +- doc/device-tree-bindings/pwm/tegra20-pwm.txt | 18 + doc/device-tree-bindings/video/displaymode.txt | 42 ++ doc/device-tree-bindings/video/tegra20-dc.txt | 85 ++++ drivers/video/Makefile | 1 + drivers/video/tegra.c | 379 ++++++++++++++++ include/configs/seaboard.h | 13 +- include/configs/tegra20-common.h | 3 + include/fdtdec.h | 2 + include/lcd.h | 11 + lib/fdtdec.c | 2 + 28 files changed, 2221 insertions(+), 36 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra20/display.c create mode 100644 arch/arm/cpu/armv7/tegra20/pwm.c create mode 100644 arch/arm/include/asm/arch-tegra20/dc.h create mode 100644 arch/arm/include/asm/arch-tegra20/display.h create mode 100644 arch/arm/include/asm/arch-tegra20/pwm.h create mode 100644 doc/device-tree-bindings/pwm/tegra20-pwm.txt create mode 100644 doc/device-tree-bindings/video/displaymode.txt create mode 100644 doc/device-tree-bindings/video/tegra20-dc.txt create mode 100644 drivers/video/tegra.c -- 1.7.7.3

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[U-Boot] [PATCH] net: Fix endianness bug in link-local
by Joe Hershberger 05 Nov '12

05 Nov '12

The ip is stored in network order, so we can't test it in host order. Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> --- net/link_local.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/net/link_local.c b/net/link_local.c index d52f13a..8a8f605 100644 --- a/net/link_local.c +++ b/net/link_local.c @@ -103,7 +103,7 @@ static void configure_wait(void) void link_local_start(void) { ip = getenv_IPaddr("llipaddr"); - if (ip != 0 && (ip & IN_CLASSB_NET) != LINKLOCAL_ADDR) { + if (ip != 0 && (htonl(ip) & IN_CLASSB_NET) != LINKLOCAL_ADDR) { puts("invalid link address"); net_set_state(NETLOOP_FAIL); return; -- 1.7.11.5

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[U-Boot] [PATCH V2 1/4] ARM: bcm2835: add mailbox driver
by Stephen Warren 05 Nov '12

05 Nov '12

The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU") and the ARM CPU. The ARM CPU is often thought of as the main CPU. However, the VideoCore actually controls the initial SoC boot, and hides much of the hardware behind a protocol. This protocol is transported using the SoC's mailbox hardware module. Here, we add a very simplistic driver for the mailbox module, and define a few structures for the property messages. Signed-off-by: Stephen Warren <swarren(a)wwwdotorg.org> --- v2: * Added documentation to mbox.h. * Implemented macros to set up headers and tags. * Implemented error-checking of response bits in bcm2835_mbox_call_prop(). * Reworked tag structs based on experience writing LCD driver. * Added a lot more video-related tag structs. * Added debug spew and error messages to mbox.c; useful when debugging LCD. * Removed __packed attributes from message structs. * Removed stale FIXME comments. --- arch/arm/cpu/arm1176/bcm2835/Makefile | 2 +- arch/arm/cpu/arm1176/bcm2835/mbox.c | 163 ++++++++++++ arch/arm/include/asm/arch-bcm2835/mbox.h | 406 ++++++++++++++++++++++++++++++ 3 files changed, 570 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/arm1176/bcm2835/mbox.c create mode 100644 arch/arm/include/asm/arch-bcm2835/mbox.h diff --git a/arch/arm/cpu/arm1176/bcm2835/Makefile b/arch/arm/cpu/arm1176/bcm2835/Makefile index 95da6a8..135de42 100644 --- a/arch/arm/cpu/arm1176/bcm2835/Makefile +++ b/arch/arm/cpu/arm1176/bcm2835/Makefile @@ -17,7 +17,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o SOBJS := lowlevel_init.o -COBJS := init.o reset.o timer.o +COBJS := init.o reset.o timer.o mbox.o SRCS := $(SOBJS:.o=.c) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/arch/arm/cpu/arm1176/bcm2835/mbox.c b/arch/arm/cpu/arm1176/bcm2835/mbox.c new file mode 100644 index 0000000..3ce76d0 --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/mbox.c @@ -0,0 +1,163 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/mbox.h> + +#define TIMEOUT (100 * 1000) /* 100mS in uS */ + +int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv) +{ + struct bcm2835_mbox_regs *regs = + (struct bcm2835_mbox_regs *)BCM2835_MBOX_PHYSADDR; + ulong endtime = get_timer(0) + TIMEOUT; + u32 val; + + debug("time: %lu timeout: %lu\n", get_timer(0), endtime); + + if (send & BCM2835_CHAN_MASK) { + printf("mbox: Illegal mbox data 0x%08x\n", send); + return -1; + } + + /* Drain any stale responses */ + + for (;;) { + val = readl(&regs->status); + if (val & BCM2835_MBOX_STATUS_RD_EMPTY) + break; + if (get_timer(0) >= endtime) { + printf("mbox: Timeout draining stale responses\n"); + return -1; + } + val = readl(&regs->read); + } + + /* Wait for space to send */ + + for (;;) { + val = readl(&regs->status); + if (!(val & BCM2835_MBOX_STATUS_WR_FULL)) + break; + if (get_timer(0) >= endtime) { + printf("mbox: Timeout waiting for send space\n"); + return -1; + } + } + + /* Send the request */ + + val = BCM2835_MBOX_PACK(chan, send); + debug("mbox: TX raw: 0x%08x\n", val); + writel(val, &regs->write); + + /* Wait for the response */ + + for (;;) { + val = readl(&regs->status); + if (!(val & BCM2835_MBOX_STATUS_RD_EMPTY)) + break; + if (get_timer(0) >= endtime) { + printf("mbox: Timeout waiting for response\n"); + return -1; + } + } + + /* Read the response */ + + val = readl(&regs->read); + debug("mbox: RX raw: 0x%08x\n", val); + + /* Validate the response */ + + if (BCM2835_MBOX_UNPACK_CHAN(val) != chan) { + printf("mbox: Response channel mismatch\n"); + return -1; + } + + *recv = BCM2835_MBOX_UNPACK_DATA(val); + + return 0; +} + +#ifdef DEBUG +void dump_buf(struct bcm2835_mbox_hdr *buffer) +{ + u32 *p; + u32 words; + int i; + + p = (u32 *)buffer; + words = buffer->buf_size / 4; + for (i = 0; i < words; i++) + printf(" 0x%04x: 0x%08x\n", i * 4, p[i]); +} +#endif + +int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer) +{ + int ret; + u32 rbuffer; + struct bcm2835_mbox_tag_hdr *tag; + int tag_index; + +#ifdef DEBUG + printf("mbox: TX buffer\n"); + dump_buf(buffer); +#endif + + ret = bcm2835_mbox_call_raw(chan, (u32)buffer, &rbuffer); + if (ret) + return ret; + if (rbuffer != (u32)buffer) { + printf("mbox: Response buffer mismatch\n"); + return -1; + } + +#ifdef DEBUG + printf("mbox: RX buffer\n"); + dump_buf(buffer); +#endif + + /* Validate overall response status */ + + if (buffer->code != BCM2835_MBOX_RESP_CODE_SUCCESS) { + printf("mbox: Header response code invalid\n"); + return -1; + } + + /* Validate each tag's response status */ + + tag = (void *)(buffer + 1); + tag_index = 0; + while (tag->tag) { + if (!(tag->val_len & BCM2835_MBOX_TAG_VAL_LEN_RESPONSE)) { + printf("mbox: Tag %d missing val_len response bit\n", + tag_index); + return -1; + } + /* + * Clear the reponse bit so clients can just look right at the + * length field without extra processing + */ + tag->val_len &= ~BCM2835_MBOX_TAG_VAL_LEN_RESPONSE; + tag = (void *)(((u8 *)tag) + sizeof(*tag) + tag->val_buf_size); + tag_index++; + } + + return 0; +} diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h b/arch/arm/include/asm/arch-bcm2835/mbox.h new file mode 100644 index 0000000..6e040c5 --- /dev/null +++ b/arch/arm/include/asm/arch-bcm2835/mbox.h @@ -0,0 +1,406 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _BCM2835_MBOX_H +#define _BCM2835_MBOX_H + +#include <linux/compiler.h> + +/* + * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU") + * and the ARM CPU. The ARM CPU is often thought of as the main CPU. + * However, the VideoCore actually controls the initial SoC boot, and hides + * much of the hardware behind a protocol. This protocol is transported + * using the SoC's mailbox hardware module. + * + * The mailbox hardware supports passing 32-bit values back and forth. + * Presumably by software convention of the firmware, the bottom 4 bits of the + * value are used to indicate a logical channel, and the upper 28 bits are the + * actual payload. Various channels exist using these simple raw messages. See + * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an + * example, the messages on the power management channel are a bitmask of + * devices whose power should be enabled. + * + * The property mailbox channel passes messages that contain the (16-byte + * aligned) ARM physical address of a memory buffer. This buffer is passed to + * the VC for processing, is modified in-place by the VC, and the address then + * passed back to the ARM CPU as the response mailbox message to indicate + * request completion. The buffers have a generic and extensible format; each + * buffer contains a standard header, a list of "tags", and a terminating zero + * entry. Each tag contains an ID indicating its type, and length fields for + * generic parsing. With some limitations, an arbitrary set of tags may be + * combined together into a single message buffer. This file defines structs + * representing the header and many individual tag layouts and IDs. + */ + +/* Raw mailbox HW */ + +#define BCM2835_MBOX_PHYSADDR 0x2000b880 + +struct bcm2835_mbox_regs { + u32 read; + u32 rsvd0[5]; + u32 status; + u32 config; + u32 write; +}; + +#define BCM2835_MBOX_STATUS_WR_FULL 0x80000000 +#define BCM2835_MBOX_STATUS_RD_EMPTY 0x40000000 + +/* Lower 4-bits are channel ID */ +#define BCM2835_CHAN_MASK 0xf +#define BCM2835_MBOX_PACK(chan, data) (((data) & (~BCM2835_CHAN_MASK)) | \ + (chan & BCM2835_CHAN_MASK)) +#define BCM2835_MBOX_UNPACK_CHAN(val) ((val) & BCM2835_CHAN_MASK) +#define BCM2835_MBOX_UNPACK_DATA(val) ((val) & (~BCM2835_CHAN_MASK)) + +/* Property mailbox buffer structures */ + +#define BCM2835_MBOX_PROP_CHAN 8 + +/* All message buffers must start with this header */ +struct bcm2835_mbox_hdr { + u32 buf_size; + u32 code; +}; + +#define BCM2835_MBOX_REQ_CODE 0 +#define BCM2835_MBOX_RESP_CODE_SUCCESS 0x80000000 + +#define BCM2835_MBOX_INIT_HDR(_m_) { \ + memset((_m_), 0, sizeof(*(_m_))); \ + (_m_)->hdr.buf_size = sizeof(*(_m_)); \ + (_m_)->hdr.code = 0; \ + (_m_)->end_tag = 0; \ + } + +/* + * A message buffer contains a list of tags. Each tag must also start with + * a standardized header. + */ +struct bcm2835_mbox_tag_hdr { + u32 tag; + u32 val_buf_size; + u32 val_len; +}; + +#define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \ + (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \ + (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \ + (_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \ + } + +#define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \ + (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \ + (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \ + (_t_)->tag_hdr.val_len = 0; \ + } + +/* When responding, the VC sets this bit in val_len to indicate a response */ +#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000 + +/* + * Below we define the ID and struct for many possible tags. This header only + * defines individual tag structs, not entire message structs, since in + * general an arbitrary set of tags may be combined into a single message. + * Clients of the mbox API are expected to define their own overall message + * structures by combining the header, a set of tags, and a terminating + * entry. For example, + * + * struct msg { + * struct bcm2835_mbox_hdr hdr; + * struct bcm2835_mbox_tag_get_arm_mem get_arm_mem; + * ... perhaps other tags here ... + * u32 end_tag; + * }; + */ + +#define BCM2835_MBOX_TAG_GET_ARM_MEMORY 0x00010005 + +struct bcm2835_mbox_tag_get_arm_mem { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 mem_base; + u32 mem_size; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001 + +struct bcm2835_mbox_tag_allocate_buffer { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 alignment; + } req; + struct { + u32 fb_address; + u32 fb_size; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_RELEASE_BUFFER 0x00048001 + +struct bcm2835_mbox_tag_release_buffer { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_BLANK_SCREEN 0x00040002 + +struct bcm2835_mbox_tag_blank_screen { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + /* bit 0 means on, other bots reserved */ + u32 state; + } req; + struct { + u32 state; + } resp; + } body; +}; + +/* Physical means output signal */ +#define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H 0x00040003 +#define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H 0x00044003 +#define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H 0x00048003 + +struct bcm2835_mbox_tag_physical_w_h { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 width; + u32 height; + } req; + struct { + u32 width; + u32 height; + } resp; + } body; +}; + +/* Virtual means display buffer */ +#define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H 0x00040004 +#define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H 0x00044004 +#define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H 0x00048004 + +struct bcm2835_mbox_tag_virtual_w_h { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 width; + u32 height; + } req; + struct { + u32 width; + u32 height; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_DEPTH 0x00040005 +#define BCM2835_MBOX_TAG_TEST_DEPTH 0x00044005 +#define BCM2835_MBOX_TAG_SET_DEPTH 0x00048005 + +struct bcm2835_mbox_tag_depth { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 bpp; + } req; + struct { + u32 bpp; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_PIXEL_ORDER 0x00040006 +#define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER 0x00044005 +#define BCM2835_MBOX_TAG_SET_PIXEL_ORDER 0x00048006 + +#define BCM2835_MBOX_PIXEL_ORDER_BGR 0 +#define BCM2835_MBOX_PIXEL_ORDER_RGB 1 + +struct bcm2835_mbox_tag_pixel_order { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 order; + } req; + struct { + u32 order; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_ALPHA_MODE 0x00040007 +#define BCM2835_MBOX_TAG_TEST_ALPHA_MODE 0x00044007 +#define BCM2835_MBOX_TAG_SET_ALPHA_MODE 0x00048007 + +#define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE 0 +#define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT 1 +#define BCM2835_MBOX_ALPHA_MODE_IGNORED 2 + +struct bcm2835_mbox_tag_alpha_mode { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 alpha; + } req; + struct { + u32 alpha; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_PITCH 0x00040008 + +struct bcm2835_mbox_tag_pitch { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 pitch; + } resp; + } body; +}; + +/* Offset of display window within buffer */ +#define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009 +#define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009 +#define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009 + +struct bcm2835_mbox_tag_virtual_offset { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 x; + u32 y; + } req; + struct { + u32 x; + u32 y; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_OVERSCAN 0x0004000a +#define BCM2835_MBOX_TAG_TEST_OVERSCAN 0x0004400a +#define BCM2835_MBOX_TAG_SET_OVERSCAN 0x0004800a + +struct bcm2835_mbox_tag_overscan { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 top; + u32 bottom; + u32 left; + u32 right; + } req; + struct { + u32 top; + u32 bottom; + u32 left; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_PALETTE 0x0004000b + +struct bcm2835_mbox_tag_get_palette { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 data[1024]; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_TEST_PALETTE 0x0004400b + +struct bcm2835_mbox_tag_test_palette { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 offset; + u32 num_entries; + u32 data[256]; + } req; + struct { + u32 is_invalid; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_SET_PALETTE 0x0004800b + +struct bcm2835_mbox_tag_set_palette { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 offset; + u32 num_entries; + u32 data[256]; + } req; + struct { + u32 is_invalid; + } resp; + } body; +}; + +/* + * Pass a raw u32 message to the VC, and receive a raw u32 back. + * + * Returns 0 for success, any other value for error. + */ +int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv); + +/* + * Pass a complete property-style buffer to the VC, and wait until it has + * been processed. + * + * This function expects a pointer to the mbox_hdr structure in an attempt + * to ensure some degree of type safety. However, some number of tags and + * a termination value are expected to immediately follow the header in + * memory, as required by the property protocol. + * + * Returns 0 for success, any other value for error. + */ +int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer); + +#endif -- 1.7.9.5

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[U-Boot] [PATCH v1 0/8] NAND support for AM33XX
by Ilya Yanok 05 Nov '12

05 Nov '12

These series add support for NAND on AM33XX. AM33XX has the same GPMC controller as OMAP3 so the first part of the series just add required defines/initialization to enable the existing omap_gpmc driver to work on AM33XX. The rest of the series adds support for BCH8 error correction code. We use GPMC to generate codes/syndromes and ELM to find the errors. Ilya Yanok (6): OMAP: include sys_proto.h from boot-common am335x_evm: add nand pinmux definition am33xx: NAND support am335x_evm: enable NAND support am33xx_spl_bch: simple SPL nand loader for AM33XX am335x_evm: enable SPL NAND support Mansoor Ahamed (2): am33xx: add ELM support omap_gpmc: BCH8 support (ELM based) arch/arm/cpu/armv7/am33xx/Makefile | 2 + arch/arm/cpu/armv7/am33xx/board.c | 36 +++ arch/arm/cpu/armv7/am33xx/clock.c | 10 + arch/arm/cpu/armv7/am33xx/elm.c | 213 ++++++++++++++ arch/arm/cpu/armv7/am33xx/mem.c | 104 +++++++ arch/arm/cpu/armv7/omap-common/boot-common.c | 1 + arch/arm/include/asm/arch-am33xx/cpu.h | 53 ++++ arch/arm/include/asm/arch-am33xx/elm.h | 93 ++++++ arch/arm/include/asm/arch-am33xx/hardware.h | 3 + arch/arm/include/asm/arch-am33xx/mem.h | 174 +++++++++++ arch/arm/include/asm/arch-am33xx/omap_gpmc.h | 130 +++++++++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 3 + board/ti/am335x/mux.c | 26 ++ drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/am335x_spl_bch.c | 238 +++++++++++++++ drivers/mtd/nand/omap_gpmc.c | 403 +++++++++++++++++++++++++- include/configs/am335x_evm.h | 49 ++++ 17 files changed, 1538 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/am33xx/elm.c create mode 100644 arch/arm/cpu/armv7/am33xx/mem.c create mode 100644 arch/arm/include/asm/arch-am33xx/elm.h create mode 100644 arch/arm/include/asm/arch-am33xx/mem.h create mode 100644 arch/arm/include/asm/arch-am33xx/omap_gpmc.h create mode 100644 drivers/mtd/nand/am335x_spl_bch.c -- 1.7.10.2 (Apple Git-33)

2 15

[U-Boot] [PULL] please pull u-boot-avr32/master
by Andreas Bießmann 05 Nov '12

05 Nov '12

Dear Tom Rini, The following changes since commit ed296d206a1840c0a0b6c1322379c950f9996905: MAKEALL: Add -s to '${MAKE} tidy' section (2012-10-29 14:21:20 -0700) are available in the git repository at: git://git.denx.de/u-boot-avr32.git master for you to fetch changes up to 60607c9de01afb53cb284cede3481d0167fc9df0: avr32: allow multi block mmc access for all boards (2012-11-02 13:17:39 +0100) ---------------------------------------------------------------- Andreas Bießmann (1): avr32: allow multi block mmc access for all boards include/configs/atngw100.h | 1 - include/configs/atngw100mkii.h | 1 - include/configs/atstk1002.h | 1 - include/configs/atstk1003.h | 1 - include/configs/atstk1004.h | 1 - include/configs/atstk1006.h | 1 - include/configs/favr-32-ezkit.h | 1 - include/configs/hammerhead.h | 1 - include/configs/mimc200.h | 1 - 9 files changed, 9 deletions(-)

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