November 2012 - U-Boot

[U-Boot] [PATCH] at91: move get_chip_id() and get_extension_chip_id() to cpu.c, which can share with all at91 board.
by Josh Wu 06 Nov '12

06 Nov '12

Signed-off-by: Josh Wu <josh.wu(a)atmel.com> --- arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c | 12 ------------ arch/arm/cpu/arm926ejs/at91/cpu.c | 11 +++++++++++ arch/arm/include/asm/arch-at91/at91_dbu.h | 4 ++++ arch/arm/include/asm/arch-at91/at91sam9x5.h | 1 - 4 files changed, 15 insertions(+), 13 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c index 9348552..6855d3e 100644 --- a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c @@ -26,18 +26,6 @@ #include <asm/arch/gpio.h> #include <asm/io.h> -unsigned int get_chip_id(void) -{ - /* The 0x40 is the offset of cidr in DBGU */ - return readl(ATMEL_BASE_DBGU + 0x40) & ~ARCH_ID_VERSION_MASK; -} - -unsigned int get_extension_chip_id(void) -{ - /* The 0x44 is the offset of exid in DBGU */ - return readl(ATMEL_BASE_DBGU + 0x44); -} - unsigned int has_emac1() { return cpu_is_at91sam9x25(); diff --git a/arch/arm/cpu/arm926ejs/at91/cpu.c b/arch/arm/cpu/arm926ejs/at91/cpu.c index 5cf4fad..351e19c 100644 --- a/arch/arm/cpu/arm926ejs/at91/cpu.c +++ b/arch/arm/cpu/arm926ejs/at91/cpu.c @@ -26,6 +26,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/hardware.h> +#include <asm/arch/at91_dbu.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_pit.h> #include <asm/arch/at91_gpbr.h> @@ -71,3 +72,13 @@ int print_cpuinfo(void) return 0; } #endif + +unsigned int get_chip_id(void) +{ + return readl(ATMEL_BASE_DBGU + AT91_DBU_CIDR) & ~AT91_DBU_CIDR_VERSION; +} + +unsigned int get_extension_chip_id(void) +{ + return readl(ATMEL_BASE_DBGU + AT91_DBU_EXID); +} diff --git a/arch/arm/include/asm/arch-at91/at91_dbu.h b/arch/arm/include/asm/arch-at91/at91_dbu.h index 3429293..fe64198 100644 --- a/arch/arm/include/asm/arch-at91/at91_dbu.h +++ b/arch/arm/include/asm/arch-at91/at91_dbu.h @@ -38,4 +38,8 @@ typedef struct at91_dbu { #define AT91_DBU_CID_ARCH_9xx 0x01900000 #define AT91_DBU_CID_ARCH_9XExx 0x02900000 +#define AT91_DBU_CIDR_VERSION (0x1f << 0) +#define AT91_DBU_CIDR 0x40 +#define AT91_DBU_EXID 0x44 + #endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9x5.h b/arch/arm/include/asm/arch-at91/at91sam9x5.h index 0e728c9..659c01d 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9x5.h +++ b/arch/arm/include/asm/arch-at91/at91sam9x5.h @@ -118,7 +118,6 @@ /* 9x5 series chip id definitions */ #define ARCH_ID_AT91SAM9X5 0x819a05a0 -#define ARCH_ID_VERSION_MASK 0x1f #define ARCH_EXID_AT91SAM9G15 0x00000000 #define ARCH_EXID_AT91SAM9G35 0x00000001 #define ARCH_EXID_AT91SAM9X35 0x00000002 -- 1.7.9.5

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[U-Boot] [PULL] please pull u-boot-atmel/master
by Andreas Bießmann 06 Nov '12

06 Nov '12

Dear Albert Aribaud, The following changes since commit 46d626d3926cf6b9f9c477782c5a0ee620a424cd: socfpga/spl: Remove malloc.h (2012-11-04 16:23:23 +0100) are available in the git repository at: git://git.denx.de/u-boot-atmel.git master for you to fetch changes up to 15915a45d438b9e65e03c3052c3dbab1374927bc: at91: move get_chip_id() and get_extension_chip_id() to cpu.c, which can share with all at91 board. (2012-11-05 11:15:12 +0100) ---------------------------------------------------------------- Bo Shen (1): video: atmel: implement lcd_setcolreg funtion Wu, Josh (1): at91: move get_chip_id() and get_extension_chip_id() to cpu.c, which can share with all at91 board. arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c | 12 ------------ arch/arm/cpu/arm926ejs/at91/cpu.c | 11 +++++++++++ arch/arm/include/asm/arch-at91/at91_dbu.h | 4 ++++ arch/arm/include/asm/arch-at91/at91sam9x5.h | 1 - drivers/video/atmel_hlcdfb.c | 6 ++++++ 5 files changed, 21 insertions(+), 13 deletions(-)

2 2

[U-Boot] generic mmc bug in reading sd card capacity
by victor 06 Nov '12

06 Nov '12

Hi All, Accord to SD spec 2.0, the formula to find out sd card capacity is: memory capacity = (C_SIZE+1) * 512K byte and C_SIZE is from CSD [69:48] Thus, the code in generic mmc is wrong for the high capacity sd card. My patch is below. Thanks, victor --- mmc.c 2012-10-09 02:20:28.000000000 +0800 +++ mmc.c.victor 2012-11-02 15:07:16.949207266 +0800 @@ -1068,17 +1104,26 @@ mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); if (mmc->high_capacity) { - csize = (mmc->csd[1] & 0x3f) << 16 - | (mmc->csd[2] & 0xffff0000) >> 16; - cmult = 8; + //csize = (mmc->csd[1] & 0x3f) << 16 + // | (mmc->csd[2] & 0xffff0000) >> 16; + //cmult = 8; + csize = (mmc->csd[2] & 0x3f) << 16 + | (mmc->csd[1] & 0xffff0000) >> 16; } else { csize = (mmc->csd[1] & 0x3ff) << 2 | (mmc->csd[2] & 0xc0000000) >> 30; cmult = (mmc->csd[2] & 0x00038000) >> 15; } - mmc->capacity = (csize + 1) << (cmult + 2); - mmc->capacity *= mmc->read_bl_len; + if (mmc->high_capacity) { + mmc->capacity = (csize + 1) * 512 * 1024; + } else { + mmc->capacity = (csize + 1) << (cmult + 2); + mmc->capacity *= mmc->read_bl_len; + } ================================================================================================ CONFIDENTIALITY NOTE: This e-mail and any attachments may contain confidential information and may be protected by legal privilege. If you are not the intended addressee (or authorized to receive for the addressee). be aware that any disclosure, copying, distribution or use of this e-mail or any attachment is prohibited. If you have received this e-mail in error, please notify us immediately by returning it to the sender and delete this copy from your system. Thank you for your cooperation. KeyASIC Inc. ================================================================================================

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[U-Boot] hashtable lib and escaping
by Mats Kärrman 06 Nov '12

06 Nov '12

Hi, I used to have a working setup using U-Boot 2009.03 before upgrading to U-Boot 2012.07. The problem I'm facing is related to the escaping policies of lib/hashtable.c. What I did before was for example having something like this in my default environment: bootcmd=run first_boot first_boot=setenv bootcmd my_select\;run ubi_boot;saveenv;boot The trick accomplished was that the environment was saved after setting the real bootcmd (to "my_select;run ubi_boot") on first boot so that the booted OS could always be relying on a valid environment in one of the flash env partitions. With the escape parsing of himport_r(), the '\' is simply dropped and it is no longer possible to escape ';' so the "run ubi_boot" is immediately executed and nothing is saved... The function header mentions the possibility for multi-line values but this should not come at the cost of not being able to escape ';'. I am not sure about what other uses the escape may have or used to have so I have not come up with a patch yet. Does anyone have any feedback/opinions concerning this? BR // Mats

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[U-Boot] [PATCH v3 2/2] amcore: add support for amcore board
by angelo 06 Nov '12

06 Nov '12

Add support for amcore board. Signed-off-by: Angelo Dureghello <sysamfw(a)gmail.com> Cc: Jason Jin <jason.jin(a)freescale.com> --- Changes for v2: - None Changes for v3: - Fix code format issues --- board/sysam/amcore/Makefile | 43 ++++ board/sysam/amcore/amcore.c | 168 ++++++++++++++ board/sysam/amcore/config.mk | 23 ++ board/sysam/amcore/flash.c | 444 ++++++++++++++++++++++++++++++++++++ board/sysam/amcore/u-boot.lds | 101 ++++++++ boards.cfg | 1 + include/configs/amcore.h | 213 +++++++++++++++++ include/flash.h | 1 + 8 files changed, 994 insertions(+), 0 deletions(-) diff --git a/board/sysam/amcore/Makefile b/board/sysam/amcore/Makefile new file mode 100644 index 0000000..c585b19 --- /dev/null +++ b/board/sysam/amcore/Makefile @@ -0,0 +1,43 @@ +# +# Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS = $(BOARD).o flash.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c new file mode 100644 index 0000000..2a27cad --- /dev/null +++ b/board/sysam/amcore/amcore.c @@ -0,0 +1,168 @@ +/* + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <malloc.h> +#include <asm/immap.h> + + +int init_lcd (void) +{ + /* + * board can have a K0108 lcd connected on the parallel port, + * wired as below: + * + * fc cpu P0 P1 P2 P3 P4 P5 P6 P7 P10 P11 P12 P13 P14 + * lcd D0 D1 D2 D3 D4 D5 D6 D7 CS1 CS2 RW DI E + * + * Starting up setting lines in high impedance + */ + mbar_writeShort(MCFSIM_PAR, 0x300); + mbar_writeShort(MCFSIM_PADDR, 0xfcff); + mbar_writeShort(MCFSIM_PADAT, 0x0c00); +} + +int checkboard (void) +{ + puts ("Board: "); + puts ("AMCORE v.001(alpha)\n"); + + init_lcd(); + + return 0; +} + +/* aprox delay, to use before any timer init */ +void fudelay (int usec) +{ + int i=0; + + for (;i<10;++i) { + __asm__ __volatile__ ("nop"); + } +} + +phys_size_t initdram (int board_type) +{ + icache_disable(); + + /* + * SDRAM MT48LC4M32B2 details + * Memory block 0: 16 MB of SDRAM at address $00000000 + * Port size: 32-bit port + * + * Memory block 0 wired as follows: + * CPU : A15 A14 A13 A12 A11 A10 A9 A17 A18 A19 A20 A21 A22 A23 + * SDRAM : A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 BA0 BA1 + * + * Ensure that there is a delay of at least 100 microseconds from + * processor reset to the following code so that the SDRAM is ready + * for commands... + * + * write to DACR0 base address:0x0000, CASL:03, command bit 20, + * CBM is OK to 3 ***, 32 bit port, continuos page mode, rest to 0 + */ + + fudelay(1000); + + /* + * DCR + * 0x26 mean Refresh period at 64msec (x4096 rows) + * 0x8000,0x8100,0x8200 are all valid, + * faster is 0x8000 (7G, tRC is >=70ns) + */ + mbar_writeShort(MCFSIM_DCR, 0x8226); + + /* + * DACR0 + * page mode on burst only (to be verified) 0x00 + * CMD on A20 0x0300 + */ + mbar_writeLong(MCFSIM_DACR0, 0x00003304); + mbar_writeLong(MCFSIM_DMR0, 0x00ff0001); + + // issue a PRECHARGE ALL + mbar_writeLong(MCFSIM_DACR0, 0x0000330c); + *((volatile unsigned long *)(0x00000004)) = 0xbeaddeed; + mbar_writeLong(MCFSIM_DACR0, 0x0000b304); + + fudelay(1000); + + *((volatile unsigned long *)(0x00000004)) = 0xbeaddeed; + mbar_writeLong(MCFSIM_DACR0, 0x0000b304); + + fudelay(1000); + + mbar_writeLong(MCFSIM_DACR0, 0x0000b344); + *((volatile unsigned long *)(0x00000c00)) = 0xbeaddeed; + + // Memory block 1 not in use (DMR1[V] = 0) + mbar_writeLong(MCFSIM_DMR1, 0x00040000); + mbar_writeLong(MCFSIM_DACR1, 0x00000000); + + icache_enable(); + + return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; +} + +int testdram (void) +{ + int i=0,x,rval=0; + const unsigned long a=0xaaaaaaaa; + const unsigned long b=0x55555555; + const unsigned long c=0xffffffff; + volatile unsigned long *p = (volatile unsigned long *)0; + volatile unsigned long *q; + + icache_disable(); + + puts ("SRAM test:\n"); + + for (;i<16;++i) { + printf ("testing MB %02d ...\n", i+1); + q=p=(volatile unsigned long*)(1024*1024*i); + for (x=0;x<65536;++x) { + *p++=0; + *p++=a; + *p++=b; + *p++=c; + } + for (x=0;x<65536;++x) { + if (*q++!=0) goto error; + if (*q++!=a) goto error; + if (*q++!=b) goto error; + if (*q++!=c) goto error; + } + } + puts ("test passed !\n"); + goto exit; + +error: + puts ("test failed !\n"); + rval=1; + +exit: + icache_enable(); + + return (rval); +} diff --git a/board/sysam/amcore/config.mk b/board/sysam/amcore/config.mk new file mode 100644 index 0000000..cb45c2c --- /dev/null +++ b/board/sysam/amcore/config.mk @@ -0,0 +1,23 @@ +# +# Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CONFIG_SYS_TEXT_BASE = 0xffc00000 diff --git a/board/sysam/amcore/flash.c b/board/sysam/amcore/flash.c new file mode 100644 index 0000000..971b091 --- /dev/null +++ b/board/sysam/amcore/flash.c @@ -0,0 +1,444 @@ +/* + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/immap.h> + +#ifndef CONFIG_SYS_FLASH_CFI +typedef unsigned short FLASH_PORT_WIDTH; +typedef volatile unsigned short FLASH_PORT_WIDTHV; + +#define FPW FLASH_PORT_WIDTH +#define FPWV FLASH_PORT_WIDTHV + +#define FLASH_CYCLE1 0x5555 +#define FLASH_CYCLE2 0x2aaa + +#define SYNC __asm__("nop") + +/*----------------------------------------------------------------------- + * Functions + */ + +ulong flash_get_size(FPWV * addr, flash_info_t * info); +int flash_get_offsets(ulong base, flash_info_t * info); +int write_word(flash_info_t * info, FPWV * dest, u16 data); +void inline spin_wheel(void); + +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; + +unsigned short swap (unsigned short value) +{ + return ((value << 8) | (value >> 8)); +} + +ulong flash_init(void) +{ + ulong size = 0; + ulong fbase = 0; + + fbase = (ulong) CONFIG_SYS_FLASH_BASE; + flash_get_size((FPWV *) fbase, &flash_info[0]); + flash_get_offsets((ulong) fbase, &flash_info[0]); + fbase += flash_info[0].size; + size += flash_info[0].size; + + return size; +} + +int flash_get_offsets(ulong base, flash_info_t * info) +{ + int j, k; + + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { + info->start[0] = base; + for (k = 0, j = 0; j < CONFIG_SYS_SST_SECT; j++, k++) { + info->start[k + 1] = info->start[k] + + CONFIG_SYS_SST_SECTSZ; + info->protect[k] = 0; + } + } + + return ERR_OK; +} + +void flash_print_info(flash_info_t * info) +{ + int i; + + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_SST: + printf("SST "); + break; + default: + printf("Unknown Vendor "); + break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_SST3201B: + printf("SST39VF3201B\n"); + break; + default: + printf("Unknown Chip Type\n"); + return; + } + + if (info->size > 0x100000) { + int remainder; + + printf(" Size: %ld", info->size >> 20); + remainder = (info->size % 0x100000); + if (remainder) { + remainder >>= 10; + remainder = (int)((float) + (((float)remainder/(float)1024)*10000)); + printf(".%d ", remainder); + } + printf("MB in %d Sectors\n", info->sector_count); + } else + printf(" Size: %ld KB in %d Sectors\n", + info->size >> 10, info->sector_count); + + printf(" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; ++i) { + if ((i % 5) == 0) + printf("\n "); + printf(" %08lX%s", + info->start[i], info->protect[i] ? " (RO)" : " "); + } + printf("\n"); +} + +/* + * The following code cannot be run from FLASH! + */ +ulong flash_get_size(FPWV * addr, flash_info_t * info) +{ + u16 vend, flid; + + /* amcore board has bus bytes swapped */ + addr[FLASH_CYCLE1] = (FPWV) 0xAA00AA00; + addr[FLASH_CYCLE2] = (FPWV) 0x55005500; + /* selects Manufacture */ + addr[FLASH_CYCLE1] = (FPWV) 0x90009000; + + vend=swap(addr[0]); + + switch (vend) { + case (u8) SST_MANUFACT: + info->flash_id = FLASH_MAN_SST; + flid = swap(addr[1]); + break; + default: + printf("Unknown Flash\n"); + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + *addr = (FPW) 0xF000F000; + return (0); + } + + //printf ("flash id = %08X\n", flid); + + switch (flid) { + case (u16) SST_ID_xF3201B: + info->flash_id += FLASH_SST3201B; + break; + default: + info->flash_id = FLASH_UNKNOWN; + break; + } + + info->sector_count = 0; + info->size = 0; + info->sector_count = CONFIG_SYS_SST_SECT; + info->size = CONFIG_SYS_SST_SECT * CONFIG_SYS_SST_SECTSZ; + + /* reset ID mode */ + *addr = (FPWV) 0xF000F000; + + if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { + printf("** ERROR: sector count %d > max (%d) **\n", + info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); + info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; + } + + return (info->size); +} + +int flash_erase(flash_info_t * info, int s_first, int s_last) +{ + FPWV *addr; + int flag, prot, sect, count; + ulong type, start, last; + int rcode = 0, flashtype = 0; + + if ((s_first < 0) || (s_first > s_last)) { + if (info->flash_id == FLASH_UNKNOWN) + printf("- missing\n"); + else + printf("- no sectors to erase\n"); + return 1; + } + + type = (info->flash_id & FLASH_VENDMASK); + + switch (type) { + case FLASH_MAN_SST: + flashtype = 1; + break; + default: + type = (info->flash_id & FLASH_VENDMASK); + printf("Can't erase unknown flash type %08lx - aborted\n", + info->flash_id); + return 1; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + + if (prot) + printf("- Warning: %d protected sectors will not be erased!\n", + prot); + else + printf("\n"); + + flag = disable_interrupts(); + + start = get_timer(0); + last = start; + + if ((s_last - s_first) == (CONFIG_SYS_SST_SECT - 1)) { + if (prot == 0) { + addr = (FPWV *) info->start[0]; + + addr[FLASH_CYCLE1] = 0xAA00; /* unlock */ + addr[FLASH_CYCLE2] = 0x5500; /* unlock */ + addr[FLASH_CYCLE1] = 0x8000; /* erase mode */ + addr[FLASH_CYCLE1] = 0xAA00; /* unlock */ + addr[FLASH_CYCLE2] = 0x5500; /* unlock */ + *addr = 0x3000; /* erase chip */ + + count = 0; + start = get_timer(0); + + while ((*addr & 0x8000) != 0x8000) { + if (count++ > 0x10000) { + spin_wheel(); + count = 0; + } + if (get_timer(start) > + CONFIG_SYS_FLASH_ERASE_TOUT) { + printf("Timeout\n"); + /* reset to read mode */ + *addr = 0xF000; + return 1; + } + } + /* reset to read mode */ + *addr = 0xF000; + + printf("\b. done\n"); + if (flag) + enable_interrupts(); + + return 0; + } else if (prot == CONFIG_SYS_SST_SECT) { + return 1; + } + } + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect <= s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + addr = (FPWV *) (info->start[sect]); + printf("."); + /* arm simple, non interrupt dependent timer */ + start = get_timer(0); + switch (flashtype) { + case 1: + { + /* first address in bank */ + FPWV *base; + flag = disable_interrupts(); + /* First sector */ + base = (FPWV *) (CONFIG_SYS_FLASH_BASE); + base[FLASH_CYCLE1] = 0xAA00; /* unlock */ + base[FLASH_CYCLE2] = 0x5500; /* unlock */ + base[FLASH_CYCLE1] = 0x8000; /* erase mode */ + base[FLASH_CYCLE1] = 0xAA00; /* unlock */ + base[FLASH_CYCLE2] = 0x5500; /* unlock */ + *addr = 0x5000; /* erase sector */ + + if (flag) + enable_interrupts(); + + while ((*addr & 0x8000) != 0x8000) { + if (get_timer(start) > + CONFIG_SYS_FLASH_ERASE_TOUT) { + printf("Timeout\n"); + /* reset to read mode */ + *addr = 0xF000; + rcode = 1; + break; + } + } + /* reset to read mode */ + *addr = 0xF000; + break; + } + } /* switch (flashtype) */ + } + } + printf(" done\n"); + + if (flag) + enable_interrupts(); + + return rcode; +} + +int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + ulong wp, count; + u16 data; + int rc, port_width; + + if (info->flash_id == FLASH_UNKNOWN) + return 4; + + /* get lower word aligned address */ + wp = addr; + port_width = sizeof(FPW); + + /* handle unaligned start bytes */ + if (wp & 1) { + data = *((FPWV *) wp); + data = (data << 8) | *src; + + if ((rc = write_word(info, (FPWV *) wp, data)) != 0) + return (rc); + + wp++; + cnt -= 1; + src++; + } + + while (cnt >= 2) { + /* + * writing words here + */ + count = 0; + data = *((FPWV *) src); + if ((rc = write_word(info, (FPWV *) wp, data)) != 0) + return (rc); + wp += 2; + src += 2; + cnt -= 2; + if (count++ > 0x800) { + spin_wheel(); + count = 0; + } + } + /* handle last byte, if exist */ + if (cnt) { + count = 0; + data = *((FPWV *) wp); + data = (data & 0x00ff) | (*src << 8); + if ((rc = write_word(info, (FPWV *) wp, data)) != 0) + return (rc); + cnt--; + } + if (cnt == 0) + return ERR_OK; + + return ERR_OK; +} + +/* + * Write a word to Flash + * Function ready for 16 bit PS flash chips + * + * returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ +int write_word(flash_info_t * info, FPWV * dest, u16 data) +{ + ulong start; + int flag; + int res = 0; /* result, assume success */ + FPWV *base; /* first address in flash bank */ + + /* Check if Flash is (sufficiently) erased */ + if ((*dest & data) != data) { + return (2); + } + + base = (FPWV *) (CONFIG_SYS_FLASH_BASE); + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + base[FLASH_CYCLE1] = 0xAA00; /* unlock */ + base[FLASH_CYCLE2] = 0x5500; /* unlock */ + base[FLASH_CYCLE1] = 0xA000; /* selects program mode */ + + *dest = data; /* start programming the data */ + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + start = get_timer(0); + + /* data polling for D7 */ + while (res == 0 + && (*dest & 0x8000) != (data & 0x8000)) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { + /* reset bank */ + *dest = 0xF000; + res = 1; + } + } + /* reset bank */ + *dest++ = 0xF000; + + return (res); +} + +void inline spin_wheel(void) +{ + static int p = 0; + static char w[] = "\\/-"; + + printf("\010%c", w[p]); + (++p == 3) ? (p = 0) : 0; +} + +#endif diff --git a/board/sysam/amcore/u-boot.lds b/board/sysam/amcore/u-boot.lds new file mode 100644 index 0000000..ccb770d --- /dev/null +++ b/board/sysam/amcore/u-boot.lds @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(m68k) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + .text : + { + arch/m68k/cpu/mcf530x/start.o (.text) + + . = DEFINED(env_offset) ? env_offset : .; + common/env_embedded.o (.text) + + *(.text) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + + .reloc : + { + __got_start = .; + KEEP(*(.got)) + __got_end = .; + _GOT2_TABLE_ = .; + KEEP(*(.got2)) + _FIXUP_TABLE_ = .; + KEEP(*(.fixup)) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.sdata) + } + _edata = .; + PROVIDE (edata = .); + + . = .; + + . = ALIGN(4); + .u_boot_list : { + #include <u-boot.lst> + } + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + _sbss = .; + *(.sbss*) + *(.bss*) + *(COMMON) + . = ALIGN(4); + _ebss = .; + } + __bss_end__ = . ; + PROVIDE (end = .); +} diff --git a/boards.cfg b/boards.cfg index 0ecd1b8..536d048 100644 --- a/boards.cfg +++ b/boards.cfg @@ -375,6 +375,7 @@ M5271EVB m68k mcf52x2 m5271evb freesca M5272C3 m68k mcf52x2 m5272c3 freescale M5275EVB m68k mcf52x2 m5275evb freescale M5282EVB m68k mcf52x2 m5282evb freescale +amcore m68k mcf530x amcore sysam astro_mcf5373l m68k mcf532x mcf5373l astro M53017EVB m68k mcf532x m53017evb freescale M5329AFEE m68k mcf532x m5329evb freescale - M5329EVB:NANDFLASH_SIZE=0 diff --git a/include/configs/amcore.h b/include/configs/amcore.h new file mode 100644 index 0000000..92127ea --- /dev/null +++ b/include/configs/amcore.h @@ -0,0 +1,213 @@ +/* + * Configuation settings for the Sysam AMCORE board. + * + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef _AMCORE_H +#define _AMCORE_H + +/* + * AMCORE flash memory map + * + * As per CONFIG_SYS_SST_SECTSZ, amcore SST39VF3201B flash + * is organized into 1024 x 4K small secotrs (total 4MB). + * + * 0xffc00000 flash start + * 0xffc00000 u-boot code (128-4kB) + * 0xffc1f000 u-boot env (4kB) + * ----------------------------------------- + * 0xffc20000 to + * 0xffffffff reserved for os usage + */ + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_MCF530x /* define processor family */ +#define CONFIG_M5307 /* define processor type */ + +#define CONFIG_MCFTMR + +#define CONFIG_MCFUART +#define CONFIG_SYS_UART_PORT (0) +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , \ + 57600, 115200 } +#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ +#define CONFIG_BOOTCOMMAND "bootm ffc20000" /* autoboot command */ + +#undef CONFIG_WATCHDOG +#undef CONFIG_MONITOR_IS_IN_RAM + +/* + * BOOTP options + */ +#undef CONFIG_BOOTP_BOOTFILESIZE +#undef CONFIG_BOOTP_BOOTPATH +#undef CONFIG_BOOTP_GATEWAY +#undef CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ + +#include <config_cmd_default.h> +#undef CONFIG_CMD_CACHE +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_CACHE + +#define CONFIG_SYS_PROMPT "amcore$ " +//#define CONFIG_SYS_LONGHELP /* undef to save memory */ + +#if defined(CONFIG_CMD_KGDB) +/* Console I/O buff. size */ +#define CONFIG_SYS_CBSIZE 1024 +#else +#define CONFIG_SYS_CBSIZE 256 +#endif +/* Print buffer size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 +/* Boot argument buffer size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */ +#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* no console @ startup */ +#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ +#define CONFIG_LOOPW 1 /* enable loopw command */ +#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */ + +#define CONFIG_SYS_LOAD_ADDR 0x20000 /* default load address */ + +#undef CONFIG_SYS_DRAM_TEST +#define CONFIG_SYS_MEMTEST_START 0x0 +#define CONFIG_SYS_MEMTEST_END 0x100000 + +#define CONFIG_SYS_HZ 1000 + +/* + * Clock configuration: enable only one of the following options + */ + +/* bypass PLL for test purpose */ +#undef CONFIG_SYS_PLL_BYPASS +/* MCF5307 run at 90MHz */ +#define CONFIG_SYS_CLK 90000000 + +/* + * Low Level Configuration Settings + * (address mappings, register initial values, etc.) + * You should know what you are doing if you make changes here. + */ +#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ + +/* + * Definitions for initial stack pointer and data area (in DPRAM) + */ +#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* size of used SRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +/* + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_SIZE 16 /* in MB */ +#define CONFIG_SYS_FLASH_BASE 0xffc00000 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 1024 +#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 + +/* reserve 128-4KB */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) +#define CONFIG_SYS_MONITOR_LEN ((128-4)*1024) +#define CONFIG_SYS_MALLOC_LEN (1*1024*1024) +#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 + +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SIZE 0x1000 /* Size of env. data */ +#define CONFIG_ENV_SECT_SIZE 0x1000 /* see README */ + +#define FLASH_SST3201B 0x300 + +#define CONFIG_SYS_SST_SECT 1024 +#define CONFIG_SYS_SST_SECTSZ 0x1000 +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization ?? + */ +#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ + (CONFIG_SYS_SDRAM_SIZE << 20)) + +/* + * Cache Configuration + */ +#define CONFIG_SYS_CACHELINE_SIZE 16 + +#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 4) +#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) +#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \ + CF_ADDRMASK(2) | \ + CF_ACR_EN | CF_ACR_SM_ALL) + +/* no ACR1 initialization for SDRAM before SDRAM init */ +#define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ + CF_CACR_DCM_P) + +/* + * Memory bank definitions + */ + +/* CS0 - AMD Flash, address 0xffc00000 */ +#define CONFIG_SYS_CS0_BASE (CONFIG_SYS_FLASH_BASE) +/* WS=10, AA=1, PS=16bit (10) */ +#define CONFIG_SYS_CS0_CTRL 0x00001980 +/* 4MB, AA=0,V=1 C/I BIT !!!!! */ +#define CONFIG_SYS_CS0_MASK 0x003f0001 + +/* CS1 - DM9000 Ethernet Controller, address 0x30000000 */ +#define CONFIG_SYS_CS1_BASE 0x30000000 +#define CONFIG_SYS_CS1_CTRL 0x00000100 +#define CONFIG_SYS_CS1_MASK 0x00070001 + +#endif //_AMCORE_H diff --git a/include/flash.h b/include/flash.h index 7db599e..a04ce90 100644 --- a/include/flash.h +++ b/include/flash.h @@ -282,6 +282,7 @@ extern flash_info_t *flash_get_info(ulong base); #define SST_ID_xF1601 0x234B234B /* 39xF1601 ID (16M = 1M x 16 ) */ #define SST_ID_xF1602 0x234A234A /* 39xF1602 ID (16M = 1M x 16 ) */ #define SST_ID_xF3201 0x235B235B /* 39xF3201 ID (32M = 2M x 16 ) */ +#define SST_ID_xF3201B 0x235D235D /* 39xF3201B ID (32M = 2M x 16 ) */ #define SST_ID_xF3202 0x235A235A /* 39xF3202 ID (32M = 2M x 16 ) */ #define SST_ID_xF6401 0x236B236B /* 39xF6401 ID (64M = 4M x 16 ) */ #define SST_ID_xF6402 0x236A236A /* 39xF6402 ID (64M = 4M x 16 ) */

3 3

[U-Boot] [PATCH v3 1/2] m68k: add support for mcf5307 cpu
by angelo 06 Nov '12

06 Nov '12

Add support for freescale coldfire mcf5307 cpu. Signed-off-by: Angelo Dureghello <sysamfw(a)gmail.com> Cc: Jason Jin <jason.jin(a)freescale.com> --- Changes for v2: - Add MAINTAINERS entry - Add boards.cfg entry Changes for v3: - Fix code format issues --- MAINTAINERS | 4 + arch/m68k/cpu/mcf530x/Makefile | 48 ++++ arch/m68k/cpu/mcf530x/config.mk | 30 +++ arch/m68k/cpu/mcf530x/cpu.c | 48 ++++ arch/m68k/cpu/mcf530x/cpu.h | 33 +++ arch/m68k/cpu/mcf530x/cpu_init.c | 160 +++++++++++++ arch/m68k/cpu/mcf530x/interrupts.c | 43 ++++ arch/m68k/cpu/mcf530x/speed.c | 38 +++ arch/m68k/cpu/mcf530x/start.S | 263 +++++++++++++++++++++ arch/m68k/include/asm/cache.h | 3 +- arch/m68k/include/asm/immap.h | 23 ++ arch/m68k/include/asm/immap_5307.h | 78 +++++++ arch/m68k/include/asm/m5307.h | 127 +++++++++++ arch/m68k/include/asm/timer.h | 3 +- 14 files changed, 899 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 2daee7d..5cb951f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1118,6 +1118,10 @@ Wolfgang Wegner <w.wegner(a)astro-kom.de> astro_mcf5373l MCF5373L +Angelo Dureghello <sysamfw(a)gmail.com> + + amcore mcf5307 + ######################################################################### # AVR32 Systems: # # # diff --git a/arch/m68k/cpu/mcf530x/Makefile b/arch/m68k/cpu/mcf530x/Makefile new file mode 100644 index 0000000..3c5a1c2 --- /dev/null +++ b/arch/m68k/cpu/mcf530x/Makefile @@ -0,0 +1,48 @@ +# +# Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +# CFLAGS += -DET_DEBUG + +LIB = $(obj)lib$(CPU).o + +START = start.o +COBJS = interrupts.o cpu.o speed.o cpu_init.o + +SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +START := $(addprefix $(obj),$(START)) + +all: $(obj).depend $(START) $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/m68k/cpu/mcf530x/config.mk b/arch/m68k/cpu/mcf530x/config.mk new file mode 100644 index 0000000..f7b01c6 --- /dev/null +++ b/arch/m68k/cpu/mcf530x/config.mk @@ -0,0 +1,30 @@ +# +# Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +PLATFORM_RELFLAGS += -ffixed-d7 -msep-data + +cfg=$(shell grep configs $(OBJTREE)/include/config.h | sed 's/.*<$configs.*$>/\1/') +is5307:=$(shell grep CONFIG_M5307 $(TOPDIR)/include/$(cfg)) + +ifneq (,$(findstring CONFIG_M5307,$(is5307))) +PLATFORM_CPPFLAGS += -mcpu=5307 +endif diff --git a/arch/m68k/cpu/mcf530x/cpu.c b/arch/m68k/cpu/mcf530x/cpu.c new file mode 100644 index 0000000..6f8ca3b --- /dev/null +++ b/arch/m68k/cpu/mcf530x/cpu.c @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <asm/immap.h> + +#include "cpu.h" + +#ifdef CONFIG_M5307 +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + /* enable watchdog, set timeout to 0 and wait */ + mbar_writeByte(MCFSIM_SYPCR, 0xc0); + while (1); + + /* we don't return! */ + return 0; +} + +int checkcpu(void) +{ + char buf[32]; + + printf("CPU: Freescale Coldfire MCF5307 at %s MHz\n", + strmhz(buf, CONFIG_SYS_CLK)); + return 0; +} +#endif diff --git a/arch/m68k/cpu/mcf530x/cpu.h b/arch/m68k/cpu/mcf530x/cpu.h new file mode 100644 index 0000000..1accfcc --- /dev/null +++ b/arch/m68k/cpu/mcf530x/cpu.h @@ -0,0 +1,33 @@ +/* + * cpu.h + * + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CPU_H_ +#define _CPU_H_ + +#include <command.h> + +/* Use this to create board specific reset functions */ +void board_reset(void) __attribute__((__weak__)); + +#endif /* _CPU_H_ */ diff --git a/arch/m68k/cpu/mcf530x/cpu_init.c b/arch/m68k/cpu/mcf530x/cpu_init.c new file mode 100644 index 0000000..f4a4ccb --- /dev/null +++ b/arch/m68k/cpu/mcf530x/cpu_init.c @@ -0,0 +1,160 @@ +/* + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <watchdog.h> +#include <asm/immap.h> + +#if defined(CONFIG_M5307) +/* + * Simple mcf5307 chip select module init. + * + * Note: this chip has an issue reported in the device "errata": + * MCF5307ER Rev 4.2 reports @ section 35: + * Corrupted Return PC in Exception Stack Frame + * When processing an autovectored interrupt an error can occur that + * causes 0xFFFFFFFF to be written as the return PC value in the + * exception stack frame. The problem is caused by a conflict between + * an internal autovector access and a chip select mapped to the IACK + * address space (0xFFFFXXXX). + * Workaround: + * Set the C/I bit in the chip select mask register (CSMR) for the + * chip select that is mapped to 0xFFFFXXXX. + * This will prevent the chip select from asserting for IACK accesses. + */ +#define MCF5307_SP_ERR_FIX(cs_base,mask) \ + if((cs_base+(mask&0xffff0000))>=0xffff0000)mask|=0x20 + +void init_csm(void) +{ + volatile csm_t *csm = (csm_t *) (MMAP_CSM); + +#if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) \ + && defined(CONFIG_SYS_CS0_CTRL)) + csm->csar0 = (CONFIG_SYS_CS0_BASE>>16); + csm->cscr0 = CONFIG_SYS_CS0_CTRL; + csm->csmr0 = CONFIG_SYS_CS0_MASK; + MCF5307_SP_ERR_FIX(CONFIG_SYS_CS0_BASE,csm->csmr0); +#else +#warning "Chip Select 0 are not initialized/used" +#endif +#if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) \ + && defined(CONFIG_SYS_CS1_CTRL)) + csm->csar1 = (CONFIG_SYS_CS1_BASE>>16); + csm->cscr1 = CONFIG_SYS_CS1_CTRL; + csm->csmr1 = CONFIG_SYS_CS1_MASK; + MCF5307_SP_ERR_FIX(CONFIG_SYS_CS1_BASE,csm->csmr1); +#endif +#if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) \ + && defined(CONFIG_SYS_CS2_CTRL)) + csm->csar2 = (CONFIG_SYS_CS2_BASE>>16); + csm->cscr2 = CONFIG_SYS_CS2_CTRL; + csm->csmr2 = CONFIG_SYS_CS2_MASK; + MCF5307_SP_ERR_FIX(CONFIG_SYS_CS2_BASE,csm->csmr2); +#endif +#if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) \ + && defined(CONFIG_SYS_CS3_CTRL)) + csm->csar3 =(CONFIG_SYS_CS3_BASE>>16); + csm->cscr3 = CONFIG_SYS_CS3_CTRL; + csm->csmr3 = CONFIG_SYS_CS3_MASK; + MCF5307_SP_ERR_FIX(CONFIG_SYS_CS3_BASE,csm->csmr3); +#endif +#if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) \ + && defined(CONFIG_SYS_CS4_CTRL)) + csm->csar4 = (CONFIG_SYS_CS4_BASE>>16); + csm->cscr4 = CONFIG_SYS_CS4_CTRL; + csm->csmr4 = CONFIG_SYS_CS4_MASK; + MCF5307_SP_ERR_FIX(CONFIG_SYS_CS4_BASE,csm->csmr4); +#endif +#if (defined(CONFIG_SYS_CS5_BASE) && defined(CONFIG_SYS_CS5_MASK) \ + && defined(CONFIG_SYS_CS5_CTRL)) + csm->csar5 = (CONFIG_SYS_CS5_BASE>>16); + csm->cscr5 = CONFIG_SYS_CS5_CTRL; + csm->csmr5 = CONFIG_SYS_CS5_MASK; + MCF5307_SP_ERR_FIX(CONFIG_SYS_CS5_BASE,csm->csmr5); +#endif +#if (defined(CONFIG_SYS_CS6_BASE) && defined(CONFIG_SYS_CS6_MASK) \ + && defined(CONFIG_SYS_CS6_CTRL)) + csm->csar6 = (CONFIG_SYS_CS6_BASE>>16); + csm->cscr6 = CONFIG_SYS_CS6_CTRL; + csm->csmr6 = CONFIG_SYS_CS6_MASK; + MCF5307_SP_ERR_FIX(CONFIG_SYS_CS6_BASE,csm->csmr6); +#endif +#if (defined(CONFIG_SYS_CS7_BASE) && defined(CONFIG_SYS_CS7_MASK) \ + && defined(CONFIG_SYS_CS7_CTRL)) + csm->csar7 = (CONFIG_SYS_CS7_BASE>>16); + csm->cscr7 = CONFIG_SYS_CS7_CTRL; + csm->csmr7 = CONFIG_SYS_CS7_MASK; + MCF5307_SP_ERR_FIX(CONFIG_SYS_CS7_BASE,csm->csmr7); +#endif +} + +/* + * Set up the memory map and initialize registers + */ +void cpu_init_f(void) +{ + mbar_writeByte(MCFSIM_MPARK, 0x00); + mbar_writeByte(MCFSIM_SYPCR, 0x00); + mbar_writeByte(MCFSIM_SWIVR, 0x0f); + mbar_writeByte(MCFSIM_SWSR, 0x00); + mbar_writeLong(MCFSIM_IMR, 0xfffffbff); + mbar_writeByte(MCFSIM_SWDICR, 0x00); + mbar_writeByte(MCFSIM_TIMER1ICR, 0x00); + mbar_writeByte(MCFSIM_TIMER2ICR, 0x88); + mbar_writeByte(MCFSIM_I2CICR, 0x00); + mbar_writeByte(MCFSIM_UART1ICR, 0x00); + mbar_writeByte(MCFSIM_UART2ICR, 0x00); + mbar_writeByte(MCFSIM_ICR6, 0x00); + mbar_writeByte(MCFSIM_ICR7, 0x00); + mbar_writeByte(MCFSIM_ICR8, 0x00); + mbar_writeByte(MCFSIM_ICR9, 0x00); + + /* Chipselect Init */ + init_csm(); + + /* enable instruction cache now */ + icache_enable(); +} + +/* + * initialize higher level parts of CPU like timers + */ +int cpu_init_r(void) +{ + return (0); +} + +void uart_port_conf(int port) +{ +} + +void arch_preboot_os(void) +{ + /* + * OS can change interrupt offsets and are about to boot the OS so + * we need to make sure we disable all async interrupts. + */ + mbar_writeByte(MCFSIM_TIMER1ICR, 0x00); + mbar_writeByte(MCFSIM_TIMER2ICR, 0x00); +} +#endif diff --git a/arch/m68k/cpu/mcf530x/interrupts.c b/arch/m68k/cpu/mcf530x/interrupts.c new file mode 100644 index 0000000..17a438f --- /dev/null +++ b/arch/m68k/cpu/mcf530x/interrupts.c @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <watchdog.h> +#include <asm/processor.h> +#include <asm/immap.h> + +#ifdef CONFIG_M5307 +int interrupt_init(void) +{ + enable_interrupts(); + + return 0; +} + +void dtimer_intr_setup(void) +{ + /* clearing TIMER2 mask, so enabling the related interrupt */ + mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400); + /* set TIMER2 interrupt priority */ + mbar_writeByte(MCFSIM_TIMER2ICR, CONFIG_SYS_TMRINTR_PRI); +} +#endif diff --git a/arch/m68k/cpu/mcf530x/speed.c b/arch/m68k/cpu/mcf530x/speed.c new file mode 100644 index 0000000..42b55dd --- /dev/null +++ b/arch/m68k/cpu/mcf530x/speed.c @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processor.h> +#include <asm/immap.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* get_clocks() fills in gd->cpu_clock and gd->bus_clk */ +int get_clocks (void) +{ +#if defined(CONFIG_M5307) + gd->cpu_clk = CONFIG_SYS_CLK; + gd->bus_clk = gd->cpu_clk / 2; +#endif + + return (0); +} diff --git a/arch/m68k/cpu/mcf530x/start.S b/arch/m68k/cpu/mcf530x/start.S new file mode 100644 index 0000000..576368f --- /dev/null +++ b/arch/m68k/cpu/mcf530x/start.S @@ -0,0 +1,263 @@ +/* + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm-offsets.h> +#include <config.h> +#include <timestamp.h> +#include "version.h" +#include <asm/cache.h> + +#ifndef CONFIG_IDENT_STRING +#define CONFIG_IDENT_STRING "" +#endif + +#define _START _start +#define _FAULT _fault + +#define SAVE_ALL \ + move.w #0x2700,%sr; /* disable intrs */ \ + subl #60,%sp; /* space for 15 regs */ \ + moveml %d0-%d7/%a0-%a6,%sp@; \ + +#define RESTORE_ALL \ + moveml %sp@,%d0-%d7/%a0-%a6; \ + addl #60,%sp; /* space for 15 regs */ \ + rte + +/* + * If we come from a pre-loader we don't need an initial exception + * table. + */ +#if !defined(CONFIG_MONITOR_IS_IN_RAM) + +.text +/* + * Vector table. This is used for initial platform startup. + * These vectors are to catch any un-intended traps. + */ +_vectors: + +.long 0x00000000 /* Flash offset is 0 until we setup CS0 */ +.long _START + +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT + +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT + +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT + +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT +.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT + +#endif + + .text + .globl _start +_start: + nop + nop + move.w #0x2700,%sr + + /* set MBAR address + valid flag */ + move.l #(CONFIG_SYS_MBAR + 1), %d0 + move.c %d0, %MBAR + + move.l #(CONFIG_SYS_INIT_RAM_ADDR + 1), %d0 + move.c %d0, %RAMBAR + + /* + * if we come from a pre-loader we have no exception table and + * therefore no VBR to set + */ +#if !defined(CONFIG_MONITOR_IS_IN_RAM) + move.l #CONFIG_SYS_FLASH_BASE, %d0 + movec %d0, %VBR +#endif + + /* initialize general use internal ram */ + move.l #0, %d0 + move.l #(ICACHE_STATUS), %a1 /* icache */ + move.l #(DCACHE_STATUS), %a2 /* icache */ + move.l %d0, (%a1) + move.l %d0, (%a2) + + /* + * set stackpointer to internal sram end - 80 + * (global data struct size + some bytes) + * get some stackspace for the first c-code, + */ + move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp + clr.l %sp@- + + /* put relocation table address to a5 */ + move.l #__got_start, %a5 + + /* run low-level CPU init code (from flash) */ + bsr cpu_init_f + + /* run low-level board init code (from flash) */ + bsr board_init_f + + /* board_init_f() does not return */ + +/*----------------------------------------------------------------------------*/ + +/* + * void relocate_code (addr_sp, gd, addr_moni) + * + * This "function" does not return, instead it continues in RAM + * after relocating the monitor code. + * + * r3 = dest + * r4 = src + * r5 = length in bytes + * r6 = cachelinesize + */ + .globl relocate_code +relocate_code: + link.w %a6,#0 + move.l 8(%a6), %sp /* set new stack pointer */ + move.l 12(%a6), %d0 /* Save copy of Global Data pointer */ + move.l 16(%a6), %a0 /* Save copy of Destination Address */ + + move.l #CONFIG_SYS_MONITOR_BASE, %a1 + move.l #__init_end, %a2 + move.l %a0, %a3 + + /* copy the code to RAM */ +1: + move.l (%a1)+, (%a3)+ + cmp.l %a1,%a2 + bgt.s 1b + +/* + * We are done. Do not return, instead branch to second part of board + * initialization, now running from RAM. + */ + move.l %a0, %a1 + add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1 + jmp (%a1) + +in_ram: + +clear_bss: + /* + * Now clear BSS segment + */ + move.l %a0, %a1 + add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1 + move.l %a0, %d1 + add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1 +6: + clr.l (%a1)+ + cmp.l %a1,%d1 + bgt.s 6b + + /* + * fix got table in RAM + */ + move.l %a0, %a1 + add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1 + /* * fix got pointer register a5 */ + move.l %a1,%a5 + + move.l %a0, %a2 + add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2 + +7: + move.l (%a1),%d1 + sub.l #_start,%d1 + add.l %a0,%d1 + move.l %d1,(%a1)+ + cmp.l %a2, %a1 + bne 7b + + /* calculate relative jump to board_init_r in ram */ + move.l %a0, %a1 + add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1 + + /* set parameters for board_init_r */ + move.l %a0,-(%sp) /* dest_addr */ + move.l %d0,-(%sp) /* gd */ +#if defined(DEBUG) && (CONFIG_SYS_TEXT_BASE!=CONFIG_SYS_INT_FLASH_BASE) && \ + defined(CONFIG_SYS_HALT_BEFOR_RAM_JUMP) + halt +#endif + jsr (%a1) + +/*----------------------------------------------------------------------------*/ +/* exception code */ + .globl _fault +_fault: + jmp _fault + + .globl _exc_handler +_exc_handler: + SAVE_ALL + movel %sp,%sp@- + bsr exc_handler + addql #4,%sp + RESTORE_ALL + + .globl _int_handler +_int_handler: + SAVE_ALL + movel %sp,%sp@- + bsr int_handler + addql #4,%sp + RESTORE_ALL + +/*----------------------------------------------------------------------------*/ + + .globl version_string +version_string: + .ascii U_BOOT_VERSION + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" + .ascii CONFIG_IDENT_STRING, "\0" + .align 4 diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h index f9e2d15..dd932c3 100644 --- a/arch/m68k/include/asm/cache.h +++ b/arch/m68k/include/asm/cache.h @@ -31,7 +31,8 @@ #define CONFIG_CF_V2 #endif -#if defined(CONFIG_MCF532x) || defined(CONFIG_MCF5301x) +#if defined(CONFIG_MCF530x) || defined(CONFIG_MCF532x) || \ + defined(CONFIG_MCF5301x) #define CONFIG_CF_V3 #endif diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 2aab463..5cc81c2 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -256,6 +256,29 @@ #endif #endif /* CONFIG_M5282 */ +#ifdef CONFIG_M5307 +#include <asm/immap_5307.h> +#include <asm/m5307.h> + +#define CONFIG_SYS_UART_BASE (MMAP_UART0 + \ + (CONFIG_SYS_UART_PORT * 0x40)) +#define CONFIG_SYS_INTR_BASE (MMAP_INTC) +#define CONFIG_SYS_NUM_IRQS (64) + +/* Timer */ +#ifdef CONFIG_MCFTMR +#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CONFIG_SYS_TMR_BASE (MMAP_DTMR1) +#define CONFIG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) +#define CONFIG_SYS_TMRINTR_NO (31) +#define CONFIG_SYS_TMRINTR_MASK (0x00000400) +#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) +#define CONFIG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | \ + MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3) +#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#endif +#endif /* CONFIG_M5307 */ + #if defined(CONFIG_MCF5301x) #include <asm/immap_5301x.h> #include <asm/m5301x.h> diff --git a/arch/m68k/include/asm/immap_5307.h b/arch/m68k/include/asm/immap_5307.h new file mode 100644 index 0000000..24283dc --- /dev/null +++ b/arch/m68k/include/asm/immap_5307.h @@ -0,0 +1,78 @@ +/* + * MCF5307 Internal Memory Map + * + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __IMMAP_5307__ +#define __IMMAP_5307__ + +#define MMAP_INTC (CONFIG_SYS_MBAR + 0x00000040) +#define MMAP_CSM (CONFIG_SYS_MBAR + 0x00000080) +#define MMAP_DTMR0 (CONFIG_SYS_MBAR + 0x00000140) +#define MMAP_DTMR1 (CONFIG_SYS_MBAR + 0x00000180) +#define MMAP_UART0 (CONFIG_SYS_MBAR + 0x000001C0) +#define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000200) + +typedef struct csm { + u16 csar0; /* Chip-select Address */ + u16 res0a; + u32 csmr0; /* Chip-select Mask */ + u16 res0b; + u16 cscr0; /* Chip-select Control */ + u16 csar1; + u16 res1a; + u32 csmr1; + u16 res1b; + u16 cscr1; + u16 csar2; + u16 res2a; + u32 csmr2; + u16 res2b; + u16 cscr2; + u16 csar3; + u16 res3a; + u32 csmr3; + u16 res3b; + u16 cscr3; + u16 csar4; + u16 res4a; + u32 csmr4; + u16 res4b; + u16 cscr4; + u16 csar5; + u16 res5a; + u32 csmr5; + u16 res5b; + u16 cscr5; + u16 csar6; + u16 res6a; + u32 csmr6; + u16 res6b; + u16 cscr6; + u16 csar7; + u16 res7a; + u32 csmr7; + u16 res7b; + u16 cscr7; +} csm_t; + +#endif /* __IMMAP_5307__ */ diff --git a/arch/m68k/include/asm/m5307.h b/arch/m68k/include/asm/m5307.h new file mode 100644 index 0000000..9c69def --- /dev/null +++ b/arch/m68k/include/asm/m5307.h @@ -0,0 +1,127 @@ +/* + * mcf5307.h -- Definitions for Motorola Coldfire 5307 + * + * Copyright (c) 2011 Angelo Dureghello <sysamfw(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef mcf5307_h +#define mcf5307_h +/****************************************************************************/ + +/* + * useful definitions for reading/writing MBAR offset memory + */ +#define mbar_readLong(x) \ + *((volatile unsigned long *) (CONFIG_SYS_MBAR + x)) +#define mbar_writeLong(x,y) \ + *((volatile unsigned long *) (CONFIG_SYS_MBAR + x)) = y +#define mbar_writeShort(x,y) \ + *((volatile unsigned short *) (CONFIG_SYS_MBAR + x)) = y +#define mbar_writeByte(x,y) \ + *((volatile unsigned char *) (CONFIG_SYS_MBAR + x)) = y + +/* + * Size of internal RAM + */ + +#define INT_RAM_SIZE 4096 /* RAMBAR - 4k */ + +/* + * Define the 5249 SIM register set addresses. + */ + +/* + ***** MBAR ***** + */ +#define MCFSIM_RSR 0x00 /* Reset Status reg (r/w) */ +#define MCFSIM_SYPCR 0x01 /* System Protection reg (r/w) */ +#define MCFSIM_SWIVR 0x02 /* SW Watchdog intr reg (r/w) */ +#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ +#define MCFSIM_PAR 0x04 /* Parallel pin assignment reg */ +#define MCFSIM_PLLCR 0x08 /* PLL Control register */ +#define MCFSIM_MPARK 0x0c /* Bus master park register (r/w) */ + +#define MCFSIM_SIMR 0x00 /* SIM Config reg (r/w) */ +#define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */ +#define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */ +#define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */ +#define MCFSIM_ICR3 0x4f /* Intr Ctrl reg 3 (r/w) */ +#define MCFSIM_ICR4 0x50 /* Intr Ctrl reg 4 (r/w) */ +#define MCFSIM_ICR5 0x51 /* Intr Ctrl reg 5 (r/w) */ +#define MCFSIM_ICR6 0x52 /* Intr Ctrl reg 6 (r/w) */ +#define MCFSIM_ICR7 0x53 /* Intr Ctrl reg 7 (r/w) */ +#define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */ +#define MCFSIM_ICR9 0x55 /* Intr Ctrl reg 9 (r/w) */ +#define MCFSIM_ICR10 0x56 /* Intr Ctrl reg 10 (r/w) */ +#define MCFSIM_ICR11 0x57 /* Intr Ctrl reg 11 (r/w) */ + +#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ +#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ + +#define MCFSIM_DCR 0x100 /* DRAM Control reg (r/w) */ +#define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */ +#define MCFSIM_DMR0 0x10c /* DRAM 0 Mask reg (r/w) */ +#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */ +#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ + +#define MCFSIM_PADDR 0x244 /* Parallel data direction reg */ +#define MCFSIM_PADAT 0x248 /* Parallel data direction reg */ + +/* + * Some symbol defines for the above... + */ +#define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */ +#define MCFSIM_TIMER1ICR MCFSIM_ICR1 /* Timer 1 ICR */ +#define MCFSIM_TIMER2ICR MCFSIM_ICR2 /* Timer 2 ICR */ +#define MCFSIM_I2CICR MCFSIM_ICR3 /* I2C ICR */ +#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */ +#define MCFSIM_UART2ICR MCFSIM_ICR5 /* UART 2 ICR */ +/* XXX - If needed, DMA ICRs go here */ + +/* + * Bit definitions for the ICR family of registers. + */ +#define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */ +#define MCFSIM_ICR_LEVEL0 0x00 /* Level 0 intr */ +#define MCFSIM_ICR_LEVEL1 0x04 /* Level 1 intr */ +#define MCFSIM_ICR_LEVEL2 0x08 /* Level 2 intr */ +#define MCFSIM_ICR_LEVEL3 0x0c /* Level 3 intr */ +#define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */ +#define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */ +#define MCFSIM_ICR_LEVEL6 0x18 /* Level 6 intr */ +#define MCFSIM_ICR_LEVEL7 0x1c /* Level 7 intr */ + +#define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */ +#define MCFSIM_ICR_PRI1 0x01 /* Priority 1 intr */ +#define MCFSIM_ICR_PRI2 0x02 /* Priority 2 intr */ +#define MCFSIM_ICR_PRI3 0x03 /* Priority 3 intr */ + +/* + * Macros to read/set IMR register. It is 32 bits on the 5307. + */ + +#define mcf_getimr() \ + *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) + +#define mcf_setimr(imr) \ + *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr); + +#endif /* mcf5307_h */ diff --git a/arch/m68k/include/asm/timer.h b/arch/m68k/include/asm/timer.h index 1a5de05..2638574 100644 --- a/arch/m68k/include/asm/timer.h +++ b/arch/m68k/include/asm/timer.h @@ -33,7 +33,8 @@ /****************************************************************************/ /* DMA Timer module registers */ typedef struct dtimer_ctrl { -#if defined(CONFIG_M5249) || defined(CONFIG_M5253) || defined(CONFIG_M5272) +#if defined(CONFIG_M5307) || defined(CONFIG_M5249) || \ + defined(CONFIG_M5253) || defined(CONFIG_M5272) u16 tmr; /* 0x00 Mode register */ u16 res1; /* 0x02 */ u16 trr; /* 0x04 Reference register */

3 4

[U-Boot] [PATCH 0/4] Add DT based ethernet driver for SMDK5250
by Hatim Ali 06 Nov '12

06 Nov '12

This patch series enables the DT support on SMDK5250. Ethernet is the first driver whose discovery is based on DT node. More DT based drivers to be added subsequently. Hatim Ali (4): EXYNOS5: FDT: add initial dts file for EXYNOS5250, SMDK5250 fdt: exynos5: Add DT node definition for SROM and SMSC9215 exynos5: Add DT based driver for SMSC92xx ethernet exynos5: fdt: Enable FDT for exynos5 based SMDK5250 board arch/arm/dts/exynos5250.dtsi | 31 ++++++++ arch/arm/include/asm/arch-exynos/sromc.h | 18 +++++ board/samsung/dts/exynos5250-smdk5250.dts | 29 +++++++ board/samsung/smdk5250/smdk5250.c | 115 +++++++++++++++++++++-------- include/configs/smdk5250.h | 6 ++ include/fdtdec.h | 3 + lib/fdtdec.c | 3 + 7 files changed, 175 insertions(+), 30 deletions(-) create mode 100644 arch/arm/dts/exynos5250.dtsi create mode 100644 board/samsung/dts/exynos5250-smdk5250.dts -- 1.7.2.3

3 10

[U-Boot] [PATCH] tegra: use generic fs commands in BOOTCOMMAND
by Stephen Warren 06 Nov '12

06 Nov '12

From: Stephen Warren <swarren(a)nvidia.com> Modify tegra-common-post.h's BOOTCOMMAND definition to use the generic filesystem command load rather than separate fatload and ext2load. This removes the need to iterate over supported filesystem types in the boot command. This requires editing all board config headers to enable the new commands. The now-unused commands are left enabled to assue backwards compatibility with any user scripts. Boards (all from Avionic Design) which define custom BOOTCOMMAND values are not affected. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> tegra generic fs cmds fixup --- Tom, this patch is based on u-boot/master, since it depends on commit f9b55e2 "fs: rename fsload command to load" having been applied. I guess you'll need to either rebase u-boot-tegra/next onto that, or wait until you pick up that commit for other reasons. include/configs/harmony.h | 3 ++ include/configs/paz00.h | 3 ++ include/configs/seaboard.h | 3 ++ include/configs/tegra-common-post.h | 39 ++++++++++++++-------------------- include/configs/trimslice.h | 3 ++ include/configs/ventana.h | 3 ++ include/configs/whistler.h | 3 ++ 7 files changed, 34 insertions(+), 23 deletions(-) diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 040bfe4..4839676 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -58,8 +58,11 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* NAND support */ #define CONFIG_CMD_NAND diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 5603de9..38c79cf 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -45,8 +45,11 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index ab10bd0..0605582 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -71,8 +71,11 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 6f310be..ab62e71 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -30,18 +30,6 @@ #else -#ifdef CONFIG_CMD_EXT2 -#define BOOT_FSTYPE_EXT2 "ext2 " -#else -#define BOOT_FSTYPE_EXT2 "" -#endif - -#ifdef CONFIG_CMD_FAT -#define BOOT_FSTYPE_FAT "fat" -#else -#define BOOT_FSTYPE_FAT "" -#endif - #ifdef CONFIG_CMD_MMC #define BOOTCMDS_MMC \ "mmc_boot=" \ @@ -98,7 +86,7 @@ "rootpart=1\0" \ \ "script_boot=" \ - "if ${fs}load ${devtype} ${devnum}:${rootpart} " \ + "if load ${devtype} ${devnum}:${rootpart} " \ "${scriptaddr} ${prefix}${script}; then " \ "echo ${script} found! Executing ...;" \ "source ${scriptaddr};" \ @@ -106,11 +94,9 @@ \ "scan_boot=" \ "echo Scanning ${devtype} ${devnum}...; " \ - "for fs in ${boot_fstypes}; do " \ - "for prefix in ${boot_prefixes}; do " \ - "for script in ${boot_scripts}; do " \ - "run script_boot; " \ - "done; " \ + "for prefix in ${boot_prefixes}; do " \ + "for script in ${boot_scripts}; do " \ + "run script_boot; " \ "done; " \ "done;\0" \ \ @@ -120,11 +106,6 @@ BOOT_TARGETS_DHCP " " \ "\0" \ \ - "boot_fstypes=" \ - BOOT_FSTYPE_EXT2 " " \ - BOOT_FSTYPE_FAT " " \ - "\0" \ - \ "boot_prefixes=/ /boot/\0" \ \ "boot_scripts=boot.scr.uimg boot.scr\0" \ @@ -226,12 +207,24 @@ #ifdef CONFIG_EFI_PARTITION #undef CONFIG_EFI_PARTITION #endif +#ifdef CONFIG_CMD_FS_GENERIC +#undef CONFIG_CMD_FS_GENERIC +#endif +#ifdef CONFIG_CMD_EXT4 +#undef CONFIG_CMD_EXT4 +#endif #ifdef CONFIG_CMD_EXT2 #undef CONFIG_CMD_EXT2 #endif #ifdef CONFIG_CMD_FAT #undef CONFIG_CMD_FAT #endif +#ifdef CONFIG_FS_EXT4 +#undef CONFIG_FS_EXT4 +#endif +#ifdef CONFIG_FS_FAT +#undef CONFIG_FS_FAT +#endif /* remove USB */ #ifdef CONFIG_USB_EHCI diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index 165bc73..334d3a3 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -69,8 +69,11 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* Environment in SPI */ #define CONFIG_ENV_IS_IN_SPI_FLASH diff --git a/include/configs/ventana.h b/include/configs/ventana.h index 4c9b31c..b55ebc9 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -52,8 +52,11 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/whistler.h b/include/configs/whistler.h index 1c7803b..1e554d8 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -61,8 +61,11 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* * Environment in eMMC, at the end of 2nd "boot sector". Note: This assumes -- 1.7.0.4

2 2

[U-Boot] [PATCH 1/2] serial: Remove the "serial" console device
by Joe Hershberger 06 Nov '12

06 Nov '12

Each serial device is added as a console device. There was also the "serial" device that points to the most-recently-assigned-to-some- console-handle device. This can be confusing. Instead, only show the actual serial devices. Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> --- common/console.c | 37 +++++++++++++++++++------------------ common/stdio.c | 12 +----------- 2 files changed, 20 insertions(+), 29 deletions(-) diff --git a/common/console.c b/common/console.c index 1177f7d..9cc8197 100644 --- a/common/console.c +++ b/common/console.c @@ -26,6 +26,7 @@ #include <malloc.h> #include <stdio_dev.h> #include <exports.h> +#include <serial.h> DECLARE_GLOBAL_DATA_PTR; @@ -550,6 +551,7 @@ int console_assign(int file, const char *devname) { int flag; struct stdio_dev *dev; + const char *realdevname; /* Check for valid file */ switch (file) { @@ -565,8 +567,12 @@ int console_assign(int file, const char *devname) } /* Check for valid device name */ + if (strcmp(devname, "serial") == 0) + realdevname = default_serial_console()->name; + else + realdevname = devname; - dev = search_device(flag, devname); + dev = search_device(flag, realdevname); if (dev) return console_setfile(file, dev); @@ -657,13 +663,16 @@ int console_init_r(void) } /* if the devices are overwritten or not found, use default device */ if (inputdev == NULL) { - inputdev = search_device(DEV_FLAGS_INPUT, "serial"); + inputdev = search_device(DEV_FLAGS_INPUT, + default_serial_console()->name); } if (outputdev == NULL) { - outputdev = search_device(DEV_FLAGS_OUTPUT, "serial"); + outputdev = search_device(DEV_FLAGS_OUTPUT, + default_serial_console()->name); } if (errdev == NULL) { - errdev = search_device(DEV_FLAGS_OUTPUT, "serial"); + errdev = search_device(DEV_FLAGS_OUTPUT, + default_serial_console()->name); } /* Initializes output console first */ if (outputdev != NULL) { @@ -713,18 +722,10 @@ int console_init_r(void) struct list_head *pos; struct stdio_dev *dev; -#ifdef CONFIG_SPLASH_SCREEN - /* - * suppress all output if splash screen is enabled and we have - * a bmp to display. We redirect the output from frame buffer - * console to serial console in this case or suppress it if - * "silent" mode was requested. - */ - if (getenv("splashimage") != NULL) { - if (!(gd->flags & GD_FLG_SILENT)) - outputdev = search_device (DEV_FLAGS_OUTPUT, "serial"); - } -#endif + outputdev = search_device(DEV_FLAGS_OUTPUT, + default_serial_console()->name); + inputdev = search_device(DEV_FLAGS_INPUT, + default_serial_console()->name); /* Scan devices looking for input and output devices */ list_for_each(pos, list) { @@ -760,13 +761,13 @@ int console_init_r(void) gd->flags |= GD_FLG_DEVINIT; /* device initialization completed */ - stdio_print_current_devices(); - /* Setting environment variables */ for (i = 0; i < 3; i++) { setenv(stdio_names[i], stdio_devices[i]->name); } + stdio_print_current_devices(); + #if 0 /* If nothing usable installed, use only the initial console */ if ((stdio_devices[stdin] == NULL) && (stdio_devices[stdout] == NULL)) diff --git a/common/stdio.c b/common/stdio.c index 605ff3f..e9bdc0e 100644 --- a/common/stdio.c +++ b/common/stdio.c @@ -70,21 +70,11 @@ int nulldev_input(void) static void drv_system_init (void) { +#ifdef CONFIG_SYS_DEVICE_NULLDEV struct stdio_dev dev; memset (&dev, 0, sizeof (dev)); - strcpy (dev.name, "serial"); - dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM; - dev.putc = serial_putc; - dev.puts = serial_puts; - dev.getc = serial_getc; - dev.tstc = serial_tstc; - stdio_register (&dev); - -#ifdef CONFIG_SYS_DEVICE_NULLDEV - memset (&dev, 0, sizeof (dev)); - strcpy (dev.name, "nulldev"); dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM; dev.putc = nulldev_putc; -- 1.7.11.5

3 13

[U-Boot] [PATCH v2 1/2] tegra: Remove unnecessary CONFIG_SYS_NAND_BASE
by Simon Glass 06 Nov '12

06 Nov '12

Now that we are using the new CONFIG_SYS_NAND_SELF_INIT setup, we don't need CONFIG_SYS_NAND_BASE. Punt it. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: - Remove CONFIG_SYS_NAND_BASE from harmony.h also include/configs/harmony.h | 1 - include/configs/seaboard.h | 3 --- include/configs/tec.h | 1 - 3 files changed, 0 insertions(+), 5 deletions(-) diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 040bfe4..89f64c6 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -65,7 +65,6 @@ #define CONFIG_CMD_NAND #define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE /* Environment in NAND (which is 512M), aligned to start of last sector */ #define CONFIG_ENV_IS_IN_NAND diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 7680c77..3fca8d9 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -124,7 +124,4 @@ /* Max number of NAND devices */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 - -/* Somewhat oddly, the NAND base address must be a config option */ -#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE #endif /* __CONFIG_H */ diff --git a/include/configs/tec.h b/include/configs/tec.h index 140d2e6..200cf66 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -54,7 +54,6 @@ #define CONFIG_CMD_NAND #define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE /* Environment in NAND, aligned to start of last sector */ #define CONFIG_ENV_IS_IN_NAND -- 1.7.7.3

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