November 2012 - U-Boot

Re: [U-Boot] [PATCH] video: cfb_console: flush dcache for frame buffer in DRAM
by Eric Nelson 06 May '13

06 May '13

Hi Anatolij, I hate to come in late to the discussion, but while testing [1] with cache enabled, I started down the path of fixing up code paths within drivers/video/cfb_console.c that are followed by SABRE Lite as you did in [2]. [1] [PATCH V2 0/2] i.MX6: mx6qsabrelite: Add splash screen support http://lists.denx.de/pipermail/u-boot/2012-September/134241.html [2] [PATCH] video: cfb_console: flush dcache for frame buffer in DRAM http://lists.denx.de/pipermail/u-boot/2012-April/123333.html That code essentially looks like this: void video_drawchars(...) { ... switch (VIDEO_DATA_FORMAT) { case GDF__8BIT_INDEX: case GDF__8BIT_332RGB: case GDF_15BIT_555RGB: case GDF_16BIT_565RGB: ... cache not flushed in these cases case GDF_32BIT_X888RGB: ... cache is flushed here } SABRE Lite (ipu3) code happens to use the RGB565 frame buffer format, so it needs additional fixup. Continuing this pattern seems to be a mistake though. There are a lot of cases, with all sorts of different alignments (most of which won't sync with cache line boundaries) and it seems that there's little to no benefit in the fine granularity. It seems that by the time we fix up all of the individual spots where we're writing to a line in the frame buffer, the cache can never get dirty in the first place. It seems much more sensible to simply use flush_dcache_range() on the entire frame buffer in each of the public calls and let the MMU figure out what needs flushing. Is there something I'm missing? My other immediate thought was that we should really place the frame buffer in un-cacheable memory, but then we really will be doing more memory accesses. Please advise, Eric

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[U-Boot] [PATCH v2] mmc: Split device init to decouple OCR-polling delay
by Simon Glass 29 Apr '13

29 Apr '13

From: Che-Liang Chiou <clchiou(a)chromium.org> Most of time that MMC driver spends on initializing a device is polling OCR (operation conditions register). To decouple this polling loop, device init is split into two parts: The first part fires the OCR query command, and the second part polls the result. So the caller is now no longer bound to the OCR-polling delay; he may fire the query, go somewhere and then come back later for the result. To use this, call mmc_set_preinit() on any device which needs this. This can save significant amounts of time on boot (e.g. 200ms) by hiding the MMC init time behind other init. Signed-off-by: Che-Liang Chiou <clchiou(a)chromium.org> Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: - Rebase to master drivers/mmc/mmc.c | 137 ++++++++++++++++++++++++++++++++++++++++------------ include/mmc.h | 30 ++++++++++++ 2 files changed, 135 insertions(+), 32 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 72e8ce6..09695e8 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -503,48 +503,70 @@ static int sd_send_op_cond(struct mmc *mmc) return 0; } -static int mmc_send_op_cond(struct mmc *mmc) +/* We pass in the cmd since otherwise the init seems to fail */ +static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd, + int use_arg) { - int timeout = 10000; - struct mmc_cmd cmd; int err; + cmd->cmdidx = MMC_CMD_SEND_OP_COND; + cmd->resp_type = MMC_RSP_R3; + cmd->cmdarg = 0; + if (use_arg && !mmc_host_is_spi(mmc)) { + cmd->cmdarg = + (mmc->voltages & + (mmc->op_cond_response & OCR_VOLTAGE_MASK)) | + (mmc->op_cond_response & OCR_ACCESS_MODE); + + if (mmc->host_caps & MMC_MODE_HC) + cmd->cmdarg |= OCR_HCS; + } + err = mmc_send_cmd(mmc, cmd, NULL); + if (err) + return err; + mmc->op_cond_response = cmd->response[0]; + return 0; +} + +int mmc_send_op_cond(struct mmc *mmc) +{ + struct mmc_cmd cmd; + int err, i; + /* Some cards seem to need this */ mmc_go_idle(mmc); /* Asking to the card its capabilities */ - cmd.cmdidx = MMC_CMD_SEND_OP_COND; - cmd.resp_type = MMC_RSP_R3; - cmd.cmdarg = 0; - - err = mmc_send_cmd(mmc, &cmd, NULL); + mmc->op_cond_pending = 1; + for (i = 0; i < 2; i++) { + err = mmc_send_op_cond_iter(mmc, &cmd, i != 0); + if (err) + return err; - if (err) - return err; + /* exit if not busy (flag seems to be inverted) */ + if (mmc->op_cond_response & OCR_BUSY) + return 0; + } + return IN_PROGRESS; +} - udelay(1000); +int mmc_complete_op_cond(struct mmc *mmc) +{ + struct mmc_cmd cmd; + int timeout = 1000; + uint start; + int err; + mmc->op_cond_pending = 0; + start = get_timer(0); do { - cmd.cmdidx = MMC_CMD_SEND_OP_COND; - cmd.resp_type = MMC_RSP_R3; - cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 : - (mmc->voltages & - (cmd.response[0] & OCR_VOLTAGE_MASK)) | - (cmd.response[0] & OCR_ACCESS_MODE)); - - if (mmc->host_caps & MMC_MODE_HC) - cmd.cmdarg |= OCR_HCS; - - err = mmc_send_cmd(mmc, &cmd, NULL); - + err = mmc_send_op_cond_iter(mmc, &cmd, 1); if (err) return err; - - udelay(1000); - } while (!(cmd.response[0] & OCR_BUSY) && timeout--); - - if (timeout <= 0) - return UNUSABLE_ERR; + if (get_timer(start) > timeout) + return UNUSABLE_ERR; + udelay(100); + } while (!(mmc->op_cond_response & OCR_BUSY)); if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ cmd.cmdidx = MMC_CMD_SPI_READ_OCR; @@ -1227,7 +1249,7 @@ block_dev_desc_t *mmc_get_dev(int dev) } #endif -int mmc_init(struct mmc *mmc) +int mmc_start_init(struct mmc *mmc) { int err; @@ -1267,17 +1289,48 @@ int mmc_init(struct mmc *mmc) if (err == TIMEOUT) { err = mmc_send_op_cond(mmc); - if (err) { + if (err && err != IN_PROGRESS) { printf("Card did not respond to voltage select!\n"); return UNUSABLE_ERR; } } - err = mmc_startup(mmc); + if (err == IN_PROGRESS) + mmc->init_in_progress = 1; + + return err; +} + +static int mmc_complete_init(struct mmc *mmc) +{ + int err = 0; + + if (mmc->op_cond_pending) + err = mmc_complete_op_cond(mmc); + + if (!err) + err = mmc_startup(mmc); if (err) mmc->has_init = 0; else mmc->has_init = 1; + mmc->init_in_progress = 0; + return err; +} + +int mmc_init(struct mmc *mmc) +{ + int err = IN_PROGRESS; + unsigned start = get_timer(0); + + if (mmc->has_init) + return 0; + if (!mmc->init_in_progress) + err = mmc_start_init(mmc); + + if (!err || err == IN_PROGRESS) + err = mmc_complete_init(mmc); + debug("%s: %d, time %lu\n", __func__, err, get_timer(start)); return err; } @@ -1315,6 +1368,25 @@ int get_mmc_num(void) return cur_dev_num; } +void mmc_set_preinit(struct mmc *mmc, int preinit) +{ + mmc->preinit = preinit; +} + +static void do_preinit(void) +{ + struct mmc *m; + struct list_head *entry; + + list_for_each(entry, &mmc_devices) { + m = list_entry(entry, struct mmc, link); + + if (m->preinit) + mmc_start_init(m); + } +} + + int mmc_initialize(bd_t *bis) { INIT_LIST_HEAD (&mmc_devices); @@ -1325,5 +1397,6 @@ int mmc_initialize(bd_t *bis) print_mmc_devices(','); + do_preinit(); return 0; } diff --git a/include/mmc.h b/include/mmc.h index a13e2bd..445d714 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -62,6 +62,7 @@ #define UNUSABLE_ERR -17 /* Unusable Card */ #define COMM_ERR -18 /* Communications Error */ #define TIMEOUT -19 +#define IN_PROGRESS -20 /* operation is in progress */ #define MMC_CMD_GO_IDLE_STATE 0 #define MMC_CMD_SEND_OP_COND 1 @@ -260,6 +261,10 @@ struct mmc { int (*init)(struct mmc *mmc); int (*getcd)(struct mmc *mmc); uint b_max; + char op_cond_pending; /* 1 if we are waiting on an op_cond command */ + char init_in_progress; /* 1 if we have done mmc_start_init() */ + char preinit; /* start init as early as possible */ + uint op_cond_response; /* the response byte from the last op_cond */ }; int mmc_register(struct mmc *mmc); @@ -276,6 +281,31 @@ int mmc_switch_part(int dev_num, unsigned int part_num); int mmc_getcd(struct mmc *mmc); void spl_mmc_load(void) __noreturn; +/** + * Start device initialization and return immediately; it does not block on + * polling OCR (operation condition register) status. Then you should call + * mmc_init, which would block on polling OCR status and complete the device + * initializatin. + * + * @param mmc Pointer to a MMC device struct + * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error. + */ +int mmc_start_init(struct mmc *mmc); + +/** + * Set preinit flag of mmc device. + * + * This will cause the device to be pre-inited during mmc_initialize(), + * which may save boot time if the device is not accessed until later. + * Some eMMC devices take 200-300ms to init, but unfortunately they + * must be sent a series of commands to even get them to start preparing + * for operation. + * + * @param mmc Pointer to a MMC device struct + * @param preinit preinit flag value + */ +void mmc_set_preinit(struct mmc *mmc, int preinit); + #ifdef CONFIG_GENERIC_MMC #define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI) struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); -- 1.7.7.3

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[U-Boot] [PATCH] printenv show garbage on out-of-memory conditions
by Maxime Larocque 17 Apr '13

17 Apr '13

Hello, In common/cmd_nvedit.c, en env_print(), the wrong type is used for len. hexport_r() returns -1 on error (like OOM), which is converted to 0xffffffff when put in an unsigned. Said value is obviously bigger then 0, and as a result an uninitialized string is then displayed. Other usages of hexport_r() in the code correctly uses ssize_t to keep its return value. Does not seem to be critical, but it is misleading when debugging a OOM error... I have added a printf to display something in case of error; I'll leave it to the committer to keep it or remove it. Found in U-Boot 2011.12, but still present in current git. Maxime Larocque Signed-off-by: Maxime Larocque <maxmtl2002(a)yahoo.ca> --- common/cmd_nvedit.c +++ common/cmd_nvedit.c @@ -110,7 +110,7 @@ static int env_print(char *name) { char *res = NULL; - size_t len; + ssize_t len; if (name) { /* print a single name */ ENTRY e, *ep; @@ -132,6 +132,9 @@ free(res); return len; } + else { + printf("## Error: cannot export environment\n"); + } /* should never happen */ return 0;

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[U-Boot] [RFC/PATCH 0/4] BCH8 support for OMAP3
by Andreas Bießmann 08 Apr '13

08 Apr '13

This RFC series implements BCH8 for OMAP3 as provided by linux kernel in commit 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c. This series is heavily influenced by Ilyas series 'NAND support for AM33XX' thus could share some code. I have managed to load kernel from an ubifs written by the kernel driver, but is far away from tested thoroughly. Cause my NAND device 'NAND device: Manufacturer ID: 0x2c, Chip ID: 0xbc (Micron NAND 512MiB 1,8V 16-bit)' does support 1bit ECC for first sector if erase is less than 1000, the rest requires 4bit ECC. Therefore the SPL needs to support BCH, the impact is about 9k for the SPL. Andreas Bießmann (4): omap3/cpu.h: add BCH support omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernel omap_gpmc: add support for hw assisted BCH8 tricorder: enable hw assisted BCH8 in SPL and u-boot arch/arm/cpu/armv7/omap3/board.c | 8 +- arch/arm/include/asm/arch-omap3/cpu.h | 6 + arch/arm/include/asm/arch-omap3/omap_gpmc.h | 12 ++ drivers/mtd/nand/omap_gpmc.c | 216 ++++++++++++++++++++++++++- include/configs/tricorder.h | 10 +- lib/Makefile | 3 +- 6 files changed, 248 insertions(+), 7 deletions(-) -- 1.7.10.4

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[U-Boot] [PATCH] Add U_BOOT_TIMESTAMP definition
by Matt Sealey 05 Apr '13

05 Apr '13

This gives us a string like "20120822150855" which encodes the build time. This allows automated version checking and flashing of U-Boot to be performed, for example, in boot.scr files (or scripting in general). Signed-off-by: Matt Sealey <matt(a)genesi-usa.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index 1df4c1d..c042206 100644 --- a/Makefile +++ b/Makefile @@ -664,6 +664,7 @@ $(TIMESTAMP_FILE): @mkdir -p $(dir $(TIMESTAMP_FILE)) @LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"' > $@.tmp @LC_ALL=C date +'#define U_BOOT_TIME "%T"' >> $@.tmp + @LC_ALL=C date +'#define U_BOOT_TIMESTAMP "%Y%m%d%H%M%S"' >> $@.tmp @cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@ easylogo env gdb: -- 1.7.9.5

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[U-Boot] [PATCH 0/2] ANSI terminal Bootmenu
by Pali Rohár 29 Mar '13

29 Mar '13

This patch series adds ANSI terminal Bootmenu command. It use generic menu code for creating menu structures, but use own functions for drawing menu on ANSI terminal. First patch modify generic menu code for using other functions for printing and choosing menu entry, second patch is bootmenu command itself. Pali Rohár (2): menu: Added support to use user defined functions New command bootmenu: ANSI terminal Boot Menu support board/ait/cam_enc_4xx/cam_enc_4xx.c | 5 +- common/Makefile | 1 + common/cmd_bootmenu.c | 446 +++++++++++++++++++++++++++++++++++ common/cmd_pxe.c | 3 +- common/menu.c | 43 ++-- doc/README.bootmenu | 61 +++++ include/common.h | 20 ++ include/config_cmd_all.h | 1 + include/menu.h | 6 +- 9 files changed, 566 insertions(+), 20 deletions(-) create mode 100644 common/cmd_bootmenu.c create mode 100644 doc/README.bootmenu -- 1.7.9.5

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[U-Boot] [PATCH] EXYNOS5: Add L2 Cache Support.
by Rajeshwari Shinde 27 Mar '13

27 Mar '13

This patch set adds L2 Cache Support to EXYNOS. Signed-off-by: Arun Mankuzhi <arun.m(a)samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s(a)samsung.com> --- arch/arm/cpu/armv7/exynos/soc.c | 37 +++++++++++++++++++++++++++++++++++++ 1 files changed, 37 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/soc.c b/arch/arm/cpu/armv7/exynos/soc.c index ab65b8d..676a388 100644 --- a/arch/arm/cpu/armv7/exynos/soc.c +++ b/arch/arm/cpu/armv7/exynos/soc.c @@ -23,6 +23,14 @@ #include <common.h> #include <asm/io.h> +#include <asm/system.h> + +enum l2_cache_params { + CACHE_TAG_RAM_SETUP = (1<<9), + CACHE_DATA_RAM_SETUP = (1<<5), + CACHE_TAG_RAM_LATENCY = (2<<6), + CACHE_DATA_RAM_LATENCY = (2<<0) +}; void reset_cpu(ulong addr) { @@ -36,3 +44,32 @@ void enable_caches(void) dcache_enable(); } #endif + +#ifndef CONFIG_SYS_L2CACHE_OFF +/* + * Set L2 cache parameters + */ +static void exynos5_set_l2cache_params(void) +{ + unsigned int val = 0; + + asm volatile("mrc p15, 1, %0, c9, c0, 2\n" : "=r"(val)); + + val |= CACHE_TAG_RAM_SETUP | + CACHE_DATA_RAM_SETUP | + CACHE_TAG_RAM_LATENCY | + CACHE_DATA_RAM_LATENCY; + + asm volatile("mcr p15, 1, %0, c9, c0, 2\n" : : "r"(val)); +} + +/* + * Sets L2 cache related parameters before enabling data cache + */ +void v7_outer_cache_enable(void) +{ + if (cpu_is_exynos5()) + exynos5_set_l2cache_params(); +} +#endif + -- 1.7.4.4

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[U-Boot] [PATCH v0 0/4] env: reworking + default/import individual vars
by Gerlando Falauto 24 Mar '13

24 Mar '13

This is a resubmission (after removing remove checkpatch errors) of http://lists.denx.de/pipermail/u-boot/2011-September/102875.html Here I am proposing a set of changes in the behaviour of the environment import/set_to_default functions. PATCH 1: Add a "new" himport_ex() function (reworking of himport_r which is now a wrapper around it), which has 3 new arguments: "nvars", "vars":, number and list of variables to take into account (0 means ALL) "apply" callback function which is in charge of checking whether a variable can be overwritten, and possibly immediately apply the changes. This parameter would be either set to NULL (in which case nothing should change wrt to the past -- i.e. environment is blindly imported) or to "env_check_apply()" function, whose code was taken away from _do_env_set(). This would be useful, for instance, for "baudrate" or "stdin,stderr,stdout", whose changes would not otherwise be effective until the next reboot. The idea is that there should be a single place where all the checks are to be performed. So the same function env_check_apply() is called from _do_env_set() as well (thus keeping the previous behavior). PATCH 2: Add the same behaviour when deleting variables. Not quite sure whether this makes sense or not. PATCH 3: Add the code for setting individual variables to default PATCH 4: Impolement importing of individual variables (also taking into account "-f" for forcing). Gerlando Falauto (4): Groundwork for generalization of env interface env: check and apply changes on delete/destroy env: implement selective "env default" env: implement "env import -n var[,var...]" README | 2 + common/cmd_nvedit.c | 231 ++++++++++++++++++++++++++++++++-------------- common/env_common.c | 29 ++++++- include/config_cmd_all.h | 1 + include/environment.h | 12 +++ include/search.h | 19 ++++- lib/hashtable.c | 68 ++++++++++++- 7 files changed, 284 insertions(+), 78 deletions(-)

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[U-Boot] [PATCH 0/5] Make iim support common to mpc and imx
by Benoît Thébaudeau 18 Mar '13

18 Mar '13

Hi all, The subject says everything. ;) Best regards, Benoît

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[U-Boot] Add new NAND flash
by Matthias Weißer 05 Mar '13

05 Mar '13

Hi I would like to add a new NAND flash type to u-boot and have some problems with it. The type is MT29F16G08CBABA – Page size x8: 4320 bytes (4096 + 224 bytes) – Block size: 256 pages (1024K + 56K bytes) – Plane size: 2 planes x 1024 blocks per plane – Device size: 16Gb: 2048 blocks The NAND subsystem is configured as follows #define CONFIG_NAND_MXC #define CONFIG_NAND_MXC_V1_1 #define CONFIG_MXC_NAND_REGS_BASE (0xBB000000) #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE (0xBB000000) #define CONFIG_MXC_NAND_HWECC #define CONFIG_SYS_NAND_LARGEPAGE The NAND is connected (8 bit wide) to an iMX25 which is booting from NOR. So the NAND is only a mass storage device. I am able to read the ID of the chip. 2Ch 48h 04h 46h 85h I then added the following entry to the nand_flash_ids[] table {"NAND 2GiB 3,3V 8-bit", 0x48, 0, 2048, 0, LP_OPTIONS}, Before getting to the u-boot prompt I get the following message: NAND: NAND device: Manufacturer ID: 0x2c, Chip ID: 0x48 (Micron NAND 2GiB 3,3V 8-bit) NAND bus width 8 instead 16 bit This is caused by bit 6 in id byte 4 which tells that the device is 16 bit wide organized and the iMX specific part of the NAND system which tells the generic system that the device is connected via a 8 bit bus which is obviously correct as the flash chip only has 8 data lines. Is there anything I am doing wrong here? Thanks, Matthias

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