August 2011 - U-Boot

[U-Boot] [PATCH] AT91: Small fix on AT91 USART initialization code
by Hong Xu 01 Aug '11

01 Aug '11

Before reset dbgu transmitter, we just wait TXEMPTY to drain the transmitter register. If not doing this, we may sometimes see several weird characters from DBGU. A short delay is also added to make sure the new serial settings are settled. Signed-off-by: Hong Xu <hong.xu(a)atmel.com> --- drivers/serial/atmel_usart.c | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c index e326b2b..0d5d254 100644 --- a/drivers/serial/atmel_usart.c +++ b/drivers/serial/atmel_usart.c @@ -49,17 +49,23 @@ int serial_init(void) { atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; + /* Just in case: drain transmitter register */ + while (!(readl(&usart->csr) & USART3_BIT(TXEMPTY))) + ; + writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr); serial_setbrg(); - writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr); writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL) | USART3_BF(USCLKS, USART3_USCLKS_MCK) | USART3_BF(CHRL, USART3_CHRL_8) | USART3_BF(PAR, USART3_PAR_NONE) | USART3_BF(NBSTOP, USART3_NBSTOP_1)), &usart->mr); + writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr); + /* __udelay(100) is enough for the new settings to be settled */ + __udelay(100); return 0; } -- 1.7.3.3

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[U-Boot] Build failure for ARM devices
by Hiremath, Vaibhav 01 Aug '11

01 Aug '11

Hi, Today when I have rebased all my patches to latest denx/master, I have observed that the following commit has broken the build for ARM family of devices (in my case it's OMAP3). I have patch fixing this issue, which I will submit shortly. Commit - =================== commit 84b5e8022ef62b68df360392a55c4fc2f2e568d7 Author: Wolfgang Denk <wd(a)denx.de> Date: Fri Jul 29 14:42:18 2011 +0200 Constify getenv(), setenv() and hash code functions This is needed to get rid of build warnings like main.c:311: warning: passing argument 2 of 'setenv' discards qualifiers from pointer target type which result from commit 09c2e90 "unify version_string". Signed-off-by: Wolfgang Denk <wd(a)denx.de> Cc: Andreas Bie<DF>mann <andreas.devel(a)googlemail.com> Error log - ================= arm-none-linux-gnueabi-gcc -DDO_DEPS_ONLY \ -g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x80008000 -I/db/psp_git/users/a0393758/omap-uboot-denx/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/codesourcery/2010q1-202/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mabi=aapcs-linux -mno-thumb-interwork -march=armv5 -Wall -Wstrict-prototypes -fno-stack-protector -Wno-format-nonliteral -Wno-format-security \ -o lib/asm-offsets.s lib/asm-offsets.c -c -S In file included from /db/psp_git/users/a0393758/omap-uboot-denx/include/common.h:276, from lib/asm-offsets.c:18: /db/psp_git/users/a0393758/omap-uboot-denx/include/asm/u-boot-arm.h:66: error: conflicting types for 'setenv' /db/psp_git/users/a0393758/omap-uboot-denx/include/common.h:271: note: previous declaration of 'setenv' was here make: *** [lib/asm-offsets.s] Error 1 Thanks, Vaibhav

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[U-Boot] [PATCH] arm: fix build break
by Aneesh V 01 Aug '11

01 Aug '11

commit 84b5e8022ef62b68df360392a55c4fc2f2e568d7: "Constify getenv(), setenv() and hash code functions" creates build break for arm. Fix this by removing redundant prototype of setenv() function. Signed-off-by: Aneesh V <aneesh(a)ti.com> --- MAKEALL not done yet. Shall do this overnight for all arm boards and update the results. --- arch/arm/include/asm/u-boot-arm.h | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h index 3904027..f8690c6 100644 --- a/arch/arm/include/asm/u-boot-arm.h +++ b/arch/arm/include/asm/u-boot-arm.h @@ -62,9 +62,6 @@ void setup_revision_tag (struct tag **params); /* the U-Boot implementation */ /* To be fixed! */ /* ------------------------------------------------------------ */ -/* common/cmd_nvedit.c */ -int setenv (char *, char *); - /* cpu/.../interrupt.c */ int arch_interrupt_init (void); void reset_timer_masked (void); -- 1.7.0.4

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[U-Boot] [PATCH] da850: add NOR boot mode support
by nagabhushana.netagunte＠ti.com 01 Aug '11

01 Aug '11

From: Nagabhushana Netagunte <nagabhushana.netagunte(a)ti.com> Add an option to use NOR boot mode in configuration file and correspanding pin-mux support in board file. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj(a)ti.com> Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte(a)ti.com> --- board/davinci/da8xxevm/da850evm.c | 50 +++++++++++++++++++++++++++++++++++++ include/configs/da850evm.h | 21 ++++++++++++++- 2 files changed, 70 insertions(+), 1 deletions(-) diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 73eaa48..a77e438 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -105,6 +105,54 @@ const struct pinmux_config nand_pins[] = { { pinmux(12), 1, 5 }, { pinmux(12), 1, 6 } }; +#elif defined(CONFIG_SYS_USE_NOR) +const struct pinmux_config nor_pins[] = { + { pinmux(5), 1, 6 }, + { pinmux(6), 1, 6 }, + { pinmux(7), 1, 0 }, + { pinmux(7), 1, 4 }, + { pinmux(7), 1, 5 }, + { pinmux(8), 1, 0 }, + { pinmux(8), 1, 1 }, + { pinmux(8), 1, 2 }, + { pinmux(8), 1, 3 }, + { pinmux(8), 1, 4 }, + { pinmux(8), 1, 5 }, + { pinmux(8), 1, 6 }, + { pinmux(8), 1, 7 }, + { pinmux(9), 1, 0 }, + { pinmux(9), 1, 1 }, + { pinmux(9), 1, 2 }, + { pinmux(9), 1, 3 }, + { pinmux(9), 1, 4 }, + { pinmux(9), 1, 5 }, + { pinmux(9), 1, 6 }, + { pinmux(9), 1, 7 }, + { pinmux(10), 1, 0 }, + { pinmux(10), 1, 1 }, + { pinmux(10), 1, 2 }, + { pinmux(10), 1, 3 }, + { pinmux(10), 1, 4 }, + { pinmux(10), 1, 5 }, + { pinmux(10), 1, 6 }, + { pinmux(10), 1, 7 }, + { pinmux(11), 1, 0 }, + { pinmux(11), 1, 1 }, + { pinmux(11), 1, 2 }, + { pinmux(11), 1, 3 }, + { pinmux(11), 1, 4 }, + { pinmux(11), 1, 5 }, + { pinmux(11), 1, 6 }, + { pinmux(11), 1, 7 }, + { pinmux(12), 1, 0 }, + { pinmux(12), 1, 1 }, + { pinmux(12), 1, 2 }, + { pinmux(12), 1, 3 }, + { pinmux(12), 1, 4 }, + { pinmux(12), 1, 5 }, + { pinmux(12), 1, 6 }, + { pinmux(12), 1, 7 } +}; #endif #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII @@ -122,6 +170,8 @@ static const struct pinmux_resource pinmuxes[] = { PINMUX_ITEM(i2c_pins), #ifdef CONFIG_NAND_DAVINCI PINMUX_ITEM(nand_pins), +#elif defined(CONFIG_USE_NOR) + PINMUX_ITEM(nor_pins), #endif }; diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index fdcc6e3..f0015e4 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -28,6 +28,8 @@ */ #define CONFIG_DRIVER_TI_EMAC #define CONFIG_USE_SPIFLASH +#undef CONFIG_USE_NAND +#undef CONFIG_SYS_USE_NOR /* * SoC Configuration @@ -129,6 +131,23 @@ #define CONFIG_NET_MULTI #endif +#ifdef CONFIG_SYS_USE_NOR +#define CONFIG_ENV_IS_IN_FLASH +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ +#define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ +#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE +#define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */ +#define CONFIG_SYS_MAX_FLASH_SECT ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)\ + + 3) +#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ +#endif + #ifdef CONFIG_USE_SPIFLASH #undef CONFIG_ENV_IS_IN_FLASH #undef CONFIG_ENV_IS_IN_NAND @@ -212,7 +231,7 @@ #endif #if !defined(CONFIG_USE_NAND) && \ - !defined(CONFIG_USE_NOR) && \ + !defined(CONFIG_SYS_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH) #define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH -- 1.6.2.4

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[U-Boot] PLEASE REPLY, ITS A BUSINESS PROPOSAL
by Weixin.Zheng.15＠Dartmouth.edu 01 Aug '11

01 Aug '11

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by bmw＠info.com 01 Aug '11

01 Aug '11

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1 0

[U-Boot] [PATCH 1/2 V3] AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/master
by Hong Xu 01 Aug '11

01 Aug '11

Rework for AT91SAM9RL SoC, makes it build again. Based on the work for AT91SAM9260-EK. Signed-off-by: Hong Xu <hong.xu(a)atmel.com> --- Changes since V2 - No at91_serial_hw_init, no CONFIG_USARTx anymore. - Removed SZ_* macros - though I don't have the reason found in code :) - Add definitions for all ATMEL_BASE_CSx Thanks! arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c | 45 ++---- arch/arm/include/asm/arch-at91/at91sam9rl.h | 177 ++++++++++---------- arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h | 121 +++++--------- 3 files changed, 141 insertions(+), 202 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c index 4f570f4..c2a6584 100644 --- a/arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c @@ -23,77 +23,58 @@ */ #include <common.h> +#include <asm/io.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/gpio.h> -#include <asm/arch/io.h> void at91_serial0_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* TXD0 */ at91_set_a_periph(AT91_PIO_PORTA, 7, 0); /* RXD0 */ - writel(1 << AT91SAM9RL_ID_US0, &pmc->pcer); + writel(1 << ATMEL_ID_US0, &pmc->pcer); } void at91_serial1_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* TXD1 */ at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* RXD1 */ - writel(1 << AT91SAM9RL_ID_US1, &pmc->pcer); + writel(1 << ATMEL_ID_US1, &pmc->pcer); } void at91_serial2_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* TXD2 */ at91_set_a_periph(AT91_PIO_PORTA, 14, 0); /* RXD2 */ - writel(1 << AT91SAM9RL_ID_US2, &pmc->pcer); + writel(1 << ATMEL_ID_US2, &pmc->pcer); } -void at91_serial3_hw_init(void) +void at91_seriald_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTA, 21, 0); /* DRXD */ at91_set_a_periph(AT91_PIO_PORTA, 22, 1); /* DTXD */ - writel(1 << AT91_ID_SYS, &pmc->pcer); + writel(1 << ATMEL_ID_SYS, &pmc->pcer); } -void at91_serial_hw_init(void) -{ -#ifdef CONFIG_USART0 - at91_serial0_hw_init(); -#endif - -#ifdef CONFIG_USART1 - at91_serial1_hw_init(); -#endif - -#ifdef CONFIG_USART2 - at91_serial2_hw_init(); -#endif - -#ifdef CONFIG_USART3 /* DBGU */ - at91_serial3_hw_init(); -#endif -} - -#ifdef CONFIG_HAS_DATAFLASH +#ifdef CONFIG_HAS_DATAFLASH || defined(CONFIG_ATMEL_SPI) void at91_spi0_hw_init(unsigned long cs_mask) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTA, 25, 0); /* SPI0_MISO */ at91_set_a_periph(AT91_PIO_PORTA, 26, 0); /* SPI0_MOSI */ at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* SPI0_SPCK */ /* Enable clock */ - writel(1 << AT91SAM9RL_ID_SPI, &pmc->pcer); + writel(1 << ATMEL_ID_SPI, &pmc->pcer); if (cs_mask & (1 << 0)) { at91_set_a_periph(AT91_PIO_PORTA, 28, 1); diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h b/arch/arm/include/asm/arch-at91/at91sam9rl.h index 8eb0d4f..dfaafee 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9rl.h +++ b/arch/arm/include/asm/arch-at91/at91sam9rl.h @@ -14,117 +14,110 @@ #ifndef AT91SAM9RL_H #define AT91SAM9RL_H +#define CONFIG_ARM926EJS /* ARM926EJS Core */ +#define CONFIG_AT91FAMILY /* it's a member of AT91 */ /* * Peripheral identifiers/interrupts. */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Controller */ -#define AT91SAM9RL_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9RL_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9RL_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT91SAM9RL_ID_PIOD 5 /* Parallel IO Controller D */ -#define AT91SAM9RL_ID_US0 6 /* USART 0 */ -#define AT91SAM9RL_ID_US1 7 /* USART 1 */ -#define AT91SAM9RL_ID_US2 8 /* USART 2 */ -#define AT91SAM9RL_ID_US3 9 /* USART 3 */ -#define AT91SAM9RL_ID_MCI 10 /* Multimedia Card Interface */ -#define AT91SAM9RL_ID_TWI0 11 /* TWI 0 */ -#define AT91SAM9RL_ID_TWI1 12 /* TWI 1 */ -#define AT91SAM9RL_ID_SPI 13 /* Serial Peripheral Interface */ -#define AT91SAM9RL_ID_SSC0 14 /* Serial Synchronous Controller 0 */ -#define AT91SAM9RL_ID_SSC1 15 /* Serial Synchronous Controller 1 */ -#define AT91SAM9RL_ID_TC0 16 /* Timer Counter 0 */ -#define AT91SAM9RL_ID_TC1 17 /* Timer Counter 1 */ -#define AT91SAM9RL_ID_TC2 18 /* Timer Counter 2 */ -#define AT91SAM9RL_ID_PWMC 19 /* Pulse Width Modulation Controller */ -#define AT91SAM9RL_ID_TSC 20 /* Touch Screen Controller */ -#define AT91SAM9RL_ID_DMA 21 /* DMA Controller */ -#define AT91SAM9RL_ID_UDPHS 22 /* USB Device HS */ -#define AT91SAM9RL_ID_LCDC 23 /* LCD Controller */ -#define AT91SAM9RL_ID_AC97C 24 /* AC97 Controller */ -#define AT91SAM9RL_ID_IRQ0 31 /* Advanced Interrupt Controller (IRQ0) */ - -#define AT91_SDRAMC_BASE 0xffffea00 -#define AT91_SMC_BASE 0xffffec00 -#define AT91_MATRIX_BASE 0xffffee00 -#define AT91_PIO_BASE 0xfffff400 -#define AT91_PMC_BASE 0xfffffc00 -#define AT91_RSTC_BASE 0xfffffd00 -#define AT91_PIT_BASE 0xfffffd30 -#define AT91_WDT_BASE 0xfffffd40 - -#ifdef CONFIG_AT91_LEGACY +#define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define ATMEL_ID_SYS 1 /* System Controller */ +#define ATMEL_ID_PIOA 2 /* Parallel IO Controller A */ +#define ATMEL_ID_PIOB 3 /* Parallel IO Controller B */ +#define ATMEL_ID_PIOC 4 /* Parallel IO Controller C */ +#define ATMEL_ID_PIOD 5 /* Parallel IO Controller D */ +#define ATMEL_ID_US0 6 /* USART 0 */ +#define ATMEL_ID_US1 7 /* USART 1 */ +#define ATMEL_ID_US2 8 /* USART 2 */ +#define ATMEL_ID_US3 9 /* USART 3 */ +#define ATMEL_ID_MCI 10 /* Multimedia Card Interface */ +#define ATMEL_ID_TWI0 11 /* TWI 0 */ +#define ATMEL_ID_TWI1 12 /* TWI 1 */ +#define ATMEL_ID_SPI 13 /* Serial Peripheral Interface */ +#define ATMEL_ID_SSC0 14 /* Serial Synchronous Controller 0 */ +#define ATMEL_ID_SSC1 15 /* Serial Synchronous Controller 1 */ +#define ATMEL_ID_TC0 16 /* Timer Counter 0 */ +#define ATMEL_ID_TC1 17 /* Timer Counter 1 */ +#define ATMEL_ID_TC2 18 /* Timer Counter 2 */ +#define ATMEL_ID_PWMC 19 /* Pulse Width Modulation Controller */ +#define ATMEL_ID_TSC 20 /* Touch Screen Controller */ +#define ATMEL_ID_DMA 21 /* DMA Controller */ +#define ATMEL_ID_UDPHS 22 /* USB Device HS */ +#define ATMEL_ID_LCDC 23 /* LCD Controller */ +#define ATMEL_ID_AC97C 24 /* AC97 Controller */ +#define ATMEL_ID_IRQ0 31 /* Advanced Interrupt Controller (IRQ0) */ /* * User Peripheral physical base addresses. */ -#define AT91SAM9RL_BASE_TCB0 0xfffa0000 -#define AT91SAM9RL_BASE_TC0 0xfffa0000 -#define AT91SAM9RL_BASE_TC1 0xfffa0040 -#define AT91SAM9RL_BASE_TC2 0xfffa0080 -#define AT91SAM9RL_BASE_MCI 0xfffa4000 -#define AT91SAM9RL_BASE_TWI0 0xfffa8000 -#define AT91SAM9RL_BASE_TWI1 0xfffac000 -#define AT91SAM9RL_BASE_US0 0xfffb0000 -#define AT91SAM9RL_BASE_US1 0xfffb4000 -#define AT91SAM9RL_BASE_US2 0xfffb8000 -#define AT91SAM9RL_BASE_US3 0xfffbc000 -#define AT91SAM9RL_BASE_SSC0 0xfffc0000 -#define AT91SAM9RL_BASE_SSC1 0xfffc4000 -#define AT91SAM9RL_BASE_PWMC 0xfffc8000 -#define AT91SAM9RL_BASE_SPI 0xfffcc000 -#define AT91SAM9RL_BASE_TSC 0xfffd0000 -#define AT91SAM9RL_BASE_UDPHS 0xfffd4000 -#define AT91SAM9RL_BASE_AC97C 0xfffd8000 -#define AT91_BASE_SYS 0xffffc000 +#define ATMEL_BASE_TCB0 0xfffa0000 +#define ATMEL_BASE_TC0 0xfffa0000 +#define ATMEL_BASE_TC1 0xfffa0040 +#define ATMEL_BASE_TC2 0xfffa0080 +#define ATMEL_BASE_MCI 0xfffa4000 +#define ATMEL_BASE_TWI0 0xfffa8000 +#define ATMEL_BASE_TWI1 0xfffac000 +#define ATMEL_BASE_US0 0xfffb0000 +#define ATMEL_BASE_US1 0xfffb4000 +#define ATMEL_BASE_US2 0xfffb8000 +#define ATMEL_BASE_US3 0xfffbc000 +#define ATMEL_BASE_SSC0 0xfffc0000 +#define ATMEL_BASE_SSC1 0xfffc4000 +#define ATMEL_BASE_PWMC 0xfffc8000 +#define ATMEL_BASE_SPI 0xfffcc000 +#define ATMEL_BASE_SPI0 0xfffcc000 +#define ATMEL_BASE_TSC 0xfffd0000 +#define ATMEL_BASE_UDPHS 0xfffd4000 +#define ATMEL_BASE_AC97C 0xfffd8000 +#define ATMEL_BASE_SYS 0xffffc000 /* - * System Peripherals (offset from AT91_BASE_SYS) + * System Peripherals */ -#define AT91_DMA (0xffffe600 - AT91_BASE_SYS) -#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) -#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9RL_BASE_US0 -#define AT91_USART1 AT91SAM9RL_BASE_US1 -#define AT91_USART2 AT91SAM9RL_BASE_US2 -#define AT91_USART3 AT91SAM9RL_BASE_US3 - -#endif /* CONFIG_AT91_LEGACY */ +#define ATMEL_BASE_DMA 0xffffe600 +#define ATMEL_BASE_ECC 0xffffe800 +#define ATMEL_BASE_SDRAMC 0xffffea00 +#define ATMEL_BASE_SMC 0xffffec00 +#define ATMEL_BASE_MATRIX 0xffffee00 +#define ATMEL_BASE_CCFG 0xffffef10 +#define ATMEL_BASE_AIC 0xfffff000 +#define ATMEL_BASE_DBGU 0xfffff200 +#define ATMEL_BASE_PIOA 0xfffff400 +#define ATMEL_BASE_PIOB 0xfffff600 +#define ATMEL_BASE_PIOC 0xfffff800 +#define ATMEL_BASE_PIOD 0xfffffa00 +#define ATMEL_BASE_PMC 0xfffffc00 +#define ATMEL_BASE_RSTC 0xfffffd00 +#define ATMEL_BASE_SHDWC 0xfffffd10 +#define ATMEL_BASE_RTT 0xfffffd20 +#define ATMEL_BASE_PIT 0xfffffd30 +#define ATMEL_BASE_WDT 0xfffffd40 +#define ATMEL_BASE_SCKCR 0xfffffd50 +#define ATMEL_BASE_GPBR 0xfffffd60 +#define ATMEL_BASE_RTC 0xfffffe00 /* * Internal Memory. */ -#define AT91SAM9RL_SRAM_BASE 0x00300000 /* Internal SRAM base address */ -#define AT91SAM9RL_SRAM_SIZE SZ_16K /* Internal SRAM size (16Kb) */ +#define ATMEL_BASE_SRAM 0x00300000 /* Internal SRAM base address */ +#define ATMEL_BASE_ROM 0x00400000 /* Internal ROM base address */ -#define AT91SAM9RL_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91SAM9RL_ROM_SIZE (2 * SZ_16K) /* Internal ROM size (32Kb) */ +#define ATMEL_BASE_LCDC 0x00500000 /* LCD Controller */ +#define ATMEL_UHP_BASE 0x00600000 /* USB Device HS controller */ -#define AT91SAM9RL_LCDC_BASE 0x00500000 /* LCD Controller */ -#define AT91SAM9RL_UDPHS_BASE 0x00600000 /* USB Device HS controller */ +/* + * External memory + */ +#define ATMEL_BASE_CS0 0x10000000 +#define ATMEL_BASE_CS1 0x20000000 /* SDRAM */ +#define ATMEL_BASE_CS2 0x30000000 +#define ATMEL_BASE_CS3 0x40000000 /* NAND */ +#define ATMEL_BASE_CS4 0x50000000 /* Compact Flash Slot 0 */ +#define ATMEL_BASE_CS5 0x60000000 /* Compact Flash Slot 1 */ +#define ATMEL_PIO_PORTS 4 /* * Cpu Name */ -#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9RL" +#define ATMEL_CPU_NAME "AT91SAM9RL" #endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h index af8d914..295f768 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h +++ b/arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h @@ -14,83 +14,48 @@ #ifndef AT91SAM9RL_MATRIX_H #define AT91SAM9RL_MATRIX_H -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) - -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) - +#ifndef __ASSEMBLY__ + +struct at91_matrix { + u32 mcfg[16]; /* Master Configuration Registers */ + u32 scfg[16]; /* Slave Configuration Registers */ + u32 pras[16][2]; /* Priority Assignment Slave Registers */ + u32 mrcr; /* Master Remap Control Register */ + u32 filler[7]; + u32 ebicsa; /* EBI Chip Select Assignment Register */ +}; + +#endif /* __ASSEMBLY__ */ + +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) +#define AT91_MATRIX_ULBT_FOUR (2 << 0) +#define AT91_MATRIX_ULBT_EIGHT (3 << 0) +#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) + +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT 18 +#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) +#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) + +#define AT91_MATRIX_M0PR_SHIFT 0 +#define AT91_MATRIX_M1PR_SHIFT 4 +#define AT91_MATRIX_M2PR_SHIFT 8 +#define AT91_MATRIX_M3PR_SHIFT 12 +#define AT91_MATRIX_M4PR_SHIFT 16 +#define AT91_MATRIX_M5PR_SHIFT 20 + +#define AT91_MATRIX_RCB0 (1 << 0) +#define AT91_MATRIX_RCB1 (1 << 1) + +#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) +#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) +#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) +#define AT91_MATRIX_DBPUC (1 << 8) +#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) #endif -- 1.7.3.3

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[U-Boot] u-boot-2011-03
by Rajeev Rao Battu 01 Aug '11

01 Aug '11

Greetings, I am bit new to Linux, working as R&D engineer, i am currently using u-boot-1.3.4 & 2008.10. In that i am facing bit problem with nandflash bad blocks. i want to upgrade my u-boot to 2011.03 when i compile this u-boot u-boot version i am encountering errors. following is the error displayed while compiling. please help me in this regard. make[1]: Nothing to be done for `all'. make[1]: Leaving directory `/home/rajeev/rajeev/u-boot-2011.03/examples/api' make -C arch/arm/cpu/arm926ejs start.o make[1]: Entering directory `/home/rajeev/rajeev/u-boot-2011.03/arch/arm/cpu/arm926ejs' make[1]: `start.o' is up to date. make[1]: Leaving directory `/home/rajeev/rajeev/u-boot-2011.03/arch/arm/cpu/arm926ejs' make -C api/ make[1]: Entering directory `/home/rajeev/rajeev/u-boot-2011.03/api' make[1]: `libapi.o' is up to date. make[1]: Leaving directory `/home/rajeev/rajeev/u-boot-2011.03/api' make -C arch/arm/cpu/arm926ejs/at91/ make[1]: Entering directory `/home/rajeev/rajeev/u-boot-2011.03/arch/arm/cpu/arm926ejs/at91' clock.c:21:3: error: #error You need to define CONFIG_AT91FAMILY in your board config! make[1]: Leaving directory `/home/rajeev/rajeev/u-boot-2011.03/arch/arm/cpu/arm926ejs/at91' make[1]: Entering directory `/home/rajeev/rajeev/u-boot-2011.03/arch/arm/cpu/arm926ejs/at91' armv5l-analogics-linux-gnueabi-gcc -g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x23f00000 -I/home/rajeev/rajeev/u-boot-2011.03/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/analogics/at91sam9261_ek/toolchain/bin/../lib/gcc/armv5l-analogics-linux-gnueabi/4.2.4/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mabi=aapcs-linux -mno-thumb-interwork -march=armv5te -Wall -Wstrict-prototypes -fno-stack-protector -o at91sam9260_devices.o at91sam9260_devices.c -c armv5l-analogics-linux-gnueabi-gcc -g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x23f00000 -I/home/rajeev/rajeev/u-boot-2011.03/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/analogics/at91sam9261_ek/toolchain/bin/../lib/gcc/armv5l-analogics-linux-gnueabi/4.2.4/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mabi=aapcs-linux -mno-thumb-interwork -march=armv5te -Wall -Wstrict-prototypes -fno-stack-protector -o led.o led.c -c armv5l-analogics-linux-gnueabi-gcc -g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x23f00000 -I/home/rajeev/rajeev/u-boot-2011.03/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/analogics/at91sam9261_ek/toolchain/bin/../lib/gcc/armv5l-analogics-linux-gnueabi/4.2.4/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mabi=aapcs-linux -mno-thumb-interwork -march=armv5te -Wall -Wstrict-prototypes -fno-stack-protector -o clock.o clock.c -c clock.c:21:3: error: #error You need to define CONFIG_AT91FAMILY in your board config! clock.c:21:3: error: #error You need to define CONFIG_AT91FAMILY in your board config! clock.c: In function 'get_cpu_clk_rate': clock.c:28: error: 'gd_t' has no member named 'cpu_clk_rate_hz' clock.c: In function 'get_main_clk_rate': clock.c:33: error: 'gd_t' has no member named 'main_clk_rate_hz' clock.c: In function 'get_mck_clk_rate': clock.c:38: error: 'gd_t' has no member named 'mck_rate_hz' clock.c: In function 'get_plla_clk_rate': clock.c:43: error: 'gd_t' has no member named 'plla_rate_hz' clock.c: In function 'get_pllb_clk_rate': clock.c:48: error: 'gd_t' has no member named 'pllb_rate_hz' clock.c: In function 'get_pllb_init': clock.c:53: error: 'gd_t' has no member named 'at91_pllb_usb_init' clock.c: In function 'at91_css_to_rate': clock.c:62: error: 'gd_t' has no member named 'main_clk_rate_hz' clock.c:64: error: 'gd_t' has no member named 'plla_rate_hz' clock.c:66: error: 'gd_t' has no member named 'pllb_rate_hz' clock.c: In function 'at91_clock_init': clock.c:165: error: 'gd_t' has no member named 'main_clk_rate_hz' clock.c:168: error: 'gd_t' has no member named 'plla_rate_hz' clock.c:177: error: 'gd_t' has no member named 'at91_pllb_usb_init' clock.c:179: error: 'gd_t' has no member named 'pllb_rate_hz' clock.c:179: error: 'gd_t' has no member named 'at91_pllb_usb_init' clock.c:191: error: 'gd_t' has no member named 'mck_rate_hz' clock.c:192: error: 'gd_t' has no member named 'mck_rate_hz' clock.c:210: error: 'gd_t' has no member named 'mck_rate_hz' clock.c:212: error: 'gd_t' has no member named 'cpu_clk_rate_hz' make[1]: *** [clock.o] Error 1 make[1]: Leaving directory `/home/rajeev/rajeev/u-boot-2011.03/arch/arm/cpu/arm926ejs/at91' make: *** [arch/arm/cpu/arm926ejs/at91/libat91.o] Error 2 -- Regards, RAJEEV.BATTU

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[U-Boot] [PATCH][ATMEL] add ATMEL_PMC_UHP define to at91sam9261/63 header
by Jens Scharsig 01 Aug '11

01 Aug '11

* add ATMEL_PMC_UHP define to at91sam9261/63 header Signed-off-by: Jens Scharsig <js_at_ng(a)scharsoft.de> --- arch/arm/include/asm/arch-at91/at91sam9261.h | 1 + arch/arm/include/asm/arch-at91/at91sam9263.h | 1 + 2 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h index c85fd29..a07f273 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9261.h +++ b/arch/arm/include/asm/arch-at91/at91sam9261.h @@ -125,6 +125,7 @@ * Other misc defines */ #define ATMEL_PIO_PORTS 3 /* theese SoCs have 3 PIO */ +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP #define ATMEL_BASE_PIO ATMEL_BASE_PIOA /* diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h index 2a1d6ee..040c9b8 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9263.h +++ b/arch/arm/include/asm/arch-at91/at91sam9263.h @@ -128,6 +128,7 @@ * Other misc defines */ #define ATMEL_PIO_PORTS 5 /* this SoCs has 5 PIO */ +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP #define ATMEL_BASE_PIO ATMEL_BASE_PIOA /* -- 1.7.3.4

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[U-Boot] [PATCH RESEND v2] armv7: Disable D cache for goni target (s5p)
by Lukasz Majewski 01 Aug '11

01 Aug '11

Disable D cache for goni target (s5p) - rationale: 1. Before change introduced in commit SHA1:c2dd0d45540397704de9b13287417d21049d34c6 the D-cache for GONI target was disabled. This change was supposed to preserve this state. Signed-off-by: Lukasz Majewski <l.majewski(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> Cc: Minkyu Kang <mk7.kang(a)samsung.com> Cc: Aneesh V <aneesh(a)ti.com> Cc: Albert ARIBAUD <albert.u.boot(a)aribaud.net> --- Changes for v2: - Rationale for disabling D cache include/configs/s5p_goni.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index d648ce8..010428b 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -74,6 +74,9 @@ /* It should define before config_cmd_default.h */ #define CONFIG_SYS_NO_FLASH 1 +/* Cache D configuration */ +#define CONFIG_SYS_DCACHE_OFF + /* Command definition */ #include <config_cmd_default.h> -- 1.7.2.3

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