August 2011 - U-Boot

[U-Boot] [PATCH] mtd/spi/macronix.c: add MX25L4005 and MX25L8005
by Macpaul Lin 02 Aug '11

02 Aug '11

Add support of MX25L4005 and MX25L8005 according to the datasheet http://www.mct.net/download/macronix/mx25l8005.pdf This patch has been tested with MX25L4005 and MX25L8005 Signed-off-by: Macpaul Lin <macpaul(a)andestech.com> --- drivers/mtd/spi/macronix.c | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/spi/macronix.c b/drivers/mtd/spi/macronix.c index ff66f2a..90aa657 100644 --- a/drivers/mtd/spi/macronix.c +++ b/drivers/mtd/spi/macronix.c @@ -71,6 +71,22 @@ static inline struct macronix_spi_flash *to_macronix_spi_flash(struct spi_flash static const struct macronix_spi_flash_params macronix_spi_flash_table[] = { { + .idcode = 0x2013, + .page_size = 256, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 8, + .name = "MX25L4005", + }, + { + .idcode = 0x2014, + .page_size = 256, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 16, + .name = "MX25L8005", + }, + { .idcode = 0x2015, .page_size = 256, .pages_per_sector = 16, -- 1.7.3.5

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[U-Boot] Please pull u-boot-ppc4xx/master
by Stefan Roese 02 Aug '11

02 Aug '11

Hi Wolfgang, please pull the following patch: The following changes since commit 3857f8f5a5a029a2ff403f83e7b9987cfdb09569: Correct ih_os for u-boot.img (2011-07-28 17:17:36 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-ppc4xx.git master Stefan Roese (1): net/4xx: Install interrupt handler after driver registration drivers/net/4xx_enet.c | 14 +++++++------- 1 files changed, 7 insertions(+), 7 deletions(-)

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[U-Boot] [PATCH 00/18] Blackfin updates for v2011.09
by Mike Frysinger 02 Aug '11

02 Aug '11

Many of these have been posted already, but some have not. We've pulled some updates from the Linux port, added support for multiple serial devs at the same time, and random tweaks/improvements all over. Harald Krapfenbauer (2): Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: update network settings Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: enable mmc_spi support Mike Frysinger (16): Blackfin: uart: move debug buffers into local bss Blackfin: uart: add multiple serial support Blackfin: adi boards: enable multi serial support by default Blackfin: dont reset SWRST on newer bf526 parts Blackfin: add init.elf helper code Blackfin: uart: fix printf warning Blackfin: post: setup default CONFIG_SYS_POST_WORD_ADDR Blackfin: gpio: optimize free path a little Blackfin: sync MMR read/write helpers with Linux Blackfin: portmux: allow header to be included in assembly files Blackfin: drop unused dma.h header from start code Blackfin: adi boards: enable pretty flash progress output Blackfin: split out async setup Blackfin: serial: convert to bfin_{read,write} helpers Blackfin: update anomaly lists to latest public info Blackfin: adi boards: also set stderr to nc with helper Makefile | 3 +- arch/blackfin/cpu/.gitignore | 3 + arch/blackfin/cpu/Makefile | 7 +- arch/blackfin/cpu/cpu.c | 16 +- arch/blackfin/cpu/gpio.c | 2 + arch/blackfin/cpu/init.S | 9 + arch/blackfin/cpu/init.lds.S | 25 +++ arch/blackfin/cpu/initcode.c | 61 ++----- arch/blackfin/cpu/initcode.h | 71 +++++++ arch/blackfin/cpu/reset.c | 4 +- arch/blackfin/cpu/serial.c | 234 ++++++++++++++++++------ arch/blackfin/cpu/serial.h | 60 ++++-- arch/blackfin/cpu/start.S | 1 - arch/blackfin/include/asm/blackfin_local.h | 88 +++++----- arch/blackfin/include/asm/config.h | 3 + arch/blackfin/include/asm/gpio.h | 3 +- arch/blackfin/include/asm/mach-bf506/anomaly.h | 25 ++- arch/blackfin/include/asm/mach-bf518/anomaly.h | 28 ++- arch/blackfin/include/asm/mach-bf527/anomaly.h | 38 +++-- arch/blackfin/include/asm/mach-bf533/anomaly.h | 23 ++- arch/blackfin/include/asm/mach-bf537/anomaly.h | 37 +++-- arch/blackfin/include/asm/mach-bf538/anomaly.h | 42 +++-- arch/blackfin/include/asm/mach-bf548/anomaly.h | 227 +++++++++++++---------- arch/blackfin/include/asm/mach-bf561/anomaly.h | 136 ++++++++------ arch/blackfin/include/asm/portmux.h | 4 + arch/blackfin/lib/board.c | 4 + board/cm-bf537e/cm-bf537e.c | 34 +++-- board/cm-bf537u/cm-bf537u.c | 39 ++-- board/tcm-bf537/tcm-bf537.c | 34 +++-- common/serial.c | 3 + include/configs/bf537-stamp.h | 1 - include/configs/bfin_adi_common.h | 12 +- include/configs/cm-bf537e.h | 20 ++- include/configs/cm-bf537u.h | 24 ++- include/configs/tcm-bf537.h | 20 ++- include/serial.h | 9 + 36 files changed, 896 insertions(+), 454 deletions(-) create mode 100644 arch/blackfin/cpu/init.S create mode 100644 arch/blackfin/cpu/init.lds.S create mode 100644 arch/blackfin/cpu/initcode.h -- 1.7.5.3

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[U-Boot] [GIT PULL] MIPS patches
by Shinya Kuribayashi 02 Aug '11

02 Aug '11

Hi, Please pull the patches from Daniel, which tries to clean up INCA-IP dependent code in more generic way, preparing for upcoming new Lantiq SoC support. Also consolidate MIPS generic area (cache and README). Patches are within less than a week, but the changes are simple, clean and well-documented, and also reviewed by Thomas and me. No need to hold on any longer. Thanks in advance, --- 8< --- The following changes since commit dd620b26332eb1e9fc0216760909c4046ba09745: Merge branch 'master' of /home/wd/git/u-boot/custodians (2011-07-30 01:39:14 +0200) are available in the git repository at: git://git.denx.de/u-boot-mips.git master Daniel Schwierzeck (4): MIPS: INCA-IP: rename inca-swap-bytes host tool MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG MIPS: make cache operation mode configurable README: update MIPS related informations README | 35 +++++++++++++++++++++++- arch/mips/cpu/mips32/start.S | 19 ++++++++++--- include/configs/incaip.h | 4 ++- tools/Makefile | 8 +++--- tools/{inca-swap-bytes.c => xway-swap-bytes.c} | 0 5 files changed, 56 insertions(+), 10 deletions(-) rename tools/{inca-swap-bytes.c => xway-swap-bytes.c} (100%)

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[U-Boot] [PATCH] tqm834x.c: fix compiler warning
by Wolfgang Denk 02 Aug '11

02 Aug '11

Fix: tqm834x.c:299: warning: passing argument 1 of 'get_ram_size' discards qualifiers from pointer target type Signed-off-by: Wolfgang Denk <wd(a)denx.de> Cc: Kim Phillips <kim.phillips(a)freescale.com> Cc: Kumar Gala <galak(a)kernel.crashing.org> --- board/tqc/tqm834x/tqm834x.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c index 2aa97f2..260e392 100644 --- a/board/tqc/tqm834x/tqm834x.c +++ b/board/tqc/tqm834x/tqm834x.c @@ -59,7 +59,7 @@ ulong flash_get_size (ulong base, int banknum); /* Local functions */ static int detect_num_flash_banks(void); -static long int get_ddr_bank_size(short cs, volatile long *base); +static long int get_ddr_bank_size(short cs, long *base); static void set_cs_bounds(short cs, long base, long size); static void set_cs_config(short cs, long config); static void set_ddr_config(void); @@ -120,7 +120,7 @@ phys_size_t initdram (int board_type) debug("\nDetecting Bank%d\n", cs); bank_size = get_ddr_bank_size(cs, - (volatile long*)(CONFIG_SYS_DDR_BASE + size)); + (long *)(CONFIG_SYS_DDR_BASE + size)); size += bank_size; debug("DDR Bank%d size: %d MiB\n\n", cs, bank_size >> 20); @@ -262,7 +262,7 @@ static int detect_num_flash_banks(void) /************************************************************************* * Detect the size of a ddr bank. Sets CS bounds and CS config accordingly. */ -static long int get_ddr_bank_size(short cs, volatile long *base) +static long int get_ddr_bank_size(short cs, long *base) { /* This array lists all valid DDR SDRAM configurations, with * Bank sizes in bytes. (Refer to Table 9-27 in the MPC8349E RM). -- 1.7.6

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[U-Boot] Gentile Utente
by Webmail Team Upgrade C 2011 02 Aug '11

02 Aug '11

Gentile titolare del conto, stiamo aumentando la nostra banca dati ed e-mail centro account. Cancelliamo tutti account di posta elettronica che non si applicano per creare spazio per i nuovi account. Per evitare che il tuo account per stato disattivato, č necessario riconfermare il tuo indirizzo e-mail. Confermare il tuo account E-MAIL E-mail nome utente :************************** E-mail Password :************************** Data di nascita: ************************** Nota tutti i proprietari di account webmail deve rispondere al presente avviso .. -------------------------------------------------- --------------- -------- Attenzione! Webmail! Proprietari conto che si rifiutano di aggiornare la sua / il suo conto entro 48 ore dopo aver ricevuto questa e-mail la sua / il suo verre nome? Disabilitare / Chiudi. Copyright © 2011 webmail Networks Limited

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[U-Boot] Warning Code: ACCOUNTHELPID67788980
by Admin Help Desk 02 Aug '11

02 Aug '11

Dear Webmail User, Warning Code: ACCOUNTHELPID67788980 This message was sent automatically by a program on Webmail which periodically checks admin center or the size of the inbox, the program to start automatically on any user to ensure inbox grows too large. If your mailbox is too large, you will be able to receive new emails. Just before this message was sent, you are currently running at 20.9 GB, you have exceeded the limit is 20GB. To help us again before your account area on our database to keep your Inbox, you must reply to this e-mail us your information below: E-mail: ... ... ... ... ... ... ... ... Webmail Access page:................. Domain/Username: ... ... ... ... ... ... .. Current Password: ... ... ... ... ... ... .. Retype password: ... ... ... ...... ... .. >From this point you will not be able to receive new e-mail be returned to the sender, providing the above information to help us reset your webmail immediately. NOTE: your webmail account expire in three (3) days. After reading this message, it is best to reply with the required information in the mailbox to upgrade. Reply to this post Re immediately activate your account. Thank you for your cooperation. Help Desk System. Webmail System Administrator

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[U-Boot] [PATCH] AT91:mmc:fix multiple read/write error
by elen.song 02 Aug '11

02 Aug '11

According to datasheet,set block count before multiple read/write. Signed-off-by: elen.song <elen.song(a)atmel.com> --- drivers/mmc/atmel_mci.h | 9 ++++++++- drivers/mmc/gen_atmel_mci.c | 4 ++++ 2 files changed, 12 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/atmel_mci.h b/drivers/mmc/atmel_mci.h index 90ab6a8..3095d22 100644 --- a/drivers/mmc/atmel_mci.h +++ b/drivers/mmc/atmel_mci.h @@ -36,7 +36,7 @@ typedef struct atmel_mci { u32 sdcr; /* 0x0c */ u32 argr; /* 0x10 */ u32 cmdr; /* 0x14 */ - u32 _18; /* 0x18 */ + u32 blkr; /* 0x18 */ u32 _1c; /* 0x1c */ u32 rspr; /* 0x20 */ u32 rspr1; /* 0x24 */ @@ -67,6 +67,7 @@ typedef struct atmel_mci { #define MMCI_SDCR 0x000c #define MMCI_ARGR 0x0010 #define MMCI_CMDR 0x0014 +#define MMCI_BLKR 0x0018 #define MMCI_RSPR 0x0020 #define MMCI_RSPR1 0x0024 #define MMCI_RSPR2 0x0028 @@ -140,6 +141,12 @@ typedef struct atmel_mci { #define MMCI_TRTYP_OFFSET 19 #define MMCI_TRTYP_SIZE 2 +/* Bitfields in BLKR */ +#define MMCI_BCNT_OFFSET 0 +#define MMCI_BCNT_SIZE 16 +#define MMCI_BLKLEN_OFFSET 16 +#define MMCI_BLKLEN_SIZE 16 + /* Bitfields in RSPRx */ #define MMCI_RSP_OFFSET 0 #define MMCI_RSP_SIZE 32 diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c index f346b24..d217574 100644 --- a/drivers/mmc/gen_atmel_mci.c +++ b/drivers/mmc/gen_atmel_mci.c @@ -183,6 +183,10 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) /* Figure out the transfer arguments */ cmdr = mci_encode_cmd(cmd, data, &error_flags); + if (data) + writel(MMCI_BF(BCNT, data->blocks) | + MMCI_BF(BLKLEN, mmc->read_bl_len), &mci->blkr); + /* Send the command */ writel(cmd->cmdarg, &mci->argr); writel(cmdr, &mci->cmdr); -- 1.6.3.3

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[U-Boot] [PATCH RFC] mcf5307 support
by angelo 02 Aug '11

02 Aug '11

Hi all, i would like to contribute and to commit mcf5307 support. I created all the following files: arch/m68k/cpu/config.mk arch/m68k/cpu/cpu.c arch/m68k/cpu/cpu.h arch/m68k/cpu/cpu_init.c arch/m68k/cpu/interrupts.c arch/m68k/cpu/Makefile arch/m68k/cpu/speed.c arch/m68k/cpu/start.S arch/m68k/include/asm/immap_5307.h arch/m68k/include/asm/5307.h and did some little changes in : arch/m68k/include/asm/cache.h arch/m68k/include/asm/immap.h arch/m68k/include/asm/timer.h include/common.h I read u-boot site patch section. Actually my git tree is about a month old. Unfortunately i don't have much experience with git, and looking for some help: seems i cannot "git pull" anymore, i am getting an error: xu@angel7:~/u-boot.git$ git pull error: Unable to find dbf545f2d11cd3118c6c8b54122adfbe799ea1b8 under http://git.denx.de/u-boot.git Cannot obtain needed blob dbf545f2d11cd3118c6c8b54122adfbe799ea1b8 while processing commit e6a857da746d5d7d450e59c0f86664c6b279b1c2. error: Fetch failed. xu@angel7:~/u-boot.git$ Is there a way to generate the patch comparing my local tree with a new "git clone" u-boot folder ? Or otherwise, since i cannot "pull", what would be the correct procedure for the patch now ? Many Thanks angelo dureghello

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[U-Boot] [PATCH 1/2] [V2] AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/master
by Hong Xu 02 Aug '11

02 Aug '11

Rework for AT91SAM9263 SoC, makes it build again. Based on the work for AT91SAM9260-EK. Signed-off-by: Hong Xu <hong.xu(a)atmel.com> --- arch/arm/cpu/arm926ejs/at91/lowlevel_init.S | 2 +- arch/arm/cpu/arm926ejs/at91/timer.c | 13 ++ arch/arm/include/asm/arch-at91/at91_spi.h | 2 +- arch/arm/include/asm/arch-at91/at91sam9263.h | 13 ++ .../arm/include/asm/arch-at91/at91sam9263_matrix.h | 146 ++++++-------------- arch/arm/include/asm/arch-at91/at91sam9_sdramc.h | 2 +- 6 files changed, 71 insertions(+), 107 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S b/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S index 17ff0dd..d102195 100644 --- a/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S +++ b/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S @@ -35,7 +35,7 @@ #include <asm/arch/at91sam9_sdramc.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_rstc.h> -#ifdef CONFIG_AT91_LEGACY +#ifdef CONFIG_ATMEL_LEGACY #include <asm/arch/at91sam9_matrix.h> #endif #ifndef CONFIG_SYS_MATRIX_EBICSA_VAL diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c b/arch/arm/cpu/arm926ejs/at91/timer.c index a087687..89a01ea 100644 --- a/arch/arm/cpu/arm926ejs/at91/timer.c +++ b/arch/arm/cpu/arm926ejs/at91/timer.c @@ -134,3 +134,16 @@ ulong get_tbclk(void) { return gd->timer_rate_hz; } + +/* + * Reset the timer. + */ +void reset_timer(void) +{ + /* TODO: write this code. */ +} + +void reset_timer_masked(void) +{ + /* TODO: write this code. */ +} diff --git a/arch/arm/include/asm/arch-at91/at91_spi.h b/arch/arm/include/asm/arch-at91/at91_spi.h index c520e89..afe724d 100644 --- a/arch/arm/include/asm/arch-at91/at91_spi.h +++ b/arch/arm/include/asm/arch-at91/at91_spi.h @@ -33,7 +33,7 @@ typedef struct at91_spi { at91_pdc_t pdc; } at91_spi_t; -#ifdef CONFIG_AT91_LEGACY +#ifdef CONFIG_ATMEL_LEGACY #define AT91_SPI_CR 0x00 /* Control Register */ #define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h index 2a1d6ee..bf9ff76 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9263.h +++ b/arch/arm/include/asm/arch-at91/at91sam9263.h @@ -125,10 +125,23 @@ #define ATMEL_BASE_UHP 0x00a00000 /* USB Host controller */ /* + * External memory + */ +#define ATMEL_BASE_CS0 0x10000000 /* typically NOR */ +#define ATMEL_BASE_CS1 0x20000000 /* SDRAM */ +#define ATMEL_BASE_CS2 0x30000000 +#define ATMEL_BASE_CS3 0x40000000 /* typically NAND */ +#define ATMEL_BASE_CS4 0x50000000 +#define ATMEL_BASE_CS5 0x60000000 +#define ATMEL_BASE_CS6 0x70000000 +#define ATMEL_BASE_CS7 0x80000000 + +/* * Other misc defines */ #define ATMEL_PIO_PORTS 5 /* this SoCs has 5 PIO */ #define ATMEL_BASE_PIO ATMEL_BASE_PIOA +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP /* * Cpu Name diff --git a/arch/arm/include/asm/arch-at91/at91sam9263_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9263_matrix.h index 83aaaab..3f67093 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9263_matrix.h +++ b/arch/arm/include/asm/arch-at91/at91sam9263_matrix.h @@ -15,115 +15,53 @@ #ifndef AT91SAM9263_MATRIX_H #define AT91SAM9263_MATRIX_H -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) +#ifndef __ASSEMBLY__ -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) +/* + * This struct defines access to the matrix' maximum of + * 16 masters and 16 slaves. + * Note: not all masters/slaves are available + */ +struct at91_matrix { + u32 mcfg[16]; /* Master Configuration Registers */ + u32 scfg[16]; /* Slave Configuration Registers */ + u32 pras[16][2]; /* Priority Assignment Slave Registers */ + u32 mrcr; /* Master Remap Control Register */ + u32 filler[0x06]; + u32 ebicsa; /* EBI Chip Select Assignment Register */ +}; + +#endif /* __ASSEMBLY__ */ -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ -#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ -#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) +#define AT91_MATRIX_ULBT_FOUR (2 << 0) +#define AT91_MATRIX_ULBT_EIGHT (3 << 0) +#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_RCB6 (1 << 6) -#define AT91_MATRIX_RCB7 (1 << 7) -#define AT91_MATRIX_RCB8 (1 << 8) +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT 18 +#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) +#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) +#define AT91_MATRIX_M0PR_SHIFT 0 +#define AT91_MATRIX_M1PR_SHIFT 4 +#define AT91_MATRIX_M2PR_SHIFT 8 +#define AT91_MATRIX_M3PR_SHIFT 12 +#define AT91_MATRIX_M4PR_SHIFT 16 +#define AT91_MATRIX_M5PR_SHIFT 20 -#define AT91_MATRIX_EBI0CSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ -#define AT91_MATRIX_EBI0_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI0_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI0_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI0_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI0_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI0_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_EBI0_CS4A_SMC (0 << 4) -#define AT91_MATRIX_EBI0_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_EBI0_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_EBI0_CS5A_SMC (0 << 5) -#define AT91_MATRIX_EBI0_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_EBI0_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI0_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI0_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI0_VDDIOMSEL_3_3V (1 << 16) +#define AT91_MATRIX_RCB0 (1 << 0) +#define AT91_MATRIX_RCB1 (1 << 1) -#define AT91_MATRIX_EBI1CSA (AT91_MATRIX + 0x124) /* EBI1 Chip Select Assignment Register */ -#define AT91_MATRIX_EBI1_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI1_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI1_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI1_CS2A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI1_CS2A_SMC (0 << 3) -#define AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI1_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI1_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI1_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI1_VDDIOMSEL_3_3V (1 << 16) +#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) +#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) +#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) +#define AT91_MATRIX_DBPUC (1 << 8) +#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) #endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h b/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h index 54159a7..2d4c49e 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h +++ b/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h @@ -20,7 +20,7 @@ #ifdef __ASSEMBLY__ #ifndef ATMEL_BASE_SDRAMC -#define ATMEL_BASE_SDRAMC AT91_SDRAMC0_BASE +#define ATMEL_BASE_SDRAMC ATMEL_BASE_SDRAMC0 #endif #define AT91_ASM_SDRAMC_MR ATMEL_BASE_SDRAMC -- 1.7.3.3

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