July 2011 - U-Boot

[U-Boot] [PATCH] add print_cpuinfo to s3c24x0
by David Müller 19 Dec '11

19 Dec '11

Hello This patch adds support for "print_cpuinfo" on Samsung s3c24x0 based targets. If activated by "#define CONFIG_DISPLAY_CPUINFO", the chip ID and the 3 main cpu frequencies will be displayed. Dave Signed-off-by: David Müller <d.mueller(a)elsoft.ch> diff --git a/arch/arm/cpu/arm920t/s3c24x0/Makefile b/arch/arm/cpu/arm920t/s3c24x0/Makefile index bd53724..0029700 100644 --- a/arch/arm/cpu/arm920t/s3c24x0/Makefile +++ b/arch/arm/cpu/arm920t/s3c24x0/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o COBJS-$(CONFIG_USE_IRQ) += interrupts.o +COBJS-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o COBJS-y += speed.o COBJS-y += timer.o COBJS-y += usb.o diff --git a/arch/arm/cpu/arm920t/s3c24x0/cpu_info.c b/arch/arm/cpu/arm920t/s3c24x0/cpu_info.c new file mode 100644 index 0000000..14c5c6a --- /dev/null +++ b/arch/arm/cpu/arm920t/s3c24x0/cpu_info.c @@ -0,0 +1,54 @@ +/* + * (C) Copyright 2010 + * David Mueller <d.mueller(a)elsoft.ch> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/s3c24x0_cpu.h> + +typedef ulong (*getfreq)(void); + +static const getfreq freq_f[] = { + get_FCLK, + get_HCLK, + get_PCLK, +}; + +static const char freq_c[] = { 'F', 'H', 'P' }; + +int print_cpuinfo(void) +{ + int i; + char buf[32]; +/* the S3C2400 seems to be lacking a CHIP ID register */ +#ifndef CONFIG_S3C2400 + ulong cpuid; + struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); + + cpuid = readl(&gpio->gstatus1); + printf("CPUID: %8lX\n", cpuid); +#endif + for (i = 0; i < ARRAY_SIZE(freq_f); i++) + printf("%cCLK: %8s MHz\n", freq_c[i], strmhz(buf, freq_f[i]())); + + return 0; +}

3 3

[U-Boot] running as stand alone
by smitha.vanga＠wipro.com 16 Dec '11

16 Dec '11

Hi, My u-boot works when run from the BDI emulator. But when it is programmed in flash and powered on with out connecting the emulator It does not come up . I checked the HRCW its correct. Any suggestions? Regards, Smitha Please do not print this email unless it is absolutely necessary. The information contained in this electronic message and any attachments to this message are intended for the exclusive use of the addressee(s) and may contain proprietary, confidential or privileged information. If you are not the intended recipient, you should not disseminate, distribute or copy this e-mail. Please notify the sender immediately and destroy all copies of this message and any attachments. WARNING: Computer viruses can be transmitted via email. The recipient should check this email and any attachments for the presence of viruses. The company accepts no liability for any damage caused by any virus transmitted by this email. www.wipro.com

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[U-Boot] [RFC] Add 'led' command
by Jason Kridner 14 Dec '11

14 Dec '11

It is desired to have the led command on the BeagleBoard to allow for some interaction in the scripts. This patch allows any board implementing the coloured LED API to control the LEDs from the console. led [green | yellow | red | all ] [ on | off ] or led [ 1 | 2 | 3 | all ] [ on | off ] Adds configuration item CONFIG_CMD_LED enabling the command. Partially based on patch from Ulf Samuelsson: http://www.mail-archive.com/u-boot@lists.denx.de/msg09593.html. Signed-off-by: Jason Kridner <jkridner(a)beagleboard.org> --- common/Makefile | 1 + common/cmd_led.c | 207 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 208 insertions(+), 0 deletions(-) create mode 100644 common/cmd_led.c diff --git a/common/Makefile b/common/Makefile index 2c37073..40facb5 100644 --- a/common/Makefile +++ b/common/Makefile @@ -107,6 +107,7 @@ COBJS-$(CONFIG_CMD_IRQ) += cmd_irq.o COBJS-$(CONFIG_CMD_ITEST) += cmd_itest.o COBJS-$(CONFIG_CMD_JFFS2) += cmd_jffs2.o COBJS-$(CONFIG_CMD_CRAMFS) += cmd_cramfs.o +COBJS-$(CONFIG_CMD_LED) += cmd_led.o COBJS-$(CONFIG_CMD_LICENSE) += cmd_license.o COBJS-y += cmd_load.o COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o diff --git a/common/cmd_led.c b/common/cmd_led.c new file mode 100644 index 0000000..3b7b534 --- /dev/null +++ b/common/cmd_led.c @@ -0,0 +1,207 @@ +/* + * (C) Copyright 2010 + * Jason Kridner <jkridner(a)beagleboard.org> + * + * Based on cmd_led.c patch from: + * http://www.mail-archive.com/u-boot@lists.denx.de/msg06873.html + * (C) Copyright 2008 + * Ulf Samuelsson <ulf.samuelsson(a)atmel.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * This file provides a shell like 'test' function to return + * true/false from an integer or string compare of two memory + * locations or a location and a scalar/literal. + * A few parts were lifted from bash 'test' command + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <status_led.h> + +int do_led ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] ) +{ +#ifdef CONFIG_BOARD_SPECIFIC_LED + led_id_t mask; +#endif + int state; + + /* Validate arguments */ + if ((argc != 3)){ + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + if (strcmp(argv[2], "off") == 0) { + state = 0; + } else if (strcmp(argv[2], "on") == 0) { + state = 1; + } else { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + +#if defined(STATUS_LED_BIT) && defined(CONFIG_BOARD_SPECIFIC_LED) + if (strcmp(argv[1], "0") == 0) { + mask = STATUS_LED_BIT; + __led_set(mask, state); + } + else +#endif +#if defined(STATUS_LED_BIT1) && defined(CONFIG_BOARD_SPECIFIC_LED) + if (strcmp(argv[1], "1") == 0) { + mask = STATUS_LED_BIT1; + __led_set(mask, state); + } + else +#endif +#if defined(STATUS_LED_BIT2) && defined(CONFIG_BOARD_SPECIFIC_LED) + if (strcmp(argv[1], "2") == 0) { + mask = STATUS_LED_BIT2; + __led_set(mask, state); + } + else +#endif +#if defined(STATUS_LED_BIT3) && defined(CONFIG_BOARD_SPECIFIC_LED) + if (strcmp(argv[1], "3") == 0) { + mask = STATUS_LED_BIT3; + __led_set(mask, state); + } + else +#endif +#ifdef STATUS_LED_RED + if (strcmp(argv[1], "red") == 0) { + if (state == 0) + red_LED_off(); + else + red_LED_on(); + } + else +#endif +#ifdef STATUS_LED_GREEN + if (strcmp(argv[1], "green") == 0) { + if (state == 0) + green_LED_off(); + else + green_LED_on(); + } + else +#endif +#ifdef STATUS_LED_YELLOW + if (strcmp(argv[1], "yellow") == 0) { + if (state == 0) + yellow_LED_off(); + else + yellow_LED_on(); + } + else +#endif +#ifdef STATUS_LED_BLUE + if (strcmp(argv[1], "blue") == 0) { + if (state == 0) + blue_LED_off(); + else + blue_LED_on(); + } + else +#endif + if (strcmp(argv[1], "all") == 0) { + mask = 0 +#if defined(STATUS_LED_BIT) && defined(CONFIG_BOARD_SPECIFIC_LED) + | STATUS_LED_BIT +#endif +#if defined(STATUS_LED_BIT1) && defined(CONFIG_BOARD_SPECIFIC_LED) + | STATUS_LED_BIT1 +#endif +#if defined(STATUS_LED_BIT2) && defined(CONFIG_BOARD_SPECIFIC_LED) + | STATUS_LED_BIT2 +#endif +#if defined(STATUS_LED_BIT3) && defined(CONFIG_BOARD_SPECIFIC_LED) + | STATUS_LED_BIT3 +#endif + ; +#ifdef CONFIG_BOARD_SPECIFIC_LED + __led_set(mask, state); +#endif +#ifdef STATUS_LED_RED + if (state == 0) + red_LED_off(); + else + red_LED_on(); +#endif +#ifdef STATUS_LED_GREEN + if (state == 0) + green_LED_off(); + else + green_LED_on(); +#endif +#ifdef STATUS_LED_YELLOW + if (state == 0) + yellow_LED_off(); + else + yellow_LED_on(); +#endif +#ifdef STATUS_LED_BLUE + if (state == 0) + blue_LED_off(); + else + blue_LED_on(); +#endif + } else { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + return 0; +} + +U_BOOT_CMD( + led, 3, 1, do_led, + "led\t- [" +#if defined(STATUS_LED_BIT) && defined(CONFIG_BOARD_SPECIFIC_LED) + "0|" +#endif +#if defined(STATUS_LED_BIT1) && defined(CONFIG_BOARD_SPECIFIC_LED) + "1|" +#endif +#if defined(STATUS_LED_BIT2) && defined(CONFIG_BOARD_SPECIFIC_LED) + "2|" +#endif +#if defined(STATUS_LED_BIT3) && defined(CONFIG_BOARD_SPECIFIC_LED) + "3|" +#endif +#ifdef STATUS_LED_GREEN + "green|" +#endif +#ifdef STATUS_LED_YELLOW + "yellow|" +#endif +#ifdef STATUS_LED_RED + "red|" +#endif +#ifdef STATUS_LED_BLUE + "blue|" +#endif + "all] [on|off]\n", + "led [led_name] [on|off] sets or clears led(s)\n" +); + -- 1.5.6.4

6 9

[U-Boot] [PATCH] Standalone Apps: Standalone apps should need only exports.h.
by Mike Partington 07 Dec '11

07 Dec '11

From: Mike Partington <mparting(a)windstar.lpdev.prtdev.lexmark.com> Modify exports.h to remove its dependencies on other files, thus enabling standalone apps to require only exports.h from the U-Boot source tree. This appears to be the intent based on the following note: http://lists.denx.de/pipermail/u-boot/2010-January/067174.html Signed-off-by: Mike Partington <mparting(a)windstar.lpdev.prtdev.lexmark.com> --- examples/standalone/atmel_df_pow2.c | 1 + examples/standalone/stubs.c | 1 + include/exports.h | 5 +---- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/examples/standalone/atmel_df_pow2.c b/examples/standalone/atmel_df_pow2.c index b5b4503..2e14aba 100644 --- a/examples/standalone/atmel_df_pow2.c +++ b/examples/standalone/atmel_df_pow2.c @@ -8,6 +8,7 @@ #include <common.h> #include <exports.h> +#include <spi.h> #define CMD_ID 0x9f #define CMD_STAT 0xd7 diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c index 2d2e709..1ebe43b 100644 --- a/examples/standalone/stubs.c +++ b/examples/standalone/stubs.c @@ -1,3 +1,4 @@ +#include <common.h> #include <exports.h> #ifndef GCC_VERSION diff --git a/include/exports.h b/include/exports.h index 7404a7c..01b83dc 100644 --- a/include/exports.h +++ b/include/exports.h @@ -3,8 +3,6 @@ #ifndef __ASSEMBLY__ -#include <common.h> - /* These are declarations of exported functions available in C code */ unsigned long get_version(void); int getc(void); @@ -12,7 +10,7 @@ int tstc(void); void putc(const char); void puts(const char*); int printf(const char* fmt, ...); -void install_hdlr(int, interrupt_handler_t*, void*); +void install_hdlr(int, void (*interrupt_handler_t)(void *), void*); void free_hdlr(int); void *malloc(size_t); void free(void*); @@ -30,7 +28,6 @@ int ustrtoul(const char *cp, char **endp, unsigned int base); int i2c_write (uchar, uint, int , uchar* , int); int i2c_read (uchar, uint, int , uchar* , int); #endif -#include <spi.h> void app_startup(char * const *); -- 1.7.3.5.g4a3b

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[U-Boot] [PATCH 0/7] OMAP3: Add support for mvBlueLYNX-X
by Michael Jones 03 Dec '11

03 Dec '11

Add support for the Matrix Vision mvBlueLYNX-X, an OMAP3-based intelligent camera. These patches were created on top of v2011.06, but they also apply cleanly to master and u-boot-arm/master. What should I use as base to submit such a patch? Howard D. Gray (1): Add 37xx ESx revision numbers. Michael Jones (5): fpga: support FPP Cyclone configuration mmc: rescan fails on empty slot mv_common.c: don't compile reset_environment if ENV_IS_NOWHERE ARMV7: OMAP: I2C driver: Write more than 1 byte at a time in i2c_write mvblx: Initial support for mvBlueLYNX-X MAINTAINERS | 4 + MAKEALL | 1 + arch/arm/cpu/armv7/omap3/sys_info.c | 13 +- arch/arm/include/asm/arch-omap3/omap3.h | 10 + board/matrix_vision/common/mv_common.c | 2 + board/matrix_vision/mvblx/Makefile | 53 ++++ board/matrix_vision/mvblx/config.mk | 33 +++ board/matrix_vision/mvblx/fpga.c | 222 +++++++++++++++++ board/matrix_vision/mvblx/fpga.h | 32 +++ board/matrix_vision/mvblx/mvblx.c | 171 +++++++++++++ board/matrix_vision/mvblx/mvblx.h | 362 ++++++++++++++++++++++++++++ board/matrix_vision/mvblx/sys_eeprom.c | 396 +++++++++++++++++++++++++++++++ boards.cfg | 1 + common/cmd_mmc.c | 6 +- doc/README.omap3 | 5 + drivers/fpga/cyclon2.c | 10 + drivers/i2c/omap24xx_i2c.c | 134 +++++------ include/configs/omap3_mvblx.h | 312 ++++++++++++++++++++++++ 18 files changed, 1686 insertions(+), 81 deletions(-) create mode 100644 board/matrix_vision/mvblx/Makefile create mode 100644 board/matrix_vision/mvblx/config.mk create mode 100644 board/matrix_vision/mvblx/fpga.c create mode 100644 board/matrix_vision/mvblx/fpga.h create mode 100644 board/matrix_vision/mvblx/mvblx.c create mode 100644 board/matrix_vision/mvblx/mvblx.h create mode 100644 board/matrix_vision/mvblx/sys_eeprom.c create mode 100644 include/configs/omap3_mvblx.h -- 1.7.5.4 MATRIX VISION GmbH, Talstrasse 16, DE-71570 Oppenweiler Registergericht: Amtsgericht Stuttgart, HRB 271090 Geschaeftsfuehrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner, Erhard Meier

11 47

[U-Boot] [PATCH] OMAP3: Use sdelay from arch/arm/cpu/armv7/syslib.c instead of cloning that.
by Alexander Holler 19 Nov '11

19 Nov '11

There is no need to have such a function twice. Signed-off-by: Alexander Holler <holler(a)ahsoftware.de> --- arch/arm/cpu/armv7/omap3/board.c | 12 +----------- 1 files changed, 1 insertions(+), 11 deletions(-) diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 6c2a132..0e62626 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -41,16 +41,6 @@ extern omap3_sysinfo sysinfo; /****************************************************************************** - * Routine: delay - * Description: spinning delay to use before udelay works - *****************************************************************************/ -static inline void delay(unsigned long loops) -{ - __asm__ volatile ("1:\n" "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0"(loops)); -} - -/****************************************************************************** * Routine: secure_unlock * Description: Setup security registers for access * (GP Device only) @@ -189,7 +179,7 @@ void s_init(void) setup_auxcr(); set_muxconf_regs(); - delay(100); + sdelay(100); prcm_init(); -- 1.7.2.2

3 2

[U-Boot] [PATCH] arm/pxa: fix and cleanup of pxa_mem_setup macro v2
by Mikhail Kshevetskiy 17 Nov '11

17 Nov '11

WARNING: This macro do not assume the values for K0DB4, KxDB2, KxFREE, K1RUN, K2RUN and APD bits of CONFIG_SYS_MDREFR_VAL as it was done early on many pxa platforms. All pxa developers that plan to use this macro should check the validity of their MDREFR values. v1: * strict following to section 6.4.10 of Intel PXA27xx Developer's Manual. * use r7 to store CONFIG_SYS_MDREFR_VAL as r6 is used in pxa_wait_ticks. v2: * rename pxa_mem_setup macro to pxa2xx_mem_setup * setting of MDREFR[K1RUN] and MDREFR[K2RUN] bits may be optional * skip certain configuration steps if SDRAM is not present/configured * improve/fix comments Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy(a)gmail.com> --- arch/arm/include/asm/arch-pxa/macro.h | 82 ++++++++++++++++++++++----------- board/vpac270/lowlevel_init.S | 2 +- 2 files changed, 56 insertions(+), 28 deletions(-) diff --git a/arch/arm/include/asm/arch-pxa/macro.h b/arch/arm/include/asm/arch-pxa/macro.h index 1f1759b..e2ddfe9 100644 --- a/arch/arm/include/asm/arch-pxa/macro.h +++ b/arch/arm/include/asm/arch-pxa/macro.h @@ -102,11 +102,15 @@ /* * This macro sets up the Memory controller of the PXA2xx CPU * - * Clobbered regs: r3, r4, r5 + * Clobbered regs: r3, r4, r5, r6, r7 + * + * See section 6.4.10 of Intel PXA2xx Processor Developer's Manual + * http://www.marvell.com/products/processors/applications/pxa_family/pxa_27x_… */ -.macro pxa_mem_setup +.macro pxa2xx_mem_setup /* This comes handy when setting MDREFR */ ldr r3, =MEMC_BASE + ldr r7, =CONFIG_SYS_MDREFR_VAL /* * 1) Initialize Asynchronous static memory controller @@ -149,51 +153,68 @@ */ /* - * Before accessing MDREFR we need a valid DRI field, so we set - * this to power on defaults + DRI field. + * Before accessing MDREFR we need a valid DRI field. + * Also we must properly configure MDREFR[K0DB2] and MDREFR[K0DB4]. + * Optionaly we can set MDREFR[KxFREE] bits. + * So we set MDREFR to power on defaults + (DRI, K0DB2, K0DB4, KxFREE) + * fields from the config. + * + * WARNING: K0DB2 and K0DB4 bits are usually set, while KxFREE bits + * are usually unset. */ ldr r5, [r3, #MDREFR_OFFSET] - bic r5, r5, #0x0ff - bic r5, r5, #0xf00 /* MDREFR user config with zeroed DRI */ - - ldr r4, =CONFIG_SYS_MDREFR_VAL - mov r6, r4 - lsl r4, #20 - lsr r4, #20 /* Get a valid DRI field */ - - orr r5, r5, r4 /* MDREFR user config with correct DRI */ + ldr r4, =( 0xFFF | MDREFR_K0DB4 | MDREFR_K0DB2 | \ + MDREFR_K0FREE | MDREFR_K1FREE | MDREFR_K2FREE ) + bic r5, r5, r4 /* clear DRI, K0DB2, K0DB4, KxFREE fields */ + and r4, r7, r4 + orr r5, r5, r4 /* use custom DRI, K0DB2, K0DB4, KxFREE */ orr r5, #MDREFR_K0RUN orr r5, #MDREFR_SLFRSH bic r5, #MDREFR_APD - bic r5, #MDREFR_E1PIN + + /* enable them later, if SDRAM is present */ + bic r5, #( MDREFR_E1PIN | MDREFR_K1RUN | MDREFR_K2RUN | \ + MDREFR_K1DB2 | MDREFR_K2DB2 ) str r5, [r3, #MDREFR_OFFSET] - ldr r4, [r3, #MDREFR_OFFSET] + ldr r5, [r3, #MDREFR_OFFSET] /* * 5) Initialize Synchronous Static Memory (Flash/Peripherals) */ - /* Initialize SXCNFG register. Assert the enable bits. - * - * Write SXMRS to cause an MRS command to all enabled banks of - * synchronous static memory. Note that SXLCR need not be written - * at this time. + /* Initialize SXCNFG register to enable synchronous flash memory. + * While the synchronous flash banks are being configured, the SDRAM + * banks must be disabled and MDREFR[APD] must be de-asserted. */ write32rb (MEMC_BASE + SXCNFG_OFFSET), CONFIG_SYS_SXCNFG_VAL /* - * 6) Initialize SDRAM + * 6) Initialize SDRAM, + * If SDRAM present, then MDREFR[K1RUN] and/or MDREFR[K1RUN] bits + * must be set. Also we must properly configure MDREFR[K1DB2] and + * MDREFR[K2DB2] in this case. + * + * WARNING: K1DB2 and K2DB2 bits are usually set if SDRAM present */ +#if (CONFIG_SYS_MDREFR_VAL & (MDREFR_K1RUN | MDREFR_K2RUN)) + and r4, r7, #( MDREFR_K1RUN | MDREFR_K2RUN | \ + MDREFR_K1DB2 | MDREFR_K2DB2 ) + ldr r6, [r3, #MDREFR_OFFSET] + orr r6, r6, r4 + str r6, [r3, #MDREFR_OFFSET] + ldr r6, [r3, #MDREFR_OFFSET] + bic r6, #MDREFR_SLFRSH str r6, [r3, #MDREFR_OFFSET] - ldr r4, [r3, #MDREFR_OFFSET] + ldr r6, [r3, #MDREFR_OFFSET] orr r6, #MDREFR_E1PIN str r6, [r3, #MDREFR_OFFSET] - ldr r4, [r3, #MDREFR_OFFSET] + ldr r6, [r3, #MDREFR_OFFSET] +#endif /* * 7) Write MDCNFG with MDCNFG:DEx deasserted (set to 0), to configure @@ -209,6 +230,7 @@ str r4, [r3, #MDCNFG_OFFSET] ldr r4, [r3, #MDCNFG_OFFSET] +#if (CONFIG_SYS_MDREFR_VAL & (MDREFR_K1RUN | MDREFR_K2RUN)) /* Wait for the clock to the SDRAMs to stabilize, 100..200 usec. */ pxa_wait_ticks 0x300 @@ -226,7 +248,7 @@ .endr /* - * 9) Write MDCNFG with enable bits asserted (MDCNFG:DEx set to 1). + * 9) Set custom MDCNFG[DEx] bits to enable required SDRAM partitions */ ldr r5, =CONFIG_SYS_MDCNFG_VAL @@ -238,19 +260,25 @@ ldr r4, [r3, #MDCNFG_OFFSET] /* - * 10) Write MDMRS. + * 10) Write to MDMRS register to trigger an MRS command to + * all enabled banks of SDRAM. For each SDRAM partition pair + * that has one or both partitions enabled, this forces a pass + * through the MRS state and a return to NOP. */ ldr r4, =CONFIG_SYS_MDMRS_VAL str r4, [r3, #MDMRS_OFFSET] ldr r4, [r3, #MDMRS_OFFSET] +#endif /* - * 11) Enable APD + * 11) Optionaly enable auto-power-down by setting MDREFR[APD] + * + * WARNING: APD bit is usually set. */ ldr r4, [r3, #MDREFR_OFFSET] - and r6, r6, #MDREFR_APD + and r6, r7, #MDREFR_APD orr r4, r4, r6 str r4, [r3, #MDREFR_OFFSET] ldr r4, [r3, #MDREFR_OFFSET] diff --git a/board/vpac270/lowlevel_init.S b/board/vpac270/lowlevel_init.S index ec0d12c..a327ebd 100644 --- a/board/vpac270/lowlevel_init.S +++ b/board/vpac270/lowlevel_init.S @@ -32,7 +32,7 @@ lowlevel_init: pxa_gpio_setup pxa_wait_ticks 0x8000 - pxa_mem_setup + pxa2xx_mem_setup pxa_wakeup pxa_intr_setup pxa_clock_setup -- 1.7.1

2 2

[U-Boot] [PATCH v4 0/6] Add Highbank platform
by Rob Herring 24 Oct '11

24 Oct '11

From: Rob Herring <rob.herring(a)calxeda.com> This series enables non-PCI AHCI controllers and adds support for Calxeda Highbank platform which uses the AHCI changes. Changes from v3: - Added Highbank to MAINTAINERS - Added back patch to fix CONFIG_SKIP_LOWLEVEL_INIT (mistakenly dropped from v2) Wolfgang, Albert, Can you apply these to your trees for v2011.09? All review comments have been addressed. Rob Rob Herring (6): ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7 ARM: Add Calxeda Highbank platform arm: add __ilog2 function scsi/ahci: ata id little endian fix scsi/ahci: add support for non-PCI controllers ARM: highbank: Add AHCI support MAINTAINERS | 4 + arch/arm/cpu/armv7/highbank/Makefile | 46 ++++++++++++ arch/arm/cpu/armv7/highbank/config.mk | 4 + arch/arm/cpu/armv7/highbank/timer.c | 124 +++++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/start.S | 2 + arch/arm/include/asm/bitops.h | 9 +++ board/highbank/Makefile | 49 +++++++++++++ board/highbank/highbank.c | 58 +++++++++++++++ boards.cfg | 1 + common/cmd_scsi.c | 6 +- drivers/block/ahci.c | 72 ++++++++++++++++--- include/ahci.h | 4 + include/configs/highbank.h | 112 +++++++++++++++++++++++++++++ include/scsi.h | 1 + 14 files changed, 480 insertions(+), 12 deletions(-) create mode 100644 arch/arm/cpu/armv7/highbank/Makefile create mode 100644 arch/arm/cpu/armv7/highbank/config.mk create mode 100644 arch/arm/cpu/armv7/highbank/timer.c create mode 100644 board/highbank/Makefile create mode 100644 board/highbank/highbank.c create mode 100644 include/configs/highbank.h -- 1.7.4.1

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[U-Boot] [PATCH v7 01/10] nds32: add header files support for nds32
by Macpaul Lin 22 Oct '11

22 Oct '11

Add generic header files support for nds32 architecture. Cache, ptregs, data type and other definitions are included. Signed-off-by: Macpaul Lin <macpaul(a)andestech.com> --- Changes for v1-v4: - Code cleanup and style formatting. Changes for v5-v6: - This patch also updated the following changes against the change after master tree (v2010.12-rc1). - fix upper case definitions in cache.h - Support GD_FLG_ENV_READY and env_buf vars in nds32 global_data.h. - Add readsb, writesb functions into io.h. Changes for v7: - clean up - volatile: - types.h - remove typedef volatile unsigned char vuchar; - remove typedef volatile unsigned long vulong; - remove typedef volatile unsigned short vushort; - u-boot.h: remove bd_info_ext bi_ext - bitops.h: add accessor function to bit operation with volatile var. - system.h: add system.h for local_irq operation with flag. arch/nds32/include/asm/bitops.h | 186 +++++++++++++++ arch/nds32/include/asm/byteorder.h | 36 +++ arch/nds32/include/asm/cache.h | 54 +++++ arch/nds32/include/asm/config.h | 26 ++ arch/nds32/include/asm/global_data.h | 82 +++++++ arch/nds32/include/asm/io.h | 410 +++++++++++++++++++++++++++++++++ arch/nds32/include/asm/mach-types.h | 29 +++ arch/nds32/include/asm/memory.h | 19 ++ arch/nds32/include/asm/posix_types.h | 84 +++++++ arch/nds32/include/asm/processor.h | 25 ++ arch/nds32/include/asm/ptrace.h | 22 ++ arch/nds32/include/asm/ptregs.h | 81 +++++++ arch/nds32/include/asm/string.h | 57 +++++ arch/nds32/include/asm/system.h | 88 +++++++ arch/nds32/include/asm/types.h | 63 +++++ arch/nds32/include/asm/u-boot-nds32.h | 50 ++++ arch/nds32/include/asm/u-boot.h | 63 +++++ arch/nds32/include/asm/unaligned.h | 31 +++ 18 files changed, 1406 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/include/asm/bitops.h create mode 100644 arch/nds32/include/asm/byteorder.h create mode 100644 arch/nds32/include/asm/cache.h create mode 100644 arch/nds32/include/asm/config.h create mode 100644 arch/nds32/include/asm/global_data.h create mode 100644 arch/nds32/include/asm/io.h create mode 100644 arch/nds32/include/asm/mach-types.h create mode 100644 arch/nds32/include/asm/memory.h create mode 100644 arch/nds32/include/asm/posix_types.h create mode 100644 arch/nds32/include/asm/processor.h create mode 100644 arch/nds32/include/asm/ptrace.h create mode 100644 arch/nds32/include/asm/ptregs.h create mode 100644 arch/nds32/include/asm/string.h create mode 100644 arch/nds32/include/asm/system.h create mode 100644 arch/nds32/include/asm/types.h create mode 100644 arch/nds32/include/asm/u-boot-nds32.h create mode 100644 arch/nds32/include/asm/u-boot.h create mode 100644 arch/nds32/include/asm/unaligned.h diff --git a/arch/nds32/include/asm/bitops.h b/arch/nds32/include/asm/bitops.h new file mode 100644 index 0000000..c56f04b --- /dev/null +++ b/arch/nds32/include/asm/bitops.h @@ -0,0 +1,186 @@ +/* + * Copyright 1995, Russell King. + * Various bits and pieces copyrights include: + * Linus Torvalds (test_bit). + * + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation <nobuhiro(a)andestech.com> + * + * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). + * + * Please note that the code in this file should never be included + * from user space. Many of these are not implemented in assembler + * since they would be too costly. Also, they require priviledged + * instructions (which are not available from user mode) to ensure + * that they are atomic. + */ + +#ifndef __ASM_NDS_BITOPS_H +#define __ASM_NDS_BITOPS_H + +#ifdef __KERNEL__ + +#include <asm/system.h> + +#define smp_mb__before_clear_bit() do { } while (0) +#define smp_mb__after_clear_bit() do { } while (0) + +/* + * Function prototypes to keep gcc -Wall happy. + */ +extern void set_bit(int nr, volatile void *addr); + +static inline void __set_bit(int nr, volatile void *addr) +{ + int *a = (int *)addr; + int mask; + + a += nr >> 5; + mask = 1 << (nr & 0x1f); + *a |= mask; +} + +extern void clear_bit(int nr, volatile void *addr); + +static inline void __clear_bit(int nr, volatile void *addr) +{ + int *a = (int *)addr; + int mask; + unsigned long flags; + + a += nr >> 5; + mask = 1 << (nr & 0x1f); + local_irq_save(flags); + *a &= ~mask; + local_irq_restore(flags); +} + +extern void change_bit(int nr, volatile void *addr); + +static inline void __change_bit(int nr, volatile void *addr) +{ + int mask; + unsigned long *ADDR = (unsigned long *)addr; + + ADDR += nr >> 5; + mask = 1 << (nr & 31); + *ADDR ^= mask; +} + +extern int test_and_set_bit(int nr, volatile void *addr); + +static inline int __test_and_set_bit(int nr, volatile void *addr) +{ + int mask, retval; + volatile unsigned int *a = (volatile unsigned int *)addr; + + a += nr >> 5; + mask = 1 << (nr & 0x1f); + retval = (mask & *a) != 0; + *a |= mask; + return retval; +} + +extern int test_and_clear_bit(int nr, volatile void *addr); + +static inline int __test_and_clear_bit(int nr, volatile void *addr) +{ + int mask, retval; + volatile unsigned int *a = (volatile unsigned int *)addr; + + a += nr >> 5; + mask = 1 << (nr & 0x1f); + retval = (mask & *a) != 0; + *a &= ~mask; + return retval; +} + +extern int test_and_change_bit(int nr, volatile void *addr); + +static inline int __test_and_change_bit(int nr, volatile void *addr) +{ + int mask, retval; + volatile unsigned int *a = (volatile unsigned int *)addr; + + a += nr >> 5; + mask = 1 << (nr & 0x1f); + retval = (mask & *a) != 0; + *a ^= mask; + return retval; +} + +extern int find_first_zero_bit(void *addr, unsigned size); +extern int find_next_zero_bit(void *addr, int size, int offset); + +/* + * This routine doesn't need to be atomic. + */ +static inline int test_bit(int nr, const void *addr) +{ + return ((unsigned char *) addr)[nr >> 3] & (1U << (nr & 7)); +} + +/* + * ffz = Find First Zero in word. Undefined if no zero exists, + * so code should check against ~0UL first.. + */ +static inline unsigned long ffz(unsigned long word) +{ + int k; + + word = ~word; + k = 31; + if (word & 0x0000ffff) { + k -= 16; word <<= 16; + } + if (word & 0x00ff0000) { + k -= 8; word <<= 8; + } + if (word & 0x0f000000) { + k -= 4; word <<= 4; + } + if (word & 0x30000000) { + k -= 2; word <<= 2; + } + if (word & 0x40000000) + k -= 1; + + return k; +} + +/* + * ffs: find first bit set. This is defined the same way as + * the libc and compiler builtin ffs routines, therefore + * differs in spirit from the above ffz (man ffs). + */ + +/* + * redefined in include/linux/bitops.h + * #define ffs(x) generic_ffs(x) + */ + +/* + * hweightN: returns the hamming weight (i.e. the number + * of bits set) of a N-bit word + */ + +#define hweight32(x) generic_hweight32(x) +#define hweight16(x) generic_hweight16(x) +#define hweight8(x) generic_hweight8(x) + +#define ext2_set_bit test_and_set_bit +#define ext2_clear_bit test_and_clear_bit +#define ext2_test_bit test_bit +#define ext2_find_first_zero_bit find_first_zero_bit +#define ext2_find_next_zero_bit find_next_zero_bit + +/* Bitmap functions for the minix filesystem. */ +#define minix_test_and_set_bit(nr, addr) test_and_set_bit(nr, addr) +#define minix_set_bit(nr, addr) set_bit(nr, addr) +#define minix_test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr) +#define minix_test_bit(nr, addr) test_bit(nr, addr) +#define minix_find_first_zero_bit(addr, size) find_first_zero_bit(addr, size) + +#endif /* __KERNEL__ */ + +#endif /* __ASM_NDS_BITOPS_H */ diff --git a/arch/nds32/include/asm/byteorder.h b/arch/nds32/include/asm/byteorder.h new file mode 100644 index 0000000..39fd9ed --- /dev/null +++ b/arch/nds32/include/asm/byteorder.h @@ -0,0 +1,36 @@ +/* + * linux/include/asm-arm/byteorder.h + * + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation <nobuhiro(a)andestech.com> + * Macpaul Lin, Andes Technology Corporation <macpaul(a)andestech.com> + * + * ARM Endian-ness. In little endian mode, the data bus is connected such + * that byte accesses appear as: + * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31 + * and word accesses (data or instruction) appear as: + * d0...d31 + * + * When in big endian mode, byte accesses appear as: + * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7 + * and word accesses (data or instruction) appear as: + * d0...d31 + */ + +#ifndef __ASM_NDS_BYTEORDER_H +#define __ASM_NDS_BYTEORDER_H + +#include <asm/types.h> + +#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) +# define __BYTEORDER_HAS_U64__ +# define __SWAB_64_THRU_32__ +#endif + +#ifdef __NDSEB__ +#include <linux/byteorder/big_endian.h> +#else +#include <linux/byteorder/little_endian.h> +#endif + +#endif diff --git a/arch/nds32/include/asm/cache.h b/arch/nds32/include/asm/cache.h new file mode 100644 index 0000000..d769196 --- /dev/null +++ b/arch/nds32/include/asm/cache.h @@ -0,0 +1,54 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation <nobuhiro(a)andestech.com> + * Macpaul Lin, Andes Technology Corporation <macpaul(a)andestech.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ASM_CACHE_H +#define _ASM_CACHE_H + +/* cache */ +int icache_status(void); +void icache_enable(void); +void icache_disable(void); +int dcache_status(void); +void dcache_enable(void); +void dcache_disable(void); + +#define DEFINE_GET_SYS_REG(reg) \ + static inline unsigned long GET_##reg(void) \ + { \ + unsigned long val; \ + __asm__ volatile ( \ + "mfsr %0, $"#reg : "=&r" (val) : : "memory" \ + ); \ + return val; \ + } + +enum cache_t {ICACHE, DCACHE}; +DEFINE_GET_SYS_REG(ICM_CFG); +DEFINE_GET_SYS_REG(DCM_CFG); +#define ICM_CFG_OFF_ISZ 6 /* I-cache line size */ +#define ICM_CFG_MSK_ISZ (0x7UL << ICM_CFG_OFF_ISZ) +#define DCM_CFG_OFF_DSZ 6 /* D-cache line size */ +#define DCM_CFG_MSK_DSZ (0x7UL << DCM_CFG_OFF_DSZ) + +#endif /* _ASM_CACHE_H */ diff --git a/arch/nds32/include/asm/config.h b/arch/nds32/include/asm/config.h new file mode 100644 index 0000000..23421b7 --- /dev/null +++ b/arch/nds32/include/asm/config.h @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Copyright (C) 2010 Shawn Lin (nobuhiro(a)andestech.com) + * Copyright (C) 2011 Macpaul Lin (macpaul(a)andestech.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef _ASM_CONFIG_H_ +#define _ASM_CONFIG_H_ + +#endif diff --git a/arch/nds32/include/asm/global_data.h b/arch/nds32/include/asm/global_data.h new file mode 100644 index 0000000..a3e5b4c --- /dev/null +++ b/arch/nds32/include/asm/global_data.h @@ -0,0 +1,82 @@ +/* + * (C) Copyright 2002 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation <nobuhiro(a)andestech.com> + * Macpaul Lin, Andes Technology Corporation <macpaul(a)andestech.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/************************************************************** + * CAUTION: + * - do not implement for NDS32 Arch yet. + * - so far no one uses the macros defined in this head file. + **************************************************************/ + +#ifndef __ASM_GBL_DATA_H +#define __ASM_GBL_DATA_H +/* + * The following data structure is placed in some memory wich is + * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or + * some locked parts of the data cache) to allow for a minimum set of + * global variables during system initialization (until we have set + * up the memory controller so that we can use RAM). + * + * Keep it *SMALL* and remember to set CONFIG_GBL_DATA_SIZE > sizeof(gd_t) + */ + +typedef struct global_data { + bd_t *bd; + unsigned long flags; + unsigned long baudrate; + unsigned long have_console; /* serial_init() was called */ + + unsigned long reloc_off; /* Relocation Offset */ + unsigned long env_addr; /* Address of Environment struct */ + unsigned long env_valid; /* Checksum of Environment valid? */ + unsigned long fb_base; /* base address of frame buffer */ +#ifdef CONFIG_VFD + unsigned char vfd_type; /* display type */ +#endif + void **jt; /* jump table */ + char env_buf[32]; /* buffer for getenv() before reloc. */ +} gd_t; + +/* + * Global Data Flags + */ +#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ +#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ +#define GD_FLG_SILENT 0x00004 /* Silent mode */ +#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ +#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */ +#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ +#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ +#define GD_FLG_ENV_READY 0x00080 /* Environment imported into hash table */ + +#ifdef CONFIG_GLOBAL_DATA_NOT_REG8 +extern volatile gd_t g_gd; +#define DECLARE_GLOBAL_DATA_PTR static volatile gd_t *gd = &g_gd +#else +#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("$r8") +#endif + +#endif /* __ASM_GBL_DATA_H */ diff --git a/arch/nds32/include/asm/io.h b/arch/nds32/include/asm/io.h new file mode 100644 index 0000000..be097ec --- /dev/null +++ b/arch/nds32/include/asm/io.h @@ -0,0 +1,410 @@ +/* + * linux/include/asm-nds/io.h + * + * Copyright (C) 1996-2000 Russell King + * + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation <nobuhiro(a)andestech.com> + * Macpaul Lin, Andes Technology Corporation <macpaul(a)andestech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Modifications: + * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both + * constant addresses and variable addresses. + * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture + * specific IO header files. + * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. + * 04-Apr-1999 PJB Added check_signature. + * 12-Dec-1999 RMK More cleanups + * 18-Jun-2000 RMK Removed virt_to_* and friends definitions + */ +#ifndef __ASM_NDS_IO_H +#define __ASM_NDS_IO_H + +/* + * CAUTION: + * - do not implement for NDS32 Arch yet. + * - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc... + * iinclude asm/io.h + */ + +#ifdef __KERNEL__ + +#include <linux/types.h> +#include <asm/byteorder.h> +#include <asm/memory.h> + +static inline void sync(void) +{ +} + +/* + * Given a physical address and a length, return a virtual address + * that can be used to access the memory range with the caching + * properties specified by "flags". + */ +#define MAP_NOCACHE (0) +#define MAP_WRCOMBINE (0) +#define MAP_WRBACK (0) +#define MAP_WRTHROUGH (0) + +static inline void * +map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) +{ + return (void *)paddr; +} + +/* + * Take down a mapping set up by map_physmem(). + */ +static inline void unmap_physmem(void *vaddr, unsigned long flags) +{ + +} + +static inline phys_addr_t virt_to_phys(void *vaddr) +{ + return (phys_addr_t)(vaddr); +} + +/* + * Generic virtual read/write. Note that we don't support half-word + * read/writes. We define __arch_*[bl] here, and leave __arch_*w + * to the architecture specific code. + */ +#define __arch_getb(a) (*(volatile unsigned char *)(a)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_getl(a) (*(volatile unsigned int *)(a)) + +#define __arch_putb(v, a) (*(volatile unsigned char *)(a) = (v)) +#define __arch_putw(v, a) (*(volatile unsigned short *)(a) = (v)) +#define __arch_putl(v, a) (*(volatile unsigned int *)(a) = (v)) + +extern void __raw_writesb(unsigned int addr, const void *data, int bytelen); +extern void __raw_writesw(unsigned int addr, const void *data, int wordlen); +extern void __raw_writesl(unsigned int addr, const void *data, int longlen); + +extern void __raw_readsb(unsigned int addr, void *data, int bytelen); +extern void __raw_readsw(unsigned int addr, void *data, int wordlen); +extern void __raw_readsl(unsigned int addr, void *data, int longlen); + +#define __raw_writeb(v, a) __arch_putb(v, a) +#define __raw_writew(v, a) __arch_putw(v, a) +#define __raw_writel(v, a) __arch_putl(v, a) + +#define __raw_readb(a) __arch_getb(a) +#define __raw_readw(a) __arch_getw(a) +#define __raw_readl(a) __arch_getl(a) + +#define writeb(v, a) __arch_putb(v, a) +#define writew(v, a) __arch_putw(v, a) +#define writel(v, a) __arch_putl(v, a) + +#define readb(a) __arch_getb(a) +#define readw(a) __arch_getw(a) +#define readl(a) __arch_getl(a) + +/* + * The compiler seems to be incapable of optimising constants + * properly. Spell it out to the compiler in some cases. + * These are only valid for small values of "off" (< 1<<12) + */ +#define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off) +#define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off) +#define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off) + +#define __raw_base_readb(base, off) __arch_base_getb(base, off) +#define __raw_base_readw(base, off) __arch_base_getw(base, off) +#define __raw_base_readl(base, off) __arch_base_getl(base, off) + +/* + * Now, pick up the machine-defined IO definitions + * #include <asm/arch/io.h> + */ + +/* + * IO port access primitives + * ------------------------- + * + * The NDS32 doesn't have special IO access instructions just like ARM; + * all IO is memory mapped. + * Note that these are defined to perform little endian accesses + * only. Their primary purpose is to access PCI and ISA peripherals. + * + * Note that for a big endian machine, this implies that the following + * big endian mode connectivity is in place, as described by numerious + * ARM documents: + * + * PCI: D0-D7 D8-D15 D16-D23 D24-D31 + * ARM: D24-D31 D16-D23 D8-D15 D0-D7 + * + * The machine specific io.h include defines __io to translate an "IO" + * address to a memory address. + * + * Note that we prevent GCC re-ordering or caching values in expressions + * by introducing sequence points into the in*() definitions. Note that + * __raw_* do not guarantee this behaviour. + * + * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. + */ +#ifdef __io +#define outb(v, p) __raw_writeb(v, __io(p)) +#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) +#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) + +#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) +#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) +#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) + +#define outsb(p, d, l) writesb(__io(p), d, l) +#define outsw(p, d, l) writesw(__io(p), d, l) +#define outsl(p, d, l) writesl(__io(p), d, l) + +#define insb(p, d, l) readsb(__io(p), d, l) +#define insw(p, d, l) readsw(__io(p), d, l) +#define insl(p, d, l) readsl(__io(p), d, l) + +static inline void readsb(unsigned int *addr, void * data, int bytelen) +{ + unsigned char *ptr = (unsigned char *)addr; + unsigned char *ptr2 = (unsigned char *)data; + while (bytelen) { + *ptr2 = *ptr; + ptr2++; + bytelen--; + } +} + +static inline void readsw(unsigned int *addr, void * data, int wordlen) +{ + unsigned short *ptr = (unsigned short *)addr; + unsigned short *ptr2 = (unsigned short *)data; + while (wordlen) { + *ptr2 = *ptr; + ptr2++; + wordlen--; + } +} + +static inline void readsl(unsigned int *addr, void * data, int longlen) +{ + unsigned int *ptr = (unsigned int *)addr; + unsigned int *ptr2 = (unsigned int *)data; + while (longlen) { + *ptr2 = *ptr; + ptr2++; + longlen--; + } +} +static inline void writesb(unsigned int *addr, const void * data, int bytelen) +{ + unsigned char *ptr = (unsigned char *)addr; + unsigned char *ptr2 = (unsigned char *)data; + while (bytelen) { + *ptr = *ptr2; + ptr2++; + bytelen--; + } +} +static inline void writesw(unsigned int *addr, const void * data, int wordlen) +{ + unsigned short *ptr = (unsigned short *)addr; + unsigned short *ptr2 = (unsigned short *)data; + while (wordlen) { + *ptr = *ptr2; + ptr2++; + wordlen--; + } +} +static inline void writesl(unsigned int *addr, const void * data, int longlen) +{ + unsigned int *ptr = (unsigned int *)addr; + unsigned int *ptr2 = (unsigned int *)data; + while (longlen) { + *ptr = *ptr2; + ptr2++; + longlen--; + } +} +#endif + +#define outb_p(val, port) outb((val), (port)) +#define outw_p(val, port) outw((val), (port)) +#define outl_p(val, port) outl((val), (port)) +#define inb_p(port) inb((port)) +#define inw_p(port) inw((port)) +#define inl_p(port) inl((port)) + +#define outsb_p(port, from, len) outsb(port, from, len) +#define outsw_p(port, from, len) outsw(port, from, len) +#define outsl_p(port, from, len) outsl(port, from, len) +#define insb_p(port, to, len) insb(port, to, len) +#define insw_p(port, to, len) insw(port, to, len) +#define insl_p(port, to, len) insl(port, to, len) + +/* + * ioremap and friends. + * + * ioremap takes a PCI memory address, as specified in + * linux/Documentation/IO-mapping.txt. If you want a + * physical address, use __ioremap instead. + */ +extern void *__ioremap(unsigned long offset, size_t size, unsigned long flags); +extern void __iounmap(void *addr); + +/* + * Generic ioremap support. + * + * Define: + * iomem_valid_addr(off,size) + * iomem_to_phys(off) + */ +#ifdef iomem_valid_addr +#define __arch_ioremap(off, sz, nocache) \ +({ \ + unsigned long _off = (off), _size = (sz); \ + void *_ret = (void *)0; \ + if (iomem_valid_addr(_off, _size)) \ + _ret = __ioremap(iomem_to_phys(_off), _size, 0); \ + _ret; \ +}) + +#define __arch_iounmap __iounmap +#endif + +#define ioremap(off, sz) __arch_ioremap((off), (sz), 0) +#define ioremap_nocache(off, sz) __arch_ioremap((off), (sz), 1) +#define iounmap(_addr) __arch_iounmap(_addr) + +/* + * DMA-consistent mapping functions. These allocate/free a region of + * uncached, unwrite-buffered mapped memory space for use with DMA + * devices. This is the "generic" version. The PCI specific version + * is in pci.h + */ +extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); +extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); +extern void consistent_sync(void *vaddr, size_t size, int rw); + +/* + * String version of IO memory access ops: + */ +extern void _memcpy_fromio(void *, unsigned long, size_t); +extern void _memcpy_toio(unsigned long, const void *, size_t); +extern void _memset_io(unsigned long, int, size_t); + +extern void __readwrite_bug(const char *fn); + +/* + * If this architecture has PCI memory IO, then define the read/write + * macros. These should only be used with the cookie passed from + * ioremap. + */ +#ifdef __mem_pci + +#define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; }) +#define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) +#define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) + +#define writeb(v, c) __raw_writeb(v, __mem_pci(c)) +#define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c)) +#define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c)) + +#define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l)) +#define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l)) +#define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l)) + +#define eth_io_copy_and_sum(s, c, l, b) \ + eth_copy_and_sum((s), __mem_pci(c), (l), (b)) + +static inline int +check_signature(unsigned long io_addr, const unsigned char *signature, + int length) +{ + int retval = 0; + do { + if (readb(io_addr) != *signature) + goto out; + io_addr++; + signature++; + length--; + } while (length); + retval = 1; +out: + return retval; +} + +#elif !defined(readb) + +#define readb(addr) (__readwrite_bug("readb"), 0) +#define readw(addr) (__readwrite_bug("readw"), 0) +#define readl(addr) (__readwrite_bug("readl"), 0) +#define writeb(v, addr) __readwrite_bug("writeb") +#define writew(v, addr) __readwrite_bug("writew") +#define writel(v, addr) __readwrite_bug("writel") + +#define eth_io_copy_and_sum(a, b, c, d) __readwrite_bug("eth_io_copy_and_sum") + +#define check_signature(io, sig, len) (0) + +#endif /* __mem_pci */ + +/* + * If this architecture has ISA IO, then define the isa_read/isa_write + * macros. + */ +#ifdef __mem_isa + +#define isa_readb(addr) __raw_readb(__mem_isa(addr)) +#define isa_readw(addr) __raw_readw(__mem_isa(addr)) +#define isa_readl(addr) __raw_readl(__mem_isa(addr)) +#define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr)) +#define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr)) +#define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr)) +#define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c)) +#define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c)) +#define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c)) + +#define isa_eth_io_copy_and_sum(a, b, c, d) \ + eth_copy_and_sum((a), __mem_isa(b), (c), (d)) + +static inline int +isa_check_signature(unsigned long io_addr, const unsigned char *signature, + int length) +{ + int retval = 0; + do { + if (isa_readb(io_addr) != *signature) + goto out; + io_addr++; + signature++; + length--; + } while (length); + retval = 1; +out: + return retval; +} + +#else /* __mem_isa */ + +#define isa_readb(addr) (__readwrite_bug("isa_readb"), 0) +#define isa_readw(addr) (__readwrite_bug("isa_readw"), 0) +#define isa_readl(addr) (__readwrite_bug("isa_readl"), 0) +#define isa_writeb(val, addr) __readwrite_bug("isa_writeb") +#define isa_writew(val, addr) __readwrite_bug("isa_writew") +#define isa_writel(val, addr) __readwrite_bug("isa_writel") +#define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io") +#define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio") +#define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio") + +#define isa_eth_io_copy_and_sum(a, b, c, d) \ + __readwrite_bug("isa_eth_io_copy_and_sum") + +#define isa_check_signature(io, sig, len) (0) + +#endif /* __mem_isa */ +#endif /* __KERNEL__ */ +#endif /* __ASM_NDS_IO_H */ diff --git a/arch/nds32/include/asm/mach-types.h b/arch/nds32/include/asm/mach-types.h new file mode 100644 index 0000000..a6f1c93 --- /dev/null +++ b/arch/nds32/include/asm/mach-types.h @@ -0,0 +1,29 @@ +/* + * This was automagically generated from arch/nds/tools/mach-types! + * Do NOT edit + */ + +#ifndef __ASM_NDS32_MACH_TYPE_H +#define __ASM_NDS32_MACH_TYPE_H + +#ifndef __ASSEMBLY__ +/* The type of machine we're running on */ +extern unsigned int __machine_arch_type; +#endif + +/* see arch/arm/kernel/arch.c for a description of these */ +#define MACH_TYPE_ADPAG101 0 + +#ifdef CONFIG_ARCH_ADPAG101 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ADPAG101 +# endif +# define machine_is_adpag101() (machine_arch_type == MACH_TYPE_ADPAG101) +#else +# define machine_is_adpag101() (0) +#endif + +#endif /* __ASM_NDS32_MACH_TYPE_H */ diff --git a/arch/nds32/include/asm/memory.h b/arch/nds32/include/asm/memory.h new file mode 100644 index 0000000..5bcc4e1 --- /dev/null +++ b/arch/nds32/include/asm/memory.h @@ -0,0 +1,19 @@ +/* + * linux/include/asm-arm/memory.h + * + * Copyright (C) 2000-2002 Russell King + * + * Copyright (C) 2011 Andes Technology Corporation + * Copyright (C) 2010 Shawn Lin (nobuhiro(a)andestech.com) + * Copyright (C) 2011 Macpaul Lin (macpaul(a)andestech.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Note: this file should not be included by non-asm/.h files + */ +#ifndef __ASM_NDS_MEMORY_H +#define __ASM_NDS_MEMORY_H + +#endif /* __ASM_NDS_MEMORY_H */ diff --git a/arch/nds32/include/asm/posix_types.h b/arch/nds32/include/asm/posix_types.h new file mode 100644 index 0000000..a928038 --- /dev/null +++ b/arch/nds32/include/asm/posix_types.h @@ -0,0 +1,84 @@ +/* + * linux/include/asm-arm/posix_types.h + * + * Copyright (C) 1996-1998 Russell King. + * + * Copyright (C) 2011 Andes Technology Corporation + * Copyright (C) 2010 Shawn Lin (nobuhiro(a)andestech.com) + * Copyright (C) 2011 Macpaul Lin (macpaul(a)andestech.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 27-06-1996 RMK Created + * 05-03-2010 Modified for arch NDS32 + */ +#ifndef __ARCH_NDS_POSIX_TYPES_H +#define __ARCH_NDS_POSIX_TYPES_H + +/* + * This file is generally used by user-level software, so you need to + * be a little careful about namespace pollution etc. Also, we cannot + * assume GCC is being used. + */ + +typedef unsigned short __kernel_dev_t; +typedef unsigned long __kernel_ino_t; +typedef unsigned short __kernel_mode_t; +typedef unsigned short __kernel_nlink_t; +typedef long __kernel_off_t; +typedef int __kernel_pid_t; +typedef unsigned short __kernel_ipc_pid_t; +typedef unsigned short __kernel_uid_t; +typedef unsigned short __kernel_gid_t; +typedef unsigned int __kernel_size_t; +typedef int __kernel_ssize_t; +typedef int __kernel_ptrdiff_t; +typedef long __kernel_time_t; +typedef long __kernel_suseconds_t; +typedef long __kernel_clock_t; +typedef int __kernel_daddr_t; +typedef char *__kernel_caddr_t; +typedef unsigned short __kernel_uid16_t; +typedef unsigned short __kernel_gid16_t; +typedef unsigned int __kernel_uid32_t; +typedef unsigned int __kernel_gid32_t; + +typedef unsigned short __kernel_old_uid_t; +typedef unsigned short __kernel_old_gid_t; + +#ifdef __GNUC__ +typedef long long __kernel_loff_t; +#endif + +typedef struct { +#if defined(__KERNEL__) || defined(__USE_ALL) + int val[2]; +#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ + int __val[2]; +#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ +} __kernel_fsid_t; + +#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) + +#undef __FD_SET +#define __FD_SET(fd, fdsetp) \ + (((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1<<(fd & 31))) + +#undef __FD_CLR +#define __FD_CLR(fd, fdsetp) \ + (((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1<<(fd & 31))) + +#undef __FD_ISSET +#define __FD_ISSET(fd, fdsetp) \ + ((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1<<(fd & 31))) != 0) + +#undef __FD_ZERO +#define __FD_ZERO(fdsetp) \ + (memset(fdsetp, 0, sizeof(*(fd_set *) fdsetp))) + +#endif + +#endif /* __ARCH_NDS_POSIX_TYPES_H */ diff --git a/arch/nds32/include/asm/processor.h b/arch/nds32/include/asm/processor.h new file mode 100644 index 0000000..e5d186c --- /dev/null +++ b/arch/nds32/include/asm/processor.h @@ -0,0 +1,25 @@ +/* + * linux/include/asm-arm/processor.h + * + * Copyright (C) 1995-2002 Russell King + * + * Copyright (C) 2011 Andes Technology Corporation + * Copyright (C) 2010 Shawn Lin (nobuhiro(a)andestech.com) + * Copyright (C) 2011 Macpaul Lin (macpaul(a)andestech.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_NDS_PROCESSOR_H +#define __ASM_NDS_PROCESSOR_H + +/************************************************************** + * CAUTION: + * - do not implement for NDS32 Arch yet. + * - so far some files include /asm/processor.h, but + * no one uses the macros defined in this head file. + **************************************************************/ + +#endif /* __ASM_ARM_PROCESSOR_H */ diff --git a/arch/nds32/include/asm/ptrace.h b/arch/nds32/include/asm/ptrace.h new file mode 100644 index 0000000..83e8b81 --- /dev/null +++ b/arch/nds32/include/asm/ptrace.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Copyright (C) 2010 Shawn Lin (nobuhiro(a)andestech.com) + * Copyright (C) 2011 Macpaul Lin (macpaul(a)andestech.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * CAUTION: + * - do not implement for NDS32 Arch yet. + * - included in common.h + */ + +#ifndef __ASM_NDS_PTRACE_H +#define __ASM_NDS_PTRACE_H + +#include <asm/ptregs.h> + +#endif /* __ASM_NDS_PTRACE_H */ diff --git a/arch/nds32/include/asm/ptregs.h b/arch/nds32/include/asm/ptregs.h new file mode 100644 index 0000000..f78448c --- /dev/null +++ b/arch/nds32/include/asm/ptregs.h @@ -0,0 +1,81 @@ +/* + * linux/include/asm-arm/proc-armv/ptrace.h + * + * Copyright (C) 1996-1999 Russell King + * + * Copyright (C) 2011 Andes Technology Corporation + * Copyright (C) 2010 Shawn Lin (nobuhiro(a)andestech.com) + * Copyright (C) 2011 Macpaul Lin (macpaul(a)andestech.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __PTREGS_H +#define __PTREGS_H + +#define USR_MODE 0x00 +#define SU_MODE 0x01 +#define HV_MODE 0x10 +#define MODE_MASK (0x03<<3) +#define GIE_BIT 0x01 + +#ifndef __ASSEMBLY__ + +/* this struct defines the way the registers are stored on the + stack during a system call. */ + +struct pt_regs { + long uregs[39]; +}; + +#define PTREGS(reg) [reg] +#define R0 uregs[1] /* R0 */ +#define R1 uregs[2] +#define R2 uregs[3] +#define R3 uregs[4] +#define R4 uregs[5] +#define R5 uregs[6] +#define R6 uregs[7] +#define R7 uregs[8] +#define R8 uregs[9] +#define R9 uregs[10] +#define R10 uregs[11] +#define R11 uregs[12] +#define R12 uregs[13] +#define R13 uregs[14] +#define R14 uregs[15] +#define R15 uregs[16] +#define R16 uregs[17] +#define R17 uregs[18] +#define R18 uregs[19] +#define R19 uregs[20] +#define R20 uregs[21] +#define R21 uregs[22] +#define R22 uregs[23] +#define R23 uregs[24] +#define R24 uregs[25] +#define R25 uregs[26] +#define R26 uregs[27] +#define R27 uregs[28] +#define FP uregs[29] /* R28 */ +#define GP uregs[30] /* R29 */ +#define RA uregs[31] /* R30 */ +#define SP uregs[32] /* R31 */ +#define D0HI uregs[33] +#define D0LO uregs[34] +#define D1HI uregs[35] +#define D1LO uregs[36] +#define PSW uregs[37] /* IR0 */ +#define PC uregs[38] /* PC */ + +#define processor_mode(regs) \ + (((regs)->PSW & MODE_MASK) >> 3) + +#define interrupts_enabled(regs) \ + ((regs)->PSW & GIE_BIT) + +#endif /* __ASSEMBLY__ */ + +#endif diff --git a/arch/nds32/include/asm/string.h b/arch/nds32/include/asm/string.h new file mode 100644 index 0000000..610aa9e --- /dev/null +++ b/arch/nds32/include/asm/string.h @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Copyright (C) 2010 Shawn Lin (nobuhiro(a)andestech.com) + * Copyright (C) 2011 Macpaul Lin (macpaul(a)andestech.com) + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#ifndef __ASM_NDS_STRING_H +#define __ASM_NDS_STRING_H + +/* + * We don't do inline string functions, since the + * optimised inline asm versions are not small. + */ + +#undef __HAVE_ARCH_STRRCHR +extern char *strrchr(const char *s, int c); + +#undef __HAVE_ARCH_STRCHR +extern char *strchr(const char *s, int c); + +#undef __HAVE_ARCH_MEMCPY +extern void *memcpy(void *, const void *, __kernel_size_t); + +#undef __HAVE_ARCH_MEMMOVE +extern void *memmove(void *, const void *, __kernel_size_t); + +#undef __HAVE_ARCH_MEMCHR +extern void *memchr(const void *, int, __kernel_size_t); + +#undef __HAVE_ARCH_MEMZERO +#undef __HAVE_ARCH_MEMSET +extern void *memset(void *, int, __kernel_size_t); + +#ifdef CONFIG_MARCO_MEMSET +extern void __memzero(void *ptr, __kernel_size_t n); + +#define memset(p, v, n) \ + ({ \ + if ((n) != 0) { \ + if (__builtin_constant_p((v)) && (v) == 0) \ + __memzero((p), (n)); \ + else \ + memset((p), (v), (n)); \ + } \ + (p); \ + }) + +#define memzero(p, n) ({ if ((n) != 0) __memzero((p), (n)); (p); }) +#else +extern void memzero(void *ptr, __kernel_size_t n); +#endif + +#endif /* __ASM_NDS_STRING_H */ diff --git a/arch/nds32/include/asm/system.h b/arch/nds32/include/asm/system.h new file mode 100644 index 0000000..97f59e9 --- /dev/null +++ b/arch/nds32/include/asm/system.h @@ -0,0 +1,88 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Macpaul Lin, Andes Technology Corporation <macpaul(a)andestech.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __ASM_NDS_SYSTEM_H +#define __ASM_NDS_SYSTEM_H + +/* + * Interrupt configuring macros. + */ + +extern int irq_flags; + +#define local_irq_enable() \ + __asm__ __volatile__ ( \ + "mfsr %0, $psw\n\t" \ + "andi %0, %0, 0x1\n\t" \ + "setgie.e\n\t" \ + : \ + : "r" (irq_flags) \ + ) + +#define local_irq_disable() \ + do { \ + int __tmp_dummy; \ + __asm__ __volatile__ ( \ + "mfsr %0, $psw\n\t" \ + "andi %0, %0, 0x1\n\t" \ + "setgie.d\n\t" \ + "dsb\n\t" \ + : "=r" (__tmp_dummy) \ + ); \ + } while (0) + +#define local_irq_save(x) \ + __asm__ __volatile__ ( \ + "mfsr %0, $psw\n\t" \ + "andi %0, %0, 0x1\n\t" \ + "setgie.d\n\t" \ + "dsb\n\t" \ + : "=&r" (x) \ + ) + +#define local_save_flags(x) \ + __asm__ __volatile__ ( \ + "mfsr %0, $psw\n\t" \ + "andi %0, %0, 0x1\n\t" \ + "setgie.e\n\t" \ + "setgie.d\n\t" \ + : "=r" (x) \ + ) + +#define irqs_enabled_from_flags(x) ((x) != 0x1f) + +#define local_irq_restore(x) \ + do { \ + if (irqs_enabled_from_flags(x)) \ + local_irq_enable(); \ + } while (0) + +/* + * Force strict CPU ordering. + */ +#define nop() asm volatile ("nop;\n\t" : : ) +#define mb() asm volatile ("" : : : "memory") +#define rmb() asm volatile ("" : : : "memory") +#define wmb() asm volatile ("" : : : "memory") + +#endif /* __ASM_NDS_SYSTEM_H */ diff --git a/arch/nds32/include/asm/types.h b/arch/nds32/include/asm/types.h new file mode 100644 index 0000000..2e8924f --- /dev/null +++ b/arch/nds32/include/asm/types.h @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Copyright (C) 2010 Shawn Lin (nobuhiro(a)andestech.com) + * Copyright (C) 2011 Macpaul Lin (macpaul(a)andestech.com) + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#ifndef __ASM_NDS_TYPES_H +#define __ASM_NDS_TYPES_H + +typedef unsigned short umode_t; + +/* + * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the + * header files exported to user space + */ + +typedef __signed__ char __s8; +typedef unsigned char __u8; + +typedef __signed__ short __s16; +typedef unsigned short __u16; + +typedef __signed__ int __s32; +typedef unsigned int __u32; + +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +typedef __signed__ long long __s64; +typedef unsigned long long __u64; +#endif + +/* + * These aren't exported outside the kernel to avoid name space clashes + */ +#ifdef __KERNEL__ + +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long long s64; +typedef unsigned long long u64; + +#define BITS_PER_LONG 32 + +#include <stddef.h> + +typedef u32 dma_addr_t; + +typedef unsigned long phys_addr_t; +typedef unsigned long phys_size_t; + +#endif /* __KERNEL__ */ + +#endif diff --git a/arch/nds32/include/asm/u-boot-nds32.h b/arch/nds32/include/asm/u-boot-nds32.h new file mode 100644 index 0000000..2383e08 --- /dev/null +++ b/arch/nds32/include/asm/u-boot-nds32.h @@ -0,0 +1,50 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation <nobuhiro(a)andestech.com> + * Macpaul Lin, Andes Technology Corporation <macpaul(a)andestech.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _U_BOOT_NDS32_H_ +#define _U_BOOT_NDS32_H_ 1 + +/* for the following variables, see start.S */ +extern ulong _andesboot_start; /* code start */ +extern ulong _andesboot_end; /* code end */ +extern ulong _andesboot_real_end; /* first usable RAM address */ + +/* cpu/.../cpu.c */ +int cleanup_before_linux(void); + +/* board/.../... */ +int board_init(void); +int dram_init(void); + +/* cpu/.../interrupt.c */ +void reset_timer_masked(void); + +/* cpu/.../timer.c */ +int timer_init(void); + +#endif /* _U_BOOT_NDS32_H_ */ diff --git a/arch/nds32/include/asm/u-boot.h b/arch/nds32/include/asm/u-boot.h new file mode 100644 index 0000000..fafe4e4 --- /dev/null +++ b/arch/nds32/include/asm/u-boot.h @@ -0,0 +1,63 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * Copyright (C) 2011 Andes Technology Corporation + * Copyright (C) 2010 Shawn Lin (nobuhiro(a)andestech.com) + * Copyright (C) 2011 Macpaul Lin (macpaul(a)andestech.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + ******************************************************************** + * NOTE: This header file defines an interface to U-Boot. Including + * this (unmodified) header file in another file is considered normal + * use of U-Boot, and does *not* fall under the heading of "derived + * work". + ******************************************************************** + */ + +#ifndef _U_BOOT_H_ +#define _U_BOOT_H_ 1 + +#include <environment.h> + +typedef struct bd_info { + int bi_baudrate; /* serial console baudrate */ + unsigned long bi_ip_addr; /* IP Address */ + unsigned char bi_enetaddr[6]; /* Ethernet adress */ + + env_t *bi_env; + unsigned long bi_arch_number; /* unique id for this board */ + unsigned long bi_boot_params; /* where this board expects params */ + + unsigned long bi_memstart; /* start of DRAM memory */ + unsigned long bi_memsize; /* size of DRAM memory in bytes */ + unsigned long bi_flashstart; /* start of FLASH memory */ + unsigned long bi_flashsize; /* size of FLASH memory */ + unsigned long bi_flashoffset; /* reserved area for startup monitor */ + + struct /* RAM configuration */ + { + unsigned long start; + unsigned long size; + } bi_dram[CONFIG_NR_DRAM_BANKS]; +} bd_t; + +#endif /* _U_BOOT_H_ */ diff --git a/arch/nds32/include/asm/unaligned.h b/arch/nds32/include/asm/unaligned.h new file mode 100644 index 0000000..ffa7e30 --- /dev/null +++ b/arch/nds32/include/asm/unaligned.h @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2016 Andes Technology Corporation + * Copyright (C) 2011 Macpaul Lin (macpaul(a)andestech.com) + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#ifndef _ASM_NDS_UNALIGNED_H +#define _ASM_NDS_UNALIGNED_H + +#include <compiler.h> +/* + * Select endianness + */ +#ifndef __NDSEB__ +#define get_unaligned __get_unaligned_le +#define put_unaligned __put_unaligned_le +#else +#define get_unaligned __get_unaligned_be +#define put_unaligned __put_unaligned_be +#endif /* __NDSEB__ */ + +#include <asm/byteorder.h> + +#include <linux/unaligned/le_byteshift.h> +#include <linux/unaligned/be_byteshift.h> +#include <linux/unaligned/generic.h> + +#endif /* _ASM_NDS_UNALIGNED_H */ -- 1.7.3.5

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[U-Boot] P2020 L2 cache as SRAM
by Fabian Cenedese 19 Oct '11

19 Oct '11

Hi We're trying to configure the PPC P2020 cpu to use the L2 cache as SRAM so we can load the U-Boot code in there. However we stumble into problems. Sometimes the cpu goes on trap when trying to access this area. Sometimes there's no trap but we seem to access a different area. That's probably a problem with setting up a TLB/LAW. Has anybody already done this and could share some code with us? I've seen that there's a mpc85xx branch with quite some work going on. Where should we base our work on? Should we use the master or is it better to use this branch? I'm used to svn, not git, so there may be other options I don't know about yet. Thanks bye Fabi

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