July 2011 - U-Boot

[U-Boot] Winning details
by Apple Inc. 20 Jul '11

20 Jul '11

Apple Inc. PO Box 251 Watford WD18 9BR Registration details Registered office: Tolpits Lane, Watford, Herts WD18 9RN Registered in England and Wales No. 2822203 APPLE 30TH WORLD-WIDE ANNIVERSARY CELEBRATION PROMO. This program is organized by Apple Company, endorsed by the European Promo guild in conjunction with NGO organizations in Switzerland. We are pleased to inform you of the result of the just concluded draws of Apple Inc Promo program, Apple Promo draw was conducted on-line by an automated random computer ballot Search from the Internet. No tickets were sold. This draw is conducted to mark Apple 30th years of production. Apple 30th Anniversary Promo was conducted from an exclusive list of e-mail addresses of individual and corporate bodies. The selection process was carried out through random selection in our computerized email selection machine from a database of over 2,500,000 email addresses drawn from all the continents of the world. Emails were provided by the entire register domain. This result is now released to you. And your email address attached in the A Category. All email addresses were selected through a computer ballot system in which your email address was selected as one of the lucky winners, your lucky number is: (01) (04) (28) (26) (27) (49) (21). And bonus ball number (29), which consequently emerged you as the only winner in the United Kingdom Booklet. You been approved for a lump prize off of £1,400,000 (One Million, Four Hundred Thousand British pounds) in cash credited to File AP/E07/2011. To begin your claim, you are required to send the necessary information to our London help line below: Name---- Country---- Address--- Occupation--- Lucky number--- bonus ball number--- Apple Inc Promo Information and Payment Bureau: London Representative Office. Help Service Contact Tel: +44-703-596-0866 Tel: +44-702-408-5616 Tel: +44-703-597-0143 Fax: +44-844-774-2197 Email: apple.anniversary(a)live.com Cc Selina Dulge Promotions Manager Apple Promo Board

1 0

[U-Boot] [RFC PATCH] armv7: setup vector
by Aneesh V 20 Jul '11

20 Jul '11

The vector is not correctly setup in armv7 except for OMAP3. Correcting this. Signed-off-by: Aneesh V <aneesh(a)ti.com> Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> --- arch/arm/cpu/armv7/start.S | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 89ea01f..9ffdfe2 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -32,6 +32,7 @@ #include <asm-offsets.h> #include <config.h> #include <version.h> +#include <asm/system.h> .globl _start _start: b reset @@ -143,6 +144,15 @@ reset: orr r0, r0, #0xd3 msr cpsr,r0 + /* Set V=0 in CP15 SCTRL register - for VBAR to point to vector */ + mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTRL Register + bic r0, #CR_V @ V = 0 + mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTRL Register + + /* Set vector address in CP15 VBAR register */ + ldr r0, =_start + mcr p15, 0, r0, c12, c0, 0 @Set VBAR + #if defined(CONFIG_OMAP34XX) /* Copy vectors to mask ROM indirect addr */ adr r0, _start @ r0 <- current position of code -- 1.7.0.4

1 0

[U-Boot] [PATCH] powerpc/8xxx: Update USB mode device tree fixup
by Ramneek Mehresh 20 Jul '11

20 Jul '11

Modify support for USB mode fixup: - Add common support for USB mode and phy type device tree fix-up for all USB controllers mentioned in hwconfig string - Fetch USB mode and phy type via hwconfig; if not defined in hwconfig, then fetch them from env Signed-off-by: Ramneek Mehresh <ramneek.mehresh(a)freescale.com> --- arch/powerpc/cpu/mpc8xxx/fdt.c | 77 +++++++++++++++++++++++++++++++++------ 1 files changed, 65 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 520cb90..d9e3e7e 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -29,6 +29,10 @@ #include <asm/mp.h> #include <asm/fsl_serdes.h> #include <phy.h> +#include <hwconfig.h> +#ifdef CONFIG_HAS_FSL_DR_USB +#include <usb.h> +#endif #if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) static int ft_del_cpuhandle(void *blob, int cpuhandle) @@ -84,22 +88,18 @@ void ft_fixup_num_cores(void *blob) { #endif /* defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) */ #ifdef CONFIG_HAS_FSL_DR_USB -void fdt_fixup_dr_usb(void *blob, bd_t *bd) +static void fdt_fixup_usb_mode_phy_type(void *blob, const char *mode, + const char *phy_type) { - char *mode; - char *type; const char *compat = "fsl-usb2-dr"; const char *prop_mode = "dr_mode"; const char *prop_type = "phy_type"; + static int start_offset = -1; int node_offset; int err; - mode = getenv("usb_dr_mode"); - type = getenv("usb_phy_type"); - if (!mode && !type) - return; - - node_offset = fdt_node_offset_by_compatible(blob, 0, compat); + node_offset = fdt_node_offset_by_compatible(blob, + start_offset, compat); if (node_offset < 0) { printf("WARNING: could not find compatible node %s: %s.\n", compat, fdt_strerror(node_offset)); @@ -114,13 +114,66 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) prop_mode, compat, fdt_strerror(err)); } - if (type) { - err = fdt_setprop(blob, node_offset, prop_type, type, - strlen(type) + 1); + if (phy_type) { + err = fdt_setprop(blob, node_offset, prop_type, phy_type, + strlen(phy_type) + 1); if (err < 0) printf("WARNING: could not set %s for %s: %s.\n", prop_type, compat, fdt_strerror(err)); } + + start_offset = node_offset; +} + +void fdt_fixup_dr_usb(void *blob, bd_t *bd) +{ + const char *modes[] = { "host", "peripheral", "otg" }; + const char *phys[] = { "ulpi", "umti" }; + const char *mode = NULL; + const char *phy_type = NULL; + char usb1_defined = 0; + char str[5]; + int i, j; + + for (i = 1; i <= USB_MAX_DEVICE; i++) { + int mode_idx = -1, phy_idx = -1; + sprintf(str, "%s%d", "usb", i); + if (hwconfig(str)) { + for (j = 0; j < sizeof(modes); j++) { + if (hwconfig_subarg_cmp(str, "dr_mode", + modes[j])) { + mode_idx = j; + break; + } + } + for (j = 0; j < sizeof(phys); j++) { + if (hwconfig_subarg_cmp(str, "phy_type", + phys[j])) { + phy_idx = j; + break; + } + } + if (mode_idx >= 0) + fdt_fixup_usb_mode_phy_type(blob, + modes[mode_idx], NULL); + if (phy_idx >= 0) + fdt_fixup_usb_mode_phy_type(blob, + NULL, phys[phy_idx]); + if (!strcmp(str, "usb1")) + usb1_defined = 1; + if (mode_idx < 0 && phy_idx < 0) + printf("WARNING: invalid phy or mode\n"); + } else { + break; + } + } + if (!usb1_defined) { + mode = getenv("usb_dr_mode"); + phy_type = getenv("usb_phy_type"); + if (!mode && !phy_type) + return; + fdt_fixup_usb_mode_phy_type(blob, mode, phy_type); + } } #endif /* CONFIG_HAS_FSL_DR_USB */ -- 1.6.1

5 5

[U-Boot] ARM POST Tests.
by sreekumar.sivakumar＠wipro.com 20 Jul '11

20 Jul '11

Hello , I am new to u-boot code. I had a requirement for running memory, cpu and cache tests as part of diagnostics, on an ARM based platform. After going through the code, I found that only PPC variants are available for cpu and cache post tests. 1) Is that a limitation, or Is it some sort of misunderstanding on my side? 2) If NO, Is there a branch or patch I can pickup which will have ARM POST tests for cache and cpu? Your advice will be of great help. Thanks, Sreekumar Please do not print this email unless it is absolutely necessary. The information contained in this electronic message and any attachments to this message are intended for the exclusive use of the addressee(s) and may contain proprietary, confidential or privileged information. If you are not the intended recipient, you should not disseminate, distribute or copy this e-mail. Please notify the sender immediately and destroy all copies of this message and any attachments. WARNING: Computer viruses can be transmitted via email. The recipient should check this email and any attachments for the presence of viruses. The company accepts no liability for any damage caused by any virus transmitted by this email. www.wipro.com

5 8

[U-Boot] i.MX51: FEC: Cache coherency problem?
by David Jander 20 Jul '11

20 Jul '11

Hi all, I am busy debugging a problem with the i.MX51 FEC ethernet driver, that stopped working after upgrading u-boot. Before the upgrade I used v2010.06-rc3, which worked fine. I gave up on trying to find the difference beween the old version and this one that broke it.... due to BSP issues, git bisecting seems a monumental task I am not considering yet. The funny part is that it seems to work fine if I disable data-caches! With data caches enabled, it hangs in the following while loop in fec_send(), at line 592: ... 584 /* 585 * Enable SmartDMA transmit task 586 */ 587 fec_tx_task_enable(fec); 588 589 /* 590 * wait until frame is sent . 591 */ 592 while (readw(&fec->tbd_base[fec->tbd_index].status) & FEC_TBD_READY) { 593 udelay(1); 594 } ... If I change this code in the following way, the while loop exits successfully: ... 584 /* 585 * Enable SmartDMA transmit task 586 */ 587 flush_cache(&fec->tbd_base[fec->tbd_index], 4); 588 fec_tx_task_enable(fec); 589 flash_dcache_all(); 590 591 /* 592 * wait until frame is sent . 593 */ 594 while (readw(&fec->tbd_base[fec->tbd_index].status) & FEC_TBD_READY) { 595 udelay(1); 596 } ... Notice the cache flush calls at line 587 and 589. With these, sending succeeds. The driver still hangs in receiving afterwards, but at least this part seems to work. If I remove either of the two added lines, it stops working again. What is going on here? Why did this work with caches enabled before?? Best regards, -- David Jander Protonic Holland.

8 31

Re: [U-Boot] [PATCH 1/4] gpio: Adds GPIO driver support for Armada100
by Ajay Bhargav 20 Jul '11

20 Jul '11

----- "Prafulla Wadaskar" <prafulla(a)marvell.com> wrote: > > That can be thought of while adding support for othe SoCs. > Preferably define register struct in asm/arch/gpio.h > > Regards.. > Prafulla . . > ..snip.. (quoting from another reply..) > You have to follow all :-), more reviewers more better code output. > BASE+OFFSET strictly not recommended. > I think lei and me are suggesting similar things, macros should be used precisely, the code should be small and smarter. Hi Prafulla, I agree that macros make code look smaller and smarter. Now if you see the registers of GPIO they are not in order, I mean i cannot group together particular gpio set. can i do it this way, e.g. struct armdgpio_gplr_register { u32 gplr0; u32 gplr1; u32 gplr2; u8 pad[some_value]; //this padding is going to be big u32 gplr3; } then while using this particular set i can just use ARMD1_GPLR_BASE ( = ARMD1_GPIO_BASE + GPLR_OFFSET). moreover i am not using all the registers so i define only those register sets which are in use. what you say about this? Regards, Ajay Bhargav

3 8

[U-Boot] Please Pull u-boot-ti/master
by s-paulraj＠ti.com 20 Jul '11

20 Jul '11

Albert, Please pull u-boot-ti/master. I am working on some other patches from Aneesh as well. I will send a pull request for that as well as remaining u-boot-ti patches in due course of time. Regards, Sandeep The following changes since commit 68d4230c3ccce96a72c5b99e48399bf1796fe3c6: Ramneek Mehresh (1): powerpc/85xx: Add default usb mode and phy type to hwconfig are available in the git repository at: git://git.denx.de/u-boot-ti.git master Laurence Withers (6): DaVinci: rename gpio_defs.h to gpio.h DA8xx: add generic GPIO driver DaVinci EMAC: declare function for all DA8xx CPUs DA8xx: add MMC/SD controller addresses DA8xx: switch an enum to defines for consistency DA8xx: fix LPSC constants Sanjeev Premi (3): omap3: Include array definition only when it is used omap3evm: eth: split function setup_net_chip omap3evm: eth: Include functions only when necessary Sriramakrishnan (1): omap3evm: Update ethernet reset sequence for Rev.G board Yegor Yefremov (1): am3517evm: change console device from ttyS2 to ttyO2 arch/arm/cpu/armv7/omap3/sys_info.c | 3 + arch/arm/include/asm/arch-davinci/davinci_misc.h | 2 +- .../asm/arch-davinci/{gpio_defs.h => gpio.h} | 8 + arch/arm/include/asm/arch-davinci/hardware.h | 102 +++++--- board/davinci/dm355leopard/dm355leopard.c | 2 +- board/davinci/dm365evm/dm365evm.c | 2 +- board/ti/evm/evm.c | 45 +++- board/ti/evm/evm.h | 1 + drivers/gpio/Makefile | 1 + drivers/gpio/da8xx_gpio.c | 281 ++++++++++++++++++++ drivers/usb/musb/da8xx.h | 2 +- include/configs/am3517_evm.h | 2 +- 12 files changed, 397 insertions(+), 54 deletions(-) rename arch/arm/include/asm/arch-davinci/{gpio_defs.h => gpio.h} (90%) create mode 100644 drivers/gpio/da8xx_gpio.c

3 3

[U-Boot] [PATCH] integratorcp: make the board compile
by Linus Walleij 20 Jul '11

20 Jul '11

This defines the requires CONFIG_SYS_* variables to make the Integrator CP board compile. Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- This complements the other Integrator patches so that the CP variants also build cleanly with the new build system. --- include/configs/integratorcp.h | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 210bc9d..e9b68c6 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -142,6 +142,12 @@ SIB at Block62 End Block62 address 0x24f80000 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- * FLASH and environment organization -- 1.7.6

1 0

Re: [U-Boot] [PATCH 1/4] gpio: Adds GPIO driver support for Armada100
by Ajay Bhargav 20 Jul '11

20 Jul '11

Hi Lei, > I am not mixing those two concept together, and in our pratice, we > also do as you said, > use mfp to set that pin to GPIO state, and use gpio function to > manupulate the gpio. > So there is no need checking MFP setting for gpio requreset. Directly > set would be ok. exactly... so here is code snip from my patch and Prafulla's reply. --- > > +int gpio_request(int gp, const char *label) > > +{ > > + /* > > + * Assumes corresponding MFP is configured peoperly > > + * for use as GPIO > > + */ > > NAK, you should check here, respective MFP is being configured as GPIO, if not you should return error > > > + return 0; > > +} > > + --- > BTW, why there is need the gpio_request function? > You can request a pin as GPIO for using within your code. In Linux Kernel source this function checks for valid number and if requested pin is in use or not. To check this they have used a very simple logic. ..pseudo code.. if(pin_label == NULL) pin is free else pin in use I think I should do the same thing in my request function rather than going for complicated stuff, what you say? > > Actually, we use the same gpio driver for several series till now. > And configure pin as GPIO(AF0 or whatever) is the business of MFP. > right.. Regards, Ajay Bhargav

2 2

Re: [U-Boot] [PATCH 1/4] gpio: Adds GPIO driver support for Armada100
by Ajay Bhargav 20 Jul '11

20 Jul '11

Hi Lei, > Actually, as uboot target at small size, I tend to don't add too much > logic to it. So there is no need to > check the "MAX", if one need to set the gpio, he should notice by > himself, the gpio number he specified > is a valid gpio address in the system. Yeah so i made this assumption already that gpio entered has to be valid. But do you think checking MFP setup for each gpio requested is good? this way we are mixing MFP with GPIO again. If a person want to use a GPIO he should know that MFP has to be configured before using as GPIO. That's the reason we have a mfp driver. and I don't think MFP logic written once for one series can be applied to all series to find out if Selected function is GPIO or not. In Armada100 series not all MFPs have AF0 as GPIO. That's the reason I left gpio_request function returning only 0. Even in Linux kernel source if you see, gpio_request just checks for valid pin gpio number nothing more than that. I seriously need some input to move ahead. Regards, Ajay Bhargav

2 1