March 2011 - U-Boot

[U-Boot] [PATCH] OMAP[34]: fix broken timer
by John Rigby 29 Jun '11

29 Jun '11

As implemented now the timer used to implement __udelay counts to 0xffffffff and then gets stuck there because the the programmed reload value is 0xffffffff. This value is not only wrong but illegal according to the reference manual. One can reproduce the bug by leaving a board at the u-boot prompt for sometime then issuing a sleep command. The sleep will hang forever. The timer is a count up timer that reloads as it rolls over from 0xffffffff so the correct load value is 0. Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff. Signed-off-by: John Rigby <john.rigby(a)linaro.org> --- arch/arm/cpu/armv7/omap-common/timer.c | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index 9beebb1..59bbca8 100644 --- a/arch/arm/cpu/armv7/omap-common/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -43,8 +43,9 @@ static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; * Nothing really to do with interrupts, just starts up a counter. */ -#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) -#define TIMER_LOAD_VAL 0xffffffff +#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) +#define TIMER_OVERFLOW_VAL 0xffffffff +#define TIMER_LOAD_VAL 0 int timer_init(void) { @@ -86,7 +87,7 @@ void __udelay(unsigned long usec) while (tmo > 0) { now = readl(&timer_base->tcrr); if (last > now) /* count up timer overflow */ - tmo -= TIMER_LOAD_VAL - last + now; + tmo -= TIMER_OVERFLOW_VAL - last + now + 1; else tmo -= now - last; last = now; -- 1.7.3.1.120.g38a18

3 2

[U-Boot] [PATCH v2 00/10] armv7: cache maintenance operations
by Aneesh V 28 Jun '11

28 Jun '11

With D-cache and MMU enabled for ARM in u-boot it becomes imperative to support a minimal set of cache maintenance operations and necessary initializations before enabling MMU. This series of patches attempt to do the following for armv7: * Necessary initialization sequence before enabling MMU that includes invalidation of TLB, data caches, branch predictor array etc. * Framework for supporting SOC specific outer caches in a generic manner (using a structure of function pointers - inspired by the Linux implementation) * Generic armv7 cache maintenance operations for caches known to the CPU * Support for ARM PL310 L2 cache controller used in OMAP4 * Cleanup of the cleanup_before_linux() function * Adapting all armv7 SOCs to use the new framework and removing duplicated code Testing: * Extensive testing on OMAP4430SDP and OMAP3430SDP by creating coherency issues and solving them using the maintenance routines - Eg: memfill a region of memory with a known pattern - Invalidate the region - Read back and compare the region with the original pattern - If match fails it means that invalidate is successful - Now add a flush call just before the invalidate - If match succeeds it means that flush was successful - Outer caches were tested with experiments involving making the function pointers NULL * Kernel booting on OMAP4430SDP and OMAP3430SDP Note: v2 has been tested only on OMAP4430SDP v2: * Pointer based callback mechanism for outer cache operations changed to a weakly linked functions. * Change -march=armv7-a back to armv5 * Moved utility macros out of armv7.h * Added documentation for new CONFIG options. * Changed implementation of log2n to not use CLZ instruction as armv4 doesn't support this instruction and newly added Tegra2 uses -march=armv4 * Blank line after local variable declarations - fixed globally * Explicitly added an empty flush_cache() under #ifdef CONFIG_SYS_NO_DCACHE * Removed the print inside the weakly linked stub function - __arm_init_before_mmu * Fixed signature of flush_cache in cache.c * More descriptive commit message for the PL310 support patch * C struct for PL310 register accesses * Fixed white space issues Aneesh V (10): arm: make default implementation of cache_flush() weakly linked armv7: add miscellaneous utility macros armv7: cache maintenance operations for armv7 armv7: replace CONFIG_L2_OFF with CONFIG_SYS_NO_L2CACHE armv7: integrate cache maintenance support arm: minor fixes for cache and mmu handling armv7: add PL310 support to u-boot armv7: adapt omap4 to the new cache maintenance framework armv7: adapt omap3 to the new cache maintenance framework armv7: adapt s5pc1xx to the new cache maintenance framework README | 11 + arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/cache_v7.c | 390 +++++++++++++++++++++++++ arch/arm/cpu/armv7/cpu.c | 51 ++-- arch/arm/cpu/armv7/omap3/Makefile | 1 - arch/arm/cpu/armv7/omap3/board.c | 138 ++++++++-- arch/arm/cpu/armv7/omap3/cache.S | 263 ----------------- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 32 ++ arch/arm/cpu/armv7/omap4/lowlevel_init.S | 18 ++ arch/arm/cpu/armv7/s5pc1xx/cache.S | 88 +----- arch/arm/cpu/armv7/start.S | 18 +- arch/arm/include/asm/arch-omap3/omap3.h | 20 ++ arch/arm/include/asm/arch-omap3/sys_proto.h | 10 +- arch/arm/include/asm/arch-omap4/sys_proto.h | 1 - arch/arm/include/asm/arch-s5pc1xx/sys_proto.h | 3 - arch/arm/include/asm/armv7.h | 68 +++++ arch/arm/include/asm/pl310.h | 74 +++++ arch/arm/include/asm/utils.h | 80 +++++ arch/arm/lib/Makefile | 1 + arch/arm/lib/board.c | 6 + arch/arm/lib/cache-cp15.c | 16 +- arch/arm/lib/cache-pl310.c | 116 ++++++++ arch/arm/lib/cache.c | 20 +- include/common.h | 5 +- include/configs/ca9x4_ct_vxp.h | 2 +- include/configs/efikamx.h | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53evk.h | 2 +- include/configs/omap4_panda.h | 8 +- include/configs/omap4_sdp4430.h | 8 +- include/configs/s5pc210_universal.h | 2 +- include/configs/tegra2-common.h | 2 +- include/configs/vision2.h | 2 +- 33 files changed, 1037 insertions(+), 425 deletions(-) create mode 100644 arch/arm/cpu/armv7/cache_v7.c delete mode 100644 arch/arm/cpu/armv7/omap3/cache.S create mode 100644 arch/arm/include/asm/armv7.h create mode 100644 arch/arm/include/asm/pl310.h create mode 100644 arch/arm/include/asm/utils.h create mode 100644 arch/arm/lib/cache-pl310.c

9 104

[U-Boot] convention for SPI dummy data?
by wolfgang＠leila.ping.de 13 Jun '11

13 Jun '11

Hi, I have finally got MMC/SD working on my coldfire board and would like to send some patches. However, one of the things I had to change was the dummy data sent out by SPI for read-only transactions. The original driver had all zeros, for SD/MMC all ones (0xFF) is needed. Is such a change acceptable, or is there any configuration option/flag I could use? Regards, Wolfgang

4 7

[U-Boot] [PATCH ATMEL REWORK][V3] update arm/at91rm9200 work with rework rework110202
by Jens Scharsig 06 Jun '11

06 Jun '11

* convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme * Fix: timer.c compile error io.h not found with arm/at91rm9200 * update arm920t/at91 to ATMEL_xxx name scheme * update arm920t/at91 soc lib * update at91_emac driver Signed-off-by: Jens Scharsig <js_at_ng(a)scharsoft.de> --- Changes since V2 whith space fix arch/arm/cpu/arm920t/at91/reset.c | 2 +- arch/arm/cpu/arm920t/at91/timer.c | 12 +- arch/arm/include/asm/arch-at91/at91_mc.h | 12 +- arch/arm/include/asm/arch-at91/at91_pmc.h | 10 +- arch/arm/include/asm/arch-at91/at91rm9200.h | 209 ++++++++++++++------------- board/BuS/eb_cpux9k2/cpux9k2.c | 52 ++++---- board/atmel/at91rm9200ek/at91rm9200ek.c | 4 +- board/atmel/at91rm9200ek/led.c | 22 ++-- drivers/net/at91_emac.c | 32 ++-- include/configs/at91rm9200ek.h | 5 +- include/configs/eb_cpux9k2.h | 23 ++-- 11 files changed, 196 insertions(+), 187 deletions(-) diff --git a/arch/arm/cpu/arm920t/at91/reset.c b/arch/arm/cpu/arm920t/at91/reset.c index 51043ec..4fa0f98 100644 --- a/arch/arm/cpu/arm920t/at91/reset.c +++ b/arch/arm/cpu/arm920t/at91/reset.c @@ -42,7 +42,7 @@ void __attribute__((weak)) board_reset(void) void reset_cpu(ulong ignored) { - at91_st_t *st = (at91_st_t *) AT91_ST_BASE; + at91_st_t *st = (at91_st_t *) ATMEL_BASE_ST; #if defined(CONFIG_AT91RM9200_USART) /*shutdown the console to avoid strange chars during reset */ serial_exit(); diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c index d9a024f..f0ad7d6 100644 --- a/arch/arm/cpu/arm920t/at91/timer.c +++ b/arch/arm/cpu/arm920t/at91/timer.c @@ -32,7 +32,7 @@ #include <common.h> -#include <asm/arch/io.h> +#include <asm/io.h> #include <asm/arch/hardware.h> #include <asm/arch/at91_tc.h> #include <asm/arch/at91_pmc.h> @@ -44,11 +44,11 @@ DECLARE_GLOBAL_DATA_PTR; int timer_init(void) { - at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; /* enables TC1.0 clock */ - writel(1 << AT91_ID_TC0, &pmc->pcer); /* enable clock */ + writel(1 << ATMEL_ID_TC0, &pmc->pcer); /* enable clock */ writel(0, &tc->bcr); writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE | @@ -96,14 +96,14 @@ void __udelay(unsigned long usec) void reset_timer_masked(void) { /* reset time */ - at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE; + at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff; gd->tbl = 0; } ulong get_timer_raw(void) { - at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE; + at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; u32 now; now = readl(&tc->tc[0].cv) & 0x0000ffff; diff --git a/arch/arm/include/asm/arch-at91/at91_mc.h b/arch/arm/include/asm/arch-at91/at91_mc.h index acfbd10..e0d1320 100644 --- a/arch/arm/include/asm/arch-at91/at91_mc.h +++ b/arch/arm/include/asm/arch-at91/at91_mc.h @@ -23,12 +23,12 @@ #ifndef AT91_MC_H #define AT91_MC_H -#define AT91_ASM_MC_EBI_CSA (AT91_MC_BASE + 0x60) -#define AT91_ASM_MC_EBI_CFG (AT91_MC_BASE + 0x64) -#define AT91_ASM_MC_SMC_CSR0 (AT91_MC_BASE + 0x70) -#define AT91_ASM_MC_SDRAMC_MR (AT91_MC_BASE + 0x90) -#define AT91_ASM_MC_SDRAMC_TR (AT91_MC_BASE + 0x94) -#define AT91_ASM_MC_SDRAMC_CR (AT91_MC_BASE + 0x98) +#define AT91_ASM_MC_EBI_CSA (ATMEL_BASE_MC + 0x60) +#define AT91_ASM_MC_EBI_CFG (ATMEL_BASE_MC + 0x64) +#define AT91_ASM_MC_SMC_CSR0 (ATMEL_BASE_MC + 0x70) +#define AT91_ASM_MC_SDRAMC_MR (ATMEL_BASE_MC + 0x90) +#define AT91_ASM_MC_SDRAMC_TR (ATMEL_BASE_MC + 0x94) +#define AT91_ASM_MC_SDRAMC_CR (ATMEL_BASE_MC + 0x98) #ifndef __ASSEMBLY__ diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h b/arch/arm/include/asm/arch-at91/at91_pmc.h index fb8bb17..086cb9b 100644 --- a/arch/arm/include/asm/arch-at91/at91_pmc.h +++ b/arch/arm/include/asm/arch-at91/at91_pmc.h @@ -17,11 +17,11 @@ #ifndef AT91_PMC_H #define AT91_PMC_H -#define AT91_ASM_PMC_MOR (AT91_PMC_BASE + 0x20) -#define AT91_ASM_PMC_PLLAR (AT91_PMC_BASE + 0x28) -#define AT91_ASM_PMC_PLLBR (AT91_PMC_BASE + 0x2c) -#define AT91_ASM_PMC_MCKR (AT91_PMC_BASE + 0x30) -#define AT91_ASM_PMC_SR (AT91_PMC_BASE + 0x68) +#define AT91_ASM_PMC_MOR (ATMEL_BASE_PMC + 0x20) +#define AT91_ASM_PMC_PLLAR (ATMEL_BASE_PMC + 0x28) +#define AT91_ASM_PMC_PLLBR (ATMEL_BASE_PMC + 0x2c) +#define AT91_ASM_PMC_MCKR (ATMEL_BASE_PMC + 0x30) +#define AT91_ASM_PMC_SR (ATMEL_BASE_PMC + 0x68) #ifndef __ASSEMBLY__ diff --git a/arch/arm/include/asm/arch-at91/at91rm9200.h b/arch/arm/include/asm/arch-at91/at91rm9200.h index 1bee6f2..19ad7f4 100644 --- a/arch/arm/include/asm/arch-at91/at91rm9200.h +++ b/arch/arm/include/asm/arch-at91/at91rm9200.h @@ -21,115 +21,126 @@ #ifndef __AT91RM9200_H__ #define __AT91RM9200_H__ +#define CONFIG_AT91FAMILY /* it's a member of AT91 */ +#define CONFIG_ARM920T /* This is an ARM920T Core */ + /* Periperial Identifiers */ -#define AT91_ID_SYS 1 /* System Peripheral */ -#define AT91_ID_PIOA 2 /* PIO port A */ -#define AT91_ID_PIOB 3 /* PIO port B */ -#define AT91_ID_PIOC 4 /* PIO port C */ -#define AT91_ID_PIOD 5 /* PIO port D BGA only */ -#define AT91_ID_USART0 6 /* USART 0 */ -#define AT91_ID_USART1 7 /* USART 1 */ -#define AT91_ID_USART2 8 /* USART 2 */ -#define AT91_ID_USART3 9 /* USART 3 */ -#define AT91_ID_MCI 10 /* Multimedia Card Interface */ -#define AT91_ID_UDP 11 /* USB Device Port */ -#define AT91_ID_TWI 12 /* Two Wire Interface */ -#define AT91_ID_SPI 13 /* Serial Peripheral Interface */ -#define AT91_ID_SSC0 14 /* Synch. Serial Controller 0 */ -#define AT91_ID_SSC1 15 /* Synch. Serial Controller 1 */ -#define AT91_ID_SSC2 16 /* Synch. Serial Controller 2 */ -#define AT91_ID_TC0 17 /* Timer Counter 0 */ -#define AT91_ID_TC1 18 /* Timer Counter 1 */ -#define AT91_ID_TC2 19 /* Timer Counter 2 */ -#define AT91_ID_TC3 20 /* Timer Counter 3 */ -#define AT91_ID_TC4 21 /* Timer Counter 4 */ -#define AT91_ID_TC5 22 /* Timer Counter 5 */ -#define AT91_ID_UHP 23 /* OHCI USB Host Port */ -#define AT91_ID_EMAC 24 /* Ethernet MAC */ -#define AT91_ID_IRQ0 25 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ1 26 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ2 27 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ3 28 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ4 29 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ5 30 /* Advanced Interrupt Controller */ -#define AT91_ID_IRQ6 31 /* Advanced Interrupt Controller */ - -#define AT91_USB_HOST_BASE 0x00300000 - -#define AT91_TC_BASE 0xFFFA0000 -#define AT91_UDP_BASE 0xFFFB0000 -#define AT91_MCI_BASE 0xFFFB4000 -#define AT91_TWI_BASE 0xFFFB8000 -#define AT91_EMAC_BASE 0xFFFBC000 -#define AT91_USART_BASE 0xFFFC0000 /* 4x 0x4000 Offset */ -#define AT91_SCC_BASE 0xFFFD0000 /* 4x 0x4000 Offset */ -#define AT91_SPI_BASE 0xFFFE0000 - -#define AT91_AIC_BASE 0xFFFFF000 -#define AT91_DBGU_BASE 0xFFFFF200 -#define AT91_PIO_BASE 0xFFFFF400 /* 4x 0x200 Offset */ -#define AT91_PMC_BASE 0xFFFFFC00 -#define AT91_ST_BASE 0xFFFFFD00 -#define AT91_ST_BASE 0xFFFFFD00 -#define AT91_RTC_BASE 0xFFFFFE00 -#define AT91_MC_BASE 0xFFFFFF00 +#define ATMEL_ID_SYS 1 /* System Peripheral */ +#define ATMEL_ID_PIOA 2 /* PIO port A */ +#define ATMEL_ID_PIOB 3 /* PIO port B */ +#define ATMEL_ID_PIOC 4 /* PIO port C */ +#define ATMEL_ID_PIOD 5 /* PIO port D BGA only */ +#define ATMEL_ID_USART0 6 /* USART 0 */ +#define ATMEL_ID_USART1 7 /* USART 1 */ +#define ATMEL_ID_USART2 8 /* USART 2 */ +#define ATMEL_ID_USART3 9 /* USART 3 */ +#define ATMEL_ID_MCI 10 /* Multimedia Card Interface */ +#define ATMEL_ID_UDP 11 /* USB Device Port */ +#define ATMEL_ID_TWI 12 /* Two Wire Interface */ +#define ATMEL_ID_SPI 13 /* Serial Peripheral Interface */ +#define ATMEL_ID_SSC0 14 /* Synch. Serial Controller 0 */ +#define ATMEL_ID_SSC1 15 /* Synch. Serial Controller 1 */ +#define ATMEL_ID_SSC2 16 /* Synch. Serial Controller 2 */ +#define ATMEL_ID_TC0 17 /* Timer Counter 0 */ +#define ATMEL_ID_TC1 18 /* Timer Counter 1 */ +#define ATMEL_ID_TC2 19 /* Timer Counter 2 */ +#define ATMEL_ID_TC3 20 /* Timer Counter 3 */ +#define ATMEL_ID_TC4 21 /* Timer Counter 4 */ +#define ATMEL_ID_TC5 22 /* Timer Counter 5 */ +#define ATMEL_ID_UHP 23 /* OHCI USB Host Port */ +#define ATMEL_ID_EMAC 24 /* Ethernet MAC */ +#define ATMEL_ID_IRQ0 25 /* Advanced Interrupt Controller */ +#define ATMEL_ID_IRQ1 26 /* Advanced Interrupt Controller */ +#define ATMEL_ID_IRQ2 27 /* Advanced Interrupt Controller */ +#define ATMEL_ID_IRQ3 28 /* Advanced Interrupt Controller */ +#define ATMEL_ID_IRQ4 29 /* Advanced Interrupt Controller */ +#define ATMEL_ID_IRQ5 30 /* Advanced Interrupt Controller */ +#define ATMEL_ID_IRQ6 31 /* Advanced Interrupt Controller */ + +#define ATMEL_USB_HOST_BASE 0x00300000 + +#define ATMEL_BASE_TC 0xFFFA0000 +#define ATMEL_BASE_UDP 0xFFFB0000 +#define ATMEL_BASE_MCI 0xFFFB4000 +#define ATMEL_BASE_TWI 0xFFFB8000 +#define ATMEL_BASE_EMAC 0xFFFBC000 +#define ATMEL_BASE_USART 0xFFFC0000 /* 4x 0x4000 Offset */ +#define ATMEL_BASE_USART0 ATMEL_BASE_USART +#define ATMEL_BASE_USART1 (ATMEL_BASE_USART + 0x4000) +#define ATMEL_BASE_USART2 (ATMEL_BASE_USART + 0x8000) +#define ATMEL_BASE_USART3 (ATMEL_BASE_USART + 0xC000) + +#define ATMEL_BASE_SCC 0xFFFD0000 /* 4x 0x4000 Offset */ +#define ATMEL_BASE_SPI 0xFFFE0000 + +#define ATMEL_BASE_AIC 0xFFFFF000 +#define ATMEL_BASE_DBGU 0xFFFFF200 +#define ATMEL_BASE_PIO 0xFFFFF400 /* 4x 0x200 Offset */ +#define ATMEL_BASE_PMC 0xFFFFFC00 +#define ATMEL_BASE_ST 0xFFFFFD00 +#define ATMEL_BASE_RTC 0xFFFFFE00 +#define ATMEL_BASE_MC 0xFFFFFF00 +#define AT91_PIO_BASE ATMEL_BASE_PIO /* AT91RM9200 Periperial Multiplexing A */ /* Port A */ -#define AT91_PMX_AA_EREFCK 0x00000080 -#define AT91_PMX_AA_ETXCK 0x00000080 -#define AT91_PMX_AA_ETXEN 0x00000100 -#define AT91_PMX_AA_ETX0 0x00000200 -#define AT91_PMX_AA_ETX1 0x00000400 -#define AT91_PMX_AA_ECRS 0x00000800 -#define AT91_PMX_AA_ECRSDV 0x00000800 -#define AT91_PMX_AA_ERX0 0x00001000 -#define AT91_PMX_AA_ERX1 0x00002000 -#define AT91_PMX_AA_ERXER 0x00004000 -#define AT91_PMX_AA_EMDC 0x00008000 -#define AT91_PMX_AA_EMDIO 0x00010000 - -#define AT91_PMX_AA_TXD2 0x00810000 - -#define AT91_PMX_AA_TWD 0x02000000 -#define AT91_PMX_AA_TWCK 0x04000000 +#define ATMEL_PMX_AA_EREFCK 0x00000080 +#define ATMEL_PMX_AA_ETXCK 0x00000080 +#define ATMEL_PMX_AA_ETXEN 0x00000100 +#define ATMEL_PMX_AA_ETX0 0x00000200 +#define ATMEL_PMX_AA_ETX1 0x00000400 +#define ATMEL_PMX_AA_ECRS 0x00000800 +#define ATMEL_PMX_AA_ECRSDV 0x00000800 +#define ATMEL_PMX_AA_ERX0 0x00001000 +#define ATMEL_PMX_AA_ERX1 0x00002000 +#define ATMEL_PMX_AA_ERXER 0x00004000 +#define ATMEL_PMX_AA_EMDC 0x00008000 +#define ATMEL_PMX_AA_EMDIO 0x00010000 + +#define ATMEL_PMX_AA_TXD2 0x00810000 + +#define ATMEL_PMX_AA_TWD 0x02000000 +#define ATMEL_PMX_AA_TWCK 0x04000000 /* Port B */ -#define AT91_PMX_BA_ERXCK 0x00080000 -#define AT91_PMX_BA_ECOL 0x00040000 -#define AT91_PMX_BA_ERXDV 0x00020000 -#define AT91_PMX_BA_ERX3 0x00010000 -#define AT91_PMX_BA_ERX2 0x00008000 -#define AT91_PMX_BA_ETXER 0x00004000 -#define AT91_PMX_BA_ETX3 0x00002000 -#define AT91_PMX_BA_ETX2 0x00001000 +#define ATMEL_PMX_BA_ERXCK 0x00080000 +#define ATMEL_PMX_BA_ECOL 0x00040000 +#define ATMEL_PMX_BA_ERXDV 0x00020000 +#define ATMEL_PMX_BA_ERX3 0x00010000 +#define ATMEL_PMX_BA_ERX2 0x00008000 +#define ATMEL_PMX_BA_ETXER 0x00004000 +#define ATMEL_PMX_BA_ETX3 0x00002000 +#define ATMEL_PMX_BA_ETX2 0x00001000 /* Port B */ -#define AT91_PMX_CA_BFCK 0x00000001 -#define AT91_PMX_CA_BFRDY 0x00000002 -#define AT91_PMX_CA_SMOE 0x00000002 -#define AT91_PMX_CA_BFAVD 0x00000004 -#define AT91_PMX_CA_BFBAA 0x00000008 -#define AT91_PMX_CA_SMWE 0x00000008 -#define AT91_PMX_CA_BFOE 0x00000010 -#define AT91_PMX_CA_BFWE 0x00000020 -#define AT91_PMX_CA_NWAIT 0x00000040 -#define AT91_PMX_CA_A23 0x00000080 -#define AT91_PMX_CA_A24 0x00000100 -#define AT91_PMX_CA_A25 0x00000200 -#define AT91_PMX_CA_CFRNW 0x00000200 -#define AT91_PMX_CA_NCS4 0x00000400 -#define AT91_PMX_CA_CFCS 0x00000400 -#define AT91_PMX_CA_NCS5 0x00000800 -#define AT91_PMX_CA_CFCE1 0x00001000 -#define AT91_PMX_CA_NCS6 0x00001000 -#define AT91_PMX_CA_CFCE2 0x00002000 -#define AT91_PMX_CA_NCS7 0x00002000 -#define AT91_PMX_CA_D16_31 0xFFFF0000 - -#define CONFIG_SYS_AT91_CPU_NAME "AT91RM9200" +#define ATMEL_PMX_CA_BFCK 0x00000001 +#define ATMEL_PMX_CA_BFRDY 0x00000002 +#define ATMEL_PMX_CA_SMOE 0x00000002 +#define ATMEL_PMX_CA_BFAVD 0x00000004 +#define ATMEL_PMX_CA_BFBAA 0x00000008 +#define ATMEL_PMX_CA_SMWE 0x00000008 +#define ATMEL_PMX_CA_BFOE 0x00000010 +#define ATMEL_PMX_CA_BFWE 0x00000020 +#define ATMEL_PMX_CA_NWAIT 0x00000040 +#define ATMEL_PMX_CA_A23 0x00000080 +#define ATMEL_PMX_CA_A24 0x00000100 +#define ATMEL_PMX_CA_A25 0x00000200 +#define ATMEL_PMX_CA_CFRNW 0x00000200 +#define ATMEL_PMX_CA_NCS4 0x00000400 +#define ATMEL_PMX_CA_CFCS 0x00000400 +#define ATMEL_PMX_CA_NCS5 0x00000800 +#define ATMEL_PMX_CA_CFCE1 0x00001000 +#define ATMEL_PMX_CA_NCS6 0x00001000 +#define ATMEL_PMX_CA_CFCE2 0x00002000 +#define ATMEL_PMX_CA_NCS7 0x00002000 +#define ATMEL_PMX_CA_D16_31 0xFFFF0000 + +#define ATMEL_PIO_PORTS 4 /* theese SoCs have 4 PIO */ +#define ATMEL_PMC_UHP AT91RM9200_PMC_UHP + +#define CONFIG_SYS_ATMEL_CPU_NAME "AT91RM9200" #endif diff --git a/board/BuS/eb_cpux9k2/cpux9k2.c b/board/BuS/eb_cpux9k2/cpux9k2.c index fe62a0f..e9a1cb2 100644 --- a/board/BuS/eb_cpux9k2/cpux9k2.c +++ b/board/BuS/eb_cpux9k2/cpux9k2.c @@ -57,12 +57,12 @@ DECLARE_GLOBAL_DATA_PTR; int board_init(void) { - at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; /* Enable Ctrlc */ console_init_f(); /* Correct IRDA resistor problem / Set PA23_TXD in Output */ - writel(AT91_PMX_AA_TXD2, &pio->pioa.oer); + writel(ATMEL_PMX_AA_TXD2, &pio->pioa.oer); gd->bd->bi_arch_number = MACH_TYPE_EB_CPUX9K2; /* adress of boot parameters */ @@ -147,7 +147,7 @@ int dram_init(void) int board_eth_init(bd_t *bis) { int rc = 0; - rc = at91emac_register(bis, (u32) AT91_EMAC_BASE); + rc = at91emac_register(bis, (u32) ATMEL_BASE_EMAC); return rc; } #endif @@ -164,9 +164,9 @@ int board_eth_init(bd_t *bis) void cpux9k2_nand_hw_init(void) { unsigned long csr; - at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - at91_mc_t *mc = (at91_mc_t *) AT91_MC_BASE; + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC; /* Setup Smart Media, fitst enable the address range of CS3 */ writel(readl(&mc->ebi.csa) | AT91_EBI_CSA_CS3A, &mc->ebi.csa); @@ -178,23 +178,23 @@ void cpux9k2_nand_hw_init(void) AT91_SMC_CSR_WSEN; writel(csr, &mc->smc.csr[3]); - writel(AT91_PMX_CA_SMOE | AT91_PMX_CA_SMWE, &pio->pioc.asr); - writel(AT91_PMX_CA_BFCK | AT91_PMX_CA_SMOE | AT91_PMX_CA_SMWE, + writel(ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE, &pio->pioc.asr); + writel(ATMEL_PMX_CA_BFCK | ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE, &pio->pioc.pdr); /* Configure PC2 as input (signal Nand READY ) */ - writel(AT91_PMX_CA_BFAVD, &pio->pioc.per); - writel(AT91_PMX_CA_BFAVD, &pio->pioc.odr); /* disable output */ - writel(AT91_PMX_CA_BFCK, &pio->pioc.codr); + writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.per); + writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.odr); /* disable output */ + writel(ATMEL_PMX_CA_BFCK, &pio->pioc.codr); /* PIOC clock enabling */ - writel(1 << AT91_ID_PIOC, &pmc->pcer); + writel(1 << ATMEL_ID_PIOC, &pmc->pcer); } static void board_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { - at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; struct nand_chip *this = mtd->priv; ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; @@ -219,7 +219,7 @@ static void board_nand_hwcontrol(struct mtd_info *mtd, static int board_nand_dev_ready(struct mtd_info *mtd) { - at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; return ((readl(&pio->pioc.pdsr) & (1 << 2)) != 0); } @@ -248,8 +248,8 @@ int drv_video_init(void) #endif char *s; unsigned long csr; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - at91_mc_t *mc = (at91_mc_t *) AT91_MC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC; printf("Init Video as "); s = getenv("displaywidth"); @@ -270,7 +270,7 @@ int drv_video_init(void) AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 | AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN; writel(csr, &mc->smc.csr[2]); - writel(1 << AT91_ID_PIOB, &pmc->pcer); + writel(1 << ATMEL_ID_PIOB, &pmc->pcer); vcxk_init(display_width, display_height); #ifdef CONFIG_SPLASH_SCREEN @@ -290,11 +290,11 @@ int drv_video_init(void) void i2c_init_board(void) { u32 pin; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; - writel(1 << AT91_ID_PIOA, &pmc->pcer); - pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + writel(1 << ATMEL_ID_PIOA, &pmc->pcer); + pin = ATMEL_PMX_AA_TWD | ATMEL_PMX_AA_TWCK; writel(pin, &pio->pioa.idr); writel(pin, &pio->pioa.pudr); writel(pin, &pio->pioa.per); @@ -310,7 +310,7 @@ void i2c_init_board(void) void __led_toggle(led_id_t mask) { - at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; if (readl(&pio->piod.odsr) & mask) writel(mask, &pio->piod.codr); @@ -320,10 +320,10 @@ void __led_toggle(led_id_t mask) void __led_init(led_id_t mask, int state) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; - writel(1 << AT91_ID_PIOD, &pmc->pcer); /* Enable PIOB clock */ + writel(1 << ATMEL_ID_PIOD, &pmc->pcer); /* Enable PIOB clock */ /* Disable peripherals on LEDs */ writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.per); /* Enable pins as outputs */ @@ -336,7 +336,7 @@ void __led_init(led_id_t mask, int state) void __led_set(led_id_t mask, int state) { - at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; if (state == STATUS_LED_ON) writel(mask, &pio->piod.codr); else diff --git a/board/atmel/at91rm9200ek/at91rm9200ek.c b/board/atmel/at91rm9200ek/at91rm9200ek.c index d242583..5ebc24d 100644 --- a/board/atmel/at91rm9200ek/at91rm9200ek.c +++ b/board/atmel/at91rm9200ek/at91rm9200ek.c @@ -44,7 +44,7 @@ int board_init(void) * Correct IRDA resistor problem * Set PA23_TXD in Output */ - writel(AT91_PMX_AA_TXD2, &pio->pioa.oer); + writel(ATMEL_PMX_AA_TXD2, &pio->pioa.oer); /* arch number of AT91RM9200EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200EK; @@ -65,6 +65,6 @@ int dram_init (void) #ifdef CONFIG_DRIVER_AT91EMAC int board_eth_init(bd_t *bis) { - return at91emac_register(bis, (u32) AT91_EMAC_BASE); + return at91emac_register(bis, (u32) ATMEL_BASE_EMAC); } #endif diff --git a/board/atmel/at91rm9200ek/led.c b/board/atmel/at91rm9200ek/led.c index 8d512e0..1766ddf 100644 --- a/board/atmel/at91rm9200ek/led.c +++ b/board/atmel/at91rm9200ek/led.c @@ -26,8 +26,10 @@ */ #include <common.h> -#include <asm/arch/gpio.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> #include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_pio.h> /* bit mask in PIO port B */ #define GREEN_LED (1<<0) @@ -36,47 +38,47 @@ void green_LED_on(void) { - at91_pio_t *pio = (at91_pio_t *)AT91_PIO_BASE; + at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO; writel(GREEN_LED, &pio->piob.codr); } void yellow_LED_on(void) { - at91_pio_t *pio = (at91_pio_t *)AT91_PIO_BASE; + at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO; writel(YELLOW_LED, &pio->piob.codr); } void red_LED_on(void) { - at91_pio_t *pio = (at91_pio_t *)AT91_PIO_BASE; + at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO; writel(RED_LED, &pio->piob.codr); } void green_LED_off(void) { - at91_pio_t *pio = (at91_pio_t *)AT91_PIO_BASE; + at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO; writel(GREEN_LED, &pio->piob.sodr); } void yellow_LED_off(void) { - at91_pio_t *pio = (at91_pio_t *)AT91_PIO_BASE; + at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO; writel(YELLOW_LED, &pio->piob.sodr); } void red_LED_off(void) { - at91_pio_t *pio = (at91_pio_t *)AT91_PIO_BASE; + at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO; writel(RED_LED, &pio->piob.sodr); } void coloured_LED_init (void) { - at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE; - at91_pio_t *pio = (at91_pio_t *)AT91_PIO_BASE; + at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; + at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO; /* Enable PIOB clock */ - writel(1 << AT91_ID_PIOB, &pmc->pcer); + writel(1 << ATMEL_ID_PIOB, &pmc->pcer); /* Disable peripherals on LEDs */ writel(GREEN_LED | YELLOW_LED | RED_LED, &pio->piob.per); diff --git a/drivers/net/at91_emac.c b/drivers/net/at91_emac.c index 4e5685c..228dbae 100644 --- a/drivers/net/at91_emac.c +++ b/drivers/net/at91_emac.c @@ -342,34 +342,34 @@ static int at91emac_init(struct eth_device *netdev, bd_t *bd) u32 value; emac_device *dev; at91_emac_t *emac; - at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; emac = (at91_emac_t *) netdev->iobase; dev = (emac_device *) netdev->priv; /* PIO Disable Register */ - value = AT91_PMX_AA_EMDIO | AT91_PMX_AA_EMDC | - AT91_PMX_AA_ERXER | AT91_PMX_AA_ERX1 | - AT91_PMX_AA_ERX0 | AT91_PMX_AA_ECRS | - AT91_PMX_AA_ETX1 | AT91_PMX_AA_ETX0 | - AT91_PMX_AA_ETXEN | AT91_PMX_AA_EREFCK; + value = ATMEL_PMX_AA_EMDIO | ATMEL_PMX_AA_EMDC | + ATMEL_PMX_AA_ERXER | ATMEL_PMX_AA_ERX1 | + ATMEL_PMX_AA_ERX0 | ATMEL_PMX_AA_ECRS | + ATMEL_PMX_AA_ETX1 | ATMEL_PMX_AA_ETX0 | + ATMEL_PMX_AA_ETXEN | ATMEL_PMX_AA_EREFCK; writel(value, &pio->pioa.pdr); writel(value, &pio->pioa.asr); #ifdef CONFIG_RMII - value = AT91_PMX_BA_ERXCK; + value = ATMEL_PMX_BA_ERXCK; #else - value = AT91_PMX_BA_ERXCK | AT91_PMX_BA_ECOL | - AT91_PMX_BA_ERXDV | AT91_PMX_BA_ERX3 | - AT91_PMX_BA_ERX2 | AT91_PMX_BA_ETXER | - AT91_PMX_BA_ETX3 | AT91_PMX_BA_ETX2; + value = ATMEL_PMX_BA_ERXCK | ATMEL_PMX_BA_ECOL | + ATMEL_PMX_BA_ERXDV | ATMEL_PMX_BA_ERX3 | + ATMEL_PMX_BA_ERX2 | ATMEL_PMX_BA_ETXER | + ATMEL_PMX_BA_ETX3 | ATMEL_PMX_BA_ETX2; #endif writel(value, &pio->piob.pdr); writel(value, &pio->piob.bsr); - writel(1 << AT91_ID_EMAC, &pmc->pcer); + writel(1 << ATMEL_ID_EMAC, &pmc->pcer); writel(readl(&emac->ctl) | AT91_EMAC_CTL_CSR, &emac->ctl); /* Init Ethernet buffers */ @@ -476,11 +476,11 @@ static int at91emac_write_hwaddr(struct eth_device *netdev) { emac_device *dev; at91_emac_t *emac; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; emac = (at91_emac_t *) netdev->iobase; dev = (emac_device *) netdev->priv; - writel(1 << AT91_ID_EMAC, &pmc->pcer); + writel(1 << ATMEL_ID_EMAC, &pmc->pcer); DEBUG_AT91EMAC("init MAC-ADDR %x%x \n", cpu_to_le16(*((u16 *)(netdev->enetaddr + 4))), cpu_to_le32(*((u32 *)netdev->enetaddr))); @@ -498,7 +498,7 @@ int at91emac_register(bd_t *bis, unsigned long iobase) struct eth_device *dev; if (iobase == 0) - iobase = AT91_EMAC_BASE; + iobase = ATMEL_BASE_EMAC; emac = malloc(sizeof(*emac)+512); if (emac == NULL) return -1; diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index 810023a..faaef10 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -61,7 +61,6 @@ #define CONFIG_SYS_HZ 1000 /* CPU configuration */ -#define CONFIG_ARM920T #define CONFIG_AT91RM9200 #define CONFIG_AT91RM9200EK #define CONFIG_CPUAT91 @@ -71,8 +70,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_AT91FAMILY - /* * Memory Configuration */ @@ -172,7 +169,7 @@ #define CONFIG_DOS_PARTITION 1 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 -#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE +#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_USB_HOST_BASE #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index 754fc8b..e12770a 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -29,12 +29,11 @@ /*--------------------------------------------------------------------------*/ -#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ -#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ -#define CONFIG_EB_CPUX9K2 1 /* on an EP+CPUX9K2 Board */ -#define USE_920T_MMU 1 +#define CONFIG_AT91RM9200 /* It's an Atmel AT91RM9200 SoC */ +#define CONFIG_EB_CPUX9K2 /* on an EP+CPUX9K2 Board */ +#define USE_920T_MMU -#define CONFIG_VERSION_VARIABLE 1 +#define CONFIG_VERSION_VARIABLE #define CONFIG_IDENT_STRING " on EB+CPUx9K2" #include <asm/arch/hardware.h> /* needed for port definitions */ @@ -217,19 +216,19 @@ #define CONFIG_SYS_I2C_INIT_BOARD #define I2C_INIT i2c_init_board(); -#define I2C_ACTIVE writel(AT91_PMX_AA_TWD, &pio->pioa.mddr); -#define I2C_TRISTATE writel(AT91_PMX_AA_TWD, &pio->pioa.mder); -#define I2C_READ ((readl(&pio->pioa.pdsr) & AT91_PMX_AA_TWD) != 0) +#define I2C_ACTIVE writel(ATMEL_PMX_AA_TWD, &pio->pioa.mddr); +#define I2C_TRISTATE writel(ATMEL_PMX_AA_TWD, &pio->pioa.mder); +#define I2C_READ ((readl(&pio->pioa.pdsr) & ATMEL_PMX_AA_TWD) != 0) #define I2C_SDA(bit) \ if (bit) \ - writel(AT91_PMX_AA_TWD, &pio->pioa.sodr); \ + writel(ATMEL_PMX_AA_TWD, &pio->pioa.sodr); \ else \ - writel(AT91_PMX_AA_TWD, &pio->pioa.codr); + writel(ATMEL_PMX_AA_TWD, &pio->pioa.codr); #define I2C_SCL(bit) \ if (bit) \ - writel(AT91_PMX_AA_TWCK, &pio->pioa.sodr); \ + writel(ATMEL_PMX_AA_TWCK, &pio->pioa.sodr); \ else \ - writel(AT91_PMX_AA_TWCK, &pio->pioa.codr); + writel(ATMEL_PMX_AA_TWCK, &pio->pioa.codr); #define I2C_DELAY udelay(2500000/CONFIG_SYS_I2C_SPEED) -- 1.7.1

3 4

[U-Boot] [PATCH V3 00/06] Go to common initdram() on 85xx-based boards
by Becky Bruce 01 Jun '11

01 Jun '11

This patch series consists of a bunch of cleanups that allow us to use a common initdram() on all of the non-corenet 85xx-based boards. Also, switch to using phys_size_t to represent the size of memory returned. Most of these patches are just code rearranges or renaming things to get a common scheme in place. There are also lots of cleanups - the various initdram() implementations had a variety of issues that I have hopefully fixed. This is a large patch series, and I've had to hack on a bunch of different boards that I know nothing about, so I'd appreciate any review commentary. I have tested this on 8572DS and confirmed that the results of a MAKEALL powerpc are the same before and after this series. Changes from V1: - Removed prints from initdram() as suggested by Peter - Changed spacing of 36-bit DRAM size warning messages to better line up after the removal of the excess prints from initdram() - Switched sdram_init() to be a weak function - renamed sdram_init() to lbc_sdram_init() Changes from V2: - dropped boards that Kumar is removing - changed spacing of printouts from lbc_sdram_init - added the "DDR:" back to the boot messages - it makes sense to have this for some boards, and it's not much clutter - renamed the DDR_WIMGE define per feedback Diffstat below. Cheers, Becly arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 + arch/powerpc/cpu/mpc85xx/cpu.c | 52 +++++++++++++++++ arch/powerpc/cpu/mpc85xx/tlb.c | 6 ++- arch/powerpc/cpu/mpc8xxx/ddr/main.c | 5 +- arch/powerpc/cpu/mpc8xxx/fsl_lbc.c | 10 +++ arch/powerpc/include/asm/fsl_ddr_sdram.h | 13 ++++ arch/powerpc/include/asm/fsl_lbc.h | 4 + board/freescale/mpc8536ds/mpc8536ds.c | 21 ------- board/freescale/mpc8540ads/mpc8540ads.c | 61 ++------------------ board/freescale/mpc8540ads/tlb.c | 19 ------ board/freescale/mpc8541cds/mpc8541cds.c | 52 +--------------- board/freescale/mpc8544ds/mpc8544ds.c | 17 ------ board/freescale/mpc8548cds/mpc8548cds.c | 47 +-------------- board/freescale/mpc8555cds/mpc8555cds.c | 54 +---------------- board/freescale/mpc8560ads/mpc8560ads.c | 61 ++------------------ board/freescale/mpc8560ads/tlb.c | 19 ------ board/freescale/mpc8568mds/mpc8568mds.c | 47 +-------------- board/freescale/mpc8569mds/mpc8569mds.c | 36 ------------ board/freescale/mpc8572ds/mpc8572ds.c | 19 ------ board/freescale/p1022ds/p1022ds.c | 13 ---- board/freescale/p1_p2_rdb/ddr.c | 15 +----- board/freescale/p2020ds/p2020ds.c | 34 ++--------- board/sbc8548/sbc8548.c | 48 +--------------- board/sbc8548/tlb.c | 34 ++++------- board/sbc8560/sbc8560.c | 93 +----------------------------- board/socrates/sdram.c | 15 +----- board/stx/stxgp3/stxgp3.c | 32 ---------- board/stx/stxssa/stxssa.c | 33 ----------- board/tqc/tqm85xx/sdram.c | 70 +++++++---------------- board/tqc/tqm85xx/tlb.c | 47 --------------- board/xes/common/Makefile | 2 - board/xes/common/fsl_8xxx_ddr.c | 46 --------------- board/xes/xpedite517x/xpedite517x.c | 13 ++++ doc/README.mpc85xxads | 4 +- include/configs/MPC8536DS.h | 1 - include/configs/MPC8548CDS.h | 2 +- include/configs/MPC8572DS.h | 1 - include/configs/P1_P2_RDB.h | 1 - include/configs/SBC8540.h | 2 +- include/configs/TQM85xx.h | 6 ++- include/configs/sbc8560.h | 2 +- include/configs/stxgp3.h | 2 +- include/configs/stxssa.h | 1 - 43 files changed, 185 insertions(+), 878 deletions(-)

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[U-Boot] [PATCH 0/4] ST-Ericsson U8500 support
by John Rigby 01 Jun '11

01 Jun '11

Add support for ST-Ericsson U8500 SoC and HREF platform John Rigby (1): armv7: Add support for ST-Ericsson U8500 href platform Michael Brandt (1): I2C: add driver of st-ericsson u8500 i2c Rabin Vincent (2): p101x: extra init for u8500 armv7: Add ST-Ericsson u8500 arch arch/arm/cpu/armv7/u8500/Makefile | 46 +++ arch/arm/cpu/armv7/u8500/clock.c | 56 +++ arch/arm/cpu/armv7/u8500/lowlevel.S | 33 ++ arch/arm/cpu/armv7/u8500/timer.c | 167 ++++++++ arch/arm/include/asm/arch-u8500/ab8500.h | 523 ++++++++++++++++++++++++ arch/arm/include/asm/arch-u8500/bits.h | 58 +++ arch/arm/include/asm/arch-u8500/clock.h | 72 ++++ arch/arm/include/asm/arch-u8500/common.h | 107 +++++ arch/arm/include/asm/arch-u8500/gpio.h | 247 ++++++++++++ arch/arm/include/asm/arch-u8500/hardware.h | 83 ++++ arch/arm/include/asm/arch-u8500/u8500.h | 47 +++ board/st-ericsson/u8500/Makefile | 50 +++ board/st-ericsson/u8500/gpio.c | 346 ++++++++++++++++ board/st-ericsson/u8500/prcmu-fw-defs_v1.h | 578 ++++++++++++++++++++++++++ board/st-ericsson/u8500/prcmu-fw.h | 182 +++++++++ board/st-ericsson/u8500/prcmu.c | 167 ++++++++ board/st-ericsson/u8500/u8500_href.c | 540 +++++++++++++++++++++++++ boards.cfg | 1 + drivers/i2c/Makefile | 1 + drivers/i2c/u8500_i2c.c | 603 ++++++++++++++++++++++++++++ drivers/i2c/u8500_i2c.h | 220 ++++++++++ drivers/serial/serial_pl01x.c | 10 + drivers/serial/serial_pl01x.h | 4 + include/configs/u8500_href.h | 243 +++++++++++ 24 files changed, 4384 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/armv7/u8500/Makefile create mode 100644 arch/arm/cpu/armv7/u8500/clock.c create mode 100644 arch/arm/cpu/armv7/u8500/lowlevel.S create mode 100644 arch/arm/cpu/armv7/u8500/timer.c create mode 100644 arch/arm/include/asm/arch-u8500/ab8500.h create mode 100644 arch/arm/include/asm/arch-u8500/bits.h create mode 100644 arch/arm/include/asm/arch-u8500/clock.h create mode 100644 arch/arm/include/asm/arch-u8500/common.h create mode 100644 arch/arm/include/asm/arch-u8500/gpio.h create mode 100644 arch/arm/include/asm/arch-u8500/hardware.h create mode 100644 arch/arm/include/asm/arch-u8500/u8500.h create mode 100644 board/st-ericsson/u8500/Makefile create mode 100644 board/st-ericsson/u8500/gpio.c create mode 100644 board/st-ericsson/u8500/prcmu-fw-defs_v1.h create mode 100644 board/st-ericsson/u8500/prcmu-fw.h create mode 100644 board/st-ericsson/u8500/prcmu.c create mode 100644 board/st-ericsson/u8500/u8500_href.c create mode 100644 drivers/i2c/u8500_i2c.c create mode 100644 drivers/i2c/u8500_i2c.h create mode 100644 include/configs/u8500_href.h

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[U-Boot] [PATCH] Kirkwood: boards cleanup for deprecated CONFIG_CMD_AUTOSCRIPT
by Prafulla Wadaskar 01 Jun '11

01 Jun '11

CONFIG_CMD_AUTOSCRIPT support is deprecated and non-existing This clean up patch removes the references for Marvell boards Signed-off-by: Prafulla Wadaskar <prafulla(a)marvell.com> --- include/configs/mv88f6281gtw_ge.h | 1 - include/configs/openrd_base.h | 1 - include/configs/rd6281a.h | 1 - include/configs/sheevaplug.h | 1 - 4 files changed, 0 insertions(+), 4 deletions(-) diff --git a/include/configs/mv88f6281gtw_ge.h b/include/configs/mv88f6281gtw_ge.h index 96b4d1c..a7db659 100644 --- a/include/configs/mv88f6281gtw_ge.h +++ b/include/configs/mv88f6281gtw_ge.h @@ -91,7 +91,6 @@ */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_FAT diff --git a/include/configs/openrd_base.h b/include/configs/openrd_base.h index 88f27ba..7e915e4 100644 --- a/include/configs/openrd_base.h +++ b/include/configs/openrd_base.h @@ -96,7 +96,6 @@ */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_FAT diff --git a/include/configs/rd6281a.h b/include/configs/rd6281a.h index 3d8e25c..8ad359d 100644 --- a/include/configs/rd6281a.h +++ b/include/configs/rd6281a.h @@ -90,7 +90,6 @@ */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_FAT diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index fc401a8..c7695fe 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -90,7 +90,6 @@ */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_FAT -- 1.5.3.3

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[U-Boot] IXP42x patch series - 2nd attempt
by Michael Schwingen 21 May '11

21 May '11

Hi, here is my IXP42x patch series, which brings my IXP boards back to life after relocation was added. I hope I addressed all comments I got from the pervious patch. Notes: I added the XScale sub-architecture to the MAINTAINERS list to get a better overview which boards may still need work: [PATCH 01/13] add XScale sub architecture (IXP/PXA) to board list The NPE library needs a fix for B1 silicon - the special handling is only needed for Rev. A0, but the code treats everything *but* B0 as being the old A0 silicon: [PATCH 02/13] add support for IXP42x Rev. B1 and newer The dvlhost board has a watchdog that needs to be triggered regularly: [PATCH 03/13] trigger hardware watchdog in IXP42x serial driver Rework the startup and timer code: [PATCH 04/13] Fix IXP code to work after relocation was added make fails during depend pass in the NPE directory, due to missing include files: [PATCH 05/13] fix "depend" target in npe directory Board updates: [PATCH 06/13] add wildcard to sections (for -ffunction-sections/-fdata-sections) [PATCH 07/13] update/fix AcTux1 board [PATCH 08/13] update/fix AcTux2 board [PATCH 09/13] update/fix AcTux3 board [PATCH 10/13] update/fix AcTux4 board The following changes should be OK (not sure about the environment location on IXDP425 - the old value is inside the monitor area, which seems to be wrong for this type of flash/linker script). I do not know if these should be committed, or should be left for the board maintainers: [PATCH 11/13] update/fix some more IXP42x boards (only compile tested) Add support for MII links that run at fixed speed, without a PHY with standard registers (ethernet switch on AcTux-2/AcTux-3, powerline modem on dvlhost): [PATCH 12/13] IXP NPE: add support for fixed-speed MII ports Add one new board: [PATCH 13/13] add dvlhost (dLAN 200 AV Wireless G) board cu Michael

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[U-Boot] USB on iMX25
by Matthias Weißer 20 May '11

20 May '11

Hi I am currently porting u-boot to a new board based on Freescales iMX25 processor. I would like to add USB support. As I can see there is no support in current head for USB on iMX. Can someone give me some hints what I have to do to enable USB host support on iMX25. Matthias

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[U-Boot] [U-BOOT] [PATCH] mmc: enable switch partition function
by Lei Wen 19 May '11

19 May '11

For emmc, it may has upto 7 partitions: two boot partitions, one user partition, one RPMB partition and four general purpose partitions. (Refer to JESD84-A44.pdf/page 154) As bootloader may need to read out or reflashing images on those different partitions, it is better to enable the partition switch with console command support. Signed-off-by: Lei Wen <leiwen(a)marvell.com> --- common/cmd_mmc.c | 24 +++++++++++++++++++++++- drivers/mmc/mmc.c | 16 ++++++++++++++++ include/mmc.h | 5 +++++ 3 files changed, 44 insertions(+), 1 deletions(-) diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index 4323f76..2181e04 100644 --- a/common/cmd_mmc.c +++ b/common/cmd_mmc.c @@ -177,7 +177,6 @@ int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) case 0: case 1: - case 4: return cmd_usage(cmdtp); case 2: @@ -233,6 +232,28 @@ int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("%d blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR"); return (n == cnt) ? 0 : 1; + } else if (strcmp(argv[1], "sw_part") == 0) { + int dev = simple_strtoul(argv[2], NULL, 10); + struct mmc *mmc = find_mmc_device(dev); + int num = simple_strtoul(argv[3], NULL, 10); + int ret; + + if (num > PART_ACCESS_MASK) { + printf("#part_num shouldn't be larger than %d\n", + PART_ACCESS_MASK); + return 1; + } + + mmc_init(mmc); + if (mmc->part_config == MMCPART_NOAVAILABLE) { + printf("Card doesn't support part_switch\n"); + return 1; + } + + ret = mmc_switch_part(dev, num); + printf("switch to partions #%d, %s\n", + num, (!ret) ? "OK" : "ERROR"); + return (!ret) ? 0 : 1; } else rc = cmd_usage(cmdtp); @@ -247,5 +268,6 @@ U_BOOT_CMD( "mmc write <device num> addr blk# cnt\n" "mmc rescan <device num>\n" "mmc part <device num> - lists available partition on mmc\n" + "mmc sw_part <device num> <part_num> - switch part support for emmc\n" "mmc list - lists available devices"); #endif diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 6805b33..f42b3fb 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -428,6 +428,18 @@ int mmc_change_freq(struct mmc *mmc) return 0; } +int mmc_switch_part(int dev_num, unsigned int part_num) +{ + struct mmc *mmc = find_mmc_device(dev_num); + + if (!mmc) + return -1; + + return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, + (mmc->part_config & ~PART_ACCESS_MASK) + | (part_num & PART_ACCESS_MASK)); +} + int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) { struct mmc_cmd cmd; @@ -725,6 +737,7 @@ int mmc_startup(struct mmc *mmc) if (err) return err; + mmc->part_config = MMCPART_NOAVAILABLE; if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { /* check ext_csd version and capacity */ err = mmc_send_ext_csd(mmc, ext_csd); @@ -733,6 +746,9 @@ int mmc_startup(struct mmc *mmc) ext_csd[214] << 16 | ext_csd[215] << 24; mmc->capacity *= 512; } + /* store the partition info of emmc */ + if (ext_csd[160] & 0x1) + mmc->part_config = ext_csd[179]; } if (IS_SD(mmc)) diff --git a/include/mmc.h b/include/mmc.h index 74c0b1d..10dfafd 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -128,6 +128,7 @@ * EXT_CSD fields */ +#define EXT_CSD_PART_CONF 179 /* R/W */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */ #define EXT_CSD_HS_TIMING 185 /* R/W */ #define EXT_CSD_CARD_TYPE 196 /* RO */ @@ -169,6 +170,8 @@ #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMCPART_NOAVAILABLE (0xff) +#define PART_ACCESS_MASK (0x7) struct mmc_cid { unsigned long psn; @@ -265,6 +268,7 @@ struct mmc { uint csd[4]; uint cid[4]; ushort rca; + char part_config; uint tran_speed; uint read_bl_len; uint write_bl_len; @@ -285,6 +289,7 @@ struct mmc *find_mmc_device(int dev_num); int mmc_set_dev(int dev_num); void print_mmc_devices(char separator); int board_mmc_getcd(u8 *cd, struct mmc *mmc); +int mmc_switch_part(int dev_num, unsigned int part_num); #ifdef CONFIG_GENERIC_MMC int atmel_mci_init(void *regs); -- 1.7.0.4

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