November 2011 - U-Boot

[U-Boot] [PATCH 0/2] SPL improvements
by Marek Vasut 08 Nov '11

08 Nov '11

This series introduces a few modifications to the new SPL framework to make it a bit more flexible. RESEND: Missing Cc-ed people in the patches. Marek Vasut (2): SPL: Make path to start.S configurable SPL: Allow user to disable CPU support library spl/Makefile | 17 ++++++++++++++--- 1 files changed, 14 insertions(+), 3 deletions(-) -- 1.7.5.4

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[U-Boot] [PATCH 3/7 v2] integrator: do not test first part of the memory
by Linus Walleij 08 Nov '11

08 Nov '11

When booting from Flash, the Integrator remaps its flash memory from 0x24000000 to 0x00000000, and starts executing it at 0x00000000. This ROM thus hides the RAM underneath and first 0x40000 bytes of the memory cannot be tested by get_ram_size(). So let's test from 0x40000 to the end of detected memory instead. Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- ChangeLog v1->v2: - Rebased to U-Boot ARM HEAD at Alberts request, see message 4EA1C8E7.7090105(a)aribaud.net --- board/armltd/integrator/integrator.c | 19 +++++++++++++++---- 1 files changed, 15 insertions(+), 4 deletions(-) diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c index c8d2bc7..83f047c 100644 --- a/board/armltd/integrator/integrator.c +++ b/board/armltd/integrator/integrator.c @@ -86,6 +86,15 @@ int misc_init_r (void) return (0); } +/* + * The Integrator remaps the Flash memory to 0x00000000 and executes U-Boot + * from there, which means we cannot test the RAM underneath the ROM at this + * point. It will be unmapped later on, when we are executing from the + * relocated in RAM U-Boot. We simply assume that this RAM is usable if the + * RAM on higher addresses works fine. + */ +#define REMAPPED_FLASH_SZ 0x40000 + int dram_init (void) { gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; @@ -111,15 +120,17 @@ extern void dram_query(void); * */ sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4; - gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift; - gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE + + REMAPPED_FLASH_SZ, 0x01000000 << sdram_shift); } #else - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE + + REMAPPED_FLASH_SZ, PHYS_SDRAM_1_SIZE); #endif /* CM_SPD_DETECT */ + /* We only have one bank of RAM, set it to whatever was detected */ + gd->bd->bi_dram[0].size = gd->ram_size; return 0; } -- 1.7.6.4

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[U-Boot] [PATCH] ARM: FIX for dcache_disable() for ARM926ej-s
by Bas van den Berg 08 Nov '11

08 Nov '11

the cache also needs to be invalidated, not just flushed, Since re-enabling it, can cause inconsistent data without invalidation. Signed-off-by: Bas van den Berg <b.van.den.berg.nl(a)gmail.com> --- arch/arm/lib/cache.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index b545fb7..10eb8c9 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -37,6 +37,8 @@ void __flush_cache(unsigned long start, unsigned long size) asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory"); /* disable write buffer as well (page 2-22) */ asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); + /* Invalidate dcache as well */ + asm("mcr p15, 0, %0, c7, c6, 0" : : "r" (0)); #endif return; } -- 1.7.0.4

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[U-Boot] Please pull u-boot-mmc.git
by Andy Fleming 08 Nov '11

08 Nov '11

The following changes since commit 5721385b187b3154c7768e6c182501022f4e2e45: Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx (2011-11-08 07:44:52 +0100) are available in the git repository at: git://www.denx.de/git/u-boot-mmc.git master Jon Medhurst (Tixy) (1): MMC: PL180: Fix infinite loop with VExpress extended fifo implementation drivers/mmc/arm_pl180_mmci.c | 26 -------------------------- 1 files changed, 0 insertions(+), 26 deletions(-)

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[U-Boot] [PATCH] MMC: PL180: Fix infinite loop with VExpress extended fifo implementation
by Jon Medhurst (Tixy) 08 Nov '11

08 Nov '11

From: Jon Medhurst <jon.medhurst(a)linaro.org> The new IO FPGA implementation for Versatile Express contains an MMCI (PL180) cell with the FIFO extended to 128 words. This causes the read_bytes() function to go into an infinite loop; as it will wait for for the half-full signal (SDI_STA_RXFIFOBR) if there are more than 8 words remaining (SDI_FIFO_BURST_SIZE), but it won't receive this signal once there are fewer than 64 words left to transfer. One possible fix is to add some build time configuration to change SDI_FIFO_BURST_SIZE for the new implementation. However, the problematic code only seems to exist as a small performance optimisation, so the solution implemented by this patch is to simply remove it. The error checking following the loop is also removed as this will be handled by code further down the function. Cc: Andy Fleming <afleming(a)gmail.com> Signed-off-by: Jon Medhurst <jon.medhurst(a)linaro.org> --- If it is desirable to keep the burst read optimisation, then an alternative solution would be to keep the loop and add an if clause to do a single read if the fifo doesn't have enough for a burst. --- drivers/mmc/arm_pl180_mmci.c | 26 -------------------------- 1 files changed, 0 insertions(+), 26 deletions(-) diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c index ed296ee..e6467a2 100644 --- a/drivers/mmc/arm_pl180_mmci.c +++ b/drivers/mmc/arm_pl180_mmci.c @@ -111,7 +111,6 @@ static int do_command(struct mmc *dev, struct mmc_cmd *cmd) static int read_bytes(struct mmc *dev, u32 *dest, u32 blkcount, u32 blksize) { u32 *tempbuff = dest; - int i; u64 xfercount = blkcount * blksize; struct mmc_host *host = dev->priv; u32 status, status_err; @@ -121,31 +120,6 @@ static int read_bytes(struct mmc *dev, u32 *dest, u32 blkcount, u32 blksize) status = readl(&host->base->status); status_err = status & (SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT | SDI_STA_RXOVERR); - while (!status_err && - (xfercount >= SDI_FIFO_BURST_SIZE * sizeof(u32))) { - if (status & SDI_STA_RXFIFOBR) { - for (i = 0; i < SDI_FIFO_BURST_SIZE; i++) - *(tempbuff + i) = readl(&host->base->fifo); - tempbuff += SDI_FIFO_BURST_SIZE; - xfercount -= SDI_FIFO_BURST_SIZE * sizeof(u32); - } - status = readl(&host->base->status); - status_err = status & - (SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT | SDI_STA_RXOVERR); - } - - if (status & SDI_STA_DTIMEOUT) { - printf("Read data timed out, xfercount: %llu, status: 0x%08X\n", - xfercount, status); - return -ETIMEDOUT; - } else if (status & SDI_STA_DCRCFAIL) { - printf("Read data blk CRC error: 0x%x\n", status); - return -EILSEQ; - } else if (status & SDI_STA_RXOVERR) { - printf("Read data RX overflow error\n"); - return -EIO; - } - while ((!status_err) && (xfercount >= sizeof(u32))) { if (status & SDI_STA_RXDAVL) { *(tempbuff) = readl(&host->base->fifo); -- 1.7.4.1

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[U-Boot] 12 DAYS TO GO! SAVE YOUR SEATS TODAY! 11th Datagro International Conference
by DATAGRO Conferences 08 Nov '11

08 Nov '11

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[U-Boot] [PATCH] arm: a320: fix broken timer
by Po-Yu Chuang 08 Nov '11

08 Nov '11

From: Po-Yu Chuang <ratbert(a)faraday-tech.com> timer.c used static data and are called before relocation. Move all static variables into global_data structure. Also cleanup timer.c from unused stubs and make it truly use 64 bit tick values. Remove reset_timer_masked() get_timer_masked() reference: arch/arm/cpu/arm926ejs/at91/timer.c Based on Reinhard Meyer <u-boot(a)emk-elektronik.de>'s patches 5dca710a3d7703e41da0e9894f2d71f9e25bea6b cfff263f41e32c7ba2ee9162a8cc6423eb5a8390 Signed-off-by: Po-Yu Chuang <ratbert(a)faraday-tech.com> --- arch/arm/cpu/arm920t/a320/timer.c | 134 ++++++++++++++----------------------- 1 files changed, 50 insertions(+), 84 deletions(-) diff --git a/arch/arm/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c index 443d31d..4bfcef2 100644 --- a/arch/arm/cpu/arm920t/a320/timer.c +++ b/arch/arm/cpu/arm920t/a320/timer.c @@ -18,20 +18,35 @@ */ #include <common.h> +#include <div64.h> #include <asm/io.h> #include <faraday/ftpmu010.h> #include <faraday/fttmr010.h> -static ulong timestamp; -static ulong lastdec; - -static struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE; +DECLARE_GLOBAL_DATA_PTR; #define TIMER_CLOCK 32768 #define TIMER_LOAD_VAL 0xffffffff +static inline unsigned long long tick_to_time(unsigned long long tick) +{ + tick *= CONFIG_SYS_HZ; + do_div(tick, gd->timer_rate_hz); + + return tick; +} + +static inline unsigned long long usec_to_tick(unsigned long long usec) +{ + usec *= gd->timer_rate_hz; + do_div(usec, 1000000); + + return usec; +} + int timer_init(void) { + struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE; unsigned int cr; debug("%s()\n", __func__); @@ -59,106 +74,57 @@ int timer_init(void) cr |= FTTMR010_TM3_ENABLE; writel(cr, &tmr->cr); - /* init the timestamp and lastdec value */ - reset_timer_masked(); + gd->timer_rate_hz = TIMER_CLOCK; + gd->tbu = gd->tbl = 0; return 0; } /* - * timer without interrupts - */ - -/* - * reset time - */ -void reset_timer_masked(void) -{ - /* capure current decrementer value time */ - lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ); - timestamp = 0; /* start "advancing" time stamp from 0 */ - - debug("%s(): lastdec = %lx\n", __func__, lastdec); -} - -/* - * return timer ticks - */ -ulong get_timer_masked(void) -{ - /* current tick value */ - ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ); - - debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec); - - if (lastdec >= now) { - /* - * normal mode (non roll) - * move stamp fordward with absoulte diff ticks - */ - timestamp += lastdec - now; - } else { - /* - * we have overflow of the count down timer - * - * nts = ts + ld + (TLV - now) - * ts=old stamp, ld=time that passed before passing through -1 - * (TLV-now) amount of time after passing though -1 - * nts = new "advancing time stamp"...it could also roll and - * cause problems. - */ - timestamp += lastdec + TIMER_LOAD_VAL - now; - } - - lastdec = now; - - debug("%s() returns %lx\n", __func__, timestamp); - - return timestamp; -} - -/* - * return difference between timer ticks and base + * Get the current 64 bit timer tick count */ -ulong get_timer(ulong base) +unsigned long long get_ticks(void) { - debug("%s(%lx)\n", __func__, base); - return get_timer_masked() - base; + struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE; + ulong now = TIMER_LOAD_VAL - readl(&tmr->timer3_counter); + + /* increment tbu if tbl has rolled over */ + if (now < gd->tbl) + gd->tbu++; + gd->tbl = now; + return (((unsigned long long)gd->tbu) << 32) | gd->tbl; } -/* delay x useconds AND preserve advance timestamp value */ void __udelay(unsigned long usec) { - long tmo = usec * (TIMER_CLOCK / 1000) / 1000; - unsigned long now, last = readl(&tmr->timer3_counter); - - debug("%s(%lu)\n", __func__, usec); - while (tmo > 0) { - now = readl(&tmr->timer3_counter); - if (now > last) /* count down timer overflow */ - tmo -= TIMER_LOAD_VAL + last - now; - else - tmo -= last - now; - last = now; - } + unsigned long long start; + ulong tmo; + + start = get_ticks(); /* get current timestamp */ + tmo = usec_to_tick(usec); /* convert usecs to ticks */ + while ((get_ticks() - start) < tmo) + ; /* loop till time has passed */ } /* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. + * get_timer(base) can be used to check for timeouts or + * to measure elasped time relative to an event: + * + * ulong start_time = get_timer(0) sets start_time to the current + * time value. + * get_timer(start_time) returns the time elapsed since then. + * + * The time is used in CONFIG_SYS_HZ units! */ -unsigned long long get_ticks(void) +ulong get_timer(ulong base) { - debug("%s()\n", __func__); - return get_timer(0); + return tick_to_time(get_ticks()) - base; } /* - * This function is derived from PowerPC code (timebase clock frequency). - * On ARM it returns the number of timer ticks per second. + * Return the number of timer ticks per second. */ ulong get_tbclk(void) { - debug("%s()\n", __func__); - return CONFIG_SYS_HZ; + return gd->timer_rate_hz; } -- 1.7.4.1

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[U-Boot] Please pull u-boot-ti/master
by s-paulraj＠ti.com 08 Nov '11

08 Nov '11

The following changes since commit c686537f34268ffd6d87e3b8b14d1118b221a995: David Müller (ELSOFT AG) (1): ARM: re-add MACH_TYPE_XXXXXX for VCMA9 board and add CONFIG_MACH_TYPE are available in the git repository at: git://git.denx.de/u-boot-ti.git master Christian Riesch (3): arm, davinci: Rename AM1808 lowlevel functions to DA850 arm, davinci: Remove the duplication of LPSC functions arm, davinci: Fix setting of the SDRAM configuration register Manjunath Hadli (2): dm646x: add new configuration for dm6467T dm646x: pass board revision info to kernel Prabhakar Lad (1): da8xxevm: fix build error arch/arm/cpu/arm926ejs/davinci/Makefile | 2 +- .../{am1808_lowlevel.c => da850_lowlevel.c} | 223 +++++++------------- .../{am1808_lowlevel.h => da850_lowlevel.h} | 26 ++-- arch/arm/include/asm/arch-davinci/hardware.h | 1 + board/davinci/dm6467evm/dm6467evm.c | 20 ++ boards.cfg | 1 + include/configs/davinci_dm6467Tevm.h | 163 ++++++++++++++ include/configs/davinci_dm6467evm.h | 1 + 8 files changed, 274 insertions(+), 163 deletions(-) rename arch/arm/cpu/arm926ejs/davinci/{am1808_lowlevel.c => da850_lowlevel.c} (56%) rename arch/arm/include/asm/arch-davinci/{am1808_lowlevel.h => da850_lowlevel.h} (63%) create mode 100644 include/configs/davinci_dm6467Tevm.h

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Re: [U-Boot] [PATCH v2 1/3] image: Make image_get_fdt work like image_get_{ram_disk, kernel}
by Wolfgang Denk 08 Nov '11

08 Nov '11

Dear Stephen Warren, In message <74CDBE0F657A3D45AFBB94109FB122FF173F9A5415(a)HQMAIL01.nvidia.com> you wrote: > Wolfgang Denk wrote at Tuesday, November 08, 2011 9:07 AM: > > In message <1320164902-24190-1-git-send-email-swarren(a)nvidia.com> you wrote: > > > image_get_ram_disk() and image_get_kernel() perform operations in a > > > consistent order. Modify image_get_fdt() to do things the same way. > > > This allows a later change to insert some image header manipulations > > > into these three functions in a consistent fashion. > ... > > > @@ -1131,14 +1131,19 @@ static const image_header_t *image_get_fdt(ulong fdt_addr) > > > { > > > const image_header_t *fdt_hdr = (const image_header_t *)fdt_addr; > > > > > > - image_print_contents(fdt_hdr); > > > + if (!image_check_magic(fdt_hdr)) { > > > + fdt_error("fdt header bad magic number\n"); > > > + return NULL; > > > + } > > > > > > - puts(" Verifying Checksum ... "); > > > if (!image_check_hcrc(fdt_hdr)) { > > > fdt_error("fdt header checksum invalid"); > > > return NULL; > > > } > > > > > > + image_print_contents(fdt_hdr); > > > + > > > + puts(" Verifying Checksum ... "); > > > if (!image_check_dcrc(fdt_hdr)) { > > > fdt_error("fdt checksum invalid"); > > > return NULL; ... > > The rule in U-Boot when generating output is to print a message > > before you start an action, and then either print an OK or an error > > message. The reason for this is debug support: if neither an OK nor > > an error comes you know that the test somehow crashed. ... > The new code is exactly the same as the existing image_get_kernel() and > image_get_ramdisk(). Are those wrong? I wouldn't want to fix my patch to > conform to some supposed standard when the existing code that's been > accepted doesn't conform to that standard, or would I be responsible for > fixing up that too? The new code is different from what was there before. Now we have: 1134 image_print_contents(fdt_hdr); 1135 1136 puts(" Verifying Checksum ... "); 1137 if (!image_check_hcrc(fdt_hdr)) { 1138 fdt_error("fdt header checksum invalid"); 1139 return NULL; 1140 } 1141 1142 if (!image_check_dcrc(fdt_hdr)) { 1143 fdt_error("fdt checksum invalid"); 1144 return NULL; i.e. image_print_contents(fdt_hdr); puts(" Verifying Checksum ... "); image_check_hcrc(fdt_hdr); image_check_dcrc(fdt_hdr) After your patch we have: image_check_magic(); image_check_hcrc() image_print_contents((); puts(" Verifying Checksum ... "); image_check_dcrc(); So before, we have the "Verifying Checksum" before running any of the image_check_*() functions, while with your patch we run two of them before that. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Intel's new motto: United we stand. Divided we fall!

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[U-Boot] [PATCH v2 0/12] Add more framework to OMAP3 SPL, port more boards
by Tom Rini 08 Nov '11

08 Nov '11

This is related to, but a bit different from the RFT thread I made with beagleboard SPL patches. I've incorporated the feedback about splitting the changes up a lot more and after talking with Scott Wood on IRC after the ML thread, I've created an omap3 specific file with the NAND related stuff these boards need (since it would have gotten very big for what's really needed here at this stage). The series is checkpatch.pl clean. What we have in patches 1-6 is bugfixing and cleanup of the SDRC code. It's worth noting that without these changes we do some very 'funny' (read: wrong) things on some platforms like omap3_evm where we find 384MB memory when there's really only 256MB (and maybe 256 on the 128MB boards, not sure). Patch 7 adds another hook for SDRC boards to be able to say what timings they have because on say beagle or omap3_evm, we have a few choices. We also convert devkit8000 here. Patch 8 adds a new CONFIG (CONFIG_SPL_OMAP3_POP_PROBE) and file so that OMAP3 boards which have a PoP chip for NAND/DDR can find out what they are and decide on timings based on that. While I can see in theory the case where one probes NAND to determine DDR timings and isn't actually populated with a PoP chip, I don't know if we have any of those in practice. Patches 9 and 10 convert Beagleboard and OMAP3 EVM to SPL. Patches 11 and 12 convert the am3517 evm and am3517 crane boards (which don't use SDRC but EMIF4) to SPL as well (given Ilya Yanok fixed a bug in <asm/arch-omap3/cpu.h for emif4 this is just a mechanical change). Changes in v2: - Incorporate Igor Grinberg's feedback (except non-CodingStyle whitespacing). - Move to ToT (so omap3_evm patch is reworked a good deal, others that touch <asm/arch-omap3/mem.h> reworked and use new macros when applicable) - Fixed a few more typos and hardcoded values to defines while addressing Igor's feedback. -- Tom

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