August 2010 - U-Boot

[U-Boot] Patch adding reads/writes[bwl]
by Marek Vasut 07 Aug '10

07 Aug '10

Firstly, sorry about missing cc...I was unable to figure out how to convince n900 to cc more than one person. Also, I didn't manage to get git send-email running on n900, but I was close ... So sorry about the attached patch.

2 3

[U-Boot] [PATCH] Change the configuration for the STx GP3-SSA board in order to support FDT parsing and passing.
by Bradley Hughes 07 Aug '10

07 Aug '10

Change the configuration for the STx GP3-SSA board in order to support FDT parsing and passing. Also changed default u-boot environment for convenience. Signed-off-by: Bradley Hughes <bhughes(a)silicontkx.com> --- board/stx/stxssa/stxssa.c | 10 ++++ include/configs/stxssa.h | 114 +++++++++++++++++++++++++++++---------------- 2 files changed, 84 insertions(+), 40 deletions(-) diff --git a/board/stx/stxssa/stxssa.c b/board/stx/stxssa/stxssa.c index 0b2584c..9cd2c62 100644 --- a/board/stx/stxssa/stxssa.c +++ b/board/stx/stxssa/stxssa.c @@ -40,6 +40,8 @@ #include <spd_sdram.h> #include <miiphy.h> #include <netdev.h> +#include <libfdt.h> +#include <fdt_support.h> long int fixed_sdram (void); @@ -407,3 +409,11 @@ int board_eth_init(bd_t *bis) cpu_eth_init(bis); /* Initialize TSECs first */ return pci_eth_init(bis); } + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); +} +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ + diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index 363f7b4..d7adee9 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -26,11 +26,7 @@ * MA 02111-1307 USA */ -/* mpc8560ads board configuration file */ -/* please refer to doc/README.mpc85xx for more info */ -/* make sure you change the MAC address and other network params first, - * search for CONFIG_ETHADDR,CONFIG_SERVERIP,etc in this file - */ +/* STX GP3 SSA board configuration file */ #ifndef __CONFIG_H #define __CONFIG_H @@ -41,7 +37,7 @@ #define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_STXSSA 1 /* Silicon Tx GPPP SSA board specific*/ -#define CONFIG_MPC8560 1 +#define CONFIG_MPC8555 1 #define CONFIG_PCI /* PCI ethernet support */ #define CONFIG_TSEC_ENET /* tsec ethernet support*/ @@ -194,6 +190,14 @@ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #endif +/* + * Support FDT-file passing + */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_OF_STDOUT_VIA_ALIAS 1 + + /* * I2C */ @@ -346,15 +350,19 @@ */ #include <config_cmd_default.h> +#define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C +#define CONFIG_CMD_MII #define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_SNTP #define CONFIG_CMD_REGINFO +#undef CONFIG_CMD_FUSE + #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI #endif @@ -370,14 +378,13 @@ #define CONFIG_CMD_ELF #endif - #undef CONFIG_WATCHDOG /* watchdog disabled */ /* * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "SSA=> " /* Monitor Command Prompt */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #else @@ -419,6 +426,20 @@ #define CONFIG_ETH2ADDR 00:e0:0c:07:9b:8c #endif + + +/* + * Configuration options for EEPROM or FLASH Setup + */ +#define CONFIG_SERVERIP 10.10.0.150 +#define CONFIG_IPADDR 10.10.0.95 +#define CONFIG_GATEWAYIP 10.10.0.1 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_HOSTNAME STX_SSA +#define CONFIG_ROOTPATH /opt/ppc/ppc_85xx +#define CONFIG_BOOTFILE stxssa/uImage +#define CONFIG_FDTFILE stxssa/stxssa.fdt + /* * Environment in EEPROM is compatible with different flash sector sizes, * but only little space is available, so we use a very simple setup. @@ -431,13 +452,6 @@ #define CONFIG_BOOTDELAY 3 /* -1 disable autoboot */ #define CONFIG_BOOTCOMMAND "bootm 0xffc00000 0xffd00000" #define CONFIG_BOOTARGS "root=/dev/nfs rw ip=any console=ttyS1,$baudrate" -#define CONFIG_SERVERIP 192.168.85.1 -#define CONFIG_IPADDR 192.168.85.60 -#define CONFIG_GATEWAYIP 192.168.85.1 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_HOSTNAME STX_SSA -#define CONFIG_ROOTPATH /gppproot -#define CONFIG_BOOTFILE uImage #define CONFIG_LOADADDR 0x1000000 #else /* ENV IS IN FLASH -- use a full-blown envionment */ @@ -452,31 +466,51 @@ #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "hostname=gp3ssa\0" \ - "bootfile=/tftpboot/gp3ssa/uImage\0" \ - "loadaddr=400000\0" \ - "netdev=eth0\0" \ - "consdev=ttyS1\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip=setenv bootargs $bootargs " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask" \ - ":$hostname:$netdev:off panic=1\0" \ - "addcons=setenv bootargs $bootargs " \ - "console=$consdev,$baudrate\0" \ - "flash_nfs=run nfsargs addip addcons;" \ - "bootm $kernel_addr\0" \ - "flash_self=run ramargs addip addcons;" \ - "bootm $kernel_addr $ramdisk_addr\0" \ - "net_nfs=tftp $loadaddr $bootfile;" \ - "run nfsargs addip addcons;bootm\0" \ - "rootpath=/opt/eldk/ppc_85xx\0" \ - "kernel_addr=FC000000\0" \ - "ramdisk_addr=FC200000\0" \ - "" -#define CONFIG_BOOTCOMMAND "run flash_self" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "u-boot_addr_r=FFF00000\0" \ + "kernel_addr_r=FC000000\0" \ + "fdt_addr_r=FC400000\0" \ + "ramdisk_addr_r=FC200000\0" \ + "u-boot_addr=FFF00000\0" \ + "kernel_addr=FC000000\0" \ + "fdt_addr=FC400000\0" \ + "ramdisk_addr=FC200000\0" \ + "ramdiskfile=stxssa/uRamdisk\0" \ + "u-boot=stxssa/u-boot.bin\0" \ + "bootfile=stxssa/uImage\0" \ + "fdtfile=stxssa/stxssa.dtb\0" \ + "rootpath=/opt/ppc/ppc_85xx\n" \ + "netdev=eth0\0" \ + "consdev=ttyPSC0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "addtty=setenv bootargs ${bootargs} " \ + "console=${consdev},${baudrate}\0" \ + "flash_nfs=run nfsargs addip addtty;" \ + "bootm ${kernel_addr} - ${fdt_addr}\0" \ + "flash_self=run ramargs addip addtty;" \ + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ + "tftp ${fdt_addr_r} ${fdtfile};" \ + "run nfsargs addip addtty;" \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "net_self=tftp ${kernel_addr_r} ${bootfile};" \ + "tftp ${ramdisk_addr_r} ${ramdiskfile};" \ + "tftp ${fdt_addr_r} ${fdtfile};" \ + "run ramargs addip addtty;" \ + "bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}\0"\ + "load=tftp ${u-boot_addr_r} ${u-boot}\0" \ + "update=protect off ${u-boot_addr} +${filesize};" \ + "era ${u-boot_addr} +${filesize};" \ + "cp.b ${u-boot_addr_r} ${u-boot_addr} ${filesize}\0" \ + "upd=run load update\0" \ + "" + +#define CONFIG_BOOTCOMMAND "run net_nfs" #endif /* CONFIG_ENV_IS_IN_EEPROM */ -- 1.7.0.4

2 4

[U-Boot] [PATCH] Fix condition where bootm_size not set and wrong memory size reported
by Matthew McClintock 07 Aug '10

07 Aug '10

If the user sets bootm_low and does not set bootm_size, u-boot will report the memory node in the flat device tree incorrectly. Instead of reporting the remaining size of memory, it will report the total available memory which is incorrect. Specifically this fixes the situation when booting a relocatable kernel and the memory is reported as an offset and size in the device tree, and the size needs to be adjusted accordingly. Signed-off-by: Matthew McClintock <msm(a)freescale.com> --- common/image.c | 12 +++++++++--- 1 files changed, 9 insertions(+), 3 deletions(-) diff --git a/common/image.c b/common/image.c index 2b6007e..bf2acb0 100644 --- a/common/image.c +++ b/common/image.c @@ -433,17 +433,23 @@ ulong getenv_bootm_low(void) phys_size_t getenv_bootm_size(void) { + phys_size_t tmp; char *s = getenv ("bootm_size"); if (s) { - phys_size_t tmp; tmp = (phys_size_t)simple_strtoull (s, NULL, 16); return tmp; } + s = getenv("bootm_low"); + if (s) + tmp = (phys_size_t)simple_strtoull (s, NULL, 16); + else + tmp = 0; + #if defined(CONFIG_ARM) - return gd->bd->bi_dram[0].size; + return (gd->bd->bi_dram[0].size - tmp); #else - return gd->bd->bi_memsize; + return (gd->bd->bi_memsize - tmp); #endif } -- 1.6.6.1

4 5

[U-Boot] [PATCH] fix bug in get_ram_size()
by ratbert.chuang＠gmail.com 07 Aug '10

07 Aug '10

From: Po-Yu Chuang <ratbert(a)faraday-tech.com> memory content of base address was not restored Signed-off-by: Po-Yu Chuang <ratbert(a)faraday-tech.com> --- common/memsize.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/common/memsize.c b/common/memsize.c index 6c275c9..99469ab 100644 --- a/common/memsize.c +++ b/common/memsize.c @@ -74,6 +74,7 @@ long get_ram_size(volatile long *base, long maxsize) return (0); } + *addr = save[i]; for (cnt = 1; cnt < maxsize / sizeof (long); cnt <<= 1) { addr = base + cnt; /* pointer arith! */ val = *addr; -- 1.6.3.3

3 2

[U-Boot] [GIT PULL] u-boot-mpc83xx fix
by Kim Phillips 07 Aug '10

07 Aug '10

Wolfgang Denk, Please pull a fix for the mpc8313 usb setting: The following changes since commit 9bb3b3d4406c1e388a99f6fb189147d6a06cc2cf: Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx (2010-05-30 21:44:07 +0200) are available in the git repository at: git://git.denx.de/u-boot-mpc83xx.git master Ron Madrid (1): Update SICRL_USBDR to reflect 4 different settings include/configs/MPC8313ERDB.h | 2 +- include/configs/SIMPC8313.h | 2 +- include/mpc83xx.h | 5 ++++- 3 files changed, 6 insertions(+), 3 deletions(-) Also, I've noticed main CHANGELOG updates are still being performed: commit c4976807cbbabd281f45466ac5e47e5639bcc9cb Author: Wolfgang Denk <wd(a)denx.de> Date: Wed May 26 23:51:22 2010 +0200 Coding style cleanup, update CHANGELOG. Signed-off-by: Wolfgang Denk <wd(a)denx.de> Any news wrt implementing a gitattributes based solution instead?: http://lists.denx.de/pipermail/u-boot/2010-May/071118.html Kim

2 6

[U-Boot] [PATCH] AT91 Fix: return value of get_tbclk
by Jens Scharsig 07 Aug '10

07 Aug '10

* Fix: return value of get_tbclk * this fixes issue with prematurely restart/retry, if BOOT_RETRY_TIMEOUT is used Signed-off-by: Jens Scharsig <js_at_ng(a)scharsoft.de> --- cpu/arm926ejs/at91/timer.c | 5 +---- 1 files changed, 1 insertions(+), 4 deletions(-) diff --git a/cpu/arm926ejs/at91/timer.c b/cpu/arm926ejs/at91/timer.c index d21eebf..8efc34b 100644 --- a/cpu/arm926ejs/at91/timer.c +++ b/cpu/arm926ejs/at91/timer.c @@ -138,8 +138,5 @@ ulong get_timer(ulong base) */ ulong get_tbclk(void) { - ulong tbclk; - - tbclk = CONFIG_SYS_HZ; - return tbclk; + return timer_freq; } -- 1.6.0.2

1 2

[U-Boot] GOOD DAY:
by MR RAHA OUSMAN 07 Aug '10

07 Aug '10

GOOD DAY: My Name is Mr.RAHA.OUSMAN. I am writing from Burkina Faso-West Africa. I am a staff of one of the biggest Bank here. I wish to contact you independently, no one is aware of this information. My reason for contacting you is to wire an abandoned $18,300, 000.00 (Eighteen Million Three Hundred Thousand Dollars) that has remained unclaimed for 13 years in our Branch to your account abroad. The owner of this account died since august, 1997. Get back to me for detailed information, if you are interested. Regards, Mr.RAHA.OUSMAN.

1 0

[U-Boot] [PATCH V7 0/4] Add disk support to orion5x and edminiv2
by Albert Aribaud 07 Aug '10

07 Aug '10

Patchset history: V1: Initial 4-patch set -- not cleanly submitted (does not appear on gmane for instance) and contained some unrelated changes. V2: Slimmed down to 3 patches and removed unrelated changes. V3: Back to 4 patches (cmd_ide improvement, driver addition, cmd_ide support for orion, edminiv2 support for sata); made initialization code reuseable as a block driver ; moved to C structures; commented some constants. V4: Reordered objects alphabetically in drivers/block/Makefile. Shortened mv_sata to mvsata. Removed volatile qualifier in mvsata port structure. Moved port pointer definition from SoC to board code. Removed unrelated changes. V5: Fixed typo in mvsata_ide driver (IMP, should have been IPM). V6: Fixed case in ide register struct. Fixed warning in deminiv2.c Put IDE configuration under condition. V7: Reworked the initialization logic to poll status register. Moved initialization from board code to driver code. Removed driver header file and moved its content to driver code. Moved CONFIG_IDE_PREINIT from SoC to board config file. The patches have been run through checkpatch.pl --no-tree with no errors or warnings, and have been tested on an ED Mini V2. Albert Aribaud (4): ide: add configuration CONFIG_IDE_SWAP_IO ide: add mvsata_ide driver cmd_ide: add support for orion5x edminiv2: add mvsata_ide and cmd_ide support arch/arm/include/asm/arch-orion5x/orion5x.h | 3 + arch/powerpc/include/asm/config.h | 3 + common/cmd_ide.c | 23 +++-- doc/README.PXA_CF | 8 ++ drivers/block/Makefile | 7 +- drivers/block/mvsata_ide.c | 140 +++++++++++++++++++++++++++ include/configs/ap325rxa.h | 1 + include/configs/edminiv2.h | 34 ++++++- include/configs/ms7720se.h | 1 + include/configs/r2dplus.h | 1 + include/configs/r7780mp.h | 1 + 11 files changed, 209 insertions(+), 13 deletions(-) create mode 100644 drivers/block/mvsata_ide.c

5 24

[U-Boot] [PATCH v2] PXA: New MMC driver
by Marek Vasut 06 Aug '10

06 Aug '10

The new driver is a complete rewrite. It uses the MMC framework and should support both pxa2xx and pxa3xx. Tested on: - Palm Tungsten|C PXA255 - Aeronix ZipitZ2 PXA270 - Marvell Zylonite 300 PXA300 This driver needs testing though. Signed-off-by: Marek Vasut <marek.vasut(a)gmail.com> --- drivers/mmc/Makefile | 1 + drivers/mmc/pxa_mmc.h | 21 +++ drivers/mmc/pxa_mmc_gen.c | 335 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 357 insertions(+), 0 deletions(-) create mode 100644 drivers/mmc/pxa_mmc_gen.c diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 6fa04b8..01338a4 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -32,6 +32,7 @@ COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o COBJS-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o COBJS-$(CONFIG_MXC_MMC) += mxcmmc.o COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o +COBJS-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mmc/pxa_mmc.h b/drivers/mmc/pxa_mmc.h index 6fa4268..c993651 100644 --- a/drivers/mmc/pxa_mmc.h +++ b/drivers/mmc/pxa_mmc.h @@ -135,4 +135,25 @@ #define MMC_R1B_ADDR_ERR 0x2000 #define MMC_R1B_PARAM_ERR 0x4000 +/* PXAMMC Generic default config for various CPUs */ +#if defined(CONFIG_PXA250) + #define PXAMMC_FIFO_SIZE 1 + #define PXAMMC_MIN_SPEED 312500 + #define PXAMMC_MAX_SPEED 20000000 + #define PXAMMC_HOST_CAPS (0) +#elif defined(CONFIG_PXA27X) + #define PXAMMC_CRC_SKIP + #define PXAMMC_FIFO_SIZE 32 + #define PXAMMC_MIN_SPEED 304000 + #define PXAMMC_MAX_SPEED 19500000 + #define PXAMMC_HOST_CAPS (MMC_MODE_4BIT) +#elif defined(CONFIG_CPU_MONAHANS) + #define PXAMMC_FIFO_SIZE 32 + #define PXAMMC_MIN_SPEED 304000 + #define PXAMMC_MAX_SPEED 26000000 + #define PXAMMC_HOST_CAPS (MMC_MODE_4BIT | MMC_MODE_HS) +#else +#error "Unknown CPU for PXAMMC" +#endif + #endif /* __MMC_PXA_P_H__ */ diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c new file mode 100644 index 0000000..ea04e0a --- /dev/null +++ b/drivers/mmc/pxa_mmc_gen.c @@ -0,0 +1,335 @@ +/* + * Copyright (C) 2010 Marek Vasut <marek.vasut(a)gmail.com> + * + * Loosely based on the old code and Linux's PXA MMC driver + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <common.h> +#include <malloc.h> + +#include <mmc.h> +#include <asm/errno.h> +#include <asm/arch/hardware.h> + +#include "pxa_mmc.h" + +/* 1000uS (in wait cycles below it's 100 x 10uS waits) */ +#define PXA_MMC_TIMEOUT 100 + +static int pxa_mmc_wait(int mask) +{ + int timeout = PXA_MMC_TIMEOUT; + + /* Wait until the clock are off */ + while (!(MMC_STAT & mask) && --timeout) + udelay(10); + + /* The clock refused to stop, scream and die a painful death */ + if (!timeout) + return -ETIMEDOUT; + +} + +static int pxa_mmc_stop_clock(void) +{ + int timeout = PXA_MMC_TIMEOUT; + + /* If the clock aren't running, exit */ + if (!(MMC_STAT & MMC_STAT_CLK_EN)) + return 0; + + /* Tell the controller to turn off the clock */ + MMC_STRPCL = MMC_STRPCL_STOP_CLK; + + /* Wait until the clock are off */ + while ((MMC_STAT & MMC_STAT_CLK_EN) && --timeout) + udelay(10); + + /* The clock refused to stop, scream and die a painful death */ + if (!timeout) + return -ETIMEDOUT; + + /* The clock stopped correctly */ + return 0; +} + +static int pxa_mmc_start_cmd(struct mmc_cmd *cmd, unsigned long cmdat) +{ + int ret; + + /* The card can send a "busy" response */ + if (cmd->flags & MMC_RSP_BUSY) + cmdat |= MMC_CMDAT_BUSY; + + /* Inform the controller about response type */ + switch (cmd->resp_type) { + case MMC_RSP_R1: + case MMC_RSP_R1b: + cmdat |= MMC_CMDAT_R1; + break; + case MMC_RSP_R2: + cmdat |= MMC_CMDAT_R2; + break; + case MMC_RSP_R3: + cmdat |= MMC_CMDAT_R3; + break; + default: + break; + } + + /* Load command and it's arguments into the controller */ + MMC_CMD = cmd->cmdidx; + MMC_ARGH = cmd->cmdarg >> 16; + MMC_ARGL = cmd->cmdarg & 0xffff; + MMC_CMDAT = cmdat; + + /* Start the controller clock and wait until they are started */ + MMC_STRPCL = MMC_STRPCL_START_CLK; + + ret = pxa_mmc_wait(MMC_STAT_CLK_EN) + if (ret) + return ret; + + /* Correct and happy end */ + return 0; +} + +static int pxa_mmc_cmd_done(struct mmc_cmd *cmd) +{ + unsigned long a, b, c; + int i; + int stat; + + /* Read the controller status */ + stat = MMC_STAT; + + /* + * Linux says: + * Did I mention this is Sick. We always need to + * discard the upper 8 bits of the first 16-bit word. + */ + a = MMC_RES & 0xffff; + for (i = 0; i < 4; i++) { + b = MMC_RES & 0xffff; + c = MMC_RES & 0xffff; + cmd->response[i] = (a << 24) | (b << 8) | (c >> 8); + a = c; + } + + /* The command response didn't arrive */ + if (stat & MMC_STAT_TIME_OUT_RESPONSE) + return -ETIMEDOUT; + else if (stat & MMC_STAT_RES_CRC_ERROR && cmd->flags & MMC_RSP_CRC) { +#ifdef PXAMMC_CRC_SKIP + if (cmd->flags & MMC_RSP_136 && cmd->response[0] & 0x80000000) + printf("Ignoring CRC, this may be dangerous!\n"); + else +#endif + return -EILSEQ; + } + + /* The command response was successfully read */ + return 0; +} + +static int pxa_mmc_do_read_xfer(struct mmc_data *data) +{ + unsigned long len; + int i; + int ret; + + len = data->blocks * data->blocksize; + + while (len) { + /* The controller has data ready */ + if (MMC_I_REG & MMC_I_REG_RXFIFO_RD_REQ) { + i = min(len, PXAMMC_FIFO_SIZE); + + while (i--) { + *data->dest++ = *((volatile uchar *)&MMC_RXFIFO); + len--; + } + } + + if (MMC_STAT & MMC_STAT_ERRORS) + return -EIO; + } + + /* Wait for the transmission-done interrupt */ + ret = pxa_mmc_wait(MMC_STAT_DATA_TRAN_DONE) + if (ret) + return ret; + + return 0; +} + +static int pxa_mmc_do_write_xfer(struct mmc_data *data) +{ + unsigned long len; + int i, bytes; + int ret; + + len = data->blocks * data->blocksize; + + while (len) { + /* The controller is ready to receive data */ + if (MMC_I_REG & MMC_I_REG_TXFIFO_WR_REQ) { + bytes = min(len, PXAMMC_FIFO_SIZE); + + for (i = 0; i < bytes; i++) + MMC_TXFIFO = *data->src++; + + if (bytes < 32) + MMC_PRTBUF = MMC_PRTBUF_BUF_PART_FULL; + + len -= bytes; + } + + if (MMC_STAT & MMC_STAT_ERRORS) + return -EIO; + } + + /* Wait for the transmission-done interrupt */ + ret = pxa_mmc_wait(MMC_STAT_DATA_TRAN_DONE) + if (ret) + return ret; + + /* Wait until the data are really written to the card */ + ret = pxa_mmc_wait(MMC_STAT_PRG_DONE) + if (ret) + return ret; + + return 0; +} + +static int pxa_mmc_request(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + unsigned long cmdat = 0; + int ret; + + /* Stop the controller */ + ret = pxa_mmc_stop_clock(); + if (ret) + return ret; + + /* If we're doing data transfer, configure the controller accordingly */ + if (data) { + MMC_NOB = data->blocks; + MMC_BLKLEN = data->blocksize; + /* This delay can be optimized, but stick with max value */ + MMC_RDTO = 0xffff; + cmdat |= MMC_CMDAT_DATA_EN; + if (data->flags & MMC_DATA_WRITE) + cmdat |= MMC_CMDAT_WRITE; + } + + /* Run in 4bit mode if the card can do it */ + if (mmc->bus_width == 4) + cmdat |= MMC_CMDAT_SD_4DAT; + + /* Execute the command */ + ret = pxa_mmc_start_cmd(cmd, cmdat); + if (ret) + return ret; + + /* Wait until the command completes */ + ret = pxa_mmc_wait(MMC_STAT_END_CMD_RES) + if (ret) + return ret; + + /* Read back the result */ + ret = pxa_mmc_cmd_done(cmd); + if (ret) + return ret; + + /* In case there was a data transfer scheduled, do it */ + if (data) { + if (data->flags & MMC_DATA_WRITE) + pxa_mmc_do_write_xfer(data); + else + pxa_mmc_do_read_xfer(data); + } + + return 0; +} + +static void pxa_mmc_set_ios(struct mmc *mmc) +{ + unsigned long tmp; + unsigned long pxa_mmc_clock; + + /* Set clock to the card */ + if (mmc->clock) { + /* PXA3xx can do 26MHz with special settings */ + if (mmc->clock == 26000000) + MMC_CLKRT = 0x7; + else { + pxa_mmc_clock = 0; + tmp = mmc->f_max / mmc->clock; + tmp += tmp % 2; + while (tmp > 1) { + pxa_mmc_clock++; + tmp >>= 1; + } + MMC_CLKRT = pxa_mmc_clock; + } + } else + pxa_mmc_stop_clock(); +} + +static int pxa_mmc_setup(struct mmc *mmc) +{ + /* Make sure the clock are stopped */ + pxa_mmc_stop_clock(); + /* Turn off SPI mode */ + MMC_SPI = MMC_SPI_DISABLE; + /* Set up maximum timeout to wait for command response */ + MMC_RESTO = MMC_RES_TO_MAX; + /* Mask all interrupts */ + MMC_I_MASK = ~(MMC_I_MASK_TXFIFO_WR_REQ | MMC_I_MASK_RXFIFO_RD_REQ); + return 0; +} + +int pxa_mmc_init(bd_t *bis) +{ + struct mmc *mmc; + + mmc = malloc(sizeof(struct mmc)); + + if (!mmc) + return -ENOMEM; + sprintf(mmc->name, "PXA MMC"); + mmc->send_cmd = pxa_mmc_request; + mmc->set_ios = pxa_mmc_set_ios; + mmc->init = pxa_mmc_setup; + + mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; + mmc->f_max = PXAMMC_MAX_SPEED; + mmc->f_min = PXAMMC_MIN_SPEED; + mmc->host_caps = PXAMMC_HOST_CAPS; + mmc_register(mmc); + + return 0; +} + +int cpu_mmc_init(bd_t *bis) +{ + return pxa_mmc_init(bis); +} -- 1.7.1

1 0

[U-Boot] Warning NetReceive(): Make sure packet buffers start on an even address
by Reinhard Meyer (-VC) 06 Aug '10

06 Aug '10

Hi, The network layer currently handles packets with c-structures overlayd on the packets. NetReceive() will fail to correctly parse packets that are not word aligned (at least on ARM cpus). Just figured that out debugging the enc28j60 driver. Which had no fault except for having the receive packet buffer on an odd address :) Instead of: static unsigned char buffer[ENC_MAX_FRM_LEN]; The following works fine: static unsigned long lbuffer[ENC_MAX_FRM_LEN/4]; #define buffer ((unsigned char *)lbuffer) Is there a more elegant way of forcing a char array to start on an even address? Reinhard

4 7