August 2010 - U-Boot

[U-Boot] DNS323 (Orion5x) must double ORION5X_SZ_BOOTROM to access full flash
by Rogan Dawes 23 Aug '10

23 Aug '10

Hi Albert, I've been trying to figure out why I could not erase sectors in my flash greater than SA70. It turned out that this was on a megabyte boundary, and in fact, was exactly half way through my flash. The flash is a 64Mbit part, i.e. 8MB, and I could only access the first 4MB of it, even though the ORION5X_SZ_BOOTROM parameter was set to (8 * 1024 * 1024). By "access" I mean that even md.b commands simply returned "00", and flash erase commands returned immediately without actually doing anything. Doubling the value for ORION5X_SZ_BOOTROM allowed me to access the additional sectors, but that makes me wonder what the reason for it is. I know that the flash chip is wired up strangely, but would that also affect the window mappings? If that is the case, I just need to document WHY the parameter is doubled, but if not, it would be good to understand the real reason for the change. Rogan

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[U-Boot] Non-experimental U-Boot compilation
by sandeep suresh 23 Aug '10

23 Aug '10

Dear all, I am using the AT91SAM9G20EK kit and want to port Linux on this. I am using the AT91SAM9260ek configuration as it seems the closest. The problem is after building the U-boot with the sources for this board, generating the .bin, loading and a power on reset (POR), there isn't a command prompt exposed (u-boot>). After POR, 1 1 2 1 1 2 continuosly prints on the hyperterminal. I read from AT91.com that this is the expected behavior for the demo version. What is rge procedure to get the prompt ? Are there any separate configuration settings? Please help as I am stuck. Thanks & regards Sandeep.

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[U-Boot] Compact Flash Support on Omap 3530
by Yau Kwong K (Tony) 23 Aug '10

23 Aug '10

Hi there, I would like to know if u-boot has compact flash support on OMAP 3530, if it does, what version of u-boot should I get? Thanks, Tony

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by somchai katnimit 23 Aug '10

23 Aug '10

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[U-Boot] help with HP mv2120 debricking
by Miroslav Petricek 23 Aug '10

23 Aug '10

Dear members, I was playing with my MH mv2120 NAS device and it happened to me that I stored some u-boot values and the device now hangs on boot. I am stupid I know. Last thing I did was that I've set: setenv enaPost Yes setenv enaCpuStream Yes and saved them: saveenv Now my device hangs like this (taken from serial console) . \___/ |____/ \___/ \___/ \__| ** Forcing LOADER mode only ** ** MARVELL BOARD: RD-88F5182-NAS-P2 LE U-Boot 1.1.4 (Oct 12 2007 - 12:30:28) Marvell version: 2.3.11_HP_1_3_1_Built@HP U-Boot code: 00200000 -> 0026FFF0 BSS: -> 0027FDBC Soc: 88F5182 A2 (DDR2) CPU running @ 500Mhz SysClock = 166Mhz , TClock = 166Mhz DRAM CS[0] base 0x00000000 size 128MB DRAM Total size 128MB 32bit width Memory test pattern: 0x55555555, 0xAAAAAAAA, Pass [512kB@fff80000] Flash: 512 kB Addresses 4M - 0M are saved for the U-Boot usage. Mem malloc Initialization (4M - 3M): Done CPU : ARM926 (Rev 0) Orion 1 streaming enabled And here it hangs. I wonder if there is any way hot to reset u-boot settings. I mean some interrupt the POST by some magic key from serial consoler or something. Do you think there is any possibility to debrick my device? Thanks, Mirek

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[U-Boot] AUTO: Richard Strange is out of the office. (returning 31/08/2010)
by Richard.Strange＠invensysrail.com 23 Aug '10

23 Aug '10

I am out of the office until 31/08/2010. Note: This is an automated response to your message "U-Boot Digest, Vol 27, Issue 25" sent on 21/08/2010 11:00:03. This is the only notification you will receive while this person is away. Any files attached to this e-mail will have been checked with virus detection software prior to transmission but you should carry out your own virus check before opening any attachment. Invensys Rail does not accept liability for any damage or loss which may be caused by software viruses. This e-mail and any associated files are intended solely for the individual or entity to whom they are addressed. Please do not copy it or use it for any purposes, or disclose its contents to any other person. Further, this e-mail and any associated files may be confidential and further may be legally privileged. This email is from the Invensys Rail Limited business unit of Invensys plc which is a company registered in England and Wales with its registered office at 3rd Floor, 40 Grosvenor Place,� London, SW1X 7AW (Registered number 166023). For a list of European legal entities within Invensys Rail business group, please click here If you have received this e-mail in error, you are on notice of its status. Please notify us immediately by reply e-mail and then delete this message from your system. Thank you for your co-operation. You may contact our Helpdesk on +44 (0)20 7821 3859 / 2105 or email inet.hqhelpdesk(a)invensys.com This e-mail and any attachments thereto may be subject to the terms of any agreements between Invensys (and/or its subsidiaries and affiliates) and the recipient (and/or its subsidiaries and affiliates).

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Re: [U-Boot] [PATCH] I2C: Add support for multiple I2C busses for SNTP (effect to RTC)
by Stephan Linz 23 Aug '10

23 Aug '10

Hello Heiko, Hello Ben, > Hello Stephan, > > added Ben Warren to cc: because this is a change in net, > which also falls in his area of responsibility ... OK, fine ... > > Stephan Linz wrote: > > This patch switches to the desired I2C bus when the SNTP > > network service is called. This can be configured using the > > CONFIG_SYS_RTC_BUS_NUM define. > > > > In my eyes this is a bad and quick hack, but the same as > > was making for the date and dtt commands (commit: 0dc018e). > > The right way would be to move all the hardware specific i2c > > code down to the rtc driver layer. > > Yes, thats would the best way, but why you don;t go this > way? It's easy: time .... Joking apart, this patch brings the network layer in harmony to the command layer regardless of how beautiful it is. In one of the next steps I (we) can create a new patch to resolve this unsightly condition and move the hardware specifics into the rtc layer. Even such a patch will grow up and change more than a dozen of files. I'm a friend of more small steps. So I've changed this small piece. I offer to make the big change in the next few weeks ... ? > Beside of that, this patch look good to me ... OK. Ben, what do you mean? > > > Signed-off-by: Stephan Linz <linz(a)li-pro.net> > > --- > > net/sntp.c | 18 ++++++++++++++++++ > > 1 files changed, 18 insertions(+), 0 deletions(-) > > > > diff --git a/net/sntp.c b/net/sntp.c > > index 76c10ec..5544570 100644 > > --- a/net/sntp.c > > +++ b/net/sntp.c > > @@ -10,6 +10,14 @@ > > #include <net.h> > > #include <rtc.h> > > > > +/* > > + * FIXME: The i2c dependency should move into the RTC drivers itself. > > + * This higher network layer must not know about hardware specifics! > > + */ > > +#if defined(CONFIG_CMD_DATE) > > +#include <i2c.h> > > +#endif > > + > > #include "sntp.h" > > > > #define SNTP_TIMEOUT 10000UL > > @@ -53,6 +61,9 @@ SntpHandler (uchar *pkt, unsigned dest, unsigned src, > unsigned len) > > struct sntp_pkt_t *rpktp = (struct sntp_pkt_t *)pkt; > > struct rtc_time tm; > > ulong seconds; > > +#if defined(CONFIG_CMD_DATE) > > + int old_bus; > > +#endif > > > > debug("%s\n", __func__); > > > > @@ -66,7 +77,14 @@ SntpHandler (uchar *pkt, unsigned dest, unsigned src, > unsigned len) > > > > to_tm(ntohl(seconds) - 2208988800UL + NetTimeOffset, &tm); > > #if defined(CONFIG_CMD_DATE) > > + /* switch to correct I2C bus */ > > + old_bus = I2C_GET_BUS(); > > + I2C_SET_BUS(CONFIG_SYS_RTC_BUS_NUM); > > + > > rtc_set (&tm); > > + > > + /* switch back to original I2C bus */ > > + I2C_SET_BUS(old_bus); > > #endif > > printf ("Date: %4d-%02d-%02d Time: %2d:%02d:%02d\n", > > tm.tm_year, tm.tm_mon, tm.tm_mday, > > bye > Heiko > -- > DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > --- original Nachricht Ende ----

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[U-Boot] [PATCH] I2C: Add support for multiple I2C busses for SNTP (effect to RTC)
by Stephan Linz 23 Aug '10

23 Aug '10

This patch switches to the desired I2C bus when the SNTP network service is called. This can be configured using the CONFIG_SYS_RTC_BUS_NUM define. In my eyes this is a bad and quick hack, but the same as was making for the date and dtt commands (commit: 0dc018e). The right way would be to move all the hardware specific i2c code down to the rtc driver layer. Signed-off-by: Stephan Linz <linz(a)li-pro.net> --- net/sntp.c | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/net/sntp.c b/net/sntp.c index 76c10ec..a4399a8 100644 --- a/net/sntp.c +++ b/net/sntp.c @@ -10,6 +10,12 @@ #include <net.h> #include <rtc.h> +#if defined(CONFIG_CMD_DATE) +/* FIXME: The i2c dependency should move into the RTC drivers itself. This higher + * network layer must not know about hardware specifics!!!!!!! */ +#include <i2c.h> +#endif + #include "sntp.h" #define SNTP_TIMEOUT 10000UL @@ -53,6 +59,9 @@ SntpHandler (uchar *pkt, unsigned dest, unsigned src, unsigned len) struct sntp_pkt_t *rpktp = (struct sntp_pkt_t *)pkt; struct rtc_time tm; ulong seconds; +#if defined(CONFIG_CMD_DATE) + int old_bus; +#endif debug("%s\n", __func__); @@ -66,7 +75,14 @@ SntpHandler (uchar *pkt, unsigned dest, unsigned src, unsigned len) to_tm(ntohl(seconds) - 2208988800UL + NetTimeOffset, &tm); #if defined(CONFIG_CMD_DATE) + /* switch to correct I2C bus */ + old_bus = I2C_GET_BUS(); + I2C_SET_BUS(CONFIG_SYS_RTC_BUS_NUM); + rtc_set (&tm); + + /* switch back to original I2C bus */ + I2C_SET_BUS(old_bus); #endif printf ("Date: %4d-%02d-%02d Time: %2d:%02d:%02d\n", tm.tm_year, tm.tm_mon, tm.tm_mday, -- 1.6.3.3

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[U-Boot] [PATCH] S5P: mmc: fix the mmc offset
by Minkyu Kang 23 Aug '10

23 Aug '10

This patch fixed the size of mmc structure. Signed-off-by: Minkyu Kang <mk7.kang(a)samsung.com> --- arch/arm/include/asm/arch-s5pc1xx/mmc.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/arch-s5pc1xx/mmc.h b/arch/arm/include/asm/arch-s5pc1xx/mmc.h index ac560c2..68c59d1 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/mmc.h +++ b/arch/arm/include/asm/arch-s5pc1xx/mmc.h @@ -56,7 +56,7 @@ struct s5p_mmc { unsigned int control4; unsigned char res4[0x6e]; unsigned short hcver; - unsigned char res5[0xFFF00]; + unsigned char res5[0xFFF02]; }; struct mmc_host { -- 1.7.0.4

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[U-Boot] [PATCH 2/2 v2] ARMV7: S5P: rename from s5pc1xx to s5p
by Minkyu Kang 23 Aug '10

23 Aug '10

Because of these are common files around s5p Socs, rename from s5pc1xx to s5p. And getting cpu_id is SoC specific, so move to SoC's header file. Signed-off-by: Minkyu Kang <mk7.kang(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- v2: moves read funcion also to s5p_set_cpu_id(). arch/arm/cpu/armv7/s5p-common/cpu_info.c | 11 +++++------ arch/arm/cpu/armv7/s5p-common/timer.c | 16 ++++++++-------- arch/arm/cpu/armv7/s5pc1xx/clock.c | 2 +- arch/arm/include/asm/arch-s5pc1xx/clk.h | 2 +- arch/arm/include/asm/arch-s5pc1xx/cpu.h | 11 +++++++++-- arch/arm/include/asm/arch-s5pc1xx/pwm.h | 8 ++++---- 6 files changed, 28 insertions(+), 22 deletions(-) diff --git a/arch/arm/cpu/armv7/s5p-common/cpu_info.c b/arch/arm/cpu/armv7/s5p-common/cpu_info.c index 454175c..2f6c708 100644 --- a/arch/arm/cpu/armv7/s5p-common/cpu_info.c +++ b/arch/arm/cpu/armv7/s5p-common/cpu_info.c @@ -25,15 +25,14 @@ #include <asm/arch/clk.h> /* Default is s5pc100 */ -unsigned int s5pc1xx_cpu_id = 0xC100; +unsigned int s5p_cpu_id = 0xC100; #ifdef CONFIG_ARCH_CPU_INIT int arch_cpu_init(void) { - s5pc1xx_cpu_id = readl(samsung_get_base_pro_id()); - s5pc1xx_cpu_id = 0xC000 | ((s5pc1xx_cpu_id & 0x00FFF000) >> 12); + s5p_set_cpu_id(); - s5pc1xx_clock_init(); + s5p_clock_init(); return 0; } @@ -41,7 +40,7 @@ int arch_cpu_init(void) u32 get_device_type(void) { - return s5pc1xx_cpu_id; + return s5p_cpu_id; } #ifdef CONFIG_DISPLAY_CPUINFO @@ -50,7 +49,7 @@ int print_cpuinfo(void) char buf[32]; printf("CPU:\tS5P%X@%sMHz\n", - s5pc1xx_cpu_id, strmhz(buf, get_arm_clk())); + s5p_cpu_id, strmhz(buf, get_arm_clk())); return 0; } diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index 6487c0f..1f1c7ff 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -44,14 +44,14 @@ static unsigned long long timestamp; /* Monotonic incrementing timer */ static unsigned long lastdec; /* Last decremneter snapshot */ /* macro to read the 16 bit timer */ -static inline struct s5pc1xx_timer *s5pc1xx_get_base_timer(void) +static inline struct s5p_timer *s5p_get_base_timer(void) { - return (struct s5pc1xx_timer *)samsung_get_base_timer(); + return (struct s5p_timer *)samsung_get_base_timer(); } int timer_init(void) { - struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); + struct s5p_timer *const timer = s5p_get_base_timer(); u32 val; /* @@ -80,13 +80,13 @@ int timer_init(void) lastdec = count_value; val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) | - S5PC1XX_TCON4_AUTO_RELOAD; + TCON4_AUTO_RELOAD; /* auto reload & manual update */ - writel(val | S5PC1XX_TCON4_UPDATE, &timer->tcon); + writel(val | TCON4_UPDATE, &timer->tcon); /* start PWM timer 4 */ - writel(val | S5PC1XX_TCON4_START, &timer->tcon); + writel(val | TCON4_START, &timer->tcon); timestamp = 0; @@ -151,7 +151,7 @@ void __udelay(unsigned long usec) void reset_timer_masked(void) { - struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); + struct s5p_timer *const timer = s5p_get_base_timer(); /* reset time */ lastdec = readl(&timer->tcnto4); @@ -160,7 +160,7 @@ void reset_timer_masked(void) unsigned long get_timer_masked(void) { - struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); + struct s5p_timer *const timer = s5p_get_base_timer(); unsigned long now = readl(&timer->tcnto4); if (lastdec >= now) diff --git a/arch/arm/cpu/armv7/s5pc1xx/clock.c b/arch/arm/cpu/armv7/s5pc1xx/clock.c index 67af84a..c9b5485 100644 --- a/arch/arm/cpu/armv7/s5pc1xx/clock.c +++ b/arch/arm/cpu/armv7/s5pc1xx/clock.c @@ -297,7 +297,7 @@ static unsigned long s5pc100_get_pclk(void) return get_pclkd1(); } -void s5pc1xx_clock_init(void) +void s5p_clock_init(void) { if (cpu_is_s5pc110()) { get_pll_clk = s5pc110_get_pll_clk; diff --git a/arch/arm/include/asm/arch-s5pc1xx/clk.h b/arch/arm/include/asm/arch-s5pc1xx/clk.h index 3e59abe..c25e17a 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/clk.h +++ b/arch/arm/include/asm/arch-s5pc1xx/clk.h @@ -29,7 +29,7 @@ #define HPLL 3 #define VPLL 4 -void s5pc1xx_clock_init(void); +void s5p_clock_init(void); extern unsigned long (*get_pll_clk)(int pllreg); extern unsigned long (*get_arm_clk)(void); diff --git a/arch/arm/include/asm/arch-s5pc1xx/cpu.h b/arch/arm/include/asm/arch-s5pc1xx/cpu.h index bcb8f5c..0e80ba3 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/cpu.h +++ b/arch/arm/include/asm/arch-s5pc1xx/cpu.h @@ -57,13 +57,20 @@ #define S5PC110_VIC3_BASE 0xF2300000 #ifndef __ASSEMBLY__ +#include <asm/io.h> /* CPU detection macros */ -extern unsigned int s5pc1xx_cpu_id; +extern unsigned int s5p_cpu_id; + +static inline void s5p_set_cpu_id(void) +{ + s5p_cpu_id = readl(S5PC100_PRO_ID); + s5p_cpu_id = 0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12); +} #define IS_SAMSUNG_TYPE(type, id) \ static inline int cpu_is_##type(void) \ { \ - return s5pc1xx_cpu_id == id ? 1 : 0; \ + return s5p_cpu_id == id ? 1 : 0; \ } IS_SAMSUNG_TYPE(s5pc100, 0xc100) diff --git a/arch/arm/include/asm/arch-s5pc1xx/pwm.h b/arch/arm/include/asm/arch-s5pc1xx/pwm.h index 518f6ae..0369968 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/pwm.h +++ b/arch/arm/include/asm/arch-s5pc1xx/pwm.h @@ -23,14 +23,14 @@ #define __ASM_ARM_ARCH_PWM_H_ /* Interval mode(Auto Reload) of PWM Timer 4 */ -#define S5PC1XX_TCON4_AUTO_RELOAD (1 << 22) +#define TCON4_AUTO_RELOAD (1 << 22) /* Update TCNTB4 */ -#define S5PC1XX_TCON4_UPDATE (1 << 21) +#define TCON4_UPDATE (1 << 21) /* start bit of PWM Timer 4 */ -#define S5PC1XX_TCON4_START (1 << 20) +#define TCON4_START (1 << 20) #ifndef __ASSEMBLY__ -struct s5pc1xx_timer { +struct s5p_timer { unsigned int tcfg0; unsigned int tcfg1; unsigned int tcon; -- 1.7.0.4

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