May 2010 - U-Boot

[U-Boot] Please pull u-boot-sparc.git
by Daniel Hellstrom 26 May '10

26 May '10

Dear Wolfgang, Please pull the 17 patches in the master branch of u-boot-sparc repository. I have rebased the patches and updated the first patch according to Mike Drysingers comments. Thanks, Daniel The following changes since commit 209c040b86ce7081f25dd547913d86d597e8ac34: Magnus Sjalander (1): SPARC: added unaligned definitions are available in the git repository at: git://www.denx.de/git/u-boot-sparc.git master Daniel Hellstrom (16): GRETH: Added support for selecting PHY address from config, PHY address was always set to zero before. GRETH: Added extra RESET, this is needed if GRETH was stopped during an ethernet frame reception. LEON3: reimplemented AMBA Plug&Play scanning routines. LEON3: added memory controller initialization using the new AMBA PnP routines. LEON3: Moved GRLIB core header files to common include/grlib directory LEON3: serial baud rate register support multiple buses with different frequency. SPARC: added function that checks if IRQ is on or off. LEON3: added busy wait function, made wait_ms() work when IRQ is disabled. LEON3: added CPU count and frequency detection. SPARC: removed USB stop from linux bootm, arch-independent bootm stop USB. SPARC: added optional cpu_late_init routine. LEON3: Added GRETH EDCL debug link IP address initialization. LEON: added support for GRLIB SPI Memory controller, spi command interface. LEON3: fixed MMU table for systems with larger memory than 128MB. bootm command: added argument to arch_preboot_os, function may depend on OS type. SPARC, LEON3: added support for multiprocessing, tested Linux 2.6.21.1 SMP and RTEMS-4.10 AMP. arch/powerpc/cpu/mpc85xx/cpu_init.c | 2 +- arch/sparc/cpu/leon3/Makefile | 5 +- arch/sparc/cpu/leon3/ambapp.c | 581 ++++++++++++----------- arch/sparc/cpu/leon3/ambapp_low.S | 798 +++++++++++++++++++++++++++++++ arch/sparc/cpu/leon3/ambapp_low_c.S | 133 +++++ arch/sparc/cpu/leon3/cpu.c | 52 ++- arch/sparc/cpu/leon3/cpu_init.c | 228 ++++----- arch/sparc/cpu/leon3/cpu_mp.c | 87 ++++ arch/sparc/cpu/leon3/greth.c | 152 ++++++ arch/sparc/cpu/leon3/interrupts.c | 7 +- arch/sparc/cpu/leon3/memcfg.c | 276 +++++++++++ arch/sparc/cpu/leon3/memcfg.h | 105 ++++ arch/sparc/cpu/leon3/memcfg_low.S | 270 +++++++++++ arch/sparc/cpu/leon3/prom.c | 55 ++- arch/sparc/cpu/leon3/serial.c | 41 ++- arch/sparc/cpu/leon3/start.S | 106 ++++ arch/sparc/cpu/leon3/usb_uhci.c | 4 +- arch/sparc/include/asm/boot_mp.h | 70 +++ arch/sparc/include/asm/irq.h | 3 + arch/sparc/include/asm/leon3.h | 13 + arch/sparc/lib/Makefile | 2 +- arch/sparc/lib/board.c | 19 + arch/sparc/lib/boot_mp.c | 177 +++++++ arch/sparc/lib/bootm.c | 65 ++- arch/sparc/lib/interrupts.c | 7 + board/gaisler/gr_cpci_ax2000/u-boot.lds | 7 + board/gaisler/gr_ep2s60/u-boot.lds | 7 + board/gaisler/gr_xc3s_1500/u-boot.lds | 7 + board/gaisler/grsim/u-boot.lds | 7 + common/cmd_ambapp.c | 564 +++++++++++++++++----- common/cmd_bootm.c | 8 +- drivers/net/greth.c | 98 +++-- drivers/spi/Makefile | 1 + drivers/spi/spimctrl_spi.c | 263 ++++++++++ include/ambapp.h | 488 +++++++------------- include/ambapp_ids.h | 256 ++++++++++ include/configs/gr_cpci_ax2000.h | 39 +- include/configs/gr_ep2s60.h | 44 ++- include/configs/gr_xc3s_1500.h | 37 +- include/configs/grsim.h | 39 +- include/grlib/apbuart.h | 63 +++ include/grlib/gptimer.h | 50 ++ include/grlib/greth.h | 103 ++++ include/grlib/irqmp.h | 39 ++ include/grlib/spimctrl.h | 69 +++ 45 files changed, 4442 insertions(+), 1005 deletions(-) create mode 100644 arch/sparc/cpu/leon3/ambapp_low.S create mode 100644 arch/sparc/cpu/leon3/ambapp_low_c.S create mode 100644 arch/sparc/cpu/leon3/cpu_mp.c create mode 100644 arch/sparc/cpu/leon3/greth.c create mode 100644 arch/sparc/cpu/leon3/memcfg.c create mode 100644 arch/sparc/cpu/leon3/memcfg.h create mode 100644 arch/sparc/cpu/leon3/memcfg_low.S create mode 100644 arch/sparc/include/asm/boot_mp.h create mode 100644 arch/sparc/lib/boot_mp.c create mode 100644 drivers/spi/spimctrl_spi.c create mode 100644 include/ambapp_ids.h create mode 100644 include/grlib/apbuart.h create mode 100644 include/grlib/gptimer.h create mode 100644 include/grlib/greth.h create mode 100644 include/grlib/irqmp.h create mode 100644 include/grlib/spimctrl.h

2 1

[U-Boot] [PATCH 02/17] GRETH: Added support for selecting PHY address from config, PHY address was always set to zero before.
by Daniel Hellstrom 26 May '10

26 May '10

Signed-off-by: Daniel Hellstrom <daniel(a)gaisler.com> --- drivers/net/greth.c | 69 +++++++++++++++++++++++++++++++------------------- 1 files changed, 43 insertions(+), 26 deletions(-) diff --git a/drivers/net/greth.c b/drivers/net/greth.c index 79bc4d9..a1a88f9 100644 --- a/drivers/net/greth.c +++ b/drivers/net/greth.c @@ -45,7 +45,7 @@ /* ByPass Cache when reading regs */ #define GRETH_REGLOAD(addr) SPARC_NOCACHE_READ(addr) /* Write-through cache ==> no bypassing needed on writes */ -#define GRETH_REGSAVE(addr,data) (*(unsigned int *)(addr) = (data)) +#define GRETH_REGSAVE(addr,data) (*(volatile unsigned int *)(addr) = (data)) #define GRETH_REGORIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)|data) #define GRETH_REGANDIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)&data) @@ -102,12 +102,12 @@ typedef struct { } greth_priv; /* Read MII register 'addr' from core 'regs' */ -static int read_mii(int addr, volatile greth_regs * regs) +static int read_mii(int phyaddr, int regaddr, volatile greth_regs * regs) { while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) { } - GRETH_REGSAVE(&regs->mdio, (0 << 11) | ((addr & 0x1F) << 6) | 2); + GRETH_REGSAVE(&regs->mdio, ((phyaddr & 0x1F) << 11) | ((regaddr & 0x1F) << 6) | 2); while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) { } @@ -119,14 +119,14 @@ static int read_mii(int addr, volatile greth_regs * regs) } } -static void write_mii(int addr, int data, volatile greth_regs * regs) +static void write_mii(int phyaddr, int regaddr, int data, volatile greth_regs * regs) { while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) { } GRETH_REGSAVE(&regs->mdio, - ((data & 0xFFFF) << 16) | (0 << 11) | ((addr & 0x1F) << 6) - | 1); + ((data & 0xFFFF) << 16) | ((phyaddr & 0x1F) << 11) | + ((regaddr & 0x1F) << 6) | 1); while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) { } @@ -146,8 +146,6 @@ int greth_init(struct eth_device *dev, bd_t * bis) printf("greth_init\n"); #endif - GRETH_REGSAVE(&regs->control, 0); - if (!greth->rxbd_base) { /* allocate descriptors */ @@ -161,6 +159,7 @@ int greth_init(struct eth_device *dev, bd_t * bis) malloc(GRETH_RXBUF_EFF_SIZE * GRETH_RXBD_CNT); } + memset(greth->rxbuf_base, 0, GRETH_RXBUF_EFF_SIZE * GRETH_RXBD_CNT); /* initate rx decriptors */ for (i = 0; i < GRETH_RXBD_CNT; i++) { greth->rxbd_base[i].addr = (unsigned int) @@ -219,6 +218,11 @@ int greth_init_phy(greth_priv * dev, bd_t * bis) greth_regs *regs = dev->regs; int tmp, tmp1, tmp2, i; unsigned int start, timeout; +#ifdef CONFIG_SYS_GRLIB_GRETH_PHYADDR + int phyaddr = CONFIG_SYS_GRLIB_GRETH_PHYADDR; +#else + int phyaddr = 0; +#endif /* X msecs to ticks */ timeout = usec2ticks(GRETH_PHY_TIMEOUT_MS * 1000); @@ -230,17 +234,25 @@ int greth_init_phy(greth_priv * dev, bd_t * bis) /* get phy control register default values */ - while ((tmp = read_mii(0, regs)) & 0x8000) { - if (get_timer(start) > timeout) + while ((tmp = read_mii(phyaddr, 0, regs)) & 0x8000) { + if (get_timer(start) > timeout) { +#ifdef DEBUG + printf("greth_init_phy: PHY read 1 failed\n"); +#endif return 1; /* Fail */ + } } /* reset PHY and wait for completion */ - write_mii(0, 0x8000 | tmp, regs); + write_mii(phyaddr, 0, 0x8000 | tmp, regs); - while (((tmp = read_mii(0, regs))) & 0x8000) { - if (get_timer(start) > timeout) + while (((tmp = read_mii(phyaddr, 0, regs))) & 0x8000) { + if (get_timer(start) > timeout) { +#ifdef DEBUG + printf("greth_init_phy: PHY read 2 failed\n"); +#endif return 1; /* Fail */ + } } /* Check if PHY is autoneg capable and then determine operating @@ -251,16 +263,16 @@ int greth_init_phy(greth_priv * dev, bd_t * bis) dev->sp = 0; dev->auto_neg = 0; if (!((tmp >> 12) & 1)) { - write_mii(0, 0, regs); + write_mii(phyaddr, 0, 0, regs); } else { /* wait for auto negotiation to complete and then check operating mode */ dev->auto_neg = 1; i = 0; - while (!(((tmp = read_mii(1, regs)) >> 5) & 1)) { + while (!(((tmp = read_mii(phyaddr, 1, regs)) >> 5) & 1)) { if (get_timer(start) > timeout) { printf("Auto negotiation timed out. " "Selecting default config\n"); - tmp = read_mii(0, regs); + tmp = read_mii(phyaddr, 0, regs); dev->gb = ((tmp >> 6) & 1) && !((tmp >> 13) & 1); dev->sp = !((tmp >> 6) & 1) @@ -270,8 +282,8 @@ int greth_init_phy(greth_priv * dev, bd_t * bis) } } if ((tmp >> 8) & 1) { - tmp1 = read_mii(9, regs); - tmp2 = read_mii(10, regs); + tmp1 = read_mii(phyaddr, 9, regs); + tmp2 = read_mii(phyaddr, 10, regs); if ((tmp1 & GRETH_MII_EXTADV_1000FD) && (tmp2 & GRETH_MII_EXTPRT_1000FD)) { dev->gb = 1; @@ -284,8 +296,8 @@ int greth_init_phy(greth_priv * dev, bd_t * bis) } } if ((dev->gb == 0) || ((dev->gb == 1) && (dev->gbit_mac == 0))) { - tmp1 = read_mii(4, regs); - tmp2 = read_mii(5, regs); + tmp1 = read_mii(phyaddr, 4, regs); + tmp2 = read_mii(phyaddr, 5, regs); if ((tmp1 & GRETH_MII_100TXFD) && (tmp2 & GRETH_MII_100TXFD)) { dev->sp = 1; @@ -302,7 +314,7 @@ int greth_init_phy(greth_priv * dev, bd_t * bis) if ((dev->gb == 1) && (dev->gbit_mac == 0)) { dev->gb = 0; dev->fd = 0; - write_mii(0, dev->sp << 13, regs); + write_mii(phyaddr, 0, dev->sp << 13, regs); } } @@ -314,8 +326,8 @@ int greth_init_phy(greth_priv * dev, bd_t * bis) #endif /* Read out PHY info if extended registers are available */ if (tmp & 1) { - tmp1 = read_mii(2, regs); - tmp2 = read_mii(3, regs); + tmp1 = read_mii(phyaddr, 2, regs); + tmp2 = read_mii(phyaddr, 3, regs); tmp1 = (tmp1 << 6) | ((tmp2 >> 10) & 0x3F); tmp = tmp2 & 0xF; @@ -542,10 +554,9 @@ int greth_recv(struct eth_device *dev) /* increase index */ greth->rxbd_curr = ((unsigned int)greth->rxbd_curr >= - (unsigned int)greth->rxbd_max) ? greth-> - rxbd_base : (greth->rxbd_curr + 1); + (unsigned int)greth->rxbd_max) ? greth->rxbd_base : (greth->rxbd_curr + 1); - }; + } if (enable) { GRETH_REGORIN(&regs->control, GRETH_RXEN); @@ -630,6 +641,9 @@ int greth_initialize(bd_t * bis) /* initiate PHY, select speed/duplex depending on connected PHY */ if (greth_init_phy(greth, bis)) { /* Failed to init PHY (timedout) */ +#ifdef DEBUG + printf("GRETH[0x%08x]: Failed to init PHY\n", greth->regs); +#endif return -1; } @@ -658,5 +672,8 @@ int greth_initialize(bd_t * bis) /* set and remember MAC address */ greth_set_hwaddr(greth, addr); +#ifdef DEBUG + printf("GRETH[0x%08x]: Initialized successfully\n", greth->regs); +#endif return 0; } -- 1.5.4

2 20

[U-Boot] [GIT PULL] Please pull u-boot-mpc83xx.git
by Kim Phillips 26 May '10

26 May '10

Wolfgang, please pull one cpu init fix, and a typo fix*: The following changes since commit 2f05e394fccf62a4693c6b8323de725f90d1f003: fsl_diu_fb.c: fix build warnings (2010-05-17 23:34:18 +0200) are available in the git repository at: git://git.denx.de/u-boot-mpc83xx.git master Horst Kronstorfer (1): Fixed two typos in arch/powerpc/cpu/mpc83xx/start.S. Kim Phillips (1): mpc83xx: don't shift pre-shifted ACR, SPCR, SCCR bitfield masks in cpu_init.c arch/powerpc/cpu/mpc83xx/cpu_init.c | 36 +++++++++++++++++----------------- arch/powerpc/cpu/mpc83xx/start.S | 4 +- 2 files changed, 20 insertions(+), 20 deletions(-) Thanks, Kim * if you prefer these go into mpc83xx' next branch, we can do that, too.

2 1

[U-Boot] [PATCH v2] config.mk: use different host compiler for OS X 10.6
by Andreas Bießmann 26 May '10

26 May '10

Compiling tools subdirectory on Mac OS X 10.6 (Snow Leopard) complains about wrong syntax in system includes. In file included from /usr/include/stdio.h:444, from ../source/u-boot/include/compiler.h:26, from ../source/u-boot/lib/crc32.c:15: /usr/include/secure/_stdio.h:46: error: syntax error in macro parameter list This can be fixed by reverting the workaround for prior OS X releases in config.mk conditionally for OS X 10.6+. Signed-off-by: Andreas Bießmann <andreas.devel(a)googlemail.com> --- config.mk | 14 +++++++++++--- 1 files changed, 11 insertions(+), 3 deletions(-) diff --git a/config.mk b/config.mk index 73b5195..c4ad223 100644 --- a/config.mk +++ b/config.mk @@ -64,9 +64,17 @@ HOSTSTRIP = strip # ifeq ($(HOSTOS),darwin) -HOSTCC = cc -HOSTCFLAGS += -traditional-cpp -HOSTLDFLAGS += -multiply_defined suppress +# get major and minor product version (e.g. '10' and '6' for Snow Leopard) +DARWIN_MAJOR_VERSION = $(shell sw_vers -productVersion | cut -f 1 -d '.') +DARWIN_MINOR_VERSION = $(shell sw_vers -productVersion | cut -f 2 -d '.') + +before-snow-leopard = $(shell if [ $(DARWIN_MAJOR_VERSION) -le 10 -a \ + $(DARWIN_MINOR_VERSION) -le 5 ] ; then echo "$(1)"; else echo "$(2)"; fi ;) + +# Snow Leopards build environment has no longer restrictions as described above +HOSTCC = $(call before-snow-leopard, "cc", "gcc") +HOSTCFLAGS += $(call before-snow-leopard, "-traditional-cpp") +HOSTLDFLAGS += $(call before-snow-leopard, "-multiply_defined suppress") else HOSTCC = gcc endif -- 1.7.1

3 2

[U-Boot] [PATCH] Convert Makefiles from COBJS-${} to COBJS-$()
by Kumar Gala 26 May '10

26 May '10

Match style we use almost everywhere else Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- arch/powerpc/cpu/mpc512x/Makefile | 10 +++++----- board/freescale/common/Makefile | 22 +++++++++++----------- board/freescale/mpc8610hpcd/Makefile | 2 +- 3 files changed, 17 insertions(+), 17 deletions(-) diff --git a/arch/powerpc/cpu/mpc512x/Makefile b/arch/powerpc/cpu/mpc512x/Makefile index 9cfdb0f..28926e0 100644 --- a/arch/powerpc/cpu/mpc512x/Makefile +++ b/arch/powerpc/cpu/mpc512x/Makefile @@ -37,11 +37,11 @@ COBJS-y += interrupts.o COBJS-y += iopin.o COBJS-y += serial.o COBJS-y += speed.o -COBJS-${CONFIG_FSL_DIU_FB} += diu.o -COBJS-${CONFIG_FSL_DIU_FB} += ../../../../board/freescale/common/fsl_diu_fb.o -COBJS-${CONFIG_FSL_DIU_FB} += ../../../../board/freescale/common/fsl_logo_bmp.o -COBJS-${CONFIG_CMD_IDE} += ide.o -COBJS-${CONFIG_IIM} += iim.o +COBJS-$(CONFIG_FSL_DIU_FB) += diu.o +COBJS-$(CONFIG_FSL_DIU_FB) += ../../../../board/freescale/common/fsl_diu_fb.o +COBJS-$(CONFIG_FSL_DIU_FB) += ../../../../board/freescale/common/fsl_logo_bmp.o +COBJS-$(CONFIG_CMD_IDE) += ide.o +COBJS-$(CONFIG_IIM) += iim.o COBJS-$(CONFIG_PCI) += pci.o COBJS := $(COBJS-y) diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 620eb16..df289aa 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -29,18 +29,18 @@ endif LIB = $(obj)lib$(VENDOR).a -COBJS-${CONFIG_FSL_CADMUS} += cadmus.o -COBJS-${CONFIG_FSL_VIA} += cds_via.o -COBJS-${CONFIG_FSL_DIU_FB} += fsl_diu_fb.o fsl_logo_bmp.o -COBJS-${CONFIG_FSL_PIXIS} += pixis.o -COBJS-${CONFIG_FSL_NGPIXIS} += ngpixis.o -COBJS-${CONFIG_PQ_MDS_PIB} += pq-mds-pib.o -COBJS-${CONFIG_ID_EEPROM} += sys_eeprom.o -COBJS-${CONFIG_FSL_SGMII_RISER} += sgmii_riser.o +COBJS-$(CONFIG_FSL_CADMUS) += cadmus.o +COBJS-$(CONFIG_FSL_VIA) += cds_via.o +COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o fsl_logo_bmp.o +COBJS-$(CONFIG_FSL_PIXIS) += pixis.o +COBJS-$(CONFIG_FSL_NGPIXIS) += ngpixis.o +COBJS-$(CONFIG_PQ_MDS_PIB) += pq-mds-pib.o +COBJS-$(CONFIG_ID_EEPROM) += sys_eeprom.o +COBJS-$(CONFIG_FSL_SGMII_RISER) += sgmii_riser.o -COBJS-${CONFIG_MPC8541CDS} += cds_pci_ft.o -COBJS-${CONFIG_MPC8548CDS} += cds_pci_ft.o -COBJS-${CONFIG_MPC8555CDS} += cds_pci_ft.o +COBJS-$(CONFIG_MPC8541CDS) += cds_pci_ft.o +COBJS-$(CONFIG_MPC8548CDS) += cds_pci_ft.o +COBJS-$(CONFIG_MPC8555CDS) += cds_pci_ft.o SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile index 930a206..847edaf 100644 --- a/board/freescale/mpc8610hpcd/Makefile +++ b/board/freescale/mpc8610hpcd/Makefile @@ -27,7 +27,7 @@ COBJS-y += $(BOARD).o COBJS-$(CONFIG_FSL_DDR2) += ddr.o COBJS-y += law.o -COBJS-${CONFIG_FSL_DIU_FB} += mpc8610hpcd_diu.o +COBJS-$(CONFIG_FSL_DIU_FB) += mpc8610hpcd_diu.o SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) -- 1.6.0.6

2 1

[U-Boot] [PATCH] arm:io.h: define __io() macro if not defined erlier
by Andreas Bießmann 26 May '10

26 May '10

This patch adds __io() macro to enable {in|out}[bwl] macros in arch/arm/asm/io.h Commit a45dde2293c816138e53c26eca6fd0322583f9a6 uses {in|out}[bwl] macros in DM9000x and breaks compilation for arm devices. Signed-off-by: Andreas Bießmann <biessmann(a)corscience.de> --- arch/arm/include/asm/io.h | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 0a4b5be..ccbf80d 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -173,6 +173,13 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen); #if 0 /* XXX###XXX */ #include <asm/arch/io.h> #endif /* XXX###XXX */ +/* + * we need to define __io(p) for {in,out}[bwl] macros. This macro may be + * defined in a machine specific io definition earlier. + */ +#ifndef __io +#define __io(p) (p) +#endif /* * IO port access primitives -- 1.7.1

4 7

[U-Boot] x86 Custodianship
by Graeme Russ 26 May '10

26 May '10

Hi Wolfgang, I've been a bit busy at home with bub #2 to chase this up, but have you decided whether or not to create an x86 repository? If so, I would be happy to take up custodianship of it and 'fly the flag' for U-Boot on the x86 platform. I sent you my public RSA key earlier - let me know if you want me to resend Regards, Graeme

3 4

[U-Boot] [PATCH] add 1-wire DS2401 serial number chip
by Asen Dimov 26 May '10

26 May '10

Signed-off-by: Asen Dimov <dimov(a)ronetix.at> --- drivers/misc/Makefile | 1 + drivers/misc/ds2401.c | 265 +++++++++++++++++++++++++++++++++++++++++++++++++ include/ds2401.h | 36 +++++++ 3 files changed, 302 insertions(+), 0 deletions(-) create mode 100644 drivers/misc/ds2401.c create mode 100644 include/ds2401.h diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 96aa331..4355b6e 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -32,6 +32,7 @@ COBJS-$(CONFIG_NS87308) += ns87308.o COBJS-$(CONFIG_STATUS_LED) += status_led.o COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o COBJS-$(CONFIG_FSL_PMIC) += fsl_pmic.o +COBJS-$(CONFIG_DS2401) += ds2401.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/misc/ds2401.c b/drivers/misc/ds2401.c new file mode 100644 index 0000000..4298d8a --- /dev/null +++ b/drivers/misc/ds2401.c @@ -0,0 +1,265 @@ +/* + * Copyright 2009, 2010 + * Ilko Iliev <iliev(a)ronetix.at> + * Ronetix Development Tools GmbH <www.ronetix.at> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Driver for 1-wire, DS2401, a Silicon Serial Number chip + * + * Driver usage: + * + * To build the driver add in a board config file: + * #define CONFIG_DS2401 1 + * + * In the board specific file define the get and set functions + * to read and write one bit from/to PIO. + * + * If you want to set a specific first three bytes of the MAC address + * define CONFIG_MAC_OUI. + */ + +#include <common.h> +#include <command.h> +#include <ds2401.h> + +#ifndef CONFIG_MAC_OUI +#define CONFIG_MAC_OUI "02:00:00" /* Organizationally Unique Identifier*/ +#endif + +static DS2401_FUNCS *DS2401_Funcs = NULL; + +/* + * Generate a 1-wire reset, return 1 if no presence detect was found, + * return 0 otherwise. + */ +static int ds2401_reset(void) +{ + int result; + + DS2401_Funcs->set(0); + udelay(480); + DS2401_Funcs->set(1); + udelay(70); + + result = DS2401_Funcs->get(); + + udelay(410); + return result; +} + +/* + * Send 1 a 1-wire write bit. + * Provide 10us recovery time. + */ +static void ds2401_write_bit(int bit) +{ + if (bit) { + /* + * write '1' bit + */ + DS2401_Funcs->set(0); + udelay(6); + DS2401_Funcs->set(1); + udelay(64); + } else { + /* + * write '0' bit + */ + DS2401_Funcs->set(0); + udelay(60); + DS2401_Funcs->set(1); + udelay(10); + } +} + +/* + * Read a bit from the 1-wire bus and return it. + * Provide 10us recovery time. + */ +static int ds2401_read_bit(void) +{ + int result; + + DS2401_Funcs->set(0); + +#ifdef __OPTIMIZE__ + udelay(1); +#endif + + DS2401_Funcs->set(1); + udelay(9); + + result = DS2401_Funcs->get(); + udelay(55); + + return result; +} + +static void ds2401_write_byte(int data) +{ + int loop; + + for (loop = 0; loop < 8; loop++) { + ds2401_write_bit(data & 0x01); + data >>= 1; + } +} + +static int ds2401_read_byte(void) +{ + int loop, result = 0; + + for (loop = 0; loop < 8; loop++) { + result >>= 1; + if (ds2401_read_bit()) + result |= 0x80; + } + + return result; +} + +static unsigned char ds2401_crc8_table[] = { + 0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65, + 157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220, + 35, 125, 159, 193, 66, 28, 254, 160, 225, 191, 93, 3, 128, 222, 60, 98, + 190, 224, 2, 92, 223, 129, 99, 61, 124, 34, 192, 158, 29, 67, 161, 255, + 70, 24, 250, 164, 39, 121, 155, 197, 132, 218, 56, 102, 229, 187, 89, 7, + 219, 133, 103, 57, 186, 228, 6, 88, 25, 71, 165, 251, 120, 38, 196, 154, + 101, 59, 217, 135, 4, 90, 184, 230, 167, 249, 27, 69, 198, 152, 122, 36, + 248, 166, 68, 26, 153, 199, 37, 123, 58, 100, 134, 216, 91, 5, 231, 185, + 140, 210, 48, 110, 237, 179, 81, 15, 78, 16, 242, 172, 47, 113, 147, 205, + 17, 79, 173, 243, 112, 46, 204, 146, 211, 141, 111, 49, 178, 236, 14, 80, + 175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82, 176, 238, + 50, 108, 142, 208, 83, 13, 239, 177, 240, 174, 76, 18, 145, 207, 45, 115, + 202, 148, 118, 40, 171, 245, 23, 73, 8, 86, 180, 234, 105, 55, 213, 139, + 87, 9, 235, 181, 54, 104, 138, 212, 149, 203, 41, 119, 244, 170, 72, 22, + 233, 183, 85, 11, 136, 214, 52, 106, 43, 117, 151, 201, 74, 20, 246, 168, + 116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53 +}; + +static unsigned char ds2401_calc_crc8(unsigned char * data, int len) +{ + unsigned char crc = 0; + + while (len--) + crc = ds2401_crc8_table[crc ^ *data++]; + + return crc; +} + +void ds2401_init(DS2401_FUNCS *funcs) +{ + DS2401_Funcs = funcs; +} + +/* + * Read the serial number from the 1-wire bus and return it. + * Returns 0 if successful. + * Returns non-zero if not successful. + */ +int ds2401_get_number( unsigned char id[6] ) +{ + int ii, result; + unsigned char crc; + unsigned char buf[8]; + + result = ds2401_reset(); + if (result != 0) + return 1; + + ds2401_write_byte(DS2401_CMD_READ_ROM); /* send read rom command */ + + /* + * read 8 bytes: + * buf[0] - family code (0x01) + * buf[1..6] - serial number + * buf[7] - CRC + */ + for (ii = 0; ii < 8; ii++) + buf[ii] = ds2401_read_byte(); + + /* + * calculate the 8-bit Dallas CRC + */ + crc = ds2401_calc_crc8( buf, 7 ); + + if ( crc != buf[7] ) + return 1; + + for (ii = 0; ii < 6; ii++) + id[ii] = buf[ii + 1]; + + return 0; +} + +int do_ds2401(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int stat; + unsigned char ds2401_id[6]; + char str[32]; + + if (DS2401_Funcs == NULL) { + puts("Board specific functions for 1-wire not specified!\n"); + return 0; + } + + stat = ds2401_get_number( ds2401_id ); + + if (stat){ + puts("No 1-wire device detected!\n"); + return 0; + } + + if (strcmp(argv[1], "ethaddr") == 0){ + sprintf(str, "%s:%X:%X:%X", + CONFIG_MAC_OUI, + (int)ds2401_id[2], + (int)ds2401_id[1], + (int)ds2401_id[0]); + + printf("Setting environment variable 'ethaddr' to %s\n", str); + setenv("ethaddr", str); + } else { + sprintf(str, "0x%X%X%X%X%X%X", + (int)ds2401_id[5], + (int)ds2401_id[4], + (int)ds2401_id[3], + (int)ds2401_id[2], + (int)ds2401_id[1], + (int)ds2401_id[0]); + + if (argc == 2 ) { + printf("Setting environment variable '%s' to %s\n", + argv[1], str); + setenv(argv[1], str); + } else { + printf("Serial number is %s\n", str); + } + } + + return 0; +} + +U_BOOT_CMD( + onewire, 2, 1, do_ds2401, + "Read 1-write ID and set an U-Boot variable or\n" + "the last three bytes of 'ethaddr'", + "[variable] - to set a specific variable with DS2401 serial number\n" + "onewire ethaddr - to set the last three bytes of MAC address\n" + "onewire - with no parameter to display serial number" +); diff --git a/include/ds2401.h b/include/ds2401.h new file mode 100644 index 0000000..472e334 --- /dev/null +++ b/include/ds2401.h @@ -0,0 +1,36 @@ +/* + * Copyright 2009 + * Ilko Iliev <iliev(a)ronetix.at> + * Ronetix Development Tools GmbH <www.ronetix.at> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __DS2401_H_ +#define __DS2401_H_ + +#define DS2401_CMD_READ_ROM 0x33 + +typedef struct +{ + void (*set)(int value ); + int (*get)(void); +} DS2401_FUNCS; + +extern void ds2401_init(DS2401_FUNCS *funcs); +extern int ds2401_get_number( unsigned char id[6] ); + +#endif /* __DS2401_H_ */ + -- 1.5.5.6

2 1

[U-Boot] [PATCH 2/3] libfdt: make fdt_increase_size() available to everyone
by Timur Tabi 26 May '10

26 May '10

The function fdt_increase_size() increases the size of the device tree by the given amount. This is useful for any code that wants to add a node or large property, to avoid the possibility of running out of space. It's much smarter to have U-Boot increase the size of device tree when it knows it's going to add data, instead of hoping that the DTS was compiled with the right -p value. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- common/fdt_support.c | 20 ++++++++++---------- include/fdt_support.h | 1 + 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/common/fdt_support.c b/common/fdt_support.c index b6f252a..01d635b 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -645,6 +645,16 @@ int fdt_resize(void *blob) return actualsize; } +int fdt_increase_size(void *fdt, int add_len) +{ + int newlen; + + newlen = fdt_totalsize(fdt) + add_len; + + /* Open in place with a new len */ + return fdt_open_into(fdt, fdt, newlen); +} + #ifdef CONFIG_PCI #define CONFIG_SYS_PCI_NR_INBOUND_WIN 4 @@ -792,16 +802,6 @@ int fdt_del_subnodes(const void *blob, int parent_offset) return 0; } -int fdt_increase_size(void *fdt, int add_len) -{ - int newlen; - - newlen = fdt_totalsize(fdt) + add_len; - - /* Open in place with a new len */ - return fdt_open_into(fdt, fdt, newlen); -} - int fdt_del_partitions(void *blob, int parent_offset) { const void *prop; diff --git a/include/fdt_support.h b/include/fdt_support.h index 9a453af..d70627d 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -78,6 +78,7 @@ void ft_pci_setup(void *blob, bd_t *bd); void set_working_fdt_addr(void *addr); int fdt_resize(void *blob); +int fdt_increase_size(void *fdt, int add_len); int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size); -- 1.6.5

6 41

[U-Boot] [PATCH v2] AT91: Add SD/MMC controller support
by Albin Tonnerre 26 May '10

26 May '10

This patch allows to use the atmel_mci SD/MMC driver on the at91 architecture. It contains: - initialization code for the MCI controller for all the supported AT91. It allows the use of only one controller even if a SoC has two controllers (anyway there's no support for it in atmel_mci as of now) - the necessary get_mci_clk_rate function - definition of MMCI_BASE for use in atmel_mci - the cpu_mmc_init function. As of now this is not used, but will be required when atmel_mci is ported to the new generic mmc API. Signed-off-by: Albin Tonnerre <albin.tonnerre(a)free-electrons.com> --- Changes since v1 (http://lists.denx.de/pipermail/u-boot/2009-September/059665.html): - Fix the MCI controller ID in the init code for CAP9, SAM9263 and SAM9G45 - Move AT91_BASE_MCI* define to soc header - define AT91_BASE_MCI{0,1} instead of AT91_BASE_MCI for boards which have 2 controllers - rework the way MMCI_BASE is defined accordingly Note: I am fully aware that MMCI0_BASE and MMCI1_BASE should be defined, instead of MMCI_BASE. However, I'd rather wait until the patch that switches atmel_mci to the generic mmc API is accepted, as it will be easier to do it then. cpu/arm926ejs/at91/at91cap9_devices.c | 37 ++++++++++++++++++ cpu/arm926ejs/at91/at91sam9260_devices.c | 27 +++++++++++++ cpu/arm926ejs/at91/at91sam9261_devices.c | 18 +++++++++ cpu/arm926ejs/at91/at91sam9263_devices.c | 55 +++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9m10g45_devices.c | 55 +++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9rl_devices.c | 22 +++++++++++ cpu/arm926ejs/at91/cpu.c | 7 +++ include/asm-arm/arch-at91/at91_common.h | 2 + include/asm-arm/arch-at91/at91cap9.h | 3 + include/asm-arm/arch-at91/at91sam9260.h | 2 + include/asm-arm/arch-at91/at91sam9261.h | 1 + include/asm-arm/arch-at91/at91sam9263.h | 3 + include/asm-arm/arch-at91/at91sam9g45.h | 3 + include/asm-arm/arch-at91/at91sam9rl.h | 1 + include/asm-arm/arch-at91/clk.h | 5 ++ include/asm-arm/arch-at91/memory-map.h | 6 +++ 16 files changed, 247 insertions(+), 0 deletions(-) diff --git a/cpu/arm926ejs/at91/at91cap9_devices.c b/cpu/arm926ejs/at91/at91cap9_devices.c index 39e405f..53a58a9 100644 --- a/cpu/arm926ejs/at91/at91cap9_devices.c +++ b/cpu/arm926ejs/at91/at91cap9_devices.c @@ -79,6 +79,43 @@ void at91_serial_hw_init(void) #endif } +#ifdef CONFIG_ATMEL_MCI +#ifdef CONFIG_AT91_MCI0 +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_MCI0); + at91_set_A_periph(AT91_PIN_PA2, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA0, 1); + at91_set_A_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA3, 1); + at91_set_A_periph(AT91_PIN_PA4, 1); + at91_set_A_periph(AT91_PIN_PA5, 1); + } + } +} +#endif +#ifdef CONFIG_AT91_MCI1 +void at91_mci1_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_MCI1); + at91_set_A_periph(AT91_PIN_PA16, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA17, 1); + at91_set_A_periph(AT91_PIN_PA18, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA19, 1); + at91_set_A_periph(AT91_PIN_PA20, 1); + at91_set_A_periph(AT91_PIN_PA21, 1); + } + } +} +#endif +#endif + #ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/at91sam9260_devices.c b/cpu/arm926ejs/at91/at91sam9260_devices.c index f86cb99..ea22030 100644 --- a/cpu/arm926ejs/at91/at91sam9260_devices.c +++ b/cpu/arm926ejs/at91/at91sam9260_devices.c @@ -75,6 +75,33 @@ void at91_serial_hw_init(void) #endif } +#ifdef CONFIG_ATMEL_MCI +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI); + at91_set_A_periph(AT91_PIN_PA8, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA6, 1); + at91_set_A_periph(AT91_PIN_PA7, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA9, 1); + at91_set_A_periph(AT91_PIN_PA10, 1); + at91_set_A_periph(AT91_PIN_PA11, 1); + } + } + if (mask & (1 << 2)) { + at91_set_B_periph(AT91_PIN_PA0, 1); + at91_set_B_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 3)) { + at91_set_B_periph(AT91_PIN_PA3, 1); + at91_set_B_periph(AT91_PIN_PA4, 1); + at91_set_B_periph(AT91_PIN_PA5, 1); + } + } +} +#endif /* ATMEL_MCI */ + #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/at91sam9261_devices.c b/cpu/arm926ejs/at91/at91sam9261_devices.c index 16d411f..7ee573c 100644 --- a/cpu/arm926ejs/at91/at91sam9261_devices.c +++ b/cpu/arm926ejs/at91/at91sam9261_devices.c @@ -75,6 +75,24 @@ void at91_serial_hw_init(void) #endif } +#ifdef CONFIG_ATMEL_MCI +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_MCI); + at91_set_B_periph(AT91_PIN_PA2, 0); + + if (mask & (1 << 0)) { + at91_set_B_periph(AT91_PIN_PA0, 1); + at91_set_B_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 1)) { + at91_set_B_periph(AT91_PIN_PA4, 1); + at91_set_B_periph(AT91_PIN_PA5, 1); + at91_set_B_periph(AT91_PIN_PA6, 1); + } + } +} +#endif /* ATMEL_MCI */ + #ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/at91sam9263_devices.c b/cpu/arm926ejs/at91/at91sam9263_devices.c index f72efdf..6a89fab 100644 --- a/cpu/arm926ejs/at91/at91sam9263_devices.c +++ b/cpu/arm926ejs/at91/at91sam9263_devices.c @@ -79,6 +79,61 @@ void at91_serial_hw_init(void) #endif } +#ifdef CONFIG_ATMEL_MCI +#ifdef CONFIG_AT91_MCI0 +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_MCI0); + at91_set_A_periph(AT91_PIN_PA12, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA0, 1); + at91_set_A_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA3, 1); + at91_set_A_periph(AT91_PIN_PA4, 1); + at91_set_A_periph(AT91_PIN_PA5, 1); + } + } + if (mask & (1 << 2)) { + at91_set_A_periph(AT91_PIN_PA16, 1); + at91_set_A_periph(AT91_PIN_PA17, 1); + if (mask & (1 << 3)) { + at91_set_A_periph(AT91_PIN_PA18, 1); + at91_set_A_periph(AT91_PIN_PA19, 1); + at91_set_A_periph(AT91_PIN_PA20, 1); + } + } +} +#endif +#ifdef CONFIG_AT91_MCI1 +void at91_mci1_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_MCI1); + at91_set_A_periph(AT91_PIN_PA6, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA7, 1); + at91_set_A_periph(AT91_PIN_PA8, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA9, 1); + at91_set_A_periph(AT91_PIN_PA10, 1); + at91_set_A_periph(AT91_PIN_PA11, 1); + } + } + if (mask & (1 << 2)) { + at91_set_B_periph(AT91_PIN_PA21, 1); + at91_set_B_periph(AT91_PIN_PA22, 1); + if (mask & (1 << 3)) { + at91_set_B_periph(AT91_PIN_PA23, 1); + at91_set_B_periph(AT91_PIN_PA24, 1); + at91_set_B_periph(AT91_PIN_PA25, 1); + } + } +} +#endif +#endif + #ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/at91sam9m10g45_devices.c b/cpu/arm926ejs/at91/at91sam9m10g45_devices.c index 98d90f2..c4db5f4 100644 --- a/cpu/arm926ejs/at91/at91sam9m10g45_devices.c +++ b/cpu/arm926ejs/at91/at91sam9m10g45_devices.c @@ -75,6 +75,61 @@ void at91_serial_hw_init(void) #endif } +#ifdef CONFIG_ATMEL_MCI +#ifdef CONFIG_AT91_MCI0 +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_MCI0); + at91_set_A_periph(AT91_PIN_PA12, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA0, 1); + at91_set_A_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA3, 1); + at91_set_A_periph(AT91_PIN_PA4, 1); + at91_set_A_periph(AT91_PIN_PA5, 1); + } + } + if (mask & (1 << 2)) { + at91_set_A_periph(AT91_PIN_PA16, 1); + at91_set_A_periph(AT91_PIN_PA17, 1); + if (mask & (1 << 3)) { + at91_set_A_periph(AT91_PIN_PA18, 1); + at91_set_A_periph(AT91_PIN_PA19, 1); + at91_set_A_periph(AT91_PIN_PA20, 1); + } + } +} +#endif +#ifdef CONFIG_AT91_MCI1 +void at91_mci1_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_MCI1); + at91_set_A_periph(AT91_PIN_PA6, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA7, 1); + at91_set_A_periph(AT91_PIN_PA8, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA9, 1); + at91_set_A_periph(AT91_PIN_PA10, 1); + at91_set_A_periph(AT91_PIN_PA11, 1); + } + } + if (mask & (1 << 2)) { + at91_set_B_periph(AT91_PIN_PA0, 1); + at91_set_B_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 3)) { + at91_set_B_periph(AT91_PIN_PA3, 1); + at91_set_B_periph(AT91_PIN_PA4, 1); + at91_set_B_periph(AT91_PIN_PA5, 1); + } + } +} +#endif +#endif + #ifdef CONFIG_ATMEL_SPI void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/at91sam9rl_devices.c b/cpu/arm926ejs/at91/at91sam9rl_devices.c index ebed193..41ae4a8 100644 --- a/cpu/arm926ejs/at91/at91sam9rl_devices.c +++ b/cpu/arm926ejs/at91/at91sam9rl_devices.c @@ -75,6 +75,28 @@ void at91_serial_hw_init(void) #endif } +/* + * The AT91SAM9RL64 is said to have 2 slots, but the datasheet doesn't + * seem to mention to what pins the second slot is assigned + */ +#ifdef CONFIG_ATMEL_MCI +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI); + at91_set_A_periph(AT91_PIN_PA2, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA0, 1); + at91_set_A_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA3, 1); + at91_set_A_periph(AT91_PIN_PA4, 1); + at91_set_A_periph(AT91_PIN_PA5, 1); + } + } +} +#endif /* ATMEL_MCI */ + #ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/cpu.c b/cpu/arm926ejs/at91/cpu.c index f2f7b62..f96b715 100644 --- a/cpu/arm926ejs/at91/cpu.c +++ b/cpu/arm926ejs/at91/cpu.c @@ -52,3 +52,10 @@ int print_cpuinfo(void) return 0; } #endif + +#ifdef CONFIG_GENERIC_MMC +int cpu_mmc_init(bd_t *bis) +{ + atmel_mci_init(bis); +} +#endif /* GENERIC_MMC */ diff --git a/include/asm-arm/arch-at91/at91_common.h b/include/asm-arm/arch-at91/at91_common.h index 01840ee..01fcdd6 100644 --- a/include/asm-arm/arch-at91/at91_common.h +++ b/include/asm-arm/arch-at91/at91_common.h @@ -32,6 +32,8 @@ void at91_serial0_hw_init(void); void at91_serial1_hw_init(void); void at91_serial2_hw_init(void); void at91_serial3_hw_init(void); +void at91_mci0_hw_init(unsigned long mask); +void at91_mci1_hw_init(unsigned long mask); void at91_spi0_hw_init(unsigned long cs_mask); void at91_spi1_hw_init(unsigned long cs_mask); void at91_uhp_hw_init(void); diff --git a/include/asm-arm/arch-at91/at91cap9.h b/include/asm-arm/arch-at91/at91cap9.h index b128ac5..2ad3280 100644 --- a/include/asm-arm/arch-at91/at91cap9.h +++ b/include/asm-arm/arch-at91/at91cap9.h @@ -109,6 +109,9 @@ #define AT91_USART1 AT91CAP9_BASE_US1 #define AT91_USART2 AT91CAP9_BASE_US2 +#define AT91_BASE_MCI0 AT91CAP9_BASE_MCI0 +#define AT91_BASE_MCI1 AT91CAP9_BASE_MCI1 + /* * SCKCR flags */ diff --git a/include/asm-arm/arch-at91/at91sam9260.h b/include/asm-arm/arch-at91/at91sam9260.h index 73975f4..b92f0ee 100644 --- a/include/asm-arm/arch-at91/at91sam9260.h +++ b/include/asm-arm/arch-at91/at91sam9260.h @@ -105,6 +105,8 @@ #define AT91_USART4 AT91SAM9260_BASE_US4 #define AT91_USART5 AT91SAM9260_BASE_US5 +#define AT91_BASE_MCI0 AT91SAM9260_BASE_MCI + /* * Internal Memory. */ diff --git a/include/asm-arm/arch-at91/at91sam9261.h b/include/asm-arm/arch-at91/at91sam9261.h index b303e07..11fdc3e 100644 --- a/include/asm-arm/arch-at91/at91sam9261.h +++ b/include/asm-arm/arch-at91/at91sam9261.h @@ -88,6 +88,7 @@ #define AT91_USART1 AT91SAM9261_BASE_US1 #define AT91_USART2 AT91SAM9261_BASE_US2 +#define AT91_BASE_MCI0 AT91SAM9261_BASE_MCI /* * Internal Memory. diff --git a/include/asm-arm/arch-at91/at91sam9263.h b/include/asm-arm/arch-at91/at91sam9263.h index 966a683..6bf124b 100644 --- a/include/asm-arm/arch-at91/at91sam9263.h +++ b/include/asm-arm/arch-at91/at91sam9263.h @@ -108,6 +108,9 @@ #define AT91_SMC AT91_SMC0 #define AT91_SDRAMC AT91_SDRAMC0 +#define AT91_BASE_MCI0 AT91SAM9263_BASE_MCI0 +#define AT91_BASE_MCI1 AT91SAM9263_BASE_MCI1 + /* * Internal Memory. */ diff --git a/include/asm-arm/arch-at91/at91sam9g45.h b/include/asm-arm/arch-at91/at91sam9g45.h index 0feed9c..16deadc 100644 --- a/include/asm-arm/arch-at91/at91sam9g45.h +++ b/include/asm-arm/arch-at91/at91sam9g45.h @@ -114,6 +114,9 @@ #define AT91_USART2 AT91SAM9G45_BASE_US2 #define AT91_USART3 AT91SAM9G45_BASE_US3 +#define AT91_BASE_MCI0 AT91SAM9G45_BASE_MCI0 +#define AT91_BASE_MCI1 AT91SAM9G45_BASE_MCI1 + /* * Internal Memory. */ diff --git a/include/asm-arm/arch-at91/at91sam9rl.h b/include/asm-arm/arch-at91/at91sam9rl.h index 4dd8037..f0da7a2 100644 --- a/include/asm-arm/arch-at91/at91sam9rl.h +++ b/include/asm-arm/arch-at91/at91sam9rl.h @@ -99,6 +99,7 @@ #define AT91_USART2 AT91SAM9RL_BASE_US2 #define AT91_USART3 AT91SAM9RL_BASE_US3 +#define AT91_BASE_MCI0 AT91SAM9RL_BASE_MCI /* * Internal Memory. diff --git a/include/asm-arm/arch-at91/clk.h b/include/asm-arm/arch-at91/clk.h index f642dd9..457e6c9 100644 --- a/include/asm-arm/arch-at91/clk.h +++ b/include/asm-arm/arch-at91/clk.h @@ -59,5 +59,10 @@ static inline unsigned long get_twi_clk_rate(unsigned int dev_id) return get_mck_clk_rate(); } +static inline unsigned long get_mci_clk_rate(void) +{ + return get_mck_clk_rate(); +} + int at91_clock_init(unsigned long main_clock); #endif /* __ASM_ARM_ARCH_CLK_H__ */ diff --git a/include/asm-arm/arch-at91/memory-map.h b/include/asm-arm/arch-at91/memory-map.h index f605f37..445d128 100644 --- a/include/asm-arm/arch-at91/memory-map.h +++ b/include/asm-arm/arch-at91/memory-map.h @@ -32,4 +32,10 @@ #define USART3_BASE (AT91_BASE_SYS + AT91_DBGU) #define SPI0_BASE AT91_BASE_SPI +#ifndef (CONFIG_AT91_MCI1) +# define MMCI_BASE AT91_BASE_MCI0 +#else +# define MMCI_BASE AT91_BASE_MCI1 +#endif + #endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */ -- 1.6.3.3

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