October 2010 - U-Boot

[U-Boot] [PATCH] ARMV7: OMAP3: IGEP: Rename TEXT_BASE
by Steve Sakoman 29 Oct '10

29 Oct '10

Commit 14d0a02a "Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE" missed the IGEP boards since they were just added. Signed-off-by: Steve Sakoman <steve.sakoman(a)linaro.org> --- diff --git a/board/isee/igep0020/config.mk b/board/isee/igep0020/config.mk index b8812f9..7964621 100644 --- a/board/isee/igep0020/config.mk +++ b/board/isee/igep0020/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80008000 +CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/board/isee/igep0030/config.mk b/board/isee/igep0030/config.mk index 35865e0..de6384f 100644 --- a/board/isee/igep0030/config.mk +++ b/board/isee/igep0030/config.mk @@ -30,5 +30,5 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80008000 +CONFIG_SYS_TEXT_BASE = 0x80008000

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[U-Boot] [GIT PULL] Pull request: u-boot-imx
by Stefano Babic 29 Oct '10

29 Oct '10

Hi Wolfgang, please pull from u-boot-imx The following changes since commit 908614f20f7f0f5df736eed21b88e81ebbf14e86: Prepare v2010.12-rc1 (2010-10-27 22:49:13 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master Jason Liu (1): MX5:use common u-boot.lds of cpu layer Matthias Weisser (1): imx25: Fix reset Shawn Guo (3): mx51evk: Fix 2 hours reset issue mx51evk: consolidate env for mmcboot and netboot mx51evk: support new relocation scheme Stefano Babic (2): MX51: add CONFIG_SYS_TEXT_BASE to vision2 board, use general ld script MX51: remove warning in clock.c arch/arm/cpu/arm926ejs/mx25/reset.c | 8 ++-- arch/arm/cpu/armv7/mx5/clock.c | 2 +- arch/arm/cpu/armv7/mx5/u-boot.lds | 73 ----------------------------- arch/arm/include/asm/arch-mx25/imx-regs.h | 14 +++-- arch/arm/include/asm/arch-mx5/imx-regs.h | 3 +- board/freescale/mx51evk/config.mk | 1 - board/freescale/mx51evk/mx51evk.c | 14 +++--- board/ttcontrol/vision2/config.mk | 4 +- include/configs/mx51evk.h | 62 +++++++++++++++++++------ include/mc13892.h | 16 +++--- 10 files changed, 80 insertions(+), 117 deletions(-) delete mode 100644 arch/arm/cpu/armv7/mx5/u-boot.lds -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de =====================================================================

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[U-Boot] Please pull u-boot-samsung/master
by Minkyu Kang 29 Oct '10

29 Oct '10

Dear Wolfgang Denk, Please pull u-boot-samsung/master. Thanks The following changes since commit b485556be51d1edae0a2c0065e2f572ca42a1eee: John Rigby (1): ARM: enable device tree for beagle are available in the git repository at: git://git.denx.de/u-boot-samsung master C Nauman (1): Add generic support for samsung s3c2440 Jaehoon Chung (1): s5p_mmc: support 8-bit bus width Minkyu Kang (1): ARMV7: S5P: serial: support the s5pc210 arch/arm/cpu/arm920t/s3c24x0/speed.c | 30 +- arch/arm/cpu/arm920t/s3c24x0/timer.c | 23 +- arch/arm/cpu/arm920t/s3c24x0/usb.c | 10 +- arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c | 12 +- arch/arm/include/asm/arch-s3c24x0/s3c2440.h | 161 ++++++ arch/arm/include/asm/arch-s3c24x0/s3c24x0.h | 672 +++++++++++++---------- arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h | 2 + arch/arm/include/asm/arch-s5pc1xx/mmc.h | 2 +- arch/arm/include/asm/arch-s5pc1xx/uart.h | 14 +- board/mpl/vcma9/vcma9.c | 41 +- board/samsung/goni/goni.c | 2 +- board/samsung/smdk2400/smdk2400.c | 28 +- board/samsung/smdk2410/smdk2410.c | 36 +- board/sbc2410x/sbc2410x.c | 44 +- board/trab/cmd_trab.c | 28 +- board/trab/rs485.c | 40 +- board/trab/trab.c | 67 ++-- board/trab/trab_fkt.c | 142 +++--- board/trab/tsc2000.c | 39 +- board/trab/tsc2000.h | 86 ++-- board/trab/vfd.c | 90 ++-- drivers/i2c/s3c24x0_i2c.c | 102 ++-- drivers/mmc/s5p_mmc.c | 19 +- drivers/mtd/nand/s3c2410_nand.c | 25 +- drivers/rtc/s3c24x0_rtc.c | 52 +- drivers/serial/serial_s3c24x0.c | 26 +- drivers/serial/serial_s5p.c | 6 +- 27 files changed, 1048 insertions(+), 751 deletions(-) create mode 100644 arch/arm/include/asm/arch-s3c24x0/s3c2440.h

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[U-Boot] Pull request u-boot-blackfin.git
by Mike Frysinger 29 Oct '10

29 Oct '10

The following changes since commit 908614f20f7f0f5df736eed21b88e81ebbf14e86: Prepare v2010.12-rc1 (2010-10-27 22:49:13 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-blackfin.git master Mike Frysinger (2): Blackfin: fix building after asm-offsets.h intro Blackfin: config.mk: drop manual stripping of config vars arch/blackfin/config.mk | 2 -- arch/blackfin/include/asm/config.h | 3 +++ 2 files changed, 3 insertions(+), 2 deletions(-)

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[U-Boot] [PULL] U-Boot-pxa pull request
by Marek Vasut 29 Oct '10

29 Oct '10

Hi, please pull my git://git.denx.de/u-boot-pxa for-wd-master branch into your u- boot/master branch. Thanks The following changes since commit 908614f20f7f0f5df736eed21b88e81ebbf14e86: Prepare v2010.12-rc1 (2010-10-27 22:49:13 +0200) are available in the git repository at: git://git.denx.de/u-boot-pxa.git for-wd-master Mikhail Kshevetskiy (1): arm/pxa: remove unused arch-pxa/macro.h arch/arm/cpu/pxa/start.S | 1 - arch/arm/include/asm/arch-pxa/macro.h | 328 ----------------------------- onenand_ipl/board/vpac270/Makefile | 5 - onenand_ipl/board/vpac270/lowlevel_init.S | 34 --- 4 files changed, 0 insertions(+), 368 deletions(-) delete mode 100644 arch/arm/include/asm/arch-pxa/macro.h delete mode 100644 onenand_ipl/board/vpac270/lowlevel_init.S

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[U-Boot] [PATCH RFC 0/3] ARM Relocation Config Cleanup
by Wolfgang Denk 29 Oct '10

29 Oct '10

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[U-Boot] [PATCH 1/1] Fix in interrupt handling part of arm926ejs.
by Himanshu Chauhan 29 Oct '10

29 Oct '10

Macro get_bad_stack used to load SVC mode stack pointer in r13 and then re-use the register, without saving, for further modifying the spsr, thus trashing the r13. r13 is never loaded again after this. Signed-off-by: Himanshu Chauhan <hschauhan(a)nulltrace.org> --- arch/arm/cpu/arm926ejs/start.S | 5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 7397882..47d7aac 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -523,9 +523,8 @@ cpu_init_crit: str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr str lr, [r13, #4] @ save spsr in position 1 of saved stack - mov r13, #MODE_SVC @ prepare SVC-Mode - @ msr spsr_c, r13 - msr spsr, r13 @ switch modes, make sure moves will execute + mov lr, #MODE_SVC @ prepare SVC-Mode + msr spsr, lr @ switch modes, make sure moves will execute mov lr, pc @ capture return pc movs pc, lr @ jump to next instruction & switch modes. .endm -- 1.7.0.4

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[U-Boot] [PATCH 3/3 V4] Add board support for hawkboard
by Sughosh Ganu 29 Oct '10

29 Oct '10

Signed-off-by: Sughosh Ganu <urwithsughosh(a)gmail.com> --- Changes since V3 * Added README.hawkboard * Moved setting of select_chip to nand_boot function * Removed the superfluous entry in board/davinci/da8xxevm/Makefile added earlier. MAINTAINERS | 5 + arch/arm/include/asm/arch-davinci/da8xx_common.h | 3 + arch/arm/include/asm/arch-davinci/hardware.h | 5 +- board/davinci/common/Makefile | 2 +- board/davinci/common/davinci_pinmux.c | 105 +++++++++++ board/davinci/common/misc.c | 75 -------- board/davinci/da8xxevm/Makefile | 1 + board/davinci/da8xxevm/hawkboard.c | 69 ++++++++ board/davinci/da8xxevm/hawkboard_nand_spl.c | 164 +++++++++++++++++ boards.cfg | 3 + doc/README.hawkboard | 93 ++++++++++ include/configs/hawkboard.h | 204 ++++++++++++++++++++++ nand_spl/board/davinci/da8xxevm/Makefile | 141 +++++++++++++++ nand_spl/board/davinci/da8xxevm/u-boot.lds | 75 ++++++++ nand_spl/nand_boot.c | 1 + 15 files changed, 869 insertions(+), 77 deletions(-) create mode 100644 board/davinci/common/davinci_pinmux.c create mode 100644 board/davinci/da8xxevm/hawkboard.c create mode 100644 board/davinci/da8xxevm/hawkboard_nand_spl.c create mode 100644 doc/README.hawkboard create mode 100644 include/configs/hawkboard.h create mode 100644 nand_spl/board/davinci/da8xxevm/Makefile create mode 100644 nand_spl/board/davinci/da8xxevm/u-boot.lds diff --git a/MAINTAINERS b/MAINTAINERS index 9258cb1..2a7d23d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -851,6 +851,11 @@ Alex Z lart SA1100 dnp1110 SA1110 +Syed Mohammed Khasim <sm.khasim(a)gmail.com> +Sughosh Ganu <urwithsughosh(a)gmail.com> + + hawkboard ARM926EJS (OMAP-L138) + ------------------------------------------------------------------------- Unknown / orphaned boards: diff --git a/arch/arm/include/asm/arch-davinci/da8xx_common.h b/arch/arm/include/asm/arch-davinci/da8xx_common.h index 7ae63a6..bc3092d 100644 --- a/arch/arm/include/asm/arch-davinci/da8xx_common.h +++ b/arch/arm/include/asm/arch-davinci/da8xx_common.h @@ -19,6 +19,9 @@ #ifndef __COMMON_H #define __COMMON_H +#define HAWKBOARD_KICK0_UNLOCK 0x83e70b13 +#define HAWKBOARD_KICK1_UNLOCK 0x95a4f1e0 + struct lpsc_resource { const int lpsc_no; }; diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index 3520cf8..d006ac1 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -379,7 +379,10 @@ int clk_get(enum davinci_clk_ids id); /* Boot config */ struct davinci_syscfg_regs { dv_reg revid; - dv_reg rsvd[71]; + dv_reg rsvd[13]; + dv_reg kick0; + dv_reg kick1; + dv_reg rsvd1[56]; dv_reg pinmux[20]; dv_reg suspsrc; dv_reg chipsig; diff --git a/board/davinci/common/Makefile b/board/davinci/common/Makefile index 8d9ea00..dd022f6 100644 --- a/board/davinci/common/Makefile +++ b/board/davinci/common/Makefile @@ -29,7 +29,7 @@ endif LIB = $(obj)lib$(VENDOR).a -COBJS := misc.o +COBJS := misc.o davinci_pinmux.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/davinci/common/davinci_pinmux.c b/board/davinci/common/davinci_pinmux.c new file mode 100644 index 0000000..ce58f71 --- /dev/null +++ b/board/davinci/common/davinci_pinmux.c @@ -0,0 +1,105 @@ +/* + * DaVinci pinmux functions. + * + * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson(a)gefanuc.com> + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * Copyright (C) 2004 Texas Instruments. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include <asm/arch/davinci_misc.h> + +/* + * Change the setting of a pin multiplexer field. + * + * Takes an array of pinmux settings similar to: + * + * struct pinmux_config uart_pins[] = { + * { &davinci_syscfg_regs->pinmux[8], 2, 7 }, + * { &davinci_syscfg_regs->pinmux[9], 2, 0 } + * }; + * + * Stepping through the array, each pinmux[n] register has the given value + * set in the pin mux field specified. + * + * The number of pins in the array must be passed (ARRAY_SIZE can provide + * this value conveniently). + * + * Returns 0 if all field numbers and values are in the correct range, + * else returns -1. + */ +int davinci_configure_pin_mux(const struct pinmux_config *pins, + const int n_pins) +{ + int i; + + /* check for invalid pinmux values */ + for (i = 0; i < n_pins; i++) { + if (pins[i].field >= PIN_MUX_NUM_FIELDS || + (pins[i].value & ~PIN_MUX_FIELD_MASK) != 0) + return -1; + } + + /* configure the pinmuxes */ + for (i = 0; i < n_pins; i++) { + const int offset = pins[i].field * PIN_MUX_FIELD_SIZE; + const unsigned int value = pins[i].value << offset; + const unsigned int mask = PIN_MUX_FIELD_MASK << offset; + const dv_reg *mux = pins[i].mux; + + writel(value | (readl(mux) & (~mask)), mux); + } + + return 0; +} + +/* + * Configure multiple pinmux resources. + * + * Takes an pinmux_resource array of pinmux_config and pin counts: + * + * const struct pinmux_resource pinmuxes[] = { + * PINMUX_ITEM(uart_pins), + * PINMUX_ITEM(i2c_pins), + * }; + * + * The number of items in the array must be passed (ARRAY_SIZE can provide + * this value conveniently). + * + * Each item entry is configured in the defined order. If configuration + * of any item fails, -1 is returned and none of the following items are + * configured. On success, 0 is returned. + */ +int davinci_configure_pin_mux_items(const struct pinmux_resource *item, + const int n_items) +{ + int i; + + for (i = 0; i < n_items; i++) { + if (davinci_configure_pin_mux(item[i].pins, + item[i].n_pins) != 0) + return -1; + } + + return 0; +} diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c index 71e7822..e97e61c 100644 --- a/board/davinci/common/misc.c +++ b/board/davinci/common/misc.c @@ -105,78 +105,3 @@ void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr) } #endif /* DAVINCI_EMAC */ - -/* - * Change the setting of a pin multiplexer field. - * - * Takes an array of pinmux settings similar to: - * - * struct pinmux_config uart_pins[] = { - * { &davinci_syscfg_regs->pinmux[8], 2, 7 }, - * { &davinci_syscfg_regs->pinmux[9], 2, 0 } - * }; - * - * Stepping through the array, each pinmux[n] register has the given value - * set in the pin mux field specified. - * - * The number of pins in the array must be passed (ARRAY_SIZE can provide - * this value conveniently). - * - * Returns 0 if all field numbers and values are in the correct range, - * else returns -1. - */ -int davinci_configure_pin_mux(const struct pinmux_config *pins, - const int n_pins) -{ - int i; - - /* check for invalid pinmux values */ - for (i = 0; i < n_pins; i++) { - if (pins[i].field >= PIN_MUX_NUM_FIELDS || - (pins[i].value & ~PIN_MUX_FIELD_MASK) != 0) - return -1; - } - - /* configure the pinmuxes */ - for (i = 0; i < n_pins; i++) { - const int offset = pins[i].field * PIN_MUX_FIELD_SIZE; - const unsigned int value = pins[i].value << offset; - const unsigned int mask = PIN_MUX_FIELD_MASK << offset; - const dv_reg *mux = pins[i].mux; - - writel(value | (readl(mux) & (~mask)), mux); - } - - return 0; -} - -/* - * Configure multiple pinmux resources. - * - * Takes an pinmux_resource array of pinmux_config and pin counts: - * - * const struct pinmux_resource pinmuxes[] = { - * PINMUX_ITEM(uart_pins), - * PINMUX_ITEM(i2c_pins), - * }; - * - * The number of items in the array must be passed (ARRAY_SIZE can provide - * this value conveniently). - * - * Each item entry is configured in the defined order. If configuration - * of any item fails, -1 is returned and none of the following items are - * configured. On success, 0 is returned. - */ -int davinci_configure_pin_mux_items(const struct pinmux_resource *item, - const int n_items) -{ - int i; - - for (i = 0; i < n_items; i++) { - if (davinci_configure_pin_mux(item[i].pins, - item[i].n_pins) != 0) - return -1; - } - - return 0; -} diff --git a/board/davinci/da8xxevm/Makefile b/board/davinci/da8xxevm/Makefile index 17cbe86..1a67351 100644 --- a/board/davinci/da8xxevm/Makefile +++ b/board/davinci/da8xxevm/Makefile @@ -30,6 +30,7 @@ LIB = $(obj)lib$(BOARD).a COBJS-y += common.o COBJS-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o COBJS-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o +COBJS-$(CONFIG_MACH_DAVINCI_HAWK) += hawkboard.o COBJS := $(COBJS-y) diff --git a/board/davinci/da8xxevm/hawkboard.c b/board/davinci/da8xxevm/hawkboard.c new file mode 100644 index 0000000..b672c9d --- /dev/null +++ b/board/davinci/da8xxevm/hawkboard.c @@ -0,0 +1,69 @@ +/* + * Modified for Hawkboard - Syed Mohammed Khasim <khasim(a)beagleboard.org> + * + * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar(a)ti.com> + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <asm/errno.h> +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include <asm/arch/davinci_misc.h> +#include <ns16550.h> +#include <asm/arch/da8xx_common.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_HAWKBOARD; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + return 0; +} + +int board_early_init_f(void) +{ + /* + * Kick Registers need to be set to allow access to Pin Mux registers + */ + writel(HAWKBOARD_KICK0_UNLOCK, &davinci_syscfg_regs->kick0); + writel(HAWKBOARD_KICK1_UNLOCK, &davinci_syscfg_regs->kick1); + + /* set cfgchip3 to select mii */ + writel(readl(&davinci_syscfg_regs->cfgchip3) & + ~(1 << 8), &davinci_syscfg_regs->cfgchip3); + + return 0; +} + +int misc_init_r(void) +{ + char buf[32]; + + printf("ARM Clock : %s MHz\n", + strmhz(buf, clk_get(DAVINCI_ARM_CLKID))); + + return 0; +} diff --git a/board/davinci/da8xxevm/hawkboard_nand_spl.c b/board/davinci/da8xxevm/hawkboard_nand_spl.c new file mode 100644 index 0000000..b1f6b44 --- /dev/null +++ b/board/davinci/da8xxevm/hawkboard_nand_spl.c @@ -0,0 +1,164 @@ +/* + * Modified for Hawkboard - Syed Mohammed Khasim <khasim(a)beagleboard.org> + * + * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar(a)ti.com> + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <asm/errno.h> +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include <asm/arch/davinci_misc.h> +#include <ns16550.h> +#include <asm/arch/da8xx_common.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) + +static const struct pinmux_config mii_pins[] = { + { pinmux(2), 8, 1 }, + { pinmux(2), 8, 2 }, + { pinmux(2), 8, 3 }, + { pinmux(2), 8, 4 }, + { pinmux(2), 8, 5 }, + { pinmux(2), 8, 6 }, + { pinmux(2), 8, 7 } +}; + +static const struct pinmux_config mdio_pins[] = { + { pinmux(4), 8, 0 }, + { pinmux(4), 8, 1 } +}; + +static const struct pinmux_config nand_pins[] = { + { pinmux(7), 1, 1 }, + { pinmux(7), 1, 2 }, + { pinmux(7), 1, 4 }, + { pinmux(7), 1, 5 }, + { pinmux(9), 1, 0 }, + { pinmux(9), 1, 1 }, + { pinmux(9), 1, 2 }, + { pinmux(9), 1, 3 }, + { pinmux(9), 1, 4 }, + { pinmux(9), 1, 5 }, + { pinmux(9), 1, 6 }, + { pinmux(9), 1, 7 }, + { pinmux(12), 1, 5 }, + { pinmux(12), 1, 6 } +}; + +static const struct pinmux_config uart2_pins[] = { + { pinmux(0), 4, 6 }, + { pinmux(0), 4, 7 }, + { pinmux(4), 2, 4 }, + { pinmux(4), 2, 5 } +}; + +static const struct pinmux_config i2c_pins[] = { + { pinmux(4), 2, 4 }, + { pinmux(4), 2, 5 } +}; + +static const struct pinmux_resource pinmuxes[] = { + PINMUX_ITEM(mii_pins), + PINMUX_ITEM(mdio_pins), + PINMUX_ITEM(i2c_pins), + PINMUX_ITEM(nand_pins), + PINMUX_ITEM(uart2_pins), +}; + +static const struct lpsc_resource lpsc[] = { + { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ + { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ + { DAVINCI_LPSC_EMAC }, /* image download */ + { DAVINCI_LPSC_UART2 }, /* console */ + { DAVINCI_LPSC_GPIO }, +}; + +void board_init_f(ulong bootflag) +{ + /* + * Kick Registers need to be set to allow access to Pin Mux registers + */ + writel(HAWKBOARD_KICK0_UNLOCK, &davinci_syscfg_regs->kick0); + writel(HAWKBOARD_KICK1_UNLOCK, &davinci_syscfg_regs->kick1); + + /* setup the SUSPSRC for ARM to control emulation suspend */ + writel(readl(&davinci_syscfg_regs->suspsrc) & + ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | + DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | + DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc); + + /* Power on required peripherals + * ARM does not have acess by default to PSC0 and PSC1 + * assuming here that the DSP bootloader has set the IOPU + * such that PSC access is available to ARM + */ + da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)); + + /* configure pinmux settings */ + davinci_configure_pin_mux_items(pinmuxes, + ARRAY_SIZE(pinmuxes)); + + writel(readl(&davinci_uart2_ctrl_regs->pwremu_mgmt) | + (DAVINCI_UART_PWREMU_MGMT_FREE) | + (DAVINCI_UART_PWREMU_MGMT_URRST) | + (DAVINCI_UART_PWREMU_MGMT_UTRST), + &davinci_uart2_ctrl_regs->pwremu_mgmt); + + NS16550_init((NS16550_t)(DAVINCI_UART2_BASE), + CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); + + puts("Nand boot...\n"); + + relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, (gd_t *)gd, + CONFIG_SYS_NAND_U_BOOT_DST); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + nand_boot(); +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +} + +void putc(char c) +{ + if (gd->flags & GD_FLG_SILENT) + return; + + if (c == '\n') + NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), '\r'); + + NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), c); +} + +void hang(void) +{ + puts("### ERROR ### Please RESET the board ###\n"); + for (;;) + ; +} diff --git a/boards.cfg b/boards.cfg index 6c2a667..e2c73eb 100644 --- a/boards.cfg +++ b/boards.cfg @@ -372,6 +372,9 @@ davinci_sffsdr arm arm926ejs sffsdr davinci davinci davinci_sonata arm arm926ejs sonata davinci davinci da830evm arm arm926ejs da8xxevm davinci davinci da850evm arm arm926ejs da8xxevm davinci davinci +hawkboard arm arm926ejs da8xxevm davinci davinci hawkboard:SYS_TEXT_BASE=0xc1180000 +hawkboard_nand arm arm926ejs da8xxevm davinci davinci hawkboard:SYS_TEXT_BASE=0xc1080000,NAND_U_BOOT +hawkboard_uart arm arm926ejs da8xxevm davinci davinci hawkboard:SYS_TEXT_BASE=0xc1080000 guruplug arm arm926ejs - Marvell kirkwood mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood openrd_base arm arm926ejs - Marvell kirkwood diff --git a/doc/README.hawkboard b/doc/README.hawkboard new file mode 100644 index 0000000..b7afec4 --- /dev/null +++ b/doc/README.hawkboard @@ -0,0 +1,93 @@ +Summary +======= +The README is for the boot procedure used for TI's OMAP-L138 based +hawkboard. The hawkboard comes with a 128MiB Nand flash and a 128MiB +DDR SDRAM along with a host of other controllers. + +The hawkboard is booted in three stages. The initial bootloader which +executes upon reset is the Rom Boot Loader(RBL) which sits in the +internal ROM of the omap. The RBL initialises the memory and the nand +controller, and copies the image stored at a predefined location(block +1) of the nand flash. The image loaded by the RBL to the memory is the +AIS signed nand_spl image. This, in turns copies the u-boot binary +from the nand flash to the memory and jumps to the u-boot entry point. + +AIS is an image format defined by TI for the images that are to be +loaded to memory by the RBL. The image is divided into a series of +sections and the image's entry point is specified. Each section comes +with meta data like the target address the section is to be copied to +and the size of the section, which is used by the RBL to load the +image. At the end of the image the RBL jumps to the image entry +point. + +The secondary stage bootloader(nand_spl) which is loaded by the RBL +then loads the u-boot from a predefined location in the nand to the +memory and jumps to the u-boot entry point. + +The reason a secondary stage bootloader is used is because the ECC +layout expected by the RBL is not the same as that used by +u-boot/linux. This also implies that for flashing the nand_spl image, +we need to use the u-boot which uses the ECC layout expected by the +RBL[1]. Booting u-boot over UART(UART boot) is explained here[2]. + + +Compilation +=========== +Three images might be needed + +* nand_spl - This is the secondary bootloader which boots the u-boot + binary. + + hawkboard_nand_config + + The nand_spl ELF gets generated under nand_spl/u-boot-spl. This + needs to be processed with the AISGen tool for generating the AIS + signed image to be flashed. Steps for generating the AIS image are + explained here[3]. + +* u-boot binary - This is the image flashed to the nand and copied to + the memory by the nand_spl. + + hawkboard_config + +* u-boot for uart boot - This is same as the u-boot binary generated + above, with the sole difference of the CONFIG_SYS_TEXT_BASE being + 0xc1080000, as expected by the RBL. + + hawkboard_uart_config + + +Flashing the images to Nand +=========================== +The nand_spl AIS image needs to be flashed to the block 1 of the +Nand flash, as that is the location the RBL expects the image[4]. For +flashing the nand_spl, boot over the u-boot specified in [1], and +flash the image + +=> tftpboot 0xc0700000 <nand_spl_ais.bin> +=> nand erase 0x20000 0x20000 +=> nand write.e 0xc0700000 0x20000 <nand_spl_size> + +The u-boot binary is flashed at location 0xe0000(block 6) of the nand +flash. The nand_spl loader expects the u-boot at this location. For +flashing the u-boot binary + +=> tftpboot 0xc0700000 u-boot.bin +=> nand erase 0xe0000 0x40000 +=> nand write.e 0xc0700000 0xe0000 <u-boot-size> + + +Links +===== + +[1] + http://code.google.com/p/hawkboard/downloads/detail?name=u-boot_uart_ais_v1… + +[2] + http://elinux.org/Hawkboard#Booting_u-boot_over_UART + +[3] + http://elinux.org/Hawkboard#Signing_u-boot_for_UART_boot + +[4] + http://processors.wiki.ti.com/index.php/RBL_UBL_and_host_program#RBL_bootin… diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h new file mode 100644 index 0000000..a11e776 --- /dev/null +++ b/include/configs/hawkboard.h @@ -0,0 +1,204 @@ +/* + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * + * Based on davinci_dvevm.h. Original Copyrights follow: + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * Board + */ +#define CONFIG_SYS_USE_NAND 1 + +/* + * SoC Configuration + */ +#define CONFIG_MACH_DAVINCI_HAWK +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ +#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) +#define CONFIG_SYS_OSCIN_FREQ 24000000 +#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE +#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SKIP_LOWLEVEL_INIT +#if defined CONFIG_NAND_SPL +#define CONFIG_SKIP_RELOCATE_UBOOT +#endif +#define CONFIG_BOARD_EARLY_INIT_F + +/* + * Memory Info + */ +#define CONFIG_SYS_MALLOC_LEN (1*1024*1024) /* malloc() len */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ +#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE +#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */ +#define CONFIG_SYS_SDRAM_BASE 0xc0000000 +#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\ + CONFIG_SYS_GBL_DATA_SIZE) + +/* memtest start addr */ +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1) + +/* memtest will be run on 16MB */ +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) + +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ + +/* + * Serial Driver info + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE +#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * Network & Ethernet Configuration + */ +#define CONFIG_EMAC_MDIO_PHY_NUM 0x7 +#if !defined(CONFIG_NAND_SPL) +#define CONFIG_DRIVER_TI_EMAC +#endif +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI + +/* + * Nand Flash + */ +#ifdef CONFIG_SYS_USE_NAND +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE +#define CONFIG_CLE_MASK 0x10 +#define CONFIG_ALE_MASK 0x8 +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST +#define CFG_DAVINCI_STD_NAND_LAYOUT +#define CONFIG_SYS_NAND_CS 3 +#define CONFIG_SYS_NAND_PAGE_2K +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ +/* Max number of NAND devices */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, } +#define NAND_MAX_CHIPS 1 +/* Block 0--not used by bootcode */ +#define CONFIG_ENV_OFFSET 0x0 + +#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 +#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000 +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST +#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ + CONFIG_SYS_NAND_U_BOOT_SIZE - \ + CONFIG_SYS_MALLOC_LEN - \ + CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_NAND_ECCPOS { \ + 24, 25, 26, 27, 28, \ + 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \ + 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \ + 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \ + 59, 60, 61, 62, 63 } +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 10 +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ + CONFIG_SYS_NAND_ECCSIZE) +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ + CONFIG_SYS_NAND_ECCSTEPS) +#endif /* CONFIG_SYS_USE_NAND */ + +/* + * U-Boot general configuration + */ +#define CONFIG_MISC_INIT_R +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CONFIG_SYS_PROMPT "hawkboard > " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* + * Linux Information + */ +#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS \ + "mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\ + "4M ip=static" +#define CONFIG_BOOTDELAY 3 + +/* + * U-Boot commands + */ +#include <config_cmd_default.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_MEMORY + +#ifdef CONFIG_SYS_USE_NAND +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_NAND +#endif + +#ifndef CONFIG_DRIVER_TI_EMAC +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#endif + +#endif /* __CONFIG_H */ diff --git a/nand_spl/board/davinci/da8xxevm/Makefile b/nand_spl/board/davinci/da8xxevm/Makefile new file mode 100644 index 0000000..6102675 --- /dev/null +++ b/nand_spl/board/davinci/da8xxevm/Makefile @@ -0,0 +1,141 @@ +# +# (C) Copyright 2006-2007 +# Stefan Roese, DENX Software Engineering, sr(a)denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CONFIG_NAND_SPL = y + +include $(TOPDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL + +SOBJS = start.o _udivsi3.o _divsi3.o +COBJS = cpu.o davinci_nand.o ns16550.o div0.o davinci_pinmux.o psc.o \ + common.o hawkboard_nand_spl.o nand_boot.o + +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin \ + $(nandobj)u-boot-spl-16k.bin + +all: $(ALL) + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +$(nandobj)u-boot.lds: $(LDSCRIPT) + $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@ + +# create symbolic links for common files + +# from board directory +$(obj)davinci_pinmux.c: + @rm -f $@ + @ln -s $(TOPDIR)/board/davinci/common/davinci_pinmux.c $@ + +# from drivers/mtd/nand directory +$(obj)davinci_nand.c: + @rm -f $@ + @ln -s $(TOPDIR)/drivers/mtd/nand/davinci_nand.c $@ + +# from nand_spl directory +$(obj)nand_boot.c: + @rm -f $@ + @ln -s $(TOPDIR)/nand_spl/nand_boot.c $@ + +# from drivers/serial directory +$(obj)ns16550.c: + @rm -f $@ + @ln -sf $(TOPDIR)/drivers/serial/ns16550.c $@ + +# from cpu directory +$(obj)start.S: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/arm926ejs/start.S $@ + +# from lib directory +$(obj)_udivsi3.S: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/lib/_udivsi3.S $@ + +# from lib directory +$(obj)_divsi3.S: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/lib/_divsi3.S $@ + +# from lib directory +$(obj)div0.c: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/lib/div0.c $@ + +# from SoC directory +$(obj)cpu.c: + @rm -f $@ + @ln -s $(TOPDIR)/arch/arm/cpu/arm926ejs/davinci/cpu.c $@ + +# from board directory +$(obj)hawkboard_nand_spl.c: + @rm -f $@ + ln -s $(TOPDIR)/board/davinci/da8xxevm/hawkboard_nand_spl.c $@ + +# from board directory +$(obj)common.c: + @rm -f $@ + ln -s $(TOPDIR)/board/davinci/da8xxevm/common.c $@ + +$(obj)psc.c: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/arm926ejs/davinci/psc.c $@ + + +######################################################################### + +$(obj)%.o: $(obj)%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(obj)%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/nand_spl/board/davinci/da8xxevm/u-boot.lds b/nand_spl/board/davinci/da8xxevm/u-boot.lds new file mode 100644 index 0000000..f6ccf08 --- /dev/null +++ b/nand_spl/board/davinci/da8xxevm/u-boot.lds @@ -0,0 +1,75 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0xc1080000; + + . = ALIGN(4); + .text : + { + start.o (.text) + cpu.o (.text) + nand_boot.o (.text) + + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { + *(.data) + __datarel_start = .; + *(.data.rel) + __datarelrolocal_start = .; + *(.data.rel.ro.local) + __datarellocal_start = .; + *(.data.rel.local) + __datarelro_start = .; + *(.data.rel.ro) + } + + . = ALIGN(4); + __rel_dyn_start = .; + __rel_dyn_end = .; + __dynsym_start = .; + + __got_start = .; + . = ALIGN(4); + .got : { *(.got) } + + __got_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index b9fd6f5..76b8566 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -236,6 +236,7 @@ void nand_boot(void) /* * Init board specific nand support */ + nand_chip.select_chip = NULL; nand_info.priv = &nand_chip; nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE; nand_chip.dev_ready = NULL; /* preset to NULL */ -- 1.7.0.4

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[U-Boot] Problem running U-Boot in RAM on PPC440 (Avnet V5FX30T)
by hamelin.philippe＠ireq.ca 29 Oct '10

29 Oct '10

Hello, This is my first steps in implementing a bootloader on this platform. My platform is the Virtex-5 Avnet V5FX30T with a PPC440 CPU. For the first tests, I would like to download and start directly U-Boot from the RAM. I'm using ELDK as the cross toolchain. Here is the detailed step that I did: In EDK: * Create project using the base system builder * Activate cache on Flash and DDR RAM * Set STDIN/STDOUT to Serial, Boot Memory to BRAM * Modify base address of RAM from 0x04000000 to 0x0 (high address is now 0x03FFFFFF) * Generate linux_2_6 BSP (xparameters.h) * In the file xparameters.h, replace XPAR_FLASH_8MX16* with XPAR_FLASH*, and XPAR_DDR2_SDRAM_16MX32* with XPAR_DDR2_SDRAM*. * Update the Bistream (put default bootloop in BRAM) * Generate FPGA Bitstream * Download FPGA Bitstream to the device In linux console: * Un-tar u-boot * Copy the file xparameters.h generated with EDK in u-boot/board/avnet/v5fx30teval * export ARCH=powerpc * export CROSS_COMPILE=ppc_4xx- * make v5fx30teval_config * make * Open a serial console at 115200,8,N,1 (seems to be the default according to xilinx-ppc.h) In XMD: * dow u-boot * run At this point, I see nothing in the console. After a couple of seconds I stop the processor and the PC register is at 0xFFFFFFFC. Does someone can give me some hints on how to find the problem? Here is the address map: Address Map for Processor ppc440_0 (0b0000000000-0b0011111111) ppc440_0 (0000000000-0x03ffffff) DDR2_SDRAM_16Mx32 ppc440_0_PPC440MC (0x81000000-0x8100ffff) Ethernet_MAC plb_v46_0 (0x81800000-0x8180ffff) xps_intc_0 plb_v46_0 (0x83e00000-0x83e0ffff) RS232 plb_v46_0 (0xd8000000-0xd8ffffff) FLASH_8Mx16 plb_v46_0 (0xffff8000-0xffffffff) xps_bram_if_cntlr_1 plb_v46_0 Here is the log of my XMD session: Xilinx Microprocessor Debug (XMD) Engine Xilinx EDK 10.1.03 Build EDK_K_SP3.6 Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved. Overriding IP level properties ... Address Map for Processor ppc440_0 (0b0000000000-0b0011111111) ppc440_0 (0000000000-0x03ffffff) DDR2_SDRAM_16Mx32 ppc440_0_PPC440MC (0x81000000-0x8100ffff) Ethernet_MAC plb_v46_0 (0x81800000-0x8180ffff) xps_intc_0 plb_v46_0 (0x83e00000-0x83e0ffff) RS232 plb_v46_0 (0xd8000000-0xd8ffffff) FLASH_8Mx16 plb_v46_0 (0xffff8000-0xffffffff) xps_bram_if_cntlr_1 plb_v46_0 XMD% Info:Connecting to cable (Usb Port - USB21). Info:Checking cable driver. Info: Driver file xusb_xlp.sys found. Info: Driver version: src=1029, dest=1029. Info: Driver windrvr6.sys version = 8.1.1.0.Info: WinDriver v8.11 Jungo (c) 1997 - 2006 Build Date: Oct 16 2006 X86 32bit SYS 12:35:07, version = 811. Info: Cable PID = 0008. Info: Max current requested during enumeration is 74 mA. Info:Type = 0x0004. Info: Cable Type = 3, Revision = 0. Info: Setting cable speed to 750 KHz. Info:Cable connection established. Info:Firmware version = 1303. Info:File version of C:/Xilinx/10.1/ISE/data/xusb_xlp.hex = 1303. Info:Firmware hex file version = 1303. Info:PLD file version = 0012h. Info: PLD version = 0012h. JTAG chain configuration -------------------------------------------------- Device ID Code IR Length Part Name 1 63276093 10 XC5VFX30T_U PowerPC440 Processor Configuration ------------------------------------- Version.............................0x7ff21912 User ID.............................0x00f00002 No of PC Breakpoints................4 No of Addr/Data Watchpoints.........2 User Defined Address Map to access Special PowerPC Features using XMD: I-Cache (Data)........0x70000000 - 0x70007fff I-Cache (TAG).........0x70008000 - 0x7000ffff D-Cache (Data)........0x78000000 - 0x78007fff D-Cache (TAG).........0x78008000 - 0x7800ffff DCR...................0x78020000 - 0x78020fff TLB...................0x70020000 - 0x70023fff Connected to "ppc" target. id = 0 Starting GDB server for "ppc" target (id = 0) at TCP port no 1234 XMD% dow u-boot System Reset .... DONE Downloading Program -- u-boot section, .text: 0x03000000-0x0301fe9f section, .bootpg: 0x0301fea0-0x03020167 section, .resetvec: 0x03020168-0x0302016b section, .rodata: 0x0302016c-0x0302743b section, .reloc: 0x03027500-0x03028e0b section, .data: 0x03028e0c-0x03028fe7 section, .data.rel.ro.local: 0x03028fe8-0x03029113 section, .data.rel: 0x03029114-0x03029257 section, .data.rel.ro: 0x03029258-0x030292b3 section, .data.rel.local: 0x030292b4-0x03029a9f section, .u_boot_cmd: 0x03029aa0-0x0302a183 section, .bss: 0x0302a200-0x0302c82f Setting PC with Program Start Address 0x0301fea0 XMD% rrd r0: 30000000 r8: 03fcd834 r16: 03ff86c0 r24: 03fccbfc r1: 03f69d38 r9: 17d78400 r17: 03f5e5b8 r25: 03f69f28 r2: 03f69f28 r10: 00000030 r18: 00000000 r26: 03f69f08 r3: 00000001 r11: 05f5e100 r19: ffffffff r27: 03fca000 r4: 00000000 r12: 44000022 r20: 00000000 r28: 03f6a000 r5: 00000000 r13: 0000a5a5 r21: 03f69d90 r29: 03f69da0 r6: 00000000 r14: 03ff5d1c r22: 00000000 r30: 03ffe924 r7: 0401f6d8 r15: 00fca000 r23: 03fcc228 r31: a0800000 pc: 0301fea0 msr: 00000000 XMD% run Info:Processor started. Type "stop" to stop processor RUNNING> XMD% stop XMD% Info:User Interrupt, Processor Stopped at 0xfffffffc XMD% rrd r0: 30000000 r8: 03fd6800 r16: 03ff86c0 r24: 03fd5bfc r1: 03f72d28 r9: 17d78400 r17: 03f5e5b8 r25: 03f72f28 r2: 03f72f28 r10: 00000030 r18: 00000000 r26: 03f72f08 r3: 00000001 r11: 05f5e100 r19: ffffffff r27: 03fd3000 r4: 00000000 r12: ffffffff r20: 00000000 r28: 03f73000 r5: 00000000 r13: 0000a5a5 r21: 03f72d90 r29: 03f72da0 r6: 00000000 r14: 03ff5d1c r22: 00000000 r30: 04002524 r7: 03de91ff r15: 00fd3000 r23: 03fd5228 r31: a0800000 pc: fffffffc msr: 00000000 XMD% ------------------------------------ Philippe Hamelin, ing. jr, M. Ing Chercheur / Researcher T: 450-652-8499 x2198 F: 450-652-1316 Expertise robotique et civil Institut de recherche d'Hydro-Québec (IREQ) 1740, boul. Lionel-Boulet Varennes (QC) J3X 1S1, Canada

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[U-Boot] Most ARM CPU's have buggy clear_bss?
by Darius Augulis 29 Oct '10

29 Oct '10

Hi list, the code for clearing bss section for most ARM cores looks like this or very similar: clear_bss: #ifndef CONFIG_PRELOADER ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ mov r4, r7 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 bne clbss_l #endif /* #ifndef CONFIG_PRELOADER */ IMO, if relocation is skipped, r4 should be loaded with value of _TEXT_BASE, not reloc address? It seems like r3 is prepared for this but, it's somehow missing? It's not used at all. Maybe it could be reason why I'm facing strange problem, when after relocating uboot with nand_spl no one command is not working. I debugged that command table is empty. I think this ASM code clears not bss area but something else. Also relocation code looks a bit strange: .globl relocate_code relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ cmp r0, r6 beq clear_bss r0 is compared to r6, which contains reloc address. All instructions between loading r0 and comparison are confusing, because they do not impact comparison result. Also they do not matter in clear_bss so I think would be great to change code like this: mov sp, r4 adr r0, _start cmp r0, r6 beq clear_bss ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ Any comments are welcome! Regards, Darius.

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