August 2009 - U-Boot

[U-Boot] USB Mass Storage devices on MPC8536DS
by Felix Radensky 06 Aug '09

06 Aug '09

Hi, I'm trying to access USB mass storage devices from u-boot running on MPC8536DS. I use the latest git version. Tried 4 different devices, but only one of them was recognized. although all 4 work fine with linux-2.6.31-rc5. Also, device is recognizable only in 1 of 4 available USB ports. Is that expected ? Was USB tested on this platform ? Thanks. Felix.

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[U-Boot] Problems porting new u-boot
by Alemao 06 Aug '09

06 Aug '09

Hi all, Im having problems porting u-boot-2009.03 to a MPC8541 board. In u-boot-1.2.0, if I use TEXT_BASE = 0xfff00000, u-boot.bin is created with 1MB size. But in u-boot-2009.03 it's created with only 516kB. In cpu/mpc85xx/start.S says: "The processor starts at 0xfffffffc and the code is first executed in the last 4K page(0xfffff000-0xffffffff) in flash/rom." So I think there's nothing in 0xfffffffc, using u-boot.bin from u-boot-2009.03, cause it only has 516kB. Do I have to set TEXT_BASE with the exact u-boot.bin size? Or am I missing something? Cheers, -- Alemao

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[U-Boot] PATCH mtd CFI flash: timeout calculation underflow if imprecise 1kHz timer: fix
by Renato Andreola 06 Aug '09

06 Aug '09

From 341dbd88695d3514699aae612d640ed93feb8821 Mon Sep 17 00:00:00 2001 From: Renato Andreola <renato.andreola(a)imagos.it> Date: Thu, 6 Aug 2009 18:05:00 +0200 Subject: [PATCH] drivers/mtd/cfi_flash: precision and underflow problem in tout calculation With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000 solved avoiding the preprocessor conditional and introducing a compile time branch between a high freq case and a slow freq case. Signed-off-by: Alessandro Rubini <rubini(a)gnudd.com> Renato Andreola <renato.andreola(a)imagos.it> --- drivers/mtd/cfi_flash.c | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 81ac5d3..499044f 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -659,9 +659,10 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, { ulong start; -#if CONFIG_SYS_HZ != 1000 - tout *= CONFIG_SYS_HZ/1000; -#endif + if (CONFIG_SYS_HZ > 10000) + tout *= CONFIG_SYS_HZ/1000; /* for a big HZ, avoid overflow */ + else + tout = (tout * CONFIG_SYS_HZ) / 1000 + 1; /* Wait for command completion */ start = get_timer (0); -- 1.5.5

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[U-Boot] [PATCH v2] 85xx: Cleanup whitespace in mpc8536ds.c
by Kumar Gala 06 Aug '09

06 Aug '09

Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- * Forgot signoff on the first patch board/freescale/mpc8536ds/mpc8536ds.c | 16 +++++----------- 1 files changed, 5 insertions(+), 11 deletions(-) diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 5bd20ce..032d732 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -256,14 +256,13 @@ pci_init_board(void) } else { printf (" PCIE3: disabled\n"); } - - } +} #else gur->devdisr |= MPC85xx_DEVDISR_PCIE3; /* disable */ #endif #ifdef CONFIG_PCIE1 - { +{ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; struct pci_controller *hose = &pcie1_hose; int pcie_ep = (host_agent == 5); @@ -315,14 +314,13 @@ pci_init_board(void) } else { printf (" PCIE1: disabled\n"); } - - } +} #else gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */ #endif #ifdef CONFIG_PCIE2 - { +{ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; struct pci_controller *hose = &pcie2_hose; int pcie_ep = (host_agent == 3); @@ -372,13 +370,11 @@ pci_init_board(void) } else { printf (" PCIE2: disabled\n"); } - - } +} #else gur->devdisr |= MPC85xx_DEVDISR_PCIE2; /* disable */ #endif - #ifdef CONFIG_PCI1 { volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR; @@ -391,7 +387,6 @@ pci_init_board(void) uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; /* PORDEVSR[14] */ uint pci_clk_sel = gur->porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; /* PORPLLSR[16] */ - if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %x)\n", (pci_32) ? 32 : 64, @@ -441,7 +436,6 @@ pci_init_board(void) #endif } - int board_early_init_r(void) { const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; -- 1.6.0.6

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[U-Boot] [PATCH] 85xx: Cleanup whitespace in mpc8536ds.c
by Kumar Gala 06 Aug '09

06 Aug '09

--- board/freescale/mpc8536ds/mpc8536ds.c | 16 +++++----------- 1 files changed, 5 insertions(+), 11 deletions(-) diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 5bd20ce..032d732 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -256,14 +256,13 @@ pci_init_board(void) } else { printf (" PCIE3: disabled\n"); } - - } +} #else gur->devdisr |= MPC85xx_DEVDISR_PCIE3; /* disable */ #endif #ifdef CONFIG_PCIE1 - { +{ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; struct pci_controller *hose = &pcie1_hose; int pcie_ep = (host_agent == 5); @@ -315,14 +314,13 @@ pci_init_board(void) } else { printf (" PCIE1: disabled\n"); } - - } +} #else gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */ #endif #ifdef CONFIG_PCIE2 - { +{ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; struct pci_controller *hose = &pcie2_hose; int pcie_ep = (host_agent == 3); @@ -372,13 +370,11 @@ pci_init_board(void) } else { printf (" PCIE2: disabled\n"); } - - } +} #else gur->devdisr |= MPC85xx_DEVDISR_PCIE2; /* disable */ #endif - #ifdef CONFIG_PCI1 { volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR; @@ -391,7 +387,6 @@ pci_init_board(void) uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; /* PORDEVSR[14] */ uint pci_clk_sel = gur->porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; /* PORPLLSR[16] */ - if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %x)\n", (pci_32) ? 32 : 64, @@ -441,7 +436,6 @@ pci_init_board(void) #endif } - int board_early_init_r(void) { const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; -- 1.6.0.6

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[U-Boot] Error :Unknown command 'mmcinit' - try 'help -- need help
by Penda, Naveen Kumar 06 Aug '09

06 Aug '09

Hi All I am trying to get MMC support on omap3_sdp Configuration changes I added are below #define CONFIG_MMC 1 #define CONFIG_OMAP3_MMC 1 //this will pick up the mmc driver for omap3 #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_I2C /* I2C serial bus support */ #define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_SYS_I2C_SPEED 100 #define CONFIG_SYS_I2C_SLAVE 1 #define CFG_I2C_BUS 0 #define CFG_I2C_BUS_SELECT 1 #define CONFIG_DRIVER_OMAP34XX_I2C 1 Once the uboot prompt comes I tried mmcinit command and the result is --> Unknown command 'mmcinit' - try 'help' Can someone suggest me how to enable this command? Regards naveen

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[U-Boot] [U-BOOT] error: end address not on sector boundary when I use saveenv cmd
by Penda, Naveen Kumar 06 Aug '09

06 Aug '09

Hi All When I set all the environment variable and try to save on flash , I am getting Error: end address not on sector boundary. But still my kernel boots with the env setting I made, but on restart these enviroment settings are lost. Can someone let me know where it could have gone wrong? Regards Naveen

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[U-Boot] PATCH - Added support to YANU Nios2 uart
by Renato Andreola 06 Aug '09

06 Aug '09

From 6e15ffc680ca75d5bd3a01fc9010c34637c6ab32 Mon Sep 17 00:00:00 2001 From: Renato Andreola <renato.andreola(a)imagos.it> Date: Thu, 6 Aug 2009 12:28:51 +0200 Subject: [PATCH] Yanu Support for U-Boot with this patch YANU uart support will be added to u-boot. Remember to modify properly your board files for defining physical address etc etc Signed-off-by: Renato Andreola renato.andreola(a)imagos.it --- cpu/nios2/serial.c | 158 +++++++++++++++++++++++++++++++++++++++++++++++++- include/nios2-yanu.h | 119 +++++++++++++++++++++++++++++++++++++ 2 files changed, 276 insertions(+), 1 deletions(-) create mode 100644 include/nios2-yanu.h diff --git a/cpu/nios2/serial.c b/cpu/nios2/serial.c index 8bbb803..e77b2c6 100644 --- a/cpu/nios2/serial.c +++ b/cpu/nios2/serial.c @@ -26,6 +26,8 @@ #include <watchdog.h> #include <asm/io.h> #include <nios2-io.h> +#include <nios2-yanu.h> + DECLARE_GLOBAL_DATA_PTR; @@ -73,11 +75,165 @@ int serial_getc (void) c = val & 0x0ff; return (c); } +/*------------------------------------------------------------------ + * YANU Imagos serial port + *-----------------------------------------------------------------*/ +#elif defined(CONFIG_CONSOLE_YANU) + +static yanu_uart_t *uart = (yanu_uart_t *)CONFIG_SYS_NIOS_CONSOLE; + +#if defined(CONFIG_NIOS_FIXEDBAUD) + +/* Everything's already setup for fixed-baud PTF + * assignment + */ +void serial_setbrg (void) { + int n, k; + const unsigned max_uns = 0xFFFFFFFF; + unsigned best_n, best_m, baud; + + /* compute best N and M couple */ + best_n = YANU_MAX_PRESCALER_N; + for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) + if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n+4)) >= (unsigned)CONFIG_BAUDRATE) { + best_n = n; + break; + } + for (k=0; ; k++) + if ((unsigned)CONFIG_BAUDRATE <= (max_uns >> (15+n-k))) + break; + best_m = ((unsigned)CONFIG_BAUDRATE * (1 << (15+n-k))) / ((unsigned)CONFIG_SYS_CLK_FREQ >> k); + + baud = best_m + best_n * YANU_BAUDE; + writel(&uart->baud, baud); + + return; +} + +#else + +void serial_setbrg (void) +{ + DECLARE_GLOBAL_DATA_PTR; + int n, k; + const unsigned max_uns = 0xFFFFFFFF; + unsigned best_n, best_m, baud; + + /* compute best N and M couple */ + best_n = YANU_MAX_PRESCALER_N; + for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) + if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n+4)) >= gd->baudrate) { + best_n = n; + break; + } + for (k=0; ; k++) + if (gd->baudrate <= (max_uns >> (15+n-k))) + break; + best_m = (gd->baudrate * (1 << (15+n-k))) / ((unsigned)CONFIG_SYS_CLK_FREQ >> k); + + baud = best_m + best_n * YANU_BAUDE; + writel(&uart->baud, baud); + + return; +} + + +#endif /* CFG_NIOS_FIXEDBAUD */ + +int serial_init (void) +{ + unsigned action,control; + + /* status register cleanup */ + action = YANU_ACTION_RRRDY | + YANU_ACTION_RTRDY | + YANU_ACTION_ROE | + YANU_ACTION_RBRK | + YANU_ACTION_RFE | + YANU_ACTION_RPE | + YANU_ACTION_RFE | + YANU_ACTION_RFIFO_CLEAR | + YANU_ACTION_TFIFO_CLEAR; + + writel(&uart->action, action); + + /* control register cleanup */ + /* no interrupts enabled */ + /* one stop bit */ + /* hardware flow control disabled */ + /* 8 bits */ + control = (0x7 << YANU_CONTROL_BITS_POS); + /* enven parity just to be clean */ + control |= YANU_CONTROL_PAREVEN; + /* we set threshold for fifo */ + control |= YANU_CONTROL_RDYDLY * YANU_RXFIFO_DLY; + control |= YANU_CONTROL_TXTHR * YANU_TXFIFO_THR; + + writel(&uart->control, control); + + /* to set baud rate */ + serial_setbrg(); + + return (0); +} + + +/*----------------------------------------------------------------------- + * YANU CONSOLE + *---------------------------------------------------------------------*/ +void serial_putc (char c) +{ + int tx_chars; + unsigned status; + + if (c == '\n') + serial_putc ('\r'); + + while (1) + { + status = readl(&uart->status); + tx_chars = (status>>YANU_TFIFO_CHARS_POS) & ((1<<YANU_TFIFO_CHARS_N)-1); + if (tx_chars < YANU_TXFIFO_SIZE-1) + break; + WATCHDOG_RESET (); + } + + writel(&uart->data, (unsigned char)c); +} + +void serial_puts (const char *s) +{ + while (*s != 0) { + serial_putc (*s++); + } +} + + +int serial_tstc(void) +{ + unsigned status ; + + status = readl(&uart->status); + return(((status>>YANU_RFIFO_CHARS_POS) & ((1<<YANU_RFIFO_CHARS_N)-1)) > 0); +} + + +int serial_getc (void) +{ + while (serial_tstc() == 0) + WATCHDOG_RESET (); + + /* first we pull the char */ + writel(&uart->action, YANU_ACTION_RFIFO_PULL); + + return(readl(&uart->data) & YANU_DATA_CHAR_MASK); +} + +#else /*------------------------------------------------------------------ * UART the serial port *-----------------------------------------------------------------*/ -#else static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE; diff --git a/include/nios2-yanu.h b/include/nios2-yanu.h new file mode 100644 index 0000000..c560ced --- /dev/null +++ b/include/nios2-yanu.h @@ -0,0 +1,119 @@ +/* + * (C) Copyright 2006, Imagos S.a.s <www.imagos.it> + * Cristiano Ghirardi <cristiano.ghirardi(a)imagos.it> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/************************************************************************* + * Altera NiosII YANU serial interface by Imagos + ************************************************************************/ + +#ifndef __NIOS2_YANU_H__ +#define __NIOS2_YANU_H__ + +#define YANU_MAX_PRESCALER_N ((1 << 4) - 1) /* 15 */ +#define YANU_MAX_PRESCALER_M ((1 << 11) -1) /* 2047 */ +#define YANU_FIFO_SIZE (16) +#define YANU_RXFIFO_SIZE (YANU_FIFO_SIZE) +#define YANU_TXFIFO_SIZE (YANU_FIFO_SIZE) + +#define YANU_RXFIFO_DLY (10*11) +#define YANU_TXFIFO_THR (10) +#define YANU_DATA_CHAR_MASK (0xFF) + +/* data register */ +#define YANU_DATA_OFFSET (0) /* data register offset */ + +#define YANU_CONTROL_OFFSET (4) /* control register offset */ +/* interrupt enable */ +#define YANU_CONTROL_IE_RRDY (1<<0) /* ie on received character ready */ +#define YANU_CONTROL_IE_OE (1<<1) /* ie on rx overrun */ +#define YANU_CONTROL_IE_BRK (1<<2) /* ie on break detect */ +#define YANU_CONTROL_IE_FE (1<<3) /* ie on framing error */ +#define YANU_CONTROL_IE_PE (1<<4) /* ie on parity error */ +#define YANU_CONTROL_IE_TRDY (1<<5) /* ie interrupt on tranmitter ready */ +/* control bits */ +#define YANU_CONTROL_BITS_POS (6) /* bits number pos */ +#define YANU_CONTROL_BITS (1<<YANU_CONTROL_BITS_POS) /* number of rx/tx bits per word. 3 bit unsigned integer */ +#define YANU_CONTROL_BITS_N (3) /* ... its bit filed length */ +#define YANU_CONTROL_PARENA (1<<9) /* enable parity bit transmission/reception */ +#define YANU_CONTROL_PAREVEN (1<<10) /* parity even */ +#define YANU_CONTROL_STOPS (1<<11) /* number of stop bits */ +#define YANU_CONTROL_HHENA (1<<12) /* Harware Handshake enable... */ +#define YANU_CONTROL_FORCEBRK (1<<13) /* if set than txd = active (0) */ +/* tuning part */ +#define YANU_CONTROL_RDYDLY (1<<14) /* delay from "first" before setting rrdy (in bit) */ +#define YANU_CONTROL_RDYDLY_N (8) /* ... its bit filed length */ +#define YANU_CONTROL_TXTHR (1<<22) /* tx interrupt threshold: the trdy set if txfifo_chars<= txthr (chars) */ +#define YANU_CONTROL_TXTHR_N (4) /* ... its bit field length */ + + +#define YANU_BAUD_OFFSET (8) /* baud register offset */ +#define YANU_BAUDM (1<<0) /* baud mantissa lsb */ +#define YANU_BAUDM_N (12) /* ...its bit filed length */ +#define YANU_BAUDE (1<<12) /* baud exponent lsb */ +#define YANU_BAUDE_N (4) /* ...its bit field length */ + +#define YANU_ACTION_OFFSET (12) /* action register... write only */ +#define YANU_ACTION_RRRDY (1<<0) /* reset rrdy */ +#define YANU_ACTION_ROE (1<<1) /* reset oe */ +#define YANU_ACTION_RBRK (1<<2) /* reset brk */ +#define YANU_ACTION_RFE (1<<3) /* reset fe */ +#define YANU_ACTION_RPE (1<<4) /* reset pe */ +#define YANU_ACTION_SRRDY (1<<5) /* set rrdy */ +#define YANU_ACTION_SOE (1<<6) /* set oe */ +#define YANU_ACTION_SBRK (1<<7) /* set brk */ +#define YANU_ACTION_SFE (1<<8) /* set fe */ +#define YANU_ACTION_SPE (1<<9) /* set pe */ +#define YANU_ACTION_RFIFO_PULL (1<<10) /* pull a char from rx fifo we MUST do it before taking a char */ +#define YANU_ACTION_RFIFO_CLEAR (1<<11) /* clear rx fifo */ +#define YANU_ACTION_TFIFO_CLEAR (1<<12) /* clear tx fifo */ +#define YANU_ACTION_RTRDY (1<<13) /* clear trdy */ +#define YANU_ACTION_STRDY (1<<14) /* set trdy */ + +#define YANU_STATUS_OFFSET (16) +#define YANU_STATUS_RRDY (1<<0) /* rxrdy flag */ +#define YANU_STATUS_TRDY (1<<1) /* txrdy flag */ +#define YANU_STATUS_OE (1<<2) /* rx overrun error */ +#define YANU_STATUS_BRK (1<<3) /* rx break detect flag */ +#define YANU_STATUS_FE (1<<4) /* rx framing error flag */ +#define YANU_STATUS_PE (1<<5) /* rx parity erro flag */ +#define YANU_RFIFO_CHARS_POS (6) +#define YANU_RFIFO_CHARS (1<<RFIFO_CHAR_POS) /* number of chars into rx fifo */ +#define YANU_RFIFO_CHARS_N (5) /* ...its bit field length: 32 chars */ +#define YANU_TFIFO_CHARS_POS (11) +#define YANU_TFIFO_CHARS (1<<TFIFO_CHAR_POS) /* number of chars into tx fifo */ +#define YANU_TFIFO_CHARS_N (5) /* ...its bit field length: 32 chars */ + +typedef volatile struct yanu_uart_t { + volatile unsigned data; +/* control register (RW) 32-bit */ + volatile unsigned control; +/* baud/prescaler register (RW) 32-bit */ + volatile unsigned baud; +/* action register (W) 32-bit */ + volatile unsigned action; +/* status register (R) 32-bit */ + volatile unsigned status; +/* magic register (R) 32-bit */ + volatile unsigned magic; +} yanu_uart_t; + +#endif -- 1.5.5

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Re: [U-Boot] PATCH mtd CFI flash: timeout calculation underflow if imprecise 1kHz timer: fix
by Wolfgang Denk 06 Aug '09

06 Aug '09

Dear Renato Andreola, In message <4A7AB614.2020509(a)imagos.it> you wrote: > <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> > <html> > <head> Please NEVER post HTML here!! > I agree with Wolfgang Denk in not using the LL type (too > compiler/library/machine dependent).<br> > I think that the code of Alessandro Rubini that makes the runtime > decision using no extra macro definition is more system independent and This is no extra macro definition. This macro is available by default (defined in include/common.h). > keeps a small 1% residual error when CFG_HZ is just above 100000.<br> Keep in mind that systems with CONFIG_SYS_HZ != 1000 are considered broken anyway. As little effort as possible should be spent to support these - efforts should rather be focussed on fixing these systems. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de A meeting is an event at which the minutes are kept and the hours are lost.

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[U-Boot] PATCH mtd CFI flash: timeout calculation underflow if imprecise 1kHz timer: fix
by Renato Andreola 06 Aug '09

06 Aug '09

From be54cb97ca26bcbbc1a908d1f2a5447b6639dc59 Mon Sep 17 00:00:00 2001 From: Renato Andreola <renato.andreola(a)imagos.it> Date: Thu, 6 Aug 2009 11:40:52 +0200 Subject: [PATCH] drivers/mtd/cfi_flash: precision and underflow problem in tout calculation With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000 solved using an unsigned long long Signed-off-by: Renato Andreola renato.andreola(a)imagos.it --- drivers/mtd/cfi_flash.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 81ac5d3..6bcd102 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -659,8 +659,10 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, { ulong start; -#if CONFIG_SYS_HZ != 1000 - tout *= CONFIG_SYS_HZ/1000; +#if CONFIG_SYS_HZ != 1000 + unsigned long long ull; + ull = tout*CONFIG_SYS_HZ + CONFIG_SYS_HZ/2; + tout = ull/1000; /* Compute: tout *= CONFIG_SYS_HZ/1000; */ #endif /* Wait for command completion */ -- 1.5.5

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