August 2009 - U-Boot

Re: [U-Boot] ext2fs.c/ext2fs_mount() fails when inode_size = 256
by Wolfgang Denk 14 Aug '09

14 Aug '09

Dear Bob Furber, please keep the mailing list on cc: In message <4A832C44.3060503(a)steroidmicros.com> you wrote: > > > You failed to mention some really important fects, like for example > > which version of U-Boot you are using. > > ftp://ftp.denx.de/pub/u-boot/ --> u-boot-2009.08-rc2.tar.bz2, which > appeared to be the most recent relrase. Indeed. > > This commit most probably fixes your issue: > > > > commit 56fdaadc124a8ef9ec0fd8ff578233ec3b1137be > > Author: Weirich, Bernhard <Bernhard.Weirich(a)riedel.net> > > Date: Wed Jun 10 14:00:37 2009 +0200 > > > > ext2: fix inode size and calculations > > > > Signed-off-by: unsik Kim <donari75(a)gmail.com> > > Signed-off-by: Bernhard Weirich <bernhard.weirich(a)riedel.net> > > Signed-off-by: Wolfgang Denk <wd(a)denx.de> > > Tested-by: Wolfgang Denk <wd(a)denx.de> > > > > Forgive me, but I am new at this and I have no idea how to locate > "commit 56fdaadc124a8ef9ec0fd8ff578233ec3b1137be". You can use for example "git show" in your U-Boot git repository. In worst case, you can search the CHANGELOG. Anyway - commit 56fdaadc is: -> git-describe 56fdaadc v2009.08-rc1-1-g56fdaad so it's the first commit after v2009.08-rc1 and thus included in v2009.08-rc2. If this doesn't work for you, I'd be interested in receiving a test case, i. e. a minimal (as small as possible) file system image that shows the erroneous behaviour. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de I don't mind criticism. You know me. I've never been one to take offence at criticism. No one could say I'm the sort to take offence at criticism -- Not twice, anyway. Not without blowing bubbles. - Terry Pratchett, _Witches Abroad_

2 3

[U-Boot] [PATCH] Add support to mkconfig for setting simple #defines in config.h
by Kumar Gala 14 Aug '09

14 Aug '09

To simplify the top level makefile it useful to be able to set some #defines in config.h to express different configurations. Added a -D option that allows us to replace: MPC8536DS_36BIT_config \ MPC8536DS_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h @$(MKCONFIG) -a MPC8536DS ppc mpc85xx mpc8536ds freescale with: MPC8536DS_36BIT_config \ MPC8536DS_config: unconfig @$(MKCONFIG) -D $(@:_config=)=1 MPC8536DS ppc mpc85xx mpc8536ds freescale Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- mkconfig | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/mkconfig b/mkconfig index b0bbbd1..8d778e5 100755 --- a/mkconfig +++ b/mkconfig @@ -10,12 +10,14 @@ APPEND=no # Default: Create new config file BOARD_NAME="" # Name to print in make output +DEFINES="" while [ $# -gt 0 ] ; do case "$1" in --) shift ; break ;; -a) shift ; APPEND=yes ;; -n) shift ; BOARD_NAME="${1%%_config}" ; shift ;; + -D) shift ; DEFINES="#define ${1/=/\t}\n"${DEFINES} ; shift ;; *) break ;; esac done @@ -84,5 +86,7 @@ fi echo "/* Automatically generated - do not edit */" >>config.h echo "#include <configs/$1.h>" >>config.h echo "#include <asm/config.h>" >>config.h +echo -e ${DEFINES} >> config.h + exit 0 -- 1.6.0.6

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[U-Boot] [PATCH V4] Add support for the galaxy5200
by Eric Millbrandt 13 Aug '09

13 Aug '09

Add support for the DEKA Research and Development galaxy5200 board The galaxy5200 is an Freescale mpc5200 based embedded industrial control board. Signed-off-by: Eric Millbrandt <emillbrandt(a)dekaresearch.com> --- Changes since v1: - Amended with comments from Wolfgang - Make change to top level makefile per Wolfgang's suggestion. Changes since v2: - Defined additional chip select region. Changes since v3: - Fixed up patch title and commit message per Peter's suggestion. MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 6 + board/galaxy5200/Makefile | 50 +++++ board/galaxy5200/config.mk | 45 +++++ board/galaxy5200/galaxy5200.c | 199 +++++++++++++++++++ include/configs/galaxy5200.h | 428 +++++++++++++++++++++++++++++++++++++++++ 7 files changed, 733 insertions(+), 0 deletions(-) create mode 100644 board/galaxy5200/Makefile create mode 100644 board/galaxy5200/config.mk create mode 100644 board/galaxy5200/galaxy5200.c create mode 100644 include/configs/galaxy5200.h diff --git a/MAINTAINERS b/MAINTAINERS index 620604c..85ba8d2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -616,6 +616,10 @@ David M smdk2410 ARM920T VCMA9 ARM920T +Eric Millbrandt <emillbrandt(a)dekaresearch.com> + + galaxy5200 mpc5200 + Rolf Offermanns <rof(a)sysgo.de> shannon SA1100 diff --git a/MAKEALL b/MAKEALL index edebaea..65cd6d0 100755 --- a/MAKEALL +++ b/MAKEALL @@ -50,6 +50,7 @@ LIST_5xxx=" \ digsy_mtc \ EVAL5200 \ fo300 \ + galaxy5200 \ icecube_5100 \ icecube_5200 \ inka4x0 \ diff --git a/Makefile b/Makefile index 329e0f5..569549c 100644 --- a/Makefile +++ b/Makefile @@ -531,6 +531,12 @@ digsy_mtc_RAMBOOT_config: unconfig } @$(MKCONFIG) -a digsy_mtc ppc mpc5xxx digsy_mtc +galaxy5200_LOWBOOT_config \ +galaxy5200_config: unconfig + @mkdir -p $(obj)include + @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h + @$(MKCONFIG) -a galaxy5200 ppc mpc5xxx galaxy5200 + hmi1001_config: unconfig @$(MKCONFIG) hmi1001 ppc mpc5xxx hmi1001 diff --git a/board/galaxy5200/Makefile b/board/galaxy5200/Makefile new file mode 100644 index 0000000..22ce8e6 --- /dev/null +++ b/board/galaxy5200/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2003-2007 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/galaxy5200/config.mk b/board/galaxy5200/config.mk new file mode 100644 index 0000000..c6398b2 --- /dev/null +++ b/board/galaxy5200/config.mk @@ -0,0 +1,45 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# galaxy5200 board: +# +# Valid values for TEXT_BASE are: +# +# 0xFFF00000 boot high (standard configuration) +# 0xFE000000 boot low +# 0x00100000 boot from RAM (for testing only) does not work +# + +sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp + +ifdef CONFIG_galaxy5200_LOWBOOT +TEXT_BASE = 0xFE000000 +endif + +ifndef TEXT_BASE +## Standard: boot high +TEXT_BASE = 0xFFF00000 +endif + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/galaxy5200/galaxy5200.c b/board/galaxy5200/galaxy5200.c new file mode 100644 index 0000000..5aa9d3a --- /dev/null +++ b/board/galaxy5200/galaxy5200.c @@ -0,0 +1,199 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas(a)motorola.com. + * + * (C) Copyright 2006 + * Eric Schumann, Phytec Messtechnik GmbH + * + * (C) Copyright 2009 + * Eric Millbrandt, DEKA Research and Development Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc5xxx.h> +#include <pci.h> +#include <asm-ppc/io.h> + +#ifndef CONFIG_SYS_RAMBOOT +static void sdram_start(int hi_addr) +{ + volatile struct mpc5xxx_cdm *cdm = + (struct mpc5xxx_cdm *)MPC5XXX_CDM; + volatile struct mpc5xxx_sdram *sdram = + (struct mpc5xxx_sdram *)MPC5XXX_SDRAM; + + long hi_addr_bit = hi_addr ? 0x01000000 : 0; + + /* unlock mode register */ + out_be32 (&sdram->ctrl, + (SDRAM_CONTROL | 0x80000000 | hi_addr_bit)); + + /* precharge all banks */ + out_be32 (&sdram->ctrl, + (SDRAM_CONTROL | 0x80000002 | hi_addr_bit)); + +#ifdef SDRAM_DDR + /* set mode register: extended mode */ + out_be32 (&sdram->mode, (SDRAM_EMODE)); + + /* set mode register: reset DLL */ + out_be32 (&sdram->mode, (SDRAM_MODE | 0x04000000)); +#endif + + /* precharge all banks */ + out_be32 (&sdram->ctrl, + (SDRAM_CONTROL | 0x80000002 | hi_addr_bit)); + + /* auto refresh */ + out_be32 (&sdram->ctrl, + (SDRAM_CONTROL | 0x80000004 | hi_addr_bit)); + + /* set mode register */ + out_be32 (&sdram->mode, (SDRAM_MODE)); + + /* normal operation */ + out_be32 (&sdram->ctrl, + (SDRAM_CONTROL | hi_addr_bit)); + + /* set CDM clock enable register, set MPC5200B SDRAM bus */ + /* to reduced driver strength */ + out_be32 (&cdm->clock_enable, (0x00CFFFFF)); +} +#endif + +/* + * ATTENTION: Although partially referenced initdram does NOT make + * real use of CONFIG_SYS_SDRAM_BASE. The code does not + * work if CONFIG_SYS_SDRAM_BASE + * is something else than 0x00000000. + */ + +phys_size_t initdram(int board_type) +{ + volatile struct mpc5xxx_mmap_ctl *mm = + (struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR; + volatile struct mpc5xxx_sdram *sdram = + (struct mpc5xxx_sdram *)MPC5XXX_SDRAM; + ulong dramsize = 0; + ulong dramsize2 = 0; +#ifndef CONFIG_SYS_RAMBOOT + ulong test1, test2; + + /* setup SDRAM chip selects */ + /* 256MB at 0x0 */ + out_be32 (&mm->sdram0, 0x0000001b); + /* disabled */ + out_be32 (&mm->sdram1, 0x10000000); + + /* setup config registers */ + out_be32 (&sdram->config1, SDRAM_CONFIG1); + out_be32 (&sdram->config2, SDRAM_CONFIG2); + + /* find RAM size using SDRAM CS0 only */ + sdram_start(0); + test1 = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE, 0x10000000); + sdram_start(1); + test2 = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE, 0x10000000); + if (test1 > test2) { + sdram_start(0); + dramsize = test1; + } else + dramsize = test2; + + /* memory smaller than 1MB is impossible */ + if (dramsize < (1 << 20)) + dramsize = 0; + + /* set SDRAM CS0 size according to the amount of RAM found */ + if (dramsize > 0) { + out_be32 (&mm->sdram0, + (0x13 + __builtin_ffs(dramsize >> 20) - 1)); + } else { + /* disabled */ + out_be32 (&mm->sdram0, 0); + } + +#else /* CONFIG_SYS_RAMBOOT */ + + /* retrieve size of memory connected to SDRAM CS0 */ + dramsize = in_be32(&mm->sdram0) & 0xFF; + if (dramsize >= 0x13) + dramsize = (1 << (dramsize - 0x13)) << 20; + else + dramsize = 0; + + /* retrieve size of memory connected to SDRAM CS1 */ + dramsize2 = in_be32(&mm->sdram1) & 0xFF; + if (dramsize2 >= 0x13) + dramsize2 = (1 << (dramsize2 - 0x13)) << 20; + else + dramsize2 = 0; + +#endif /* CONFIG_SYS_RAMBOOT */ + + return dramsize + dramsize2; +} + +int checkboard(void) +{ + puts("Board: galaxy5200\n"); + return 0; +} + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t * bd) +{ + ft_cpu_setup(blob, bd); +} +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ + +#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) + +void init_ide_reset (void) +{ + volatile struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)MPC5XXX_GPT; + debug ("init_ide_reset\n"); + + /* Configure TIMER_5 as GPIO output for ATA reset */ + /* Deassert reset */ + gpt[5].emsr = MPC5XXX_GPT_GPIO_OUT1 | MPC5XXX_GPT_TMS_GPIO; +} + +void ide_set_reset (int idereset) +{ + volatile struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)MPC5XXX_GPT; + debug ("ide_reset(%d)\n", idereset); + + /* Configure TIMER_5 as GPIO output for ATA reset */ + if (idereset) { + gpt[5].emsr = MPC5XXX_GPT_GPIO_OUT0 | MPC5XXX_GPT_TMS_GPIO; + + /* Make a delay. MPC5200 spec says 25 usec min */ + udelay(50); + } else { + gpt[5].emsr = MPC5XXX_GPT_GPIO_OUT1 | MPC5XXX_GPT_TMS_GPIO; + udelay(50); + } +} +#endif /* defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) */ diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h new file mode 100644 index 0000000..8f7deb8 --- /dev/null +++ b/include/configs/galaxy5200.h @@ -0,0 +1,428 @@ +/* + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2006 + * Eric Schumann, Phytec Messatechnik GmbH + * + * (C) Copyright 2009 + * Jon Smirl <jonsmirl(a)gmail.com> + * + * (C) Copyright 2009 + * Eric Millbrandt, DEKA Research and Development Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_BOARDINFO "galaxy5200" + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ +#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +/* + * Serial console configuration + */ +#define CONFIG_PSC_CONSOLE 4 /* console is on PSC4 -> */ + /* define gps port conf. */ + /* register later on to */ + /* enable UART function! */ +#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_I2C +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_NFS +#define CONFIG_CMD_SNTP +#define CONFIG_CMD_PING +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_USB +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_FAT + +#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ + +#if (TEXT_BASE == 0xFE000000) /* Boot low */ +#define CONFIG_SYS_LOWBOOT 1 +#endif +/* RAMBOOT will be defined automatically in memory section */ + +#define MTDIDS_DEFAULT "nor0=physmap-flash.0" +#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:256k(ubootl)," \ + "1792k(kernel),13312k(jffs2),256k(uboot)ro,256k(oftree),-(space)" + +/* + * Autobooting + */ +#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ +#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow stopping of boot process */ + /* even with bootdelay=0 */ +#undef CONFIG_BOOTARGS + +#define CONFIG_PREBOOT "echo;" \ + "echo Welcome to U-Boot"\ + "echo" + +/* + * IPB Bus clocking configuration. + */ +#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ +#define CONFIG_SYS_XLB_PIPELINING 1 + +/* + * I2C configuration + */ +#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ +#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */ +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ +#define CONFIG_SYS_I2C_SLAVE 0x7F + +/* + * EEPROM CAT24WC32 configuration + */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010100x */ +#define CONFIG_SYS_I2C_FACT_ADDR 0x52 /* EEPROM CAT24WC32 */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ +#define CONFIG_SYS_EEPROM_SIZE 4096 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 15 + +/* + * RTC configuration + */ +#define RTC +#define CONFIG_RTC_DS3231 1 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 + +/* + * Flash configuration + */ + +#define CONFIG_SYS_FLASH_BASE 0xfe000000 +/* + * The flash size is autoconfigured, but cpu/mpc5xxx/cpu_init.c needs this + * variable defined + */ +#define CONFIG_SYS_FLASH_SIZE 0x02000000 +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } + +#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ +#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */ +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max num of sects on one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */ + /* (= chip selects) */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE + +/* + * Use hardware protection. This seems required, as the BDI uses hardware + * protection. Without this, U-Boot can't work with this sectors as its + * protection is software only by default. + */ +#define CONFIG_SYS_FLASH_PROTECTION 1 + +/* + * Environment settings + */ + +#define CONFIG_ENV_IS_IN_EEPROM 1 +#define CONFIG_ENV_OFFSET 0x00 /* environment starts at the */ + /* beginning of the EEPROM */ +#define CONFIG_ENV_SIZE CONFIG_SYS_EEPROM_SIZE + +#define CONFIG_ENV_OVERWRITE 1 + +/* + * SDRAM configuration + */ +#define SDRAM_DDR 1 +#define SDRAM_MODE 0x018D0000 +#define SDRAM_EMODE 0x40090000 +#define SDRAM_CONTROL 0x71500F00 +#define SDRAM_CONFIG1 0x73711930 +#define SDRAM_CONFIG2 0x47770000 + +/* + * Memory map + */ +#define CONFIG_SYS_MBAR 0xF0000000 /* MBAR has to be switched by other */ + /* bootloader or debugger config */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 + +/* Use SRAM until RAM will be available */ +#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM + +/* End of used area in SPRAM */ +#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE + +/* Size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ + CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) +# define CONFIG_SYS_RAMBOOT 1 +#endif + +#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ +#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +/* Chip Select configuration for NAND flash */ +#define CONFIG_SYS_CS1_START 0x20000000 +#define CONFIG_SYS_CS1_SIZE 0x90000 +#define CONFIG_SYS_CS1_CFG 0x0002d900 + +/* + * Ethernet configuration + */ +#define CONFIG_MPC5xxx_FEC 1 +#define CONFIG_MPC5xxx_FEC_MII100 +#define CONFIG_PHY_ADDR 0x01 +#define CONFIG_NO_AUTOLOAD 1 + +/* + * GPIO configuration + * + * GPS port configuration + * + * [29:31] = 01x + * AC97 on PSC1 + * PSC1_0 -> AC97 SDATA out + * PSC1_1 -> AC97 SDTA in + * PSC1_2 -> AC97 SYNC out + * PSC1_3 -> AC97 bitclock out + * PSC1_4 -> AC97 reset out + * + * [28] = Reserved + * + * [25:27] = 110 + * SPI on PSC2 + * PSC2_0 -> MOSI + * PSC2_1 -> MISO + * PSC2_2 -> n/a + * PSC2_3 -> CLK + * PSC2_4 -> SS + * + * [24] = Reserved + * + * [20:23] = 0001 + * USB on PSC3 + * PSC3_0 -> USB_OE OE out + * PSC3_1 -> USB_TXN Tx- out + * PSC3_2 -> USB_TXP Tx+ out + * PSC3_3 -> USB_TXD + * PSC3_4 -> USB_RXP Rx+ in + * PSC3_5 -> USB_RXN Rx- in + * PSC3_6 -> USB_PWR PortPower out + * PSC3_7 -> USB_SPEED speed out + * PSC3_8 -> USB_SUSPEND suspend + * PSC3_9 -> USB_OVRCURNT overcurrent in + * + * [18:19] = 10 + * Two UARTs + * + * [17] = 0 + * USB differential mode + * + * [16] = 1 + * PCI disabled + * + * [12:15] = 0101 + * Ethernet 100Mbit with MD + * ETH_0 -> ETH Txen + * ETH_1 -> ETH TxD0 + * ETH_2 -> ETH TxD1 + * ETH_3 -> ETH TxD2 + * ETH_4 -> ETH TxD3 + * ETH_5 -> ETH Txerr + * ETH_6 -> ETH MDC + * ETH_7 -> ETH MDIO + * ETH_8 -> ETH RxDv + * ETH_9 -> ETH RxCLK + * ETH_10 -> ETH Collision + * ETH_11 -> ETH TxD + * ETH_12 -> ETH RxD0 + * ETH_13 -> ETH RxD1 + * ETH_14 -> ETH RxD2 + * ETH_15 -> ETH RxD3 + * ETH_16 -> ETH Rxerr + * ETH_17 -> ETH CRS + * + * [9:11] = 111 + * SPI on PSC6 + * PSC6_0 -> MISO + * PSC6_1 -> SS# + * PSC6_2 -> MOSI + * PSC6_3 -> CLK + * + * [8] = 0 + * IrDA/USB 48MHz clock generated internally + * + * [6:7] = 01 + * ATA chip selects on csb_4/5 + * CSB_4 -> ATA_CS0 out + * CSB_5 -> ATA_CS1 out + * + * [5] = 1 + * PSC3_4 is used as CS6 + * + * [4] = 1 + * PSC3_5 is used as CS7 + * + * [2:3] = 00 + * No Alternatives + * + * [1] = 0 + * gpio_wkup_7 is GPIO + * + * [0] = 0 + * gpio_wkup_6 is GPIO + * + */ +#define CONFIG_SYS_GPS_PORT_CONFIG 0x0d75a162 + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "uboot> " /* Monitor Command Prompt */ + +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ + +#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ +#endif + +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#endif +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) + /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ + +#define CONFIG_DISPLAY_BOARDINFO 1 + +#define CONFIG_SYS_HUSH_PARSER 1 +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +#define CONFIG_CRC32_VERIFY 1 + +#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \ + CONFIG_BOOTP_DNS | \ + CONFIG_BOOTP_DNS2 | \ + CONFIG_BOOTP_SEND_HOSTNAME ) + +/* + * Various low-level settings + */ +#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI +#define CONFIG_SYS_HID0_FINAL HID0_ICE + +/* no burst access on the LPB */ +#define CONFIG_SYS_CS_BURST 0x00000000 +/* one deadcycle for the 33MHz statemachine */ +#define CONFIG_SYS_CS_DEADCYCLE 0x33333331 + +#define CONFIG_SYS_BOOTCS_CFG 0x0002d900 +#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE + +#define CONFIG_SYS_RESET_ADDRESS 0xff000000 + +/* + * USB settings + */ +#define CONFIG_USB_CLOCK 0x0001bbbb +/* USB is on PSC3 */ +#define CONFIG_PSC3_USB +#define CONFIG_USB_CONFIG 0x00000100 +#define CONFIG_USB_OHCI +#define CONFIG_USB_STORAGE + +/* + * IDE/ATA stuff Supports IDE harddisk + */ +#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ +#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ +#undef CONFIG_IDE_LED /* LED for ide not supported */ + +#define CONFIG_IDE_RESET 1 /* reset for ide supported */ +#define CONFIG_IDE_PREINIT +#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ +#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */ +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 +#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA +/* Offset for data I/O */ +#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060) +/* Offset for normal register accesses */ +#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET) +/* Offset for alternate registers */ +#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C) +/* Interval between registers */ +#define CONFIG_SYS_ATA_STRIDE 4 +#define CONFIG_ATAPI 1 + +/* we enable IDE and FAT support, so we also need partition support */ +#define CONFIG_DOS_PARTITION 1 + +/* + * Open Firmware flat tree + */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#define OF_CPU "PowerPC,5200@0" +#define OF_TBCLK CONFIG_SYS_MPC5XXX_CLKIN +#define OF_SOC "soc5200@f0000000" +#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2600" + +#endif /* __CONFIG_H */ -- 1.6.3.1

3 2

[U-Boot] [PATCH] mx31ads: update board configuration
by Wolfgang Denk 13 Aug '09

13 Aug '09

Bring default environment more in line with other boards; fix address range for "mtest" command. Signed-off-by: Wolfgang Denk <wd(a)denx.de> Cc: Guennadi Liakhovetski <lg(a)denx.de> --- include/configs/mx31ads.h | 62 ++++++++++++++++++++++++++------------------- 1 files changed, 36 insertions(+), 26 deletions(-) diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index 363ea1b..e6c02c8 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -56,7 +56,6 @@ /* * Hardware drivers */ - #define CONFIG_MXC_UART 1 #define CONFIG_SYS_MX31_UART1 1 @@ -87,27 +86,38 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_DATE -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 5 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ - "uboot_addr=0xa0000000\0" \ - "uboot=mx31ads/u-boot.bin\0" \ + "u-boot_addr=0xa0000000\0" \ + "u-boot=mx31ads/u-boot.bin\0" \ + "load=tftp ${loadaddr} ${u-boot}\0" \ + "update=prot off ${u-boot_addr} +${filesize};" \ + "era ${u-boot_addr} +${filesize};" \ + "cp.b ${loadaddr} ${u-boot_addr} ${filesize};" \ + "sete filesize;sete fileaddr;save\0" \ "kernel=mx31ads/uImage\0" \ - "nfsroot=/opt/eldk/arm\0" \ - "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ - "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "bootcmd=run bootcmd_net\0" \ - "bootcmd_net=run bootargs_base bootargs_nfs; " \ - "tftpboot ${loadaddr} ${kernel}; bootm\0" \ - "prg_uboot=tftpboot ${loadaddr} ${uboot}; " \ - "protect off ${uboot_addr} 0xa003ffff; " \ - "erase ${uboot_addr} 0xa003ffff; " \ - "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \ - "setenv filesize; saveenv\0" + "rootpath=/opt/eldk/armVFP\0" \ + "netdev=eth0\0" \ + "consdev=ttymxc0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off\0" \ + "addcons=setenv bootargs ${bootargs} " \ + "console=${consdev},${baudrate}\0" \ + "flash_nfs=run nfsargs addip addcons;" \ + "bootm ${kernel_addr}\0" \ + "flash_self=run ramargs addip addcons;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "net_nfs=tftp 200000 ${bootfile};" \ + "run nfsargs addip addcons;bootm\0" \ + "bootcmd=run net_nfs\0" #define CONFIG_DRIVER_CS8900 1 #define CS8900_BASE 0xb4020300 @@ -128,20 +138,20 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ /* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x10000 +#define CONFIG_SYS_MEMTEST_START 0x80010000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x87C00000 /* start+64k ... end-4MB */ -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING 1 -- 1.6.0.6

2 1

[U-Boot] Add md5sum and sha1 commands...
by Robin Getz 13 Aug '09

13 Aug '09

From: Robin Getz <rgetz(a)blackfin.uclinux.org> Now that we have sha1 and md5 in lib_generic, allow people to use them on the command line, for checking downloaded files Signed-off-by: Robin Getz <rgetz(a)analog.com> README | 4 ++ common/cmd_mem.c | 73 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 77 insertions(+) --- diff --git a/README b/README index 9071472..cf3867d 100644 --- a/README +++ b/README @@ -629,6 +629,8 @@ The following options need to be configured: CONFIG_CMD_KGDB * kgdb CONFIG_CMD_LOADB loadb CONFIG_CMD_LOADS loads + CONFIG_CMD_MD5SUM print md5 message digest + (requires CONFIG_CMD_MEMORY and CONFIG_MD5) CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base, loop, loopw, mtest CONFIG_CMD_MISC Misc functions like sleep etc @@ -652,6 +654,8 @@ The following options need to be configured: (requires CONFIG_CMD_I2C) CONFIG_CMD_SETGETDCR Support for DCR Register access (4xx only) + CONFIG_CMD_SHA1 print sha1 memory digest + (requires CONFIG_CMD_MEMORY) CONFIG_CMD_SOURCE "source" command Support CONFIG_CMD_SPI * SPI serial bus support CONFIG_CMD_USB * USB support diff --git a/common/cmd_mem.c b/common/cmd_mem.c index cdf8c79..ac2492c 100644 --- a/common/cmd_mem.c +++ b/common/cmd_mem.c @@ -34,6 +34,14 @@ #endif #include <watchdog.h> +#ifdef CONFIG_CMD_MD5SUM +#include <u-boot/md5.h> +#endif + +#ifdef CONFIG_CMD_SHA1 +#include <sha1.h> +#endif + #ifdef CMD_MEM_DEBUG #define PRINTF(fmt,args...) printf (fmt ,##args) #else @@ -1141,6 +1149,55 @@ int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } #endif /* CONFIG_CRC32_VERIFY */ +#ifdef CONFIG_CMD_MD5SUM +int do_md5sum(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + unsigned long addr, len; + unsigned int i; + u8 output[16]; + + if (argc < 3) { + cmd_usage(cmdtp); + return 1; + } + + addr = simple_strtoul(argv[1], NULL, 16); + len = simple_strtoul(argv[2], NULL, 16); + + md5((unsigned char *) addr, len, output); + printf("md5 for %08lx ... %08lx ==> ", addr, addr + len - 1); + for (i = 0; i < 16 ; i++) + printf("%02x", output[i]); + printf("\n"); + + return 0; +} +#endif + +#ifdef CONFIG_CMD_SHA1 +int do_sha1(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + unsigned long addr, len; + unsigned int i; + u8 output[20]; + + if (argc < 3) { + cmd_usage(cmdtp); + return 1; + } + + addr = simple_strtoul(argv[1], NULL, 16); + len = simple_strtoul(argv[2], NULL, 16); + + sha1_csum((unsigned char *) addr, len, output); + printf("SHA1 for %08lx ... %08lx ==> ", addr, addr + len - 1); + for (i = 0; i < 20 ; i++) + printf("%02x", output[i]); + printf("\n"); + + return 0; +} +#endif #ifdef CONFIG_CMD_UNZIP int gunzip (void *, int, unsigned char *, unsigned long *); @@ -1267,6 +1324,22 @@ U_BOOT_CMD( ); #endif /* CONFIG_MX_CYCLIC */ +#ifdef CONFIG_CMD_MD5SUM +U_BOOT_CMD( + md5sum, 3, 1, do_md5sum, + "compute MD5 message digest", + "address count" +); +#endif + +#ifdef CONFIG_CMD_SHA1 +U_BOOT_CMD( + sha1, 3, 1, do_sha1, + "compute SHA1 message digest", + "address count" +); +#endif /* CONFIG_CMD_SHA1 */ + #ifdef CONFIG_CMD_UNZIP U_BOOT_CMD( unzip, 4, 1, do_unzip,

3 10

[U-Boot] Please pull u-boot-cfi-flash/master
by Stefan Roese 13 Aug '09

13 Aug '09

Hi Wolfgang, please pull cfi-flash for this bugfix. Thanks. The following changes since commit f6e3a1fa92f61083885178101e973c86b419a6f7: Mike Frysinger (1): trab: rename spi_init() are available in the git repository at: git://www.denx.de/git/u-boot-cfi-flash.git master John Schmoller (1): flash: Fix CFI buffer size bug drivers/mtd/cfi_flash.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

2 1

[U-Boot] config_jffs2_nand
by alfred steele 13 Aug '09

13 Aug '09

Hi All, What does the "CONFIG_JFFS2_NAND" do? Looks like its being used in common/cmd_jffs2.c for some erase block specific validation. I am not sure on that. Can anyone help explain? Thanks in advance. -Alfred

1 0

[U-Boot] [PATCH] V3 Add support for the galaxy5200
by Eric Millbrandt 13 Aug '09

13 Aug '09

Removed trailing whitespace introduced in V2 to conform with U-Boot coding style. Defined additional chip select region. Signed-off-by: Eric Millbrandt <emillbrandt(a)dekaresearch.com> --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 6 + board/galaxy5200/Makefile | 50 +++++ board/galaxy5200/config.mk | 45 +++++ board/galaxy5200/galaxy5200.c | 199 +++++++++++++++++++ include/configs/galaxy5200.h | 428 +++++++++++++++++++++++++++++++++++++++++ 7 files changed, 733 insertions(+), 0 deletions(-) create mode 100644 board/galaxy5200/Makefile create mode 100644 board/galaxy5200/config.mk create mode 100644 board/galaxy5200/galaxy5200.c create mode 100644 include/configs/galaxy5200.h diff --git a/MAINTAINERS b/MAINTAINERS index 620604c..85ba8d2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -616,6 +616,10 @@ David M smdk2410 ARM920T VCMA9 ARM920T +Eric Millbrandt <emillbrandt(a)dekaresearch.com> + + galaxy5200 mpc5200 + Rolf Offermanns <rof(a)sysgo.de> shannon SA1100 diff --git a/MAKEALL b/MAKEALL index edebaea..65cd6d0 100755 --- a/MAKEALL +++ b/MAKEALL @@ -50,6 +50,7 @@ LIST_5xxx=" \ digsy_mtc \ EVAL5200 \ fo300 \ + galaxy5200 \ icecube_5100 \ icecube_5200 \ inka4x0 \ diff --git a/Makefile b/Makefile index 329e0f5..569549c 100644 --- a/Makefile +++ b/Makefile @@ -531,6 +531,12 @@ digsy_mtc_RAMBOOT_config: unconfig } @$(MKCONFIG) -a digsy_mtc ppc mpc5xxx digsy_mtc +galaxy5200_LOWBOOT_config \ +galaxy5200_config: unconfig + @mkdir -p $(obj)include + @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h + @$(MKCONFIG) -a galaxy5200 ppc mpc5xxx galaxy5200 + hmi1001_config: unconfig @$(MKCONFIG) hmi1001 ppc mpc5xxx hmi1001 diff --git a/board/galaxy5200/Makefile b/board/galaxy5200/Makefile new file mode 100644 index 0000000..22ce8e6 --- /dev/null +++ b/board/galaxy5200/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2003-2007 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/galaxy5200/config.mk b/board/galaxy5200/config.mk new file mode 100644 index 0000000..c6398b2 --- /dev/null +++ b/board/galaxy5200/config.mk @@ -0,0 +1,45 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# galaxy5200 board: +# +# Valid values for TEXT_BASE are: +# +# 0xFFF00000 boot high (standard configuration) +# 0xFE000000 boot low +# 0x00100000 boot from RAM (for testing only) does not work +# + +sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp + +ifdef CONFIG_galaxy5200_LOWBOOT +TEXT_BASE = 0xFE000000 +endif + +ifndef TEXT_BASE +## Standard: boot high +TEXT_BASE = 0xFFF00000 +endif + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/galaxy5200/galaxy5200.c b/board/galaxy5200/galaxy5200.c new file mode 100644 index 0000000..5aa9d3a --- /dev/null +++ b/board/galaxy5200/galaxy5200.c @@ -0,0 +1,199 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas(a)motorola.com. + * + * (C) Copyright 2006 + * Eric Schumann, Phytec Messtechnik GmbH + * + * (C) Copyright 2009 + * Eric Millbrandt, DEKA Research and Development Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc5xxx.h> +#include <pci.h> +#include <asm-ppc/io.h> + +#ifndef CONFIG_SYS_RAMBOOT +static void sdram_start(int hi_addr) +{ + volatile struct mpc5xxx_cdm *cdm = + (struct mpc5xxx_cdm *)MPC5XXX_CDM; + volatile struct mpc5xxx_sdram *sdram = + (struct mpc5xxx_sdram *)MPC5XXX_SDRAM; + + long hi_addr_bit = hi_addr ? 0x01000000 : 0; + + /* unlock mode register */ + out_be32 (&sdram->ctrl, + (SDRAM_CONTROL | 0x80000000 | hi_addr_bit)); + + /* precharge all banks */ + out_be32 (&sdram->ctrl, + (SDRAM_CONTROL | 0x80000002 | hi_addr_bit)); + +#ifdef SDRAM_DDR + /* set mode register: extended mode */ + out_be32 (&sdram->mode, (SDRAM_EMODE)); + + /* set mode register: reset DLL */ + out_be32 (&sdram->mode, (SDRAM_MODE | 0x04000000)); +#endif + + /* precharge all banks */ + out_be32 (&sdram->ctrl, + (SDRAM_CONTROL | 0x80000002 | hi_addr_bit)); + + /* auto refresh */ + out_be32 (&sdram->ctrl, + (SDRAM_CONTROL | 0x80000004 | hi_addr_bit)); + + /* set mode register */ + out_be32 (&sdram->mode, (SDRAM_MODE)); + + /* normal operation */ + out_be32 (&sdram->ctrl, + (SDRAM_CONTROL | hi_addr_bit)); + + /* set CDM clock enable register, set MPC5200B SDRAM bus */ + /* to reduced driver strength */ + out_be32 (&cdm->clock_enable, (0x00CFFFFF)); +} +#endif + +/* + * ATTENTION: Although partially referenced initdram does NOT make + * real use of CONFIG_SYS_SDRAM_BASE. The code does not + * work if CONFIG_SYS_SDRAM_BASE + * is something else than 0x00000000. + */ + +phys_size_t initdram(int board_type) +{ + volatile struct mpc5xxx_mmap_ctl *mm = + (struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR; + volatile struct mpc5xxx_sdram *sdram = + (struct mpc5xxx_sdram *)MPC5XXX_SDRAM; + ulong dramsize = 0; + ulong dramsize2 = 0; +#ifndef CONFIG_SYS_RAMBOOT + ulong test1, test2; + + /* setup SDRAM chip selects */ + /* 256MB at 0x0 */ + out_be32 (&mm->sdram0, 0x0000001b); + /* disabled */ + out_be32 (&mm->sdram1, 0x10000000); + + /* setup config registers */ + out_be32 (&sdram->config1, SDRAM_CONFIG1); + out_be32 (&sdram->config2, SDRAM_CONFIG2); + + /* find RAM size using SDRAM CS0 only */ + sdram_start(0); + test1 = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE, 0x10000000); + sdram_start(1); + test2 = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE, 0x10000000); + if (test1 > test2) { + sdram_start(0); + dramsize = test1; + } else + dramsize = test2; + + /* memory smaller than 1MB is impossible */ + if (dramsize < (1 << 20)) + dramsize = 0; + + /* set SDRAM CS0 size according to the amount of RAM found */ + if (dramsize > 0) { + out_be32 (&mm->sdram0, + (0x13 + __builtin_ffs(dramsize >> 20) - 1)); + } else { + /* disabled */ + out_be32 (&mm->sdram0, 0); + } + +#else /* CONFIG_SYS_RAMBOOT */ + + /* retrieve size of memory connected to SDRAM CS0 */ + dramsize = in_be32(&mm->sdram0) & 0xFF; + if (dramsize >= 0x13) + dramsize = (1 << (dramsize - 0x13)) << 20; + else + dramsize = 0; + + /* retrieve size of memory connected to SDRAM CS1 */ + dramsize2 = in_be32(&mm->sdram1) & 0xFF; + if (dramsize2 >= 0x13) + dramsize2 = (1 << (dramsize2 - 0x13)) << 20; + else + dramsize2 = 0; + +#endif /* CONFIG_SYS_RAMBOOT */ + + return dramsize + dramsize2; +} + +int checkboard(void) +{ + puts("Board: galaxy5200\n"); + return 0; +} + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t * bd) +{ + ft_cpu_setup(blob, bd); +} +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ + +#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) + +void init_ide_reset (void) +{ + volatile struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)MPC5XXX_GPT; + debug ("init_ide_reset\n"); + + /* Configure TIMER_5 as GPIO output for ATA reset */ + /* Deassert reset */ + gpt[5].emsr = MPC5XXX_GPT_GPIO_OUT1 | MPC5XXX_GPT_TMS_GPIO; +} + +void ide_set_reset (int idereset) +{ + volatile struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)MPC5XXX_GPT; + debug ("ide_reset(%d)\n", idereset); + + /* Configure TIMER_5 as GPIO output for ATA reset */ + if (idereset) { + gpt[5].emsr = MPC5XXX_GPT_GPIO_OUT0 | MPC5XXX_GPT_TMS_GPIO; + + /* Make a delay. MPC5200 spec says 25 usec min */ + udelay(50); + } else { + gpt[5].emsr = MPC5XXX_GPT_GPIO_OUT1 | MPC5XXX_GPT_TMS_GPIO; + udelay(50); + } +} +#endif /* defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) */ diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h new file mode 100644 index 0000000..8f7deb8 --- /dev/null +++ b/include/configs/galaxy5200.h @@ -0,0 +1,428 @@ +/* + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2006 + * Eric Schumann, Phytec Messatechnik GmbH + * + * (C) Copyright 2009 + * Jon Smirl <jonsmirl(a)gmail.com> + * + * (C) Copyright 2009 + * Eric Millbrandt, DEKA Research and Development Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_BOARDINFO "galaxy5200" + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ +#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +/* + * Serial console configuration + */ +#define CONFIG_PSC_CONSOLE 4 /* console is on PSC4 -> */ + /* define gps port conf. */ + /* register later on to */ + /* enable UART function! */ +#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_I2C +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_NFS +#define CONFIG_CMD_SNTP +#define CONFIG_CMD_PING +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_USB +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_FAT + +#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ + +#if (TEXT_BASE == 0xFE000000) /* Boot low */ +#define CONFIG_SYS_LOWBOOT 1 +#endif +/* RAMBOOT will be defined automatically in memory section */ + +#define MTDIDS_DEFAULT "nor0=physmap-flash.0" +#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:256k(ubootl)," \ + "1792k(kernel),13312k(jffs2),256k(uboot)ro,256k(oftree),-(space)" + +/* + * Autobooting + */ +#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ +#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow stopping of boot process */ + /* even with bootdelay=0 */ +#undef CONFIG_BOOTARGS + +#define CONFIG_PREBOOT "echo;" \ + "echo Welcome to U-Boot"\ + "echo" + +/* + * IPB Bus clocking configuration. + */ +#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ +#define CONFIG_SYS_XLB_PIPELINING 1 + +/* + * I2C configuration + */ +#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ +#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */ +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ +#define CONFIG_SYS_I2C_SLAVE 0x7F + +/* + * EEPROM CAT24WC32 configuration + */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010100x */ +#define CONFIG_SYS_I2C_FACT_ADDR 0x52 /* EEPROM CAT24WC32 */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ +#define CONFIG_SYS_EEPROM_SIZE 4096 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 15 + +/* + * RTC configuration + */ +#define RTC +#define CONFIG_RTC_DS3231 1 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 + +/* + * Flash configuration + */ + +#define CONFIG_SYS_FLASH_BASE 0xfe000000 +/* + * The flash size is autoconfigured, but cpu/mpc5xxx/cpu_init.c needs this + * variable defined + */ +#define CONFIG_SYS_FLASH_SIZE 0x02000000 +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } + +#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ +#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */ +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max num of sects on one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */ + /* (= chip selects) */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE + +/* + * Use hardware protection. This seems required, as the BDI uses hardware + * protection. Without this, U-Boot can't work with this sectors as its + * protection is software only by default. + */ +#define CONFIG_SYS_FLASH_PROTECTION 1 + +/* + * Environment settings + */ + +#define CONFIG_ENV_IS_IN_EEPROM 1 +#define CONFIG_ENV_OFFSET 0x00 /* environment starts at the */ + /* beginning of the EEPROM */ +#define CONFIG_ENV_SIZE CONFIG_SYS_EEPROM_SIZE + +#define CONFIG_ENV_OVERWRITE 1 + +/* + * SDRAM configuration + */ +#define SDRAM_DDR 1 +#define SDRAM_MODE 0x018D0000 +#define SDRAM_EMODE 0x40090000 +#define SDRAM_CONTROL 0x71500F00 +#define SDRAM_CONFIG1 0x73711930 +#define SDRAM_CONFIG2 0x47770000 + +/* + * Memory map + */ +#define CONFIG_SYS_MBAR 0xF0000000 /* MBAR has to be switched by other */ + /* bootloader or debugger config */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 + +/* Use SRAM until RAM will be available */ +#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM + +/* End of used area in SPRAM */ +#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE + +/* Size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ + CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) +# define CONFIG_SYS_RAMBOOT 1 +#endif + +#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ +#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +/* Chip Select configuration for NAND flash */ +#define CONFIG_SYS_CS1_START 0x20000000 +#define CONFIG_SYS_CS1_SIZE 0x90000 +#define CONFIG_SYS_CS1_CFG 0x0002d900 + +/* + * Ethernet configuration + */ +#define CONFIG_MPC5xxx_FEC 1 +#define CONFIG_MPC5xxx_FEC_MII100 +#define CONFIG_PHY_ADDR 0x01 +#define CONFIG_NO_AUTOLOAD 1 + +/* + * GPIO configuration + * + * GPS port configuration + * + * [29:31] = 01x + * AC97 on PSC1 + * PSC1_0 -> AC97 SDATA out + * PSC1_1 -> AC97 SDTA in + * PSC1_2 -> AC97 SYNC out + * PSC1_3 -> AC97 bitclock out + * PSC1_4 -> AC97 reset out + * + * [28] = Reserved + * + * [25:27] = 110 + * SPI on PSC2 + * PSC2_0 -> MOSI + * PSC2_1 -> MISO + * PSC2_2 -> n/a + * PSC2_3 -> CLK + * PSC2_4 -> SS + * + * [24] = Reserved + * + * [20:23] = 0001 + * USB on PSC3 + * PSC3_0 -> USB_OE OE out + * PSC3_1 -> USB_TXN Tx- out + * PSC3_2 -> USB_TXP Tx+ out + * PSC3_3 -> USB_TXD + * PSC3_4 -> USB_RXP Rx+ in + * PSC3_5 -> USB_RXN Rx- in + * PSC3_6 -> USB_PWR PortPower out + * PSC3_7 -> USB_SPEED speed out + * PSC3_8 -> USB_SUSPEND suspend + * PSC3_9 -> USB_OVRCURNT overcurrent in + * + * [18:19] = 10 + * Two UARTs + * + * [17] = 0 + * USB differential mode + * + * [16] = 1 + * PCI disabled + * + * [12:15] = 0101 + * Ethernet 100Mbit with MD + * ETH_0 -> ETH Txen + * ETH_1 -> ETH TxD0 + * ETH_2 -> ETH TxD1 + * ETH_3 -> ETH TxD2 + * ETH_4 -> ETH TxD3 + * ETH_5 -> ETH Txerr + * ETH_6 -> ETH MDC + * ETH_7 -> ETH MDIO + * ETH_8 -> ETH RxDv + * ETH_9 -> ETH RxCLK + * ETH_10 -> ETH Collision + * ETH_11 -> ETH TxD + * ETH_12 -> ETH RxD0 + * ETH_13 -> ETH RxD1 + * ETH_14 -> ETH RxD2 + * ETH_15 -> ETH RxD3 + * ETH_16 -> ETH Rxerr + * ETH_17 -> ETH CRS + * + * [9:11] = 111 + * SPI on PSC6 + * PSC6_0 -> MISO + * PSC6_1 -> SS# + * PSC6_2 -> MOSI + * PSC6_3 -> CLK + * + * [8] = 0 + * IrDA/USB 48MHz clock generated internally + * + * [6:7] = 01 + * ATA chip selects on csb_4/5 + * CSB_4 -> ATA_CS0 out + * CSB_5 -> ATA_CS1 out + * + * [5] = 1 + * PSC3_4 is used as CS6 + * + * [4] = 1 + * PSC3_5 is used as CS7 + * + * [2:3] = 00 + * No Alternatives + * + * [1] = 0 + * gpio_wkup_7 is GPIO + * + * [0] = 0 + * gpio_wkup_6 is GPIO + * + */ +#define CONFIG_SYS_GPS_PORT_CONFIG 0x0d75a162 + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "uboot> " /* Monitor Command Prompt */ + +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ + +#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ +#endif + +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#endif +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) + /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ + +#define CONFIG_DISPLAY_BOARDINFO 1 + +#define CONFIG_SYS_HUSH_PARSER 1 +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +#define CONFIG_CRC32_VERIFY 1 + +#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \ + CONFIG_BOOTP_DNS | \ + CONFIG_BOOTP_DNS2 | \ + CONFIG_BOOTP_SEND_HOSTNAME ) + +/* + * Various low-level settings + */ +#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI +#define CONFIG_SYS_HID0_FINAL HID0_ICE + +/* no burst access on the LPB */ +#define CONFIG_SYS_CS_BURST 0x00000000 +/* one deadcycle for the 33MHz statemachine */ +#define CONFIG_SYS_CS_DEADCYCLE 0x33333331 + +#define CONFIG_SYS_BOOTCS_CFG 0x0002d900 +#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE + +#define CONFIG_SYS_RESET_ADDRESS 0xff000000 + +/* + * USB settings + */ +#define CONFIG_USB_CLOCK 0x0001bbbb +/* USB is on PSC3 */ +#define CONFIG_PSC3_USB +#define CONFIG_USB_CONFIG 0x00000100 +#define CONFIG_USB_OHCI +#define CONFIG_USB_STORAGE + +/* + * IDE/ATA stuff Supports IDE harddisk + */ +#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ +#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ +#undef CONFIG_IDE_LED /* LED for ide not supported */ + +#define CONFIG_IDE_RESET 1 /* reset for ide supported */ +#define CONFIG_IDE_PREINIT +#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ +#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */ +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 +#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA +/* Offset for data I/O */ +#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060) +/* Offset for normal register accesses */ +#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET) +/* Offset for alternate registers */ +#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C) +/* Interval between registers */ +#define CONFIG_SYS_ATA_STRIDE 4 +#define CONFIG_ATAPI 1 + +/* we enable IDE and FAT support, so we also need partition support */ +#define CONFIG_DOS_PARTITION 1 + +/* + * Open Firmware flat tree + */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#define OF_CPU "PowerPC,5200@0" +#define OF_TBCLK CONFIG_SYS_MPC5XXX_CLKIN +#define OF_SOC "soc5200@f0000000" +#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2600" + +#endif /* __CONFIG_H */ -- 1.6.3.1

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[U-Boot] LIBFDT - changing command line
by Michal Simek 13 Aug '09

13 Aug '09

Hi All, I would like to use fdt for changing command line in DTB but I found there is one problem if I have longer command line which contains any spaces. Below is my workflow. If I understand correctly the problem is in cmd_fdt.c:fdt_parse_prop:593-603. It will be worth to add case for supporting fdt set /chosen bootargs "console=ttyUL root=/dev/mtdblock0" copy from first " to next " Or is it there any solution which I miss for this case? Thanks, Michal U-Boot-mONStR> tftp 90780000 system.dtb Using Xilinx LL TEMAC device TFTP from server 192.168.0.102; our IP address is 192.168.0.3 Filename 'system.dtb'. Load address: 0x90780000 Loading: 100BASE-T/FD # done Bytes transferred = 9121 (23a1 hex) U-Boot-mONStR> fdt addr 90780000 U-Boot-mONStR> fdt h magic: 0xd00dfeed totalsize: 0x23a1 (9121) off_dt_struct: 0x38 off_dt_strings: 0x14a0 off_mem_rsvmap: 0x28 version: 17 last_comp_version: 16 boot_cpuid_phys: 0x0 size_dt_strings: 0xf01 size_dt_struct: 0x1468 number mem_rsv: 0x0 U-Boot-mONStR> fdt list /chosen chosen { bootargs = "console=ttyUL0,115200 highres=on root=/dev/mtdblock0"; linux,stdout-path = "/plb@0/serial@84000000"; }; U-Boot-mONStR> fdt set /chosen bootargs console=ttyUL root=/dev/mtdblock0 U-Boot-mONStR> fdt list /chosen chosen { bootargs = "root=/dev/mtdblock0"; linux,stdout-path = "/plb@0/serial@84000000"; }; U-Boot-mONStR> -- Michal Simek, Ing. (M.Eng) w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/ Microblaze U-BOOT custodian

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Re: [U-Boot] CFI Flash write speed
by Wolfgang Denk 13 Aug '09

13 Aug '09

Dear "A. Geisreiter", please always keep the mailing list on Cc:. Thanks. In message <004e01ca1bd8$a943a8f0$fbcafad0$@de> you wrote: > I use U-Boot version 1.3.4 and there I can't find the define > CONFIG_SYS_FLASH_USE_BUFFER_WRITE. Do I need a patch or a newer version of > U-Boot? Well, using recent code is always recommended :-) In your old version, the variable names was probably still CFG_FLASH_USE_BUFFER_WRITE Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Our business is run on trust. We trust you will pay in advance.

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