July 2009 - U-Boot

[U-Boot] DRAM test problem
by Alemao 08 Jul '09

08 Jul '09

Hi all, I've made ports of u-boot for two powerpc processors, MPC8343 and MPC8541. The boards has 128MB of DDR2. So I enabled CFG_DRAM_TEST in 127MB of those memories, and I got two scenarios: MPC8343(ddr_clk = 264 MHz): test tooks 1min 35sec MPC8541(ddr_clk = 333 MHz): test tooks 5 sec Note: memories get ddr_clk / 2 Make sense? Is this cause MPC85xx family has L2 cache? Or cause ddr_clk? Or my port has problems in DDR configuration? Im using Micron DDR2 memory, MT47H32M16HR-3:F, with CL = 3 for both ports. Thanks in advance, -- Alemao

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[U-Boot] How to start U-Boot for i.MX31 NAND out of RedBoot (out of RAM)
by Ulrich Gerster 08 Jul '09

08 Jul '09

Hello, I have a board with a i.MX31, NAND-Flash and RAM. On the Board a RedBoot is preinstalled and runs properly. I want to replace the RedBoot with my U-Boot port. How can I test U-Boot out of RedBoot when I load the u-boot image in the RAM? What do I have to configure in my u-boot if i want to test it from ram before burning it into the nand flash? Thanks a lot for your help. Ulrich Gerster

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[U-Boot] [PATCH v2 00/12] 8xxx dma updates
by Peter Tyser 08 Jul '09

08 Jul '09

This patch series attempts to clean up the DMA implementation for the 83xx, 85xx, and 86xx architectures. The changes include: - consolidate 83xx, 85xx, and 86xx structures and code - add defines for bitfields - use proper IO accessors - add support for arbitrarily large transfer sizes - rename dma_xfer() to dmacpy() and make dmacpy's prototype similar to memcpy() Changes since v1: - Add 83xx patches, these were previously submitted as an RFC - Add a CONFIG_FSL_DMA check to include/asm-ppc/config.h - Use phys_addr_t and phys_size_t arguments to dmacpy() I've tested the code on MPC8572 and MPC8640-based boards. Ira Snyder tested on an 83xx-based board. I compile-tested all 8xxx boards. Peter Tyser (12): 85xx, 86xx: Break out DMA code to a common file fsl_dma: Add bitfield definitions for common registers fsl_dma: Use proper I/O access functions fsl_dma: Add support for arbitrarily large transfers fsl_dma: Fix Channel Start bug in dma_check() 8xxx: Rename dma_xfer() to dmacpy() fsl_dma: Move dma function prototypes to common header file 85xx, 86xx: Move dma_init() call to common code fsl_dma: Break out common memory initialization function fsl_dma: Make DMA transactions snoopable 83xx: Replace CONFIG_ECC_INIT_VIA_DDRC references 83xx: Add support for fsl_dma driver board/freescale/mpc8360emds/mpc8360emds.c | 4 +- board/freescale/mpc8360erdk/mpc8360erdk.c | 4 +- board/freescale/mpc837xemds/mpc837xemds.c | 4 +- board/freescale/mpc837xerdb/mpc837xerdb.c | 4 +- board/keymile/kmeter1/kmeter1.c | 4 +- board/mpc8540eval/mpc8540eval.c | 35 +------ board/sbc8560/sbc8560.c | 33 +----- cpu/mpc83xx/cpu.c | 85 -------------- cpu/mpc83xx/spd_sdram.c | 43 +------ cpu/mpc85xx/cpu.c | 47 -------- cpu/mpc85xx/cpu_init.c | 4 +- cpu/mpc85xx/ddr-gen1.c | 33 +----- cpu/mpc86xx/cpu.c | 55 --------- cpu/mpc86xx/cpu_init.c | 3 + drivers/dma/Makefile | 1 + drivers/dma/fsl_dma.c | 178 +++++++++++++++++++++++++++++ include/asm-ppc/config.h | 8 ++ include/asm-ppc/fsl_dma.h | 90 +++++++++++++++ include/asm-ppc/immap_83xx.h | 49 +------- include/configs/PM854.h | 1 + include/configs/PM856.h | 1 + include/mpc83xx.h | 16 --- 22 files changed, 308 insertions(+), 394 deletions(-) create mode 100644 drivers/dma/fsl_dma.c

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[U-Boot] Regarding problem with compiling MPC8641HPCN
by durgaprasadbattulad＠bel.co.in 08 Jul '09

08 Jul '09

Hello Sir/Madam.., Iam trying to make a Uboot image to deploy on MPC8641HPCN platform. While iam compiling the configuration file of MPC8641HPCN it gives an error : "altivec and e500 cannot coexist". Can you please help me to know what are the changes, if any, to be done. Thanking you.., D Durga prasad Battula Confidentiality Notice The information contained in this electronic message and any attachments to this message are intended for the exclusive use of the addressee(s) and may contain confidential or privileged information. If you are not the intended recipient, please notify the sender at Bharat Electronics or support(a)bel.co.in immediately and destroy all copies of this message and any attachments.

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[U-Boot] [PATCH 3/3] minor fixes for mvBL-M7 and use of common code
by André Schwarz 08 Jul '09

08 Jul '09

MATRIX VISION GmbH, Talstraße 16, DE-71570 Oppenweiler Registergericht: Amtsgericht Stuttgart, HRB 271090 Geschäftsführer: Gerhard Thullner, Werner Armingeon, Uwe Furtner, Hans-Joachim Reich

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[U-Boot] [PATCHv2 2/3] A320: driver for FTRTC010 real time clock
by Po-Yu Chuang 08 Jul '09

08 Jul '09

This patch adds an FTRTC010 driver for Faraday A320 evaluation board. Signed-off-by: Po-Yu Chuang <ratbert(a)faraday-tech.com> --- drivers/rtc/Makefile | 1 + drivers/rtc/ftrtc010.c | 126 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 127 insertions(+), 0 deletions(-) create mode 100644 drivers/rtc/ftrtc010.c diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 822dc1a..25252b5 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -40,6 +40,7 @@ COBJS-$(CONFIG_RTC_DS1556) += ds1556.o COBJS-$(CONFIG_RTC_DS164x) += ds164x.o COBJS-$(CONFIG_RTC_DS174x) += ds174x.o COBJS-$(CONFIG_RTC_DS3231) += ds3231.o +COBJS-$(CONFIG_RTC_FTRTC010) += ftrtc010.o COBJS-$(CONFIG_RTC_ISL1208) += isl1208.o COBJS-$(CONFIG_RTC_M41T11) += m41t11.o COBJS-$(CONFIG_RTC_M41T60) += m41t60.o diff --git a/drivers/rtc/ftrtc010.c b/drivers/rtc/ftrtc010.c new file mode 100644 index 0000000..7ee2f66 --- /dev/null +++ b/drivers/rtc/ftrtc010.c @@ -0,0 +1,126 @@ +/* + * Faraday FTRTC010 Real Time Clock + * + * (C) Copyright 2009 Faraday Technology + * Po-Yu Chuang <ratbert(a)faraday-tech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#undef DEBUG + +#include <config.h> +#include <common.h> +#include <rtc.h> +#include <asm/io.h> + +struct ftrtc010 { + unsigned int sec; /* 0x00 */ + unsigned int min; /* 0x04 */ + unsigned int hour; /* 0x08 */ + unsigned int day; /* 0x0c */ + unsigned int alarm_sec; /* 0x10 */ + unsigned int alarm_min; /* 0x14 */ + unsigned int alarm_hour; /* 0x18 */ + unsigned int record; /* 0x1c */ + unsigned int cr; /* 0x20 */ +}; + +/* + * RTC Control Register + */ +#define FTRTC010_CR_ENABLE (1 << 0) +#define FTRTC010_CR_INTERRUPT_SEC (1 << 1) /* per second irq */ +#define FTRTC010_CR_INTERRUPT_MIN (1 << 2) /* per minute irq */ +#define FTRTC010_CR_INTERRUPT_HR (1 << 3) /* per hour irq */ +#define FTRTC010_CR_INTERRUPT_DAY (1 << 4) /* per day irq */ + +static volatile struct ftrtc010 *rtc = (struct ftrtc010 *)CONFIG_SYS_RTC_BASE; + +static void ftrtc010_enable (void) +{ + writel (FTRTC010_CR_ENABLE, &rtc->cr); +} + +/* + * return current time in seconds + */ +static unsigned long ftrtc010_time (void) +{ + unsigned long day; + unsigned long hour; + unsigned long minute; + unsigned long second; + unsigned long second2; + + do { + second = readl (&rtc->sec); + day = readl (&rtc->day); + hour = readl (&rtc->hour); + minute = readl (&rtc->min); + second2 = readl (&rtc->sec); + } while (second != second2); + + return day * 24 * 60 * 60 + hour * 60 * 60 + minute * 60 + second; +} + +/* + * Get the current time from the RTC + */ + +int rtc_get (struct rtc_time *tmp) +{ + unsigned long now; + + debug ("%s(): record register: %x\n", + __func__, readl (&rtc->record)); + + now = ftrtc010_time () + readl (&rtc->record); + + to_tm (now, tmp); + + return 0; +} + +/* + * Set the RTC + */ +int rtc_set (struct rtc_time *tmp) +{ + unsigned long new; + unsigned long now; + + debug ("%s(): DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + __func__, + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + new = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_hour, + tmp->tm_min, tmp->tm_sec); + + now = ftrtc010_time (); + + debug ("%s(): write %lx to record register\n", __func__, new - now); + + writel (new - now, &rtc->record); + + return 0; +} + +void rtc_reset (void) +{ + debug ("%s()\n", __func__); + ftrtc010_enable (); +} -- 1.6.3.3

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[U-Boot] Mail delivery failed: returning message to sender
by Mail Delivery System 08 Jul '09

08 Jul '09

This message was created automatically by mail delivery software. A message that you sent could not be delivered to one or more of its recipients. This is a permanent error. The following address(es) failed: ss1621(a)snorri.eu (generated from snorri(a)snorri.eu) mailbox is full: retry timeout exceeded ------ This is a copy of the message's headers. ------ Return-path: <u-boot(a)lists.denx.de> Received: from host34-179-static.48-79-b.business.telecomitalia.it ([79.48.179.34]:4359 helo=lists.denx.de) by mx05.mail.eu.clara.net (mx-vh.amenworld.com [213.253.3.25]:1125) with esmtp id 1MOTtn-00042X-HA (Exim 4.69) for snorri(a)snorri.eu (return-path <u-boot(a)lists.denx.de>); Wed, 08 Jul 2009 09:57:12 +0000 From: u-boot(a)lists.denx.de To: snorri(a)snorri.eu Subject: Returned mail: see transcript for details Date: Wed, 8 Jul 2009 11:57:06 +0200 MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0009_77B6C343.7D3A19CD" X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2600.0000 X-MIMEOLE: Produced By Microsoft MimeOLE V6.00.2600.0000 Message-Id: <E1MOTtn-00042X-HA(a)mx05.mail.eu.clara.net> (auto-added) X-OriginalSubject: Returned mail: see transcript for details

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[U-Boot] [PATCH] for JEDEC flash, command of word programing should be issued relatvie to base
by Po-Yu Chuang 08 Jul '09

08 Jul '09

For JEDEC flash, we should issue word programming command relative to base address rather than sector base address. Original source makes SST Flash fails to program sectors which are not on the 0x10000 boundaries. e.g. SST39LF040 uses addr1=0x5555 and addr2=0x2AAA, however, each sector is 0x1000 bytes. Thus, if we issue command to "sector base (0x41000) + offset(0x5555)", it sends to 0x46555 and the chip fails to recognize that address. This patch is tested with SST39LF040. Signed-off-by: Po-Yu Chuang <ratbert(a)faraday-tech.com> --- drivers/mtd/cfi_flash.c | 11 ++++++++--- 1 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index d0732f5..81ac5d3 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -835,14 +835,19 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest, break; case CFI_CMDSET_AMD_EXTENDED: case CFI_CMDSET_AMD_STANDARD: -#ifdef CONFIG_FLASH_CFI_LEGACY - case CFI_CMDSET_AMD_LEGACY: -#endif sect = find_sector(info, dest); flash_unlock_seq (info, sect); flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); sect_found = 1; break; +#ifdef CONFIG_FLASH_CFI_LEGACY + case CFI_CMDSET_AMD_LEGACY: + sect = find_sector(info, dest); + flash_unlock_seq (info, 0); + flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); + sect_found = 1; + break; +#endif } switch (info->portwidth) { -- 1.6.3.3

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Re: [U-Boot] [PATCH] asm-generic: Consolidate errno.h to asm-generic/errno.h
by Stefan Roese 08 Jul '09

08 Jul '09

Hi Michal, On Wednesday 08 July 2009 09:52:03 Michal Simek wrote: > Do you have any problem with this asm-generic/errno.h patch? I did a quick MAKEALL 4xx and couldn't spot any new problems after applying your patch. So I'm fine with it: Acked-by: Stefan Roese <sr(a)denx.de> Thanks. Best regards, Stefan ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de =====================================================================

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[U-Boot] [PATCH] ppc4xx: Make pll_write global
by Matthias Fuchs 08 Jul '09

08 Jul '09

This patch makes pll_write on PPC405EP boards global and callable from C code. pll_write can be used to dynamically modify the PLB:PCI divider as it is required for 33/66 MHz pci adapters based on the 405EP. board_early_init_f() is a good place to do that (check M66EN signal and call pll_write() when it is required). Signed-off-by: Matthias Fuchs <matthias.fuchs(a)esd.eu> --- cpu/ppc4xx/start.S | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index ac96fc2..582c781 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -2021,6 +2021,7 @@ pci_wait: ! Output r3 = none !----------------------------------------------------------------------------- */ + .globl pll_write pll_write: mfdcr r5, CPC0_UCR andis. r5,r5,0xFFFF -- 1.6.1

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