July 2009 - U-Boot

[U-Boot] [PATCH] Add support for the KwikByte KBOC OMAP35xx board
by christian＠kwikbyte.com 12 Jul '09

12 Jul '09

Subject: [PATCH] Add support for the KwikByte KBOC OMAP35xx board Signed-off-by: Christian Owens <christian(a)kwikbyte.com> --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/omap3/common/Makefile | 1 + board/omap3/kboc/Makefile | 49 ++++++ board/omap3/kboc/config.mk | 33 ++++ board/omap3/kboc/kboc.c | 106 ++++++++++++ board/omap3/kboc/kboc.h | 382 ++++++++++++++++++++++++++++++++++++++++++ include/configs/omap3_kboc.h | 317 +++++++++++++++++++++++++++++++++++ 9 files changed, 896 insertions(+), 0 deletions(-) create mode 100644 board/omap3/kboc/Makefile create mode 100644 board/omap3/kboc/config.mk create mode 100644 board/omap3/kboc/kboc.c create mode 100644 board/omap3/kboc/kboc.h create mode 100644 include/configs/omap3_kboc.h diff --git a/MAINTAINERS b/MAINTAINERS index 0041112..cc55df9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -686,6 +686,10 @@ Alex Z lart SA1100 dnp1110 SA1110 +Christian Owens <christian(a)kwikbyte.com> + + omap3_kboc ARM CORTEX-A8 (OMAP35xx SoC) + ------------------------------------------------------------------------- Unknown / orphaned boards: diff --git a/MAKEALL b/MAKEALL index 41f1445..ac0c5d9 100755 --- a/MAKEALL +++ b/MAKEALL @@ -572,6 +572,7 @@ LIST_ARM_CORTEX_A8=" \ omap3_pandora \ omap3_zoom1 \ omap3_zoom2 \ + omap3_kboc \ " ######################################################################### diff --git a/Makefile b/Makefile index 2a06440..b204917 100644 --- a/Makefile +++ b/Makefile @@ -3040,6 +3040,9 @@ omap3_zoom1_config : unconfig omap3_zoom2_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom2 omap3 omap3 +omap3_kboc_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 kboc omap3 omap3 + ######################################################################### ## XScale Systems ######################################################################### diff --git a/board/omap3/common/Makefile b/board/omap3/common/Makefile index b8a0b14..4f7a20b 100644 --- a/board/omap3/common/Makefile +++ b/board/omap3/common/Makefile @@ -34,6 +34,7 @@ COBJS-$(CONFIG_OMAP3_OVERO) += power.o COBJS-$(CONFIG_OMAP3_PANDORA) += power.o COBJS-$(CONFIG_OMAP3_ZOOM1) += power.o COBJS-$(CONFIG_OMAP3_ZOOM2) += power.o +COBJS-$(CONFIG_OMAP3_KBOC) += power.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/board/omap3/kboc/Makefile b/board/omap3/kboc/Makefile new file mode 100644 index 0000000..2c77444 --- /dev/null +++ b/board/omap3/kboc/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := kboc.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/omap3/kboc/config.mk b/board/omap3/kboc/config.mk new file mode 100644 index 0000000..879b2e2 --- /dev/null +++ b/board/omap3/kboc/config.mk @@ -0,0 +1,33 @@ +# +# (C) Copyright 2006 +# Texas Instruments, <www.ti.com> +# +# Beagle Board uses OMAP3 (ARM-CortexA8) cpu +# see http://www.ti.com/ for more information on Texas Instruments +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# Physical Address: +# 8000'0000 (bank0) +# A000/0000 (bank1) +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) + +# For use with external or internal boots. +TEXT_BASE = 0x80e80000 diff --git a/board/omap3/kboc/kboc.c b/board/omap3/kboc/kboc.c new file mode 100644 index 0000000..5fc9b96 --- /dev/null +++ b/board/omap3/kboc/kboc.c @@ -0,0 +1,106 @@ +/* + * (C) Copyright 2009 + * KwikByte <www.kwikbyte.com> + * + * Author : + * Christian Owens <christian(a)kwikbyte.com> + * + * Derived from the following: + * + * (C) Copyright 2004-2008 + * Texas Instruments, <www.ti.com> + * + * Author : + * Sunil Kumar <sunilsaini05(a)gmail.com> + * Shashi Ranjan <shashiranjanmca05(a)gmail.com> + * + * Derived from Beagle Board and 3430 SDP code by + * Richard Woodruff <r-woodruff2(a)ti.com> + * Syed Mohammed Khasim <khasim(a)ti.com> + * + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <asm/io.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/gpio.h> +#include <asm/mach-types.h> +#include "kboc.h" + +/* + * Routine: board_init + * Description: Early hardware init. + */ +int board_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ + /* board id for Linux */ + gd->bd->bi_arch_number = MACH_TYPE_OMAP3_KBOC; + /* boot param addr */ + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + + return 0; +} + +/* + * Routine: misc_init_r + * Description: Configure board specific parts + */ +int misc_init_r(void) +{ + gpio_t *gpio1_base = (gpio_t *)OMAP34XX_GPIO1_BASE; + gpio_t *gpio5_base = (gpio_t *)OMAP34XX_GPIO5_BASE; + gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE; + + power_init_r(); + + /* Configure GPIOs to output */ + writel(~(GPIO23 | GPIO17 | GPIO12 | GPIO11 | GPIO10 | GPIO8 | GPIO2), + &gpio6_base->oe); + writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | + GPIO13 | GPIO12), &gpio5_base->oe); + writel(~(GPIO22 | GPIO13), &gpio1_base->oe); + + /* Set GPIOs */ + writel(GPIO23 | GPIO17 | GPIO10 | GPIO8 | GPIO2, + &gpio6_base->setdataout); + writel(GPIO31 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | GPIO13 | GPIO12, + &gpio5_base->setdataout); + writel(GPIO22 | GPIO13, + &gpio1_base->setdataout); + + dieid_num_r(); + + return 0; +} + +/* + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + */ +void set_muxconf_regs(void) +{ + MUX_KBOC(); +} diff --git a/board/omap3/kboc/kboc.h b/board/omap3/kboc/kboc.h new file mode 100644 index 0000000..41c3b9e --- /dev/null +++ b/board/omap3/kboc/kboc.h @@ -0,0 +1,382 @@ +/* + * (C) Copyright 2009 + * KwikByte <www.kwikbyte.com> + * + * Author : + * Christian Owens <christian(a)kwikbyte.com> + * + * Derived from the following: + * + * (C) Copyright 2008 + * Dirk Behme <dirk.behme(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _KBOC_H_ +#define _KBOC_H_ + +const omap3_sysinfo sysinfo = { + DDR_STACKED, + "OMAP3 KBOC board", +#if defined(CONFIG_ENV_IS_IN_ONENAND) + "OneNAND", +#else + "NAND", +#endif +}; + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ +#define MUX_KBOC() \ + /*SDRC*/\ + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ + /*GPMC*/\ + MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\ + MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\ + MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\ + MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\ + MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\ + MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\ + MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\ + MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\ + MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\ + MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\ + MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\ + MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\ + MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\ + MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\ + MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\ + MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\ + MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\ + MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\ + MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\ + MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\ + MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\ + MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\ + MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\ + MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\ + MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\ + MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ + MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\ + MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4*/\ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M0)) /*GPMC_nCS5*/\ + MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M1)) /*SYS_nDMA_REQ2*/\ + MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M1)) /*SYS_nDMA_REQ3*/\ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nBE1*/\ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /*GPMC_WAIT2*/\ + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_WAIT3*/\ + MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\ + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\ + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ + /*DSS*/\ + MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\ + MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\ + MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\ + MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\ + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\ + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\ + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\ + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\ + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\ + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\ + MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\ + MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\ + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\ + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\ + MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\ + MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\ + MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\ + MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\ + MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\ + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\ + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\ + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\ + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\ + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\ + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\ + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\ + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\ + /*CAMERA*/\ + MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) /*CAM_HS */\ + MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) /*CAM_VS */\ + MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\ + MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) /*CAM_PCLK*/\ + MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\ + MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) /*CAM_D0*/\ + MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) /*CAM_D1*/\ + MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) /*CAM_D2*/\ + MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) /*CAM_D3*/\ + MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) /*CAM_D4*/\ + MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) /*CAM_D5*/\ + MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) /*CAM_D6*/\ + MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) /*CAM_D7*/\ + MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) /*CAM_D8*/\ + MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) /*CAM_D9*/\ + MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) /*CAM_D10*/\ + MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) /*CAM_D11*/\ + MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\ + MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ + MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\ + MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\ + MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\ + MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1*/\ + MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) /*CSI2_DY1*/\ + /*Audio Interface */\ + MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\ + MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)) /*McBSP2_CLKX*/\ + MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\ + MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\ + /*Expansion card */\ + MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\ + MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\ + MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\ + MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\ + MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\ + MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\ + MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)) /*MMC1_DAT4*/\ + MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)) /*MMC1_DAT5*/\ + MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)) /*MMC1_DAT6*/\ + MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)) /*MMC1_DAT7*/\ + /*Wireless LAN */\ + MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M4)) /*GPIO_130*/\ + MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M4)) /*GPIO_131*/\ + MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132*/\ + MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133*/\ + MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M4)) /*GPIO_134*/\ + MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M4)) /*GPIO_135*/\ + MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M4)) /*GPIO_136*/\ + MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137*/\ + MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M4)) /*GPIO_138*/\ + MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139*/\ + /*Bluetooth*/\ + MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M1)) /*UART2_CTS*/\ + MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\ + MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M1)) /*UART2_TX*/\ + MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M1)) /*UART2_RX*/\ + MUX_VAL(CP(UART2_CTS), (IEN | PTD | DIS | M4)) /*GPIO_144*/\ + MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M4)) /*GPIO_145*/\ + MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/\ + MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M4)) /*GPIO_147*/\ + /*Modem Interface */\ + MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\ + MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_149*/ \ + MUX_VAL(CP(UART1_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_150*/ \ + MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\ + MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M1)) /*SSI1_DAT_RX*/\ + MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M1)) /*SSI1_FLAG_RX*/\ + MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M1)) /*SSI1_RDY_RX*/\ + MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M1)) /*SSI1_WAKE*/\ + MUX_VAL(CP(MCBSP1_CLKR), (IDIS | PTU | EN | M4)) /*GPIO_156*/\ + MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M4)) /*GPIO_157*/\ + MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M4)) /*GPIO_158*/\ + MUX_VAL(CP(MCBSP1_DR), (IDIS | PTU | EN | M4)) /*GPIO_159*/\ + MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*McBSP_CLKS*/\ + MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M4)) /*GPIO_161*/\ + MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | DIS | M4)) /*GPIO_162*/\ + /*Serial Interface*/\ + MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_RCTX*/\ + MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*UART3_RTS_SD */\ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\ + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\ + MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\ + MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\ + MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\ + MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\ + MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0*/\ + MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1*/\ + MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2*/\ + MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3*/\ + MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4*/\ + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5*/\ + MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6*/\ + MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7*/\ + MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\ + MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\ + MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M4)) /*GPIO_168*/\ + MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M4)) /*GPIO_183*/\ + MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL*/\ + MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\ + MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\ + MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\ + MUX_VAL(CP(HDQ_SIO), (IDIS | PTU | EN | M4)) /*GPIO_170*/\ + MUX_VAL(CP(MCSPI1_CLK), (IDIS | PTU | EN | M0)) /*SPI1_CLK*/\ + MUX_VAL(CP(MCSPI1_SIMO), (IDIS | PTU | DIS | M0)) /*SPI1_SIMO*/\ + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI*/\ + MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\ + MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\ + MUX_VAL(CP(MCSPI1_CS2), (IDIS | PTD | DIS | M4)) /*GPIO_176*/\ + /* USB EHCI (port 2) */\ + MUX_VAL(CP(MCSPI1_CS3), (IDIS | PTU | EN | M0)) /*SPI1_CS3*/\ + MUX_VAL(CP(MCSPI2_CLK), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA7*/\ + MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA4*/\ + MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA5*/\ + MUX_VAL(CP(MCSPI2_CS0), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA6*/\ + MUX_VAL(CP(MCSPI2_CS1), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA3*/\ + MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTU | DIS | M3)) /*HSUSB2_CLK*/\ + MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | DIS | M3)) /*HSUSB2_STP*/\ + MUX_VAL(CP(ETK_D12_ES2), (IEN | PTU | DIS | M3)) /*HSUSB2_DIR*/\ + MUX_VAL(CP(ETK_D13_ES2), (IEN | PTU | DIS | M3)) /*HSUSB2_NXT*/\ + MUX_VAL(CP(ETK_D14_ES2), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA0*/\ + MUX_VAL(CP(ETK_D15_ES2), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA1*/\ + /*Control and debug */\ + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ + MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\ + MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\ + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3*/\ + MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4 - MMC1_WP*/\ + MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ + MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ + MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ + MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/ \ + MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\ + MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*SYS_CLKOUT1*/\ + MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M4)) /*GPIO_186*/\ + MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M3)) /*HSUSB1_STP*/\ + MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTU | EN | M4)) /*GPIO_13*/\ + MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA0*/\ + MUX_VAL(CP(ETK_D1_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA1*/\ + MUX_VAL(CP(ETK_D2_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA2*/\ + MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA7*/\ + MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA4*/\ + MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA5*/\ + MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA6*/\ + MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA3*/\ + MUX_VAL(CP(ETK_D8_ES2), (IDIS | PTU | EN | M4)) /*GPIO_22*/\ + MUX_VAL(CP(ETK_D9_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_NXT*/\ + MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\ + MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\ + MUX_VAL(CP(D2D_MCAD3), (IEN | PTD | EN | M0)) /*d2d_mcad3*/\ + MUX_VAL(CP(D2D_MCAD4), (IEN | PTD | EN | M0)) /*d2d_mcad4*/\ + MUX_VAL(CP(D2D_MCAD5), (IEN | PTD | EN | M0)) /*d2d_mcad5*/\ + MUX_VAL(CP(D2D_MCAD6), (IEN | PTD | EN | M0)) /*d2d_mcad6*/\ + MUX_VAL(CP(D2D_MCAD7), (IEN | PTD | EN | M0)) /*d2d_mcad7*/\ + MUX_VAL(CP(D2D_MCAD8), (IEN | PTD | EN | M0)) /*d2d_mcad8*/\ + MUX_VAL(CP(D2D_MCAD9), (IEN | PTD | EN | M0)) /*d2d_mcad9*/\ + MUX_VAL(CP(D2D_MCAD10), (IEN | PTD | EN | M0)) /*d2d_mcad10*/\ + MUX_VAL(CP(D2D_MCAD11), (IEN | PTD | EN | M0)) /*d2d_mcad11*/\ + MUX_VAL(CP(D2D_MCAD12), (IEN | PTD | EN | M0)) /*d2d_mcad12*/\ + MUX_VAL(CP(D2D_MCAD13), (IEN | PTD | EN | M0)) /*d2d_mcad13*/\ + MUX_VAL(CP(D2D_MCAD14), (IEN | PTD | EN | M0)) /*d2d_mcad14*/\ + MUX_VAL(CP(D2D_MCAD15), (IEN | PTD | EN | M0)) /*d2d_mcad15*/\ + MUX_VAL(CP(D2D_MCAD16), (IEN | PTD | EN | M0)) /*d2d_mcad16*/\ + MUX_VAL(CP(D2D_MCAD17), (IEN | PTD | EN | M0)) /*d2d_mcad17*/\ + MUX_VAL(CP(D2D_MCAD18), (IEN | PTD | EN | M0)) /*d2d_mcad18*/\ + MUX_VAL(CP(D2D_MCAD19), (IEN | PTD | EN | M0)) /*d2d_mcad19*/\ + MUX_VAL(CP(D2D_MCAD20), (IEN | PTD | EN | M0)) /*d2d_mcad20*/\ + MUX_VAL(CP(D2D_MCAD21), (IEN | PTD | EN | M0)) /*d2d_mcad21*/\ + MUX_VAL(CP(D2D_MCAD22), (IEN | PTD | EN | M0)) /*d2d_mcad22*/\ + MUX_VAL(CP(D2D_MCAD23), (IEN | PTD | EN | M0)) /*d2d_mcad23*/\ + MUX_VAL(CP(D2D_MCAD24), (IEN | PTD | EN | M0)) /*d2d_mcad24*/\ + MUX_VAL(CP(D2D_MCAD25), (IEN | PTD | EN | M0)) /*d2d_mcad25*/\ + MUX_VAL(CP(D2D_MCAD26), (IEN | PTD | EN | M0)) /*d2d_mcad26*/\ + MUX_VAL(CP(D2D_MCAD27), (IEN | PTD | EN | M0)) /*d2d_mcad27*/\ + MUX_VAL(CP(D2D_MCAD28), (IEN | PTD | EN | M0)) /*d2d_mcad28*/\ + MUX_VAL(CP(D2D_MCAD29), (IEN | PTD | EN | M0)) /*d2d_mcad29*/\ + MUX_VAL(CP(D2D_MCAD30), (IEN | PTD | EN | M0)) /*d2d_mcad30*/\ + MUX_VAL(CP(D2D_MCAD31), (IEN | PTD | EN | M0)) /*d2d_mcad31*/\ + MUX_VAL(CP(D2D_MCAD32), (IEN | PTD | EN | M0)) /*d2d_mcad32*/\ + MUX_VAL(CP(D2D_MCAD33), (IEN | PTD | EN | M0)) /*d2d_mcad33*/\ + MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) /*d2d_mcad34*/\ + MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) /*d2d_mcad35*/\ + MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) /*d2d_mcad36*/\ + MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) /*d2d_clk26mi*/\ + MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) /*d2d_nrespwron*/\ + MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) /*d2d_nreswarm */\ + MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\ + MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\ + MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) /*d2d_spint*/\ + MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) /*d2d_frint*/\ + MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0*/\ + MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1*/\ + MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2*/\ + MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3*/\ + MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst*/\ + MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\ + MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\ + MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\ + MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\ + MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) /*d2d_n3grtck*/\ + MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\ + MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) /*d2d_swakeup*/\ + MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) /*d2d_idlereq*/\ + MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) /*d2d_idleack*/\ + MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\ + MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\ + MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) /*d2d_mread*/\ + MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/\ + MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ + MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ + MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/ + +#endif diff --git a/include/configs/omap3_kboc.h b/include/configs/omap3_kboc.h new file mode 100644 index 0000000..8a59612 --- /dev/null +++ b/include/configs/omap3_kboc.h @@ -0,0 +1,317 @@ +/* + * (C) Copyright 2009 + * KwikByte <www.kwikbyte.com> + * + * Author : + * Christian Owens <christian(a)kwikbyte.com> + * + * Configuration settings for the KwikByte OMAP3530 KBOC Module. + * + * Derived from the following: + * + * (C) Copyright 2006-2008 + * Texas Instruments. + * Richard Woodruff <r-woodruff2(a)ti.com> + * Syed Mohammed Khasim <x0khasim(a)ti.com> + * + * Configuration settings for the TI OMAP3530 Beagle board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/* + * High Level Configuration Options + */ +#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ +#define CONFIG_OMAP 1 /* in a TI OMAP core */ +#define CONFIG_OMAP34XX 1 /* which is a 34XX */ +#define CONFIG_OMAP3430 1 /* which is in a 3430 */ +#define CONFIG_OMAP3_KBOC 1 /* working with KBOC */ + +#include <asm/arch/cpu.h> /* get chip and board defs */ +#include <asm/arch/omap3.h> + +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#undef CONFIG_USE_IRQ /* no support for IRQs */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#define CONFIG_REVISION_TAG 1 + +/* + * Size of malloc() pool + */ +#define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */ + /* Sector */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ + /* initial data */ + +/* + * Hardware drivers + */ + +/* + * NS16550 Configuration + */ +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK + +/* + * select serial console configuration + */ +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CONFIG_SERIAL3 3 /* UART3 on KBOC Rev 0.90 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ + 115200} +#define CONFIG_MMC 1 +#define CONFIG_OMAP3_MMC 1 +#define CONFIG_DOS_PARTITION 1 + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ +#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define MTDIDS_DEFAULT "nand0=nand" +#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ + "1920k(u-boot),128k(u-boot-env),"\ + "4m(kernel),-(fs)" + +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_NAND /* NAND support */ + +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ +#undef CONFIG_CMD_IMI /* iminfo */ +#undef CONFIG_CMD_IMLS /* List all found images */ +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#undef CONFIG_CMD_NFS /* NFS support */ + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_BUS 0 +#define CONFIG_SYS_I2C_BUS_SELECT 1 +#define CONFIG_DRIVER_OMAP34XX_I2C 1 + +/* + * Board NAND Info. + */ +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ + /* to access nand */ +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ + /* to access nand at */ + /* CS0 */ +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 + +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ + /* devices */ + +#define CONFIG_JFFS2_NAND +/* nand device jffs2 lives on */ +#define CONFIG_JFFS2_DEV "nand0" +/* start of jffs2 partition */ +#define CONFIG_JFFS2_PART_OFFSET 0x680000 +#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ + /* partition */ + +/* Environment information */ +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=0x82000000\0" \ + "console=ttyS2,115200n8\0" \ + "videomode=1024x768@60,vxres=1024,vyres=768\0" \ + "videospec=omapfb:vram:2M,vram:4M\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "video=${videospec},mode:${videomode} " \ + "root=/dev/mmcblk0p2 rw " \ + "rootfstype=ext3 rootwait " \ + "${optargs}\0" \ + "nandargs=setenv bootargs console=${console} " \ + "video=${videospec},mode:${videomode} " \ + "root=/dev/mtdblock4 rw " \ + "rootfstype=jffs2 " \ + "${optargs}\0" \ + "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source ${loadaddr}\0" \ + "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "bootm ${loadaddr}\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${loadaddr} 280000 400000; " \ + "bootm ${loadaddr}\0" \ + +#define CONFIG_BOOTCOMMAND \ + "if mmc init; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loaduimage; then " \ + "run mmcboot; " \ + "else run nandboot; " \ + "fi; " \ + "fi; " \ + "else run nandboot; fi" + +#define CONFIG_AUTO_COMPLETE 1 +/* + * Miscellaneous configurable options + */ +#define V_PROMPT "OMAP3_KBOC # " + +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT V_PROMPT +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) + +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ + /* works on */ +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ + 0x01F00000) /* 31MB */ + +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ + /* load address */ + +/* + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE SZ_128K /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */ +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* SDRAM Bank Allocation method */ +#define SDRC_R_B_C 1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ + +/* **** PISMO SUPPORT *** */ + +/* Configure the PISMO */ +#define PISMO1_NAND_SIZE GPMC_SIZE_128M +#define PISMO1_ONEN_SIZE GPMC_SIZE_128M + +#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ + /* one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ +#define CONFIG_SYS_MONITOR_LEN SZ_256K /* Reserve 2 sectors */ + +#define CONFIG_SYS_FLASH_BASE boot_flash_base + +/* Monitor at start of flash */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP + +#define CONFIG_ENV_IS_IN_NAND 1 +#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ +#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ + +#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec +#define CONFIG_ENV_OFFSET boot_flash_off +#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET + +/*----------------------------------------------------------------------- + * CFI FLASH driver setup + */ +/* timeout values are in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) + +/* Flash banks JFFS2 should use */ +#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ + CONFIG_SYS_MAX_NAND_DEVICE) +#define CONFIG_SYS_JFFS2_MEM_NAND +/* use flash_info[2] */ +#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS +#define CONFIG_SYS_JFFS2_NUM_BANKS 1 + +#ifndef __ASSEMBLY__ +extern gpmc_csx_t *nand_cs_base; +extern gpmc_t *gpmc_cfg_base; +extern unsigned int boot_flash_base; +extern volatile unsigned int boot_flash_env_addr; +extern unsigned int boot_flash_off; +extern unsigned int boot_flash_sec; +extern unsigned int boot_flash_type; +#endif + +#endif /* __CONFIG_H */ -- 1.5.4.3

5 14

[U-Boot] [PATCH RESEND 0/3] arm: Add support for MB86R01 'Jade' SoC
by Matthias Weisser 12 Jul '09

12 Jul '09

This patchset adds support for the MB86R01 'Jade' SoC from Fujitsu. The second patch which adds the video driver needs this patch http://lists.denx.de/pipermail/u-boot/2009-July/055582.html which adds register offset definitions for the graphic controller. This time I ran checkpatch.pl from the linux kernel sources for all patches and hopefully ignored only things which are not critical for inclusion of my source into u-boot. Matthias Weisser

4 10

[U-Boot] [PATCH v12] Marvell MV88F6281GTW_GE Board support
by Prafulla Wadaskar 12 Jul '09

12 Jul '09

This is Marvell's 88F6281_A0 based custom board developed for wireless access point product This patch is tested for- 1. Boot from DRAM/SPI flash/NFS 2. File transfer using tftp and loadb 3. SPI flash read/write/erase 4. Booting Linux kernel and RFS from SPI flash 5. Boot from USB supported Reviewed-by: Ronen Shitrit <rshitrit(a)marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla(a)marvell.com> --- Change log v2: updated as per first review comments debug_prints updated to debug v3: updaed as per review comments for v2 added mv88f6281gtw_ge.h file removed BITxx macros v4: updated as per review comments for v3 arch_misc_init support is added and used from kirkwood v5: updated as per review comments for v4 CONFIG_MACH_MV88F6281GTW_GE added more comments added and serial configuration removed from mv88f6281gtw_ge.c V6: clean switch configuration using netdev.h v7: Marvell copyright removed from u-boot.lds Maintainer added for this board v8: u-boot.lds removed finetuned for cosmetic and switch related changes v9: new mpp configuration used CONFIG_ARCH_LOWLEVEL_INIT defination removed v10: CONFIG_ENV_SIZE set to 4kb CONFIG_SYS_MALLOC_LEN set to 128kb v11: updated as per feedback for v10 copyright statement corrected mtdparts definition corrected all code lines checked for max len 80 chars v12: config_cmd_default.h used in board config entry in MAINTAINERS list added MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 3 + board/Marvell/mv88f6281gtw_ge/Makefile | 51 ++++++ board/Marvell/mv88f6281gtw_ge/config.mk | 25 +++ board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 141 ++++++++++++++++ board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h | 36 ++++ include/configs/mv88f6281gtw_ge.h | 202 +++++++++++++++++++++++ 8 files changed, 460 insertions(+), 0 deletions(-) create mode 100644 board/Marvell/mv88f6281gtw_ge/Makefile create mode 100644 board/Marvell/mv88f6281gtw_ge/config.mk create mode 100644 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c create mode 100644 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h create mode 100644 include/configs/mv88f6281gtw_ge.h diff --git a/MAINTAINERS b/MAINTAINERS index 2f3b63c..76268b4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -675,6 +675,7 @@ Hugo Villeneuve <hugo.villeneuve(a)lyrtech.com> Prafulla Wadaskar <prafulla(a)marvell.com> + mv88f6281gtw_ge ARM926EJS (Kirkwood SoC) sheevaplug ARM926EJS (Kirkwood SoC) Richard Woodruff <r-woodruff2(a)ti.com> diff --git a/MAKEALL b/MAKEALL index e987d4a..4e1f431 100755 --- a/MAKEALL +++ b/MAKEALL @@ -510,6 +510,7 @@ LIST_ARM9=" \ cp946es \ cp966 \ lpd7a400 \ + mv88f6281gtw_ge \ mx1ads \ mx1fs2 \ netstar \ diff --git a/Makefile b/Makefile index a66c4c7..b4d8c80 100644 --- a/Makefile +++ b/Makefile @@ -2853,6 +2853,9 @@ lpd7a400_config \ lpd7a404_config: unconfig @$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x +mv88f6281gtw_ge_config: unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood + mx1ads_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t mx1ads NULL imx diff --git a/board/Marvell/mv88f6281gtw_ge/Makefile b/board/Marvell/mv88f6281gtw_ge/Makefile new file mode 100644 index 0000000..92d0b47 --- /dev/null +++ b/board/Marvell/mv88f6281gtw_ge/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla(a)marvell.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := mv88f6281gtw_ge.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/Marvell/mv88f6281gtw_ge/config.mk b/board/Marvell/mv88f6281gtw_ge/config.mk new file mode 100644 index 0000000..a4ea769 --- /dev/null +++ b/board/Marvell/mv88f6281gtw_ge/config.mk @@ -0,0 +1,25 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla(a)marvell.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +TEXT_BASE = 0x00600000 diff --git a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c new file mode 100644 index 0000000..c959bf8 --- /dev/null +++ b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c @@ -0,0 +1,141 @@ +/* + * Maintainer : Prafulla Wadaskar <prafulla(a)marvell.com> + * + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla(a)marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <netdev.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include "mv88f6281gtw_ge.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(MV88F6281GTW_GE_OE_VAL_LOW, + MV88F6281GTW_GE_OE_VAL_HIGH, + MV88F6281GTW_GE_OE_LOW, MV88F6281GTW_GE_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_SPI_SCn, + MPP1_SPI_MOSI, + MPP2_SPI_SCK, + MPP3_SPI_MISO, + MPP4_GPIO, + MPP5_GPO, + MPP6_SYSRST_OUTn, + MPP7_SPI_SCn, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_GPO, + MPP13_GPIO, + MPP14_GPIO, + MPP15_GPIO, + MPP16_GPIO, + MPP17_GPIO, + MPP18_GPO, + MPP19_GPO, + MPP20_GPIO, + MPP21_GPIO, + MPP22_GPIO, + MPP23_GPIO, + MPP24_GPIO, + MPP25_GPIO, + MPP26_GPIO, + MPP27_GPIO, + MPP28_GPIO, + MPP29_GPIO, + MPP30_GPIO, + MPP31_GPIO, + MPP32_GPIO, + MPP33_GPIO, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + + /* + * arch number of board + */ + gd->bd->bi_arch_number = MACH_TYPE_MV88F6281GTW_GE; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +int dram_init(void) +{ + int i; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + gd->bd->bi_dram[i].start = kw_sdram_bar(i); + gd->bd->bi_dram[i].size = kw_sdram_bs(i); + } + return 0; +} + +#ifdef CONFIG_MV88E61XX_SWITCH +void reset_phy(void) +{ + /* configure and initialize switch */ + struct mv88e61xx_config swcfg = { + .name = "egiga0", + .vlancfg = MV88E61XX_VLANCFG_ROUTER, + .rgmii_delay = MV88E61XX_RGMII_DELAY_EN, + .led_init = MV88E61XX_LED_INIT_EN, + .mdip = MV88E61XX_MDIP_REVERSE, + .portstate = MV88E61XX_PORTSTT_FORWARDING, + .cpuport = (1 << 5), + .ports_enabled = 0x3f + }; + + mv88e61xx_switch_initialize(&swcfg); +} +#endif /* CONFIG_MV88E61XX_SWITCH */ diff --git a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h new file mode 100644 index 0000000..65b925d --- /dev/null +++ b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h @@ -0,0 +1,36 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla(a)marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __MV88F6281GTW_GE_H +#define __MV88F6281GTW_GE_H + +#define MV88F6281GTW_GE_OE_LOW (~((1 << 7) | (1 << 12) \ + |(1 << 20) | (1 << 21))) /*enable GLED,RLED */ +#define MV88F6281GTW_GE_OE_HIGH (~((1 << 4)|(1 << 6)|(1 << 7)|(1 << 12) \ + |(1 << 13)|(1 << 16)|(1 << 17))) +#define MV88F6281GTW_GE_OE_VAL_LOW (1 << 20) /*make GLED on */ +#define MV88F6281GTW_GE_OE_VAL_HIGH ((1 << 6)|(1 << 13)|(1 << 16)|(1 << 17)) + + +#endif /* __MV88F6281GTW_GE_H */ diff --git a/include/configs/mv88f6281gtw_ge.h b/include/configs/mv88f6281gtw_ge.h new file mode 100644 index 0000000..f915212 --- /dev/null +++ b/include/configs/mv88f6281gtw_ge.h @@ -0,0 +1,202 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla(a)marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_MV88F6281GTW_GE_H +#define _CONFIG_MV88F6281GTW_GE_H + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nMarvell-MV88F6281GTW_GE-A0" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_MARVELL 1 +#define CONFIG_ARM926EJS 1 /* Basic Architecture */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_MACH_MV88F6281GTW_GE /* Machine type */ + +#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ +#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ +#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ + +/* + * CLKs configurations + */ +#define CONFIG_SYS_HZ 1000 + +/* + * NS16550 Configuration + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE + +/* + * Serial Port configuration + * The following definitions let you select what serial you want to use + * for your console driver. + */ + +#define CONFIG_CONS_INDEX 1 /*Console on UART0 */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ + 115200,230400, 460800, 921600 } +/* auto boot */ +#define CONFIG_BOOTDELAY 3 /* default enable autoboot */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ +#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ + +#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ + +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ +/* + * Commands configuration + */ +#undef CONFIG_CMD_FLASH +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ + +#include <config_cmd_default.h> +#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FAT +#define CONFIG_CMD_PING +#define CONFIG_CMD_SF +#define CONFIG_CMD_USB + +/* + * Flash configuration + */ +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH 1 +#define CONFIG_HARD_SPI 1 +#define CONFIG_KIRKWOOD_SPI 1 +#define CONFIG_SPI_FLASH_MACRONIX 1 +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 50000000 /*50Mhz */ +#endif + +/* + * Environment variables configurations + */ +#ifdef CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K */ +#else +#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ +#endif +#define CONFIG_ENV_SIZE 0x1000 /* 4k */ +#define CONFIG_ENV_ADDR 0x30000 +#define CONFIG_ENV_OFFSET 0x30000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \ + "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ + "${x_bootcmd_usb}; bootm 0x6400000;" + +#define CONFIG_MTDPARTS "spi0.0:512k(uboot)," \ + "512k@512k(psm),2m@1m(kernel),13m@3m(rootfs)\0" + +#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ + "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS \ + "x_bootcmd_kernel=cp.b 0xE8100000 0x6400000 0x200000\0" \ + "x_bootcmd_usb=usb start\0" \ + "x_bootargs_root=root=/dev/mtdblock3 ro rootfstype=squashfs\0" + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */ +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * Other required minimal configurations + */ +#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ +#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ +#define CONFIG_NR_DRAM_BANKS 4 +#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ +#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ +#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ +#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ +#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_NETCONSOLE /* include NetConsole support */ +#define CONFIG_NET_MULTI /* specify more that one ports available */ +#define CONFIG_MII /* expose smi ove miiphy interface */ +#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ +#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0} /* enable port 0 only */ +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ +#endif /* CONFIG_CMD_NET */ + +/* + * Marvell 88Exxxx Switch configurations + */ +#define CONFIG_RESET_PHY_R /* use reset_phy() to init phy/swtich */ +#define CONFIG_MV88E61XX_SWITCH /* Enable mv88e61xx switch driver */ + +/* + * USB/EHCI + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */ +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_ISO_PARTITION +#define CONFIG_SUPPORT_VFAT +#endif /* CONFIG_CMD_USB */ + +#endif /* _CONFIG_MV88F6281GTW_GE_H */ -- 1.5.3.3

2 1

[U-Boot] macb: get mac address from environment
by Andrzej Wolski 12 Jul '09

12 Jul '09

This fix macb driver broken by commit 56b555a644f3cbb1b3929cb52b61d3ce483885f5 Signed-off-by: Andrzej Wolski <awolski(a)poczta.fm> --- diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 6de0a04..0d2ef5e 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -408,8 +408,7 @@ static int macb_init(struct eth_device *netdev, bd_t *bd) { struct macb_device *macb = to_macb(netdev); unsigned long paddr; - u32 hwaddr_bottom; - u16 hwaddr_top; + uchar enetaddr[6]; int i; /* @@ -439,10 +438,10 @@ static int macb_init(struct eth_device *netdev, bd_t *bd) macb_writel(macb, TBQP, macb->tx_ring_dma); /* set hardware address */ - hwaddr_bottom = cpu_to_le32(*((u32 *)netdev->enetaddr)); - macb_writel(macb, SA1B, hwaddr_bottom); - hwaddr_top = cpu_to_le16(*((u16 *)(netdev->enetaddr + 4))); - macb_writel(macb, SA1T, hwaddr_top); + eth_getenv_enetaddr("ethaddr", enetaddr); + macb_writel(macb, SA1B, (enetaddr[3] << 24) | (enetaddr[2] << 16) + | (enetaddr[1] << 8) | (enetaddr[0])); + macb_writel(macb, SA1T, (enetaddr[5] << 8) | (enetaddr[4])); /* choose RMII or MII mode. This depends on the board */ #ifdef CONFIG_RMII --

2 4

[U-Boot] Some puzzles about u-boot.lds
by Peter Chen 11 Jul '09

11 Jul '09

Dear lists, I met some problems about integrate our bootloader to u-boot, my working CPU is ARM1136EJ-S. Our boot routine likes below: 1. Rom code, and copy the first 4KB u-boot to ITCM (0x70000000), switch to u-boot. ( cpu/arm1136/start.S) 2. u-boot running at ITCM, and config PLL, and memory, and switch to romcode. (board/xxx/lowlevel_init.S) 3. If it is cold boot, copy the whole u-boot to Ram (the address ram address is 0xc1000000) 4. Back from the rom code, and running first part of u-boot at ITCM. (board/xxx/lowlevel_init.S, and cpu/arm1136/start.S) 5. After finishing setup stack and clear bss, jump to the start_armboot (cpu/arm1136/start.S), the VMA of start_armboot is ram address (0xc1000xxx) I would like the first part is at 0x70000000( both VMA and LMA), and the second part is at 0xc1000000 + sizeof(first boot), so I design the u-boot.lds like below: OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) ENTRY(_start) SECTIONS { . = ALIGN(4); . = 0x70000000; .textboot : { cpu/arm1136/start.o (.text) board/atlas5cb/lowlevel_init.o (.text) } . = ALIGN(4); _textram_start = 0xC1000000 + SIZEOF(.textboot); .textram 0xC1000000 + SIZEOF(.textboot): AT ( _textram_start ) { *(.text) } . = ALIGN(4); .rodata : { *(.rodata) } .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } __exidx_start = .; .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } __exidx_end = .; . = .; __u_boot_cmd_start = .; .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; . = ALIGN(4); __bss_start = .; .bss : { *(.bss) } _end = .; } But it can't finish the link, it stops at: arm-none-linux-gnueabi-objcopy --gap-fill=0xff -O srec /home/nchen/work/L27EVB/Dev/bootloader/uboot/u-boot /home/nchen/work/L27EVB/Dev/out/bootloader/uboot/u-boot.srec Why I can't set two LMA for two different text sections? It can work after I change the second text section's LMA just near to the first one ... . = 0x70000000; .textboot : { cpu/arm1136/start.o (.text) board/xxx/lowlevel_init.o (.text) } . = ALIGN(4); .textram 0xC1000000 + SIZEOF(.textboot): AT ( ADDR(.textboot) + SIZEOF(.textboot) ) { *(.text) } After that my output layout like to be: Idx Name Size VMA LMA File off Algn 0 .textboot 00000950 70000000 70000000 00008000 2**5 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .textram 000130e0 c1000950 70000950 00008950 2**5 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00001858 c1013a30 70013a30 0001ba30 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .rodata.str1.1 00003442 c1015288 70015288 0001d288 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 4 .data 000407a4 c10186cc 700186cc 000206cc 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .u_boot_cmd 00000348 c1058e70 70058e70 00060e70 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 00004cb4 c10591b8 700591b8 000611b8 2**2 ALLOC It should be ok If I set pc to VMA of start_armboot, as all parts of u-boot is at correct ram regions now, although I did not do relocate. After executing: ldr pc, [r0] /* r0 stores VMA of start_armboot) The pc goes to the undefined address, but I can set pc to start_armboot using realview debugger. Do you have any clues for such problems, Is it possible that my u-boot.lds is not correct? Although I can set pc to start_armboot, and let it run, but the system's behavior is incorrect, and can't output anything. By the way, the old structure ( our bootloader + u-boot + Linux ) is work well, so the second part of u-boot should be ok. Thank you Best Regards, Peter Chen

1 0

[U-Boot] [PATCH-ARM] Add support for Embest SBC2440-II Board 1/7
by kevin.morfitt＠fearnside-systems.co.uk 11 Jul '09

11 Jul '09

Patches 1 to 4 replace "[PATCH-ARM 1/2] Add support for the Embest SBC2440-II Board 1/2" submitted on 19/06/2009. This patch re-formats the code in cpu/arm920t and cpu/arm920t/23c24x0 in preparation for changes to add support for the Embest SBC2440-II Board. The changes are as follows: - re-indent the code using Lindent - make sure register layouts are defined using a C struct, from a comment by Wolfgang on 03/06/2009 - replace the upper-case typedef'ed C struct names with lower case non-typedef'ed ones, from a comment by Scott on 22/06/2009 - make sure registers are accessed using the proper accessor functions, from a comment by Wolfgang on 03/06/2009 - run checkpatch.pl and fix any error reports Note that usb_ohci.c still has two lines that exceed 80 characters. This is because the statements on those lines lose readability when wrapped - the Linux coding style guidleines allows for this. This complete series of patches assumes the following patches have already been applied: - [PATCH-ARM] Bug-fix in drivers mtd nand Makefile, sent 18/06/2009 - [PATCH-ARM] CONFIG_SYS_HZ fix for ARM920T S3C24X0 Boards, sent 21/06/2009 Signed-off-by: Kevin Morfitt <kevin.morfitt(a)fearnside-systems.co.uk> --- cpu/arm920t/s3c24x0/speed.c | 42 +- cpu/arm920t/s3c24x0/timer.c | 80 ++-- cpu/arm920t/s3c24x0/usb.c | 30 +- cpu/arm920t/s3c24x0/usb_ohci.c | 1268 +++++++++++++++++++++------------------- cpu/arm920t/s3c24x0/usb_ohci.h | 187 +++--- cpu/arm920t/start.S | 63 +- 6 files changed, 875 insertions(+), 795 deletions(-) diff --git a/cpu/arm920t/s3c24x0/speed.c b/cpu/arm920t/s3c24x0/speed.c index e0dca62..bb86335 100644 --- a/cpu/arm920t/s3c24x0/speed.c +++ b/cpu/arm920t/s3c24x0/speed.c @@ -32,6 +32,8 @@ #include <common.h> #if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) +#include <asm/io.h> + #if defined(CONFIG_S3C2400) #include <s3c2400.h> #elif defined(CONFIG_S3C2410) @@ -53,49 +55,51 @@ static ulong get_PLLCLK(int pllreg) { - S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); - ulong r, m, p, s; + struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER(); + ulong r, m, p, s; - if (pllreg == MPLL) - r = clk_power->MPLLCON; - else if (pllreg == UPLL) - r = clk_power->UPLLCON; - else - hang(); + if (pllreg == MPLL) + r = readl(&clk_power->MPLLCON); + else if (pllreg == UPLL) + r = readl(&clk_power->UPLLCON); + else + hang(); - m = ((r & 0xFF000) >> 12) + 8; - p = ((r & 0x003F0) >> 4) + 2; - s = r & 0x3; + m = ((r & 0xFF000) >> 12) + 8; + p = ((r & 0x003F0) >> 4) + 2; + s = r & 0x3; - return((CONFIG_SYS_CLK_FREQ * m) / (p << s)); + return (CONFIG_SYS_CLK_FREQ * m) / (p << s); } /* return FCLK frequency */ ulong get_FCLK(void) { - return(get_PLLCLK(MPLL)); + return get_PLLCLK(MPLL); } /* return HCLK frequency */ ulong get_HCLK(void) { - S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); + struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER(); - return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK()); + return (readl(&clk_power->CLKDIVN) & 2) ? get_FCLK() / 2 : get_FCLK(); } /* return PCLK frequency */ ulong get_PCLK(void) { - S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); + struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER(); - return((clk_power->CLKDIVN & 0x1) ? get_HCLK()/2 : get_HCLK()); + return (readl(&clk_power->CLKDIVN) & 1) ? get_HCLK() / 2 : get_HCLK(); } /* return UCLK frequency */ ulong get_UCLK(void) { - return(get_PLLCLK(UPLL)); + return get_PLLCLK(UPLL); } -#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */ +#endif /* defined(CONFIG_S3C2400) || + defined (CONFIG_S3C2410) || + defined (CONFIG_TRAB) */ diff --git a/cpu/arm920t/s3c24x0/timer.c b/cpu/arm920t/s3c24x0/timer.c index 8ea2e4b..0aa7947 100644 --- a/cpu/arm920t/s3c24x0/timer.c +++ b/cpu/arm920t/s3c24x0/timer.c @@ -30,7 +30,11 @@ */ #include <common.h> -#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) +#if defined(CONFIG_S3C2400) || \ + defined(CONFIG_S3C2410) || \ + defined(CONFIG_TRAB) + +#include <asm/io.h> #if defined(CONFIG_S3C2400) #include <s3c2400.h> @@ -45,9 +49,9 @@ static ulong timer_clk; /* macro to read the 16 bit timer */ static inline ulong READ_TIMER(void) { - S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS(); + struct s3c24x0_timers *timers = S3C24X0_GetBase_TIMERS(); - return (timers->TCNTO4 & 0xffff); + return readl(&timers->TCNTO4) & 0xffff; } static ulong timestamp; @@ -55,27 +59,30 @@ static ulong lastdec; int timer_init (void) { - S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS(); + struct s3c24x0_timers *timers = S3C24X0_GetBase_TIMERS(); + ulong tmr; /* use PWM Timer 4 because it has no output */ /* prescaler for Timer 4 is 16 */ - timers->TCFG0 = 0x0f00; - if (timer_load_val == 0) - { + writel(0x0f00, &timers->TCFG0); + if (timer_load_val == 0) { /* * for 10 ms clock period @ PCLK with 4 bit divider = 1/2 * (default) and prescaler = 16. Should be 10390 * @33.25MHz and 15625 @ 50 MHz */ - timer_load_val = get_PCLK()/(2 * 16 * 100); + timer_load_val = get_PCLK() / (2 * 16 * 100); timer_clk = get_PCLK() / (2 * 16); } /* load value for 10 ms timeout */ - lastdec = timers->TCNTB4 = timer_load_val; + lastdec = timer_load_val; + writel(timer_load_val, &timers->TCNTB4); /* auto load, manual update of Timer 4 */ - timers->TCON = (timers->TCON & ~0x0700000) | 0x600000; + tmr = (readl(&timers->TCON) & ~0x0700000) | 0x0600000; + writel(tmr, &timers->TCON); /* auto load, start Timer 4 */ - timers->TCON = (timers->TCON & ~0x0700000) | 0x500000; + tmr = (tmr & ~0x0700000) | 0x0500000; + writel(tmr, &timers->TCON); timestamp = 0; return (0); @@ -85,22 +92,22 @@ int timer_init (void) * timer without interrupts */ -void reset_timer (void) -{ - reset_timer_masked (); -} +void reset_timer(void) + { + reset_timer_masked(); + } -ulong get_timer (ulong base) +ulong get_timer(ulong base) { - return get_timer_masked () - base; + return get_timer_masked() - base; } -void set_timer (ulong t) +void set_timer(ulong t) { timestamp = t; } -void udelay (unsigned long usec) +void udelay(unsigned long usec) { ulong tmo; ulong start = get_timer_raw(); @@ -113,21 +120,21 @@ void udelay (unsigned long usec) /*NOP*/; } -void reset_timer_masked (void) +void reset_timer_masked(void) { /* reset time */ lastdec = READ_TIMER(); timestamp = 0; } -ulong get_timer_masked (void) +ulong get_timer_masked(void) { ulong tmr = get_timer_raw(); return tmr / (timer_clk / CONFIG_SYS_HZ); } -void udelay_masked (unsigned long usec) +void udelay_masked(unsigned long usec) { ulong tmo; ulong endtime; @@ -139,7 +146,7 @@ void udelay_masked (unsigned long usec) tmo /= 1000; } else { tmo = usec * (timer_load_val * 100); - tmo /= (1000*1000); + tmo /= (1000 * 1000); } endtime = get_timer_raw() + tmo; @@ -179,7 +186,7 @@ unsigned long long get_ticks(void) * This function is derived from PowerPC code (timebase clock frequency). * On ARM it returns the number of timer ticks per second. */ -ulong get_tbclk (void) +ulong get_tbclk(void) { ulong tbclk; @@ -199,28 +206,27 @@ ulong get_tbclk (void) /* * reset the cpu by setting up the watchdog timer and let him time out */ -void reset_cpu (ulong ignored) +void reset_cpu(ulong ignored) { - volatile S3C24X0_WATCHDOG * watchdog; + struct s3c24x0_watchdog *watchdog; #ifdef CONFIG_TRAB - extern void disable_vfd (void); - disable_vfd(); #endif watchdog = S3C24X0_GetBase_WATCHDOG(); /* Disable watchdog */ - watchdog->WTCON = 0x0000; + writel(0x0000, &watchdog->WTCON); /* Initialize watchdog timer count register */ - watchdog->WTCNT = 0x0001; + writel(0x0001, &watchdog->WTCNT); /* Enable watchdog timer; assert reset at timer timeout */ - watchdog->WTCON = 0x0021; + writel(0x0021, &watchdog->WTCON); - while(1); /* loop forever and wait for reset to happen */ + while (1) + /* loop forever and wait for reset to happen */; /*NOTREACHED*/ } @@ -228,10 +234,12 @@ void reset_cpu (ulong ignored) #ifdef CONFIG_USE_IRQ void s3c2410_irq(void) { - S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT(); - u_int32_t intpnd = irq->INTPND; - + struct s3c24x0_interrupt *irq = S3C24X0_GetBase_INTERRUPT(); + u_int32_t intpnd = readl(&irq->INTPND); } #endif /* USE_IRQ */ -#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */ +#endif /* defined(CONFIG_S3C2400) || + defined (CONFIG_S3C2410) || + defined (CONFIG_TRAB) */ + diff --git a/cpu/arm920t/s3c24x0/usb.c b/cpu/arm920t/s3c24x0/usb.c index 9ccf575..1f495ff 100644 --- a/cpu/arm920t/s3c24x0/usb.c +++ b/cpu/arm920t/s3c24x0/usb.c @@ -32,41 +32,43 @@ # include <s3c2410.h> #endif -int usb_cpu_init (void) -{ +#include <asm/io.h> - S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); - S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); +int usb_cpu_init(void) +{ + struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER(); + struct s3c24x0_gpio *gpio = S3C24X0_GetBase_GPIO(); /* * Set the 48 MHz UPLL clocking. Values are taken from * "PLL value selection guide", 6-23, s3c2400_UM.pdf. */ - clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2); - gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */ + writel((40 << 12) + (1 << 4) + 2, &clk_power->UPLLCON); + /* 1 = use pads related USB for USB host */ + writel(readl(&gpio->MISCCR) | 0x8, &gpio->MISCCR); /* * Enable USB host clock. */ - clk_power->CLKCON |= (1 << 4); + writel(readl(&clk_power->CLKCON) | (1 << 4), &clk_power->CLKCON); return 0; } -int usb_cpu_stop (void) +int usb_cpu_stop(void) { - S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); + struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER(); /* may not want to do this */ - clk_power->CLKCON &= ~(1 << 4); + writel(readl(&clk_power->CLKCON) & ~(1 << 4), &clk_power->CLKCON); return 0; } -int usb_cpu_init_fail (void) +int usb_cpu_init_fail(void) { - S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); - clk_power->CLKCON &= ~(1 << 4); + struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER(); + writel(readl(&clk_power->CLKCON) & ~(1 << 4), &clk_power->CLKCON); return 0; } -# endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */ +# endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */ #endif /* defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ diff --git a/cpu/arm920t/s3c24x0/usb_ohci.c b/cpu/arm920t/s3c24x0/usb_ohci.c index 7838014..fe7b533 100644 --- a/cpu/arm920t/s3c24x0/usb_ohci.c +++ b/cpu/arm920t/s3c24x0/usb_ohci.c @@ -44,6 +44,7 @@ #include <s3c2410.h> #endif +#include <asm/io.h> #include <malloc.h> #include <usb.h> #include "usb_ohci.h" @@ -56,10 +57,8 @@ #define OHCI_CONTROL_INIT \ (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE -#define readl(a) (*((volatile u32 *)(a))) -#define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a)) - -#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; }) +#define min_t(type, x, y) \ + ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; }) #undef DEBUG #ifdef DEBUG @@ -109,21 +108,29 @@ int urb_finished = 0; temp = readl (&hc->regs->roothub.register); \ temp; }) -static u32 roothub_a (struct ohci *hc) - { return read_roothub (hc, a, 0xfc0fe000); } -static inline u32 roothub_b (struct ohci *hc) - { return readl (&hc->regs->roothub.b); } -static inline u32 roothub_status (struct ohci *hc) - { return readl (&hc->regs->roothub.status); } -static u32 roothub_portstatus (struct ohci *hc, int i) - { return read_roothub (hc, portstatus [i], 0xffe0fce0); } - +static u32 roothub_a(struct ohci *hc) +{ + return read_roothub(hc, a, 0xfc0fe000); +} +static inline u32 roothub_b(struct ohci *hc) +{ + return readl(&hc->regs->roothub.b); +} +static inline u32 roothub_status(struct ohci *hc) +{ + return readl(&hc->regs->roothub.status); +} +static u32 roothub_portstatus(struct ohci *hc, int i) +{ + return read_roothub(hc, portstatus[i], 0xffe0fce0); +} /* forward declaration */ -static int hc_interrupt (void); -static void -td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer, - int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval); +static int hc_interrupt(void); +static void td_submit_job(struct usb_device *dev, unsigned long pipe, + void *buffer, int transfer_len, + struct devrequest *setup, urb_priv_t *urb, + int interval); /*-------------------------------------------------------------------------* * URB support functions @@ -131,11 +138,11 @@ td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer, /* free HCD-private data associated with this URB */ -static void urb_free_priv (urb_priv_t * urb) +static void urb_free_priv(urb_priv_t *urb) { - int i; - int last; - struct td * td; + int i; + int last; + struct td *td; last = urb->length - 1; if (last >= 0) { @@ -152,227 +159,219 @@ static void urb_free_priv (urb_priv_t * urb) /*-------------------------------------------------------------------------*/ #ifdef DEBUG -static int sohci_get_current_frame_number (struct usb_device * dev); +static int sohci_get_current_frame_number(struct usb_device *dev); /* debug| print the main components of an URB * small: 0) header + data packets 1) just header */ -static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer, - int transfer_len, struct devrequest * setup, char * str, int small) +static void pkt_print(struct usb_device *dev, unsigned long pipe, void *buffer, + int transfer_len, struct devrequest *setup, char *str, + int small) { - urb_priv_t * purb = &urb_priv; + urb_priv_t *purb = &urb_priv; dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx", - str, - sohci_get_current_frame_number (dev), - usb_pipedevice (pipe), - usb_pipeendpoint (pipe), - usb_pipeout (pipe)? 'O': 'I', - usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"): - (usb_pipecontrol (pipe)? "CTRL": "BULK"), - purb->actual_length, - transfer_len, dev->status); + str, + sohci_get_current_frame_number(dev), + usb_pipedevice(pipe), + usb_pipeendpoint(pipe), + usb_pipeout(pipe) ? 'O' : 'I', + usb_pipetype(pipe) < 2 ? + (usb_pipeint(pipe) ? "INTR" : "ISOC") : + (usb_pipecontrol(pipe) ? "CTRL" : "BULK"), + purb->actual_length, transfer_len, dev->status); #ifdef OHCI_VERBOSE_DEBUG if (!small) { int i, len; - if (usb_pipecontrol (pipe)) { - printf (__FILE__ ": cmd(8):"); - for (i = 0; i < 8 ; i++) - printf (" %02x", ((__u8 *) setup) [i]); - printf ("\n"); + if (usb_pipecontrol(pipe)) { + printf(__FILE__ ": cmd(8):"); + for (i = 0; i < 8; i++) + printf(" %02x", ((__u8 *) setup)[i]); + printf("\n"); } if (transfer_len > 0 && buffer) { - printf (__FILE__ ": data(%d/%d):", - purb->actual_length, - transfer_len); - len = usb_pipeout (pipe)? - transfer_len: purb->actual_length; + printf(__FILE__ ": data(%d/%d):", + purb->actual_length, transfer_len); + len = usb_pipeout(pipe) ? + transfer_len : purb->actual_length; for (i = 0; i < 16 && i < len; i++) - printf (" %02x", ((__u8 *) buffer) [i]); - printf ("%s\n", i < len? "...": ""); + printf(" %02x", ((__u8 *) buffer)[i]); + printf("%s\n", i < len ? "..." : ""); } } #endif } -/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/ -void ep_print_int_eds (ohci_t *ohci, char * str) { +/* just for debugging; prints non-empty branches of the + int ed tree inclusive iso eds*/ +void ep_print_int_eds(ohci_t *ohci, char *str) +{ int i, j; - __u32 * ed_p; - for (i= 0; i < 32; i++) { + __u32 *ed_p; + for (i = 0; i < 32; i++) { j = 5; - ed_p = &(ohci->hcca->int_table [i]); + ed_p = &(ohci->hcca->int_table[i]); if (*ed_p == 0) - continue; - printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i); + continue; + printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i); while (*ed_p != 0 && j--) { - ed_t *ed = (ed_t *)m32_swap(ed_p); - printf (" ed: %4x;", ed->hwINFO); + ed_t *ed = (ed_t *) m32_swap(ed_p); + printf(" ed: %4x;", ed->hwINFO); ed_p = &ed->hwNextED; } - printf ("\n"); + printf("\n"); } } -static void ohci_dump_intr_mask (char *label, __u32 mask) +static void ohci_dump_intr_mask(char *label, __u32 mask) { - dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s", - label, - mask, - (mask & OHCI_INTR_MIE) ? " MIE" : "", - (mask & OHCI_INTR_OC) ? " OC" : "", - (mask & OHCI_INTR_RHSC) ? " RHSC" : "", - (mask & OHCI_INTR_FNO) ? " FNO" : "", - (mask & OHCI_INTR_UE) ? " UE" : "", - (mask & OHCI_INTR_RD) ? " RD" : "", - (mask & OHCI_INTR_SF) ? " SF" : "", - (mask & OHCI_INTR_WDH) ? " WDH" : "", - (mask & OHCI_INTR_SO) ? " SO" : "" - ); + dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s", + label, + mask, + (mask & OHCI_INTR_MIE) ? " MIE" : "", + (mask & OHCI_INTR_OC) ? " OC" : "", + (mask & OHCI_INTR_RHSC) ? " RHSC" : "", + (mask & OHCI_INTR_FNO) ? " FNO" : "", + (mask & OHCI_INTR_UE) ? " UE" : "", + (mask & OHCI_INTR_RD) ? " RD" : "", + (mask & OHCI_INTR_SF) ? " SF" : "", + (mask & OHCI_INTR_WDH) ? " WDH" : "", + (mask & OHCI_INTR_SO) ? " SO" : ""); } -static void maybe_print_eds (char *label, __u32 value) +static void maybe_print_eds(char *label, __u32 value) { - ed_t *edp = (ed_t *)value; + ed_t *edp = (ed_t *) value; if (value) { - dbg ("%s %08x", label, value); - dbg ("%08x", edp->hwINFO); - dbg ("%08x", edp->hwTailP); - dbg ("%08x", edp->hwHeadP); - dbg ("%08x", edp->hwNextED); + dbg("%s %08x", label, value); + dbg("%08x", edp->hwINFO); + dbg("%08x", edp->hwTailP); + dbg("%08x", edp->hwHeadP); + dbg("%08x", edp->hwNextED); } } -static char * hcfs2string (int state) +static char *hcfs2string(int state) { switch (state) { - case OHCI_USB_RESET: return "reset"; - case OHCI_USB_RESUME: return "resume"; - case OHCI_USB_OPER: return "operational"; - case OHCI_USB_SUSPEND: return "suspend"; + case OHCI_USB_RESET: + return "reset"; + case OHCI_USB_RESUME: + return "resume"; + case OHCI_USB_OPER: + return "operational"; + case OHCI_USB_SUSPEND: + return "suspend"; } return "?"; } /* dump control and status registers */ -static void ohci_dump_status (ohci_t *controller) +static void ohci_dump_status(ohci_t *controller) { - struct ohci_regs *regs = controller->regs; - __u32 temp; + struct ohci_regs *regs = controller->regs; + __u32 temp; - temp = readl (&regs->revision) & 0xff; + temp = readl(&regs->revision) & 0xff; if (temp != 0x10) - dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f)); - - temp = readl (&regs->control); - dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp, - (temp & OHCI_CTRL_RWE) ? " RWE" : "", - (temp & OHCI_CTRL_RWC) ? " RWC" : "", - (temp & OHCI_CTRL_IR) ? " IR" : "", - hcfs2string (temp & OHCI_CTRL_HCFS), - (temp & OHCI_CTRL_BLE) ? " BLE" : "", - (temp & OHCI_CTRL_CLE) ? " CLE" : "", - (temp & OHCI_CTRL_IE) ? " IE" : "", - (temp & OHCI_CTRL_PLE) ? " PLE" : "", - temp & OHCI_CTRL_CBSR - ); - - temp = readl (&regs->cmdstatus); - dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp, - (temp & OHCI_SOC) >> 16, - (temp & OHCI_OCR) ? " OCR" : "", - (temp & OHCI_BLF) ? " BLF" : "", - (temp & OHCI_CLF) ? " CLF" : "", - (temp & OHCI_HCR) ? " HCR" : "" - ); - - ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus)); - ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable)); - - maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent)); - - maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead)); - maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent)); - - maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead)); - maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent)); - - maybe_print_eds ("donehead", readl (&regs->donehead)); + dbg("spec %d.%d", (temp >> 4), (temp & 0x0f)); + + temp = readl(&regs->control); + dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp, + (temp & OHCI_CTRL_RWE) ? " RWE" : "", + (temp & OHCI_CTRL_RWC) ? " RWC" : "", + (temp & OHCI_CTRL_IR) ? " IR" : "", + hcfs2string(temp & OHCI_CTRL_HCFS), + (temp & OHCI_CTRL_BLE) ? " BLE" : "", + (temp & OHCI_CTRL_CLE) ? " CLE" : "", + (temp & OHCI_CTRL_IE) ? " IE" : "", + (temp & OHCI_CTRL_PLE) ? " PLE" : "", temp & OHCI_CTRL_CBSR); + + temp = readl(&regs->cmdstatus); + dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp, + (temp & OHCI_SOC) >> 16, + (temp & OHCI_OCR) ? " OCR" : "", + (temp & OHCI_BLF) ? " BLF" : "", + (temp & OHCI_CLF) ? " CLF" : "", (temp & OHCI_HCR) ? " HCR" : ""); + + ohci_dump_intr_mask("intrstatus", readl(&regs->intrstatus)); + ohci_dump_intr_mask("intrenable", readl(&regs->intrenable)); + + maybe_print_eds("ed_periodcurrent", readl(&regs->ed_periodcurrent)); + + maybe_print_eds("ed_controlhead", readl(&regs->ed_controlhead)); + maybe_print_eds("ed_controlcurrent", readl(&regs->ed_controlcurrent)); + + maybe_print_eds("ed_bulkhead", readl(&regs->ed_bulkhead)); + maybe_print_eds("ed_bulkcurrent", readl(&regs->ed_bulkcurrent)); + + maybe_print_eds("donehead", readl(&regs->donehead)); } -static void ohci_dump_roothub (ohci_t *controller, int verbose) +static void ohci_dump_roothub(ohci_t *controller, int verbose) { - __u32 temp, ndp, i; + __u32 temp, ndp, i; - temp = roothub_a (controller); + temp = roothub_a(controller); ndp = (temp & RH_A_NDP); if (verbose) { - dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp, - ((temp & RH_A_POTPGT) >> 24) & 0xff, - (temp & RH_A_NOCP) ? " NOCP" : "", - (temp & RH_A_OCPM) ? " OCPM" : "", - (temp & RH_A_DT) ? " DT" : "", - (temp & RH_A_NPS) ? " NPS" : "", - (temp & RH_A_PSM) ? " PSM" : "", - ndp - ); - temp = roothub_b (controller); - dbg ("roothub.b: %08x PPCM=%04x DR=%04x", - temp, - (temp & RH_B_PPCM) >> 16, - (temp & RH_B_DR) - ); - temp = roothub_status (controller); - dbg ("roothub.status: %08x%s%s%s%s%s%s", - temp, - (temp & RH_HS_CRWE) ? " CRWE" : "", - (temp & RH_HS_OCIC) ? " OCIC" : "", - (temp & RH_HS_LPSC) ? " LPSC" : "", - (temp & RH_HS_DRWE) ? " DRWE" : "", - (temp & RH_HS_OCI) ? " OCI" : "", - (temp & RH_HS_LPS) ? " LPS" : "" - ); + dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp, + ((temp & RH_A_POTPGT) >> 24) & 0xff, + (temp & RH_A_NOCP) ? " NOCP" : "", + (temp & RH_A_OCPM) ? " OCPM" : "", + (temp & RH_A_DT) ? " DT" : "", + (temp & RH_A_NPS) ? " NPS" : "", + (temp & RH_A_PSM) ? " PSM" : "", ndp); + temp = roothub_b(controller); + dbg("roothub.b: %08x PPCM=%04x DR=%04x", + temp, (temp & RH_B_PPCM) >> 16, (temp & RH_B_DR) + ); + temp = roothub_status(controller); + dbg("roothub.status: %08x%s%s%s%s%s%s", + temp, + (temp & RH_HS_CRWE) ? " CRWE" : "", + (temp & RH_HS_OCIC) ? " OCIC" : "", + (temp & RH_HS_LPSC) ? " LPSC" : "", + (temp & RH_HS_DRWE) ? " DRWE" : "", + (temp & RH_HS_OCI) ? " OCI" : "", + (temp & RH_HS_LPS) ? " LPS" : ""); } for (i = 0; i < ndp; i++) { - temp = roothub_portstatus (controller, i); - dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s", - i, - temp, - (temp & RH_PS_PRSC) ? " PRSC" : "", - (temp & RH_PS_OCIC) ? " OCIC" : "", - (temp & RH_PS_PSSC) ? " PSSC" : "", - (temp & RH_PS_PESC) ? " PESC" : "", - (temp & RH_PS_CSC) ? " CSC" : "", - - (temp & RH_PS_LSDA) ? " LSDA" : "", - (temp & RH_PS_PPS) ? " PPS" : "", - (temp & RH_PS_PRS) ? " PRS" : "", - (temp & RH_PS_POCI) ? " POCI" : "", - (temp & RH_PS_PSS) ? " PSS" : "", - - (temp & RH_PS_PES) ? " PES" : "", - (temp & RH_PS_CCS) ? " CCS" : "" - ); + temp = roothub_portstatus(controller, i); + dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s", + i, + temp, + (temp & RH_PS_PRSC) ? " PRSC" : "", + (temp & RH_PS_OCIC) ? " OCIC" : "", + (temp & RH_PS_PSSC) ? " PSSC" : "", + (temp & RH_PS_PESC) ? " PESC" : "", + (temp & RH_PS_CSC) ? " CSC" : "", + (temp & RH_PS_LSDA) ? " LSDA" : "", + (temp & RH_PS_PPS) ? " PPS" : "", + (temp & RH_PS_PRS) ? " PRS" : "", + (temp & RH_PS_POCI) ? " POCI" : "", + (temp & RH_PS_PSS) ? " PSS" : "", + (temp & RH_PS_PES) ? " PES" : "", + (temp & RH_PS_CCS) ? " CCS" : ""); } } -static void ohci_dump (ohci_t *controller, int verbose) +static void ohci_dump(ohci_t *controller, int verbose) { - dbg ("OHCI controller usb-%s state", controller->slot_name); + dbg("OHCI controller usb-%s state", controller->slot_name); /* dumps some of the state we know about */ - ohci_dump_status (controller); + ohci_dump_status(controller); if (verbose) - ep_print_int_eds (controller, "hcca"); - dbg ("hcca frame #%04x", controller->hcca->frame_no); - ohci_dump_roothub (controller, 1); + ep_print_int_eds(controller, "hcca"); + dbg("hcca frame #%04x", controller->hcca->frame_no); + ohci_dump_roothub(controller, 1); } - #endif /* DEBUG */ /*-------------------------------------------------------------------------* @@ -382,10 +381,10 @@ static void ohci_dump (ohci_t *controller, int verbose) /* get a transfer request */ int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer, - int transfer_len, struct devrequest *setup, int interval) + int transfer_len, struct devrequest *setup, int interval) { ohci_t *ohci; - ed_t * ed; + ed_t *ed; urb_priv_t *purb_priv; int i, size = 0; @@ -405,24 +404,27 @@ int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer, err("sohci_submit_job: URB NOT FINISHED"); return -1; } - /* we're about to begin a new transaction here so mark the URB unfinished */ + /* we're about to begin a new transaction here + so mark the URB unfinished */ urb_finished = 0; /* every endpoint has a ed, locate and fill it */ - if (!(ed = ep_add_ed (dev, pipe))) { + ed = ep_add_ed(dev, pipe); + if (!ed) { err("sohci_submit_job: ENOMEM"); return -1; } /* for the private part of the URB we need the number of TDs (size) */ - switch (usb_pipetype (pipe)) { - case PIPE_BULK: /* one TD for every 4096 Byte */ - size = (transfer_len - 1) / 4096 + 1; - break; - case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */ - size = (transfer_len == 0)? 2: - (transfer_len - 1) / 4096 + 3; - break; + switch (usb_pipetype(pipe)) { + case PIPE_BULK: + /* one TD for every 4096 Byte */ + size = (transfer_len - 1) / 4096 + 1; + break; + case PIPE_CONTROL: + /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */ + size = (transfer_len == 0) ? 2 : (transfer_len - 1) / 4096 + 3; + break; } if (size >= (N_URB_TD - 1)) { @@ -440,27 +442,28 @@ int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer, /* allocate the TDs */ /* note that td[0] was allocated in ep_add_ed */ for (i = 0; i < size; i++) { - purb_priv->td[i] = td_alloc (dev); + purb_priv->td[i] = td_alloc(dev); if (!purb_priv->td[i]) { purb_priv->length = i; - urb_free_priv (purb_priv); + urb_free_priv(purb_priv); err("sohci_submit_job: ENOMEM"); return -1; } } if (ed->state == ED_NEW || (ed->state & ED_DEL)) { - urb_free_priv (purb_priv); + urb_free_priv(purb_priv); err("sohci_submit_job: EINVAL"); return -1; } /* link the ed into a chain if is not already */ if (ed->state != ED_OPER) - ep_link (ohci, ed); + ep_link(ohci, ed); /* fill the TDs and link it to the ed */ - td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval); + td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, + interval); return 0; } @@ -470,11 +473,11 @@ int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer, #ifdef DEBUG /* tell us the current USB frame number */ -static int sohci_get_current_frame_number (struct usb_device *usb_dev) +static int sohci_get_current_frame_number(struct usb_device *usb_dev) { ohci_t *ohci = &gohci; - return m16_swap (ohci->hcca->frame_no); + return m16_swap(ohci->hcca->frame_no); } #endif @@ -484,7 +487,7 @@ static int sohci_get_current_frame_number (struct usb_device *usb_dev) /* link an ed into one of the HC chains */ -static int ep_link (ohci_t *ohci, ed_t *edi) +static int ep_link(ohci_t *ohci, ed_t *edi) { volatile ed_t *ed = edi; @@ -494,15 +497,15 @@ static int ep_link (ohci_t *ohci, ed_t *edi) case PIPE_CONTROL: ed->hwNextED = 0; if (ohci->ed_controltail == NULL) { - writel (ed, &ohci->regs->ed_controlhead); + writel((u32)ed, &ohci->regs->ed_controlhead); } else { - ohci->ed_controltail->hwNextED = (__u32)m32_swap (ed); + ohci->ed_controltail->hwNextED = (__u32) m32_swap(ed); } ed->ed_prev = ohci->ed_controltail; if (!ohci->ed_controltail && !ohci->ed_rm_list[0] && - !ohci->ed_rm_list[1] && !ohci->sleeping) { + !ohci->ed_rm_list[1] && !ohci->sleeping) { ohci->hc_control |= OHCI_CTRL_CLE; - writel (ohci->hc_control, &ohci->regs->control); + writel(ohci->hc_control, &ohci->regs->control); } ohci->ed_controltail = edi; break; @@ -510,15 +513,15 @@ static int ep_link (ohci_t *ohci, ed_t *edi) case PIPE_BULK: ed->hwNextED = 0; if (ohci->ed_bulktail == NULL) { - writel (ed, &ohci->regs->ed_bulkhead); + writel((u32)ed, &ohci->regs->ed_bulkhead); } else { - ohci->ed_bulktail->hwNextED = (__u32)m32_swap (ed); + ohci->ed_bulktail->hwNextED = (__u32) m32_swap(ed); } ed->ed_prev = ohci->ed_bulktail; if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] && - !ohci->ed_rm_list[1] && !ohci->sleeping) { + !ohci->ed_rm_list[1] && !ohci->sleeping) { ohci->hc_control |= OHCI_CTRL_BLE; - writel (ohci->hc_control, &ohci->regs->control); + writel(ohci->hc_control, &ohci->regs->control); } ohci->ed_bulktail = edi; break; @@ -533,25 +536,27 @@ static int ep_link (ohci_t *ohci, ed_t *edi) * the link from the ed still points to another operational ed or 0 * so the HC can eventually finish the processing of the unlinked ed */ -static int ep_unlink (ohci_t *ohci, ed_t *ed) +static int ep_unlink(ohci_t *ohci, ed_t *ed) { - ed->hwINFO |= m32_swap (OHCI_ED_SKIP); + ed->hwINFO |= m32_swap(OHCI_ED_SKIP); switch (ed->type) { case PIPE_CONTROL: if (ed->ed_prev == NULL) { if (!ed->hwNextED) { ohci->hc_control &= ~OHCI_CTRL_CLE; - writel (ohci->hc_control, &ohci->regs->control); + writel(ohci->hc_control, &ohci->regs->control); } - writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead); + writel(m32_swap(*((__u32 *) &ed->hwNextED)), + &ohci->regs->ed_controlhead); } else { ed->ed_prev->hwNextED = ed->hwNextED; } if (ohci->ed_controltail == ed) { ohci->ed_controltail = ed->ed_prev; } else { - ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev; + ((ed_t *)m32_swap(*((__u32 *)&ed->hwNextED)))->ed_prev = + ed->ed_prev; } break; @@ -559,16 +564,18 @@ static int ep_unlink (ohci_t *ohci, ed_t *ed) if (ed->ed_prev == NULL) { if (!ed->hwNextED) { ohci->hc_control &= ~OHCI_CTRL_BLE; - writel (ohci->hc_control, &ohci->regs->control); + writel(ohci->hc_control, &ohci->regs->control); } - writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead); + writel(m32_swap(*((__u32 *) &ed->hwNextED)), + &ohci->regs->ed_bulkhead); } else { ed->ed_prev->hwNextED = ed->hwNextED; } if (ohci->ed_bulktail == ed) { ohci->ed_bulktail = ed->ed_prev; } else { - ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev; + ((ed_t *)m32_swap(*((__u32 *)&ed->hwNextED)))->ed_prev = + ed->ed_prev; } break; } @@ -576,23 +583,24 @@ static int ep_unlink (ohci_t *ohci, ed_t *ed) return 0; } - /*-------------------------------------------------------------------------*/ -/* add/reinit an endpoint; this should be done once at the usb_set_configuration command, - * but the USB stack is a little bit stateless so we do it at every transaction - * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK - * in all other cases the state is left unchanged - * the ed info fields are setted anyway even though most of them should not change */ +/* add/reinit an endpoint; this should be done once at the usb_set_configuration + * command, but the USB stack is a little bit stateless so we do it at every + * transaction. If the state of the ed is ED_NEW then a dummy td is added and + * the state is changed to ED_UNLINK. In all other cases the state is left + * unchanged. The ed info fields are setted anyway even though most of them + * should not change */ -static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe) +static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe) { td_t *td; ed_t *ed_ret; volatile ed_t *ed; - ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) | - (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))]; + ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) | + (usb_pipecontrol(pipe) ? 0 : + usb_pipeout(pipe))]; if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) { err("ep_add_ed: pending delete"); @@ -601,22 +609,23 @@ static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe) } if (ed->state == ED_NEW) { - ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */ + ed->hwINFO = m32_swap(OHCI_ED_SKIP); /* skip ed */ /* dummy td; end of td list for ed */ - td = td_alloc (usb_dev); - ed->hwTailP = (__u32)m32_swap (td); + td = td_alloc(usb_dev); + ed->hwTailP = (__u32) m32_swap(td); ed->hwHeadP = ed->hwTailP; ed->state = ED_UNLINK; - ed->type = usb_pipetype (pipe); + ed->type = usb_pipetype(pipe); ohci_dev.ed_cnt++; } - ed->hwINFO = m32_swap (usb_pipedevice (pipe) - | usb_pipeendpoint (pipe) << 7 - | (usb_pipeisoc (pipe)? 0x8000: 0) - | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000)) - | usb_pipeslow (pipe) << 13 - | usb_maxpacket (usb_dev, pipe) << 16); + ed->hwINFO = m32_swap(usb_pipedevice(pipe) + | usb_pipeendpoint(pipe) << 7 + | (usb_pipeisoc(pipe) ? 0x8000 : 0) + | (usb_pipecontrol(pipe) ? 0 : + (usb_pipeout(pipe) ? 0x800 : 0x1000)) + | usb_pipeslow(pipe) << 13 | + usb_maxpacket(usb_dev, pipe) << 16); return ed_ret; } @@ -627,11 +636,10 @@ static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe) /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */ -static void td_fill (ohci_t *ohci, unsigned int info, - void *data, int len, - struct usb_device *dev, int index, urb_priv_t *urb_priv) +static void td_fill(ohci_t *ohci, unsigned int info, void *data, int len, + struct usb_device *dev, int index, urb_priv_t *urb_priv) { - volatile td_t *td, *td_pt; + volatile td_t *td, *td_pt; #ifdef OHCI_FILL_TRACE int i; #endif @@ -641,33 +649,35 @@ static void td_fill (ohci_t *ohci, unsigned int info, return; } /* use this td as the next dummy */ - td_pt = urb_priv->td [index]; + td_pt = urb_priv->td[index]; td_pt->hwNextTD = 0; /* fill the old dummy TD */ - td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf); + td = urb_priv->td[index] = + (td_t *) (m32_swap(urb_priv->ed->hwTailP) & ~0xf); td->ed = urb_priv->ed; td->next_dl_td = NULL; td->index = index; - td->data = (__u32)data; + td->data = (__u32) data; #ifdef OHCI_FILL_TRACE if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) { for (i = 0; i < len; i++) - printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]); + printf("td->data[%d] %#2x ", i, + ((unsigned char *)td->data)[i]); printf("\n"); } #endif if (!len) data = 0; - td->hwINFO = (__u32)m32_swap (info); - td->hwCBP = (__u32)m32_swap (data); + td->hwINFO = (__u32) m32_swap(info); + td->hwCBP = (__u32) m32_swap(data); if (data) - td->hwBE = (__u32)m32_swap (data + len - 1); + td->hwBE = (__u32) m32_swap(data + len - 1); else td->hwBE = 0; - td->hwNextTD = (__u32)m32_swap (td_pt); + td->hwNextTD = (__u32) m32_swap(td_pt); /* append to queue */ td->ed->hwTailP = td->hwNextTD; @@ -677,8 +687,10 @@ static void td_fill (ohci_t *ohci, unsigned int info, /* prepare all TDs of a transfer */ -static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer, - int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval) +static void td_submit_job(struct usb_device *dev, unsigned long pipe, + void *buffer, int transfer_len, + struct devrequest *setup, urb_priv_t *urb, + int interval) { ohci_t *ohci = &gohci; int data_len = transfer_len; @@ -687,12 +699,14 @@ static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buf __u32 info = 0; unsigned int toggle = 0; - /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */ - if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) { + /* OHCI handles the DATA-toggles itself, we just + use the USB-toggle bits for reseting */ + if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) { toggle = TD_T_TOGGLE; } else { toggle = TD_T_DATA0; - usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1); + usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), + 1); } urb->td_cnt = 0; if (data_len) @@ -700,37 +714,45 @@ static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buf else data = 0; - switch (usb_pipetype (pipe)) { + switch (usb_pipetype(pipe)) { case PIPE_BULK: - info = usb_pipeout (pipe)? - TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ; - while(data_len > 4096) { - td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb); - data += 4096; data_len -= 4096; cnt++; + info = usb_pipeout(pipe) ? TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN; + while (data_len > 4096) { + td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data, + 4096, dev, cnt, urb); + data += 4096; + data_len -= 4096; + cnt++; } - info = usb_pipeout (pipe)? - TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ; - td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb); + info = usb_pipeout(pipe) ? + TD_CC | TD_DP_OUT : + TD_CC | TD_R | TD_DP_IN; + td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data, + data_len, dev, cnt, urb); cnt++; if (!ohci->sleeping) - writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */ + /* start bulk list */ + writel(OHCI_BLF, &ohci->regs->cmdstatus); break; case PIPE_CONTROL: info = TD_CC | TD_DP_SETUP | TD_T_DATA0; - td_fill (ohci, info, setup, 8, dev, cnt++, urb); + td_fill(ohci, info, setup, 8, dev, cnt++, urb); if (data_len > 0) { - info = usb_pipeout (pipe)? - TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1; + info = usb_pipeout(pipe) ? + TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : + TD_CC | TD_R | TD_DP_IN | TD_T_DATA1; /* NOTE: mishandles transfers >8K, some >4K */ - td_fill (ohci, info, data, data_len, dev, cnt++, urb); + td_fill(ohci, info, data, data_len, dev, cnt++, urb); } - info = usb_pipeout (pipe)? - TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1; - td_fill (ohci, info, data, 0, dev, cnt++, urb); + info = usb_pipeout(pipe) ? + TD_CC | TD_DP_IN | TD_T_DATA1 : + TD_CC | TD_DP_OUT | TD_T_DATA1; + td_fill(ohci, info, data, 0, dev, cnt++, urb); if (!ohci->sleeping) - writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */ + /* start Control list */ + writel(OHCI_CLF, &ohci->regs->cmdstatus); break; } if (urb->length != cnt) @@ -749,13 +771,12 @@ static void dl_transfer_length(td_t * td) __u32 tdINFO, tdBE, tdCBP; urb_priv_t *lurb_priv = &urb_priv; - tdINFO = m32_swap (td->hwINFO); - tdBE = m32_swap (td->hwBE); - tdCBP = m32_swap (td->hwCBP); - + tdINFO = m32_swap(td->hwINFO); + tdBE = m32_swap(td->hwBE); + tdCBP = m32_swap(td->hwCBP); if (!(usb_pipecontrol(lurb_priv->pipe) && - ((td->index == 0) || (td->index == lurb_priv->length - 1)))) { + ((td->index == 0) || (td->index == lurb_priv->length - 1)))) { if (tdBE != 0) { if (td->hwCBP == 0) lurb_priv->actual_length += tdBE - td->data + 1; @@ -770,37 +791,39 @@ static void dl_transfer_length(td_t * td) /* replies to the request have to be on a FIFO basis so * we reverse the reversed done-list */ -static td_t * dl_reverse_done_list (ohci_t *ohci) +static td_t *dl_reverse_done_list(ohci_t *ohci) { __u32 td_list_hc; td_t *td_rev = NULL; td_t *td_list = NULL; urb_priv_t *lurb_priv = NULL; - td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0; + td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0; ohci->hcca->done_head = 0; while (td_list_hc) { - td_list = (td_t *)td_list_hc; + td_list = (td_t *) td_list_hc; - if (TD_CC_GET (m32_swap (td_list->hwINFO))) { + if (TD_CC_GET(m32_swap(td_list->hwINFO))) { lurb_priv = &urb_priv; dbg(" USB-error/status: %x : %p", - TD_CC_GET (m32_swap (td_list->hwINFO)), td_list); - if (td_list->ed->hwHeadP & m32_swap (0x1)) { + TD_CC_GET(m32_swap(td_list->hwINFO)), td_list); + if (td_list->ed->hwHeadP & m32_swap(0x1)) { if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) { td_list->ed->hwHeadP = - (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) | - (td_list->ed->hwHeadP & m32_swap (0x2)); + (lurb_priv->td[lurb_priv->length-1]->hwNextTD & + m32_swap(0xfffffff0)) | + (td_list->ed->hwHeadP & m32_swap(0x2)); lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1; } else - td_list->ed->hwHeadP &= m32_swap (0xfffffff2); + td_list->ed->hwHeadP &= + m32_swap(0xfffffff2); } } td_list->next_dl_td = td_rev; td_rev = td_list; - td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0; + td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0; } return td_list; @@ -809,7 +832,7 @@ static td_t * dl_reverse_done_list (ohci_t *ohci) /*-------------------------------------------------------------------------*/ /* td done list */ -static int dl_done_list (ohci_t *ohci, td_t *td_list) +static int dl_done_list(ohci_t *ohci, td_t *td_list) { td_t *td_list_next = NULL; ed_t *ed; @@ -823,14 +846,14 @@ static int dl_done_list (ohci_t *ohci, td_t *td_list) td_list_next = td_list->next_dl_td; lurb_priv = &urb_priv; - tdINFO = m32_swap (td_list->hwINFO); + tdINFO = m32_swap(td_list->hwINFO); ed = td_list->ed; dl_transfer_length(td_list); /* error code of transfer */ - cc = TD_CC_GET (tdINFO); + cc = TD_CC_GET(tdINFO); if (cc != 0) { dbg("ConditionCode %#x", cc); stat = cc_to_error[cc]; @@ -842,18 +865,19 @@ static int dl_done_list (ohci_t *ohci, td_t *td_list) if ((ed->state & (ED_OPER | ED_UNLINK))) urb_finished = 1; else - dbg("dl_done_list: strange.., ED state %x, ed->state\n"); + dbg("dl_done_list: strange.., ED state %x, " + "ed->state\n"); } else - dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt, - lurb_priv->length); + dbg("dl_done_list: processing TD %x, len %x\n", + lurb_priv->td_cnt, lurb_priv->length); if (ed->state != ED_NEW) { - edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0; - edTailP = m32_swap (ed->hwTailP); + edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0; + edTailP = m32_swap(ed->hwTailP); /* unlink eds if they are not busy */ if ((edHeadP == edTailP) && (ed->state == ED_OPER)) - ep_unlink (ohci, ed); + ep_unlink(ohci, ed); } td_list = td_list_next; @@ -866,102 +890,98 @@ static int dl_done_list (ohci_t *ohci, td_t *td_list) *-------------------------------------------------------------------------*/ /* Device descriptor */ -static __u8 root_hub_dev_des[] = -{ - 0x12, /* __u8 bLength; */ - 0x01, /* __u8 bDescriptorType; Device */ - 0x10, /* __u16 bcdUSB; v1.1 */ +static __u8 root_hub_dev_des[] = { + 0x12, /* __u8 bLength; */ + 0x01, /* __u8 bDescriptorType; Device */ + 0x10, /* __u16 bcdUSB; v1.1 */ 0x01, - 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */ - 0x00, /* __u8 bDeviceSubClass; */ - 0x00, /* __u8 bDeviceProtocol; */ - 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */ - 0x00, /* __u16 idVendor; */ + 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */ + 0x00, /* __u8 bDeviceSubClass; */ + 0x00, /* __u8 bDeviceProtocol; */ + 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */ + 0x00, /* __u16 idVendor; */ 0x00, - 0x00, /* __u16 idProduct; */ + 0x00, /* __u16 idProduct; */ 0x00, - 0x00, /* __u16 bcdDevice; */ + 0x00, /* __u16 bcdDevice; */ 0x00, - 0x00, /* __u8 iManufacturer; */ - 0x01, /* __u8 iProduct; */ - 0x00, /* __u8 iSerialNumber; */ - 0x01 /* __u8 bNumConfigurations; */ + 0x00, /* __u8 iManufacturer; */ + 0x01, /* __u8 iProduct; */ + 0x00, /* __u8 iSerialNumber; */ + 0x01 /* __u8 bNumConfigurations; */ }; - /* Configuration descriptor */ -static __u8 root_hub_config_des[] = -{ - 0x09, /* __u8 bLength; */ - 0x02, /* __u8 bDescriptorType; Configuration */ - 0x19, /* __u16 wTotalLength; */ +static __u8 root_hub_config_des[] = { + 0x09, /* __u8 bLength; */ + 0x02, /* __u8 bDescriptorType; Configuration */ + 0x19, /* __u16 wTotalLength; */ 0x00, - 0x01, /* __u8 bNumInterfaces; */ - 0x01, /* __u8 bConfigurationValue; */ - 0x00, /* __u8 iConfiguration; */ - 0x40, /* __u8 bmAttributes; - Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */ - 0x00, /* __u8 MaxPower; */ + 0x01, /* __u8 bNumInterfaces; */ + 0x01, /* __u8 bConfigurationValue; */ + 0x00, /* __u8 iConfiguration; */ + 0x40, /* __u8 bmAttributes; + Bit 7: Bus-powered, 6: Self-powered, + 5 Remote-wakwup, 4..0: resvd */ + 0x00, /* __u8 MaxPower; */ /* interface */ - 0x09, /* __u8 if_bLength; */ - 0x04, /* __u8 if_bDescriptorType; Interface */ - 0x00, /* __u8 if_bInterfaceNumber; */ - 0x00, /* __u8 if_bAlternateSetting; */ - 0x01, /* __u8 if_bNumEndpoints; */ - 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */ - 0x00, /* __u8 if_bInterfaceSubClass; */ - 0x00, /* __u8 if_bInterfaceProtocol; */ - 0x00, /* __u8 if_iInterface; */ + 0x09, /* __u8 if_bLength; */ + 0x04, /* __u8 if_bDescriptorType; Interface */ + 0x00, /* __u8 if_bInterfaceNumber; */ + 0x00, /* __u8 if_bAlternateSetting; */ + 0x01, /* __u8 if_bNumEndpoints; */ + 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */ + 0x00, /* __u8 if_bInterfaceSubClass; */ + 0x00, /* __u8 if_bInterfaceProtocol; */ + 0x00, /* __u8 if_iInterface; */ /* endpoint */ - 0x07, /* __u8 ep_bLength; */ - 0x05, /* __u8 ep_bDescriptorType; Endpoint */ - 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */ - 0x03, /* __u8 ep_bmAttributes; Interrupt */ - 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */ + 0x07, /* __u8 ep_bLength; */ + 0x05, /* __u8 ep_bDescriptorType; Endpoint */ + 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */ + 0x03, /* __u8 ep_bmAttributes; Interrupt */ + 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */ 0x00, - 0xff /* __u8 ep_bInterval; 255 ms */ + 0xff /* __u8 ep_bInterval; 255 ms */ }; -static unsigned char root_hub_str_index0[] = -{ - 0x04, /* __u8 bLength; */ - 0x03, /* __u8 bDescriptorType; String-descriptor */ - 0x09, /* __u8 lang ID */ - 0x04, /* __u8 lang ID */ +static unsigned char root_hub_str_index0[] = { + 0x04, /* __u8 bLength; */ + 0x03, /* __u8 bDescriptorType; String-descriptor */ + 0x09, /* __u8 lang ID */ + 0x04, /* __u8 lang ID */ }; -static unsigned char root_hub_str_index1[] = -{ - 28, /* __u8 bLength; */ - 0x03, /* __u8 bDescriptorType; String-descriptor */ - 'O', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - 'H', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - 'C', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - 'I', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - ' ', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - 'R', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - 'o', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - 'o', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - 't', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - ' ', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - 'H', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - 'u', /* __u8 Unicode */ - 0, /* __u8 Unicode */ - 'b', /* __u8 Unicode */ - 0, /* __u8 Unicode */ +static unsigned char root_hub_str_index1[] = { + 28, /* __u8 bLength; */ + 0x03, /* __u8 bDescriptorType; String-descriptor */ + 'O', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'H', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'C', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'I', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + ' ', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'R', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'o', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'o', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 't', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + ' ', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'H', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'u', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'b', /* __u8 Unicode */ + 0, /* __u8 Unicode */ }; /* Hub class-specific descriptor is constructed dynamically */ @@ -971,14 +991,24 @@ static unsigned char root_hub_str_index1[] = #define OK(x) len = (x); break #ifdef DEBUG -#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);} -#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);} +#define WR_RH_STAT(x) \ +{ \ + info("WR:status %#8x", (x)); \ + writel((x), &gohci.regs->roothub.status); \ +} +#define WR_RH_PORTSTAT(x) \ +{ \ + info("WR:portstatus[%d] %#8x", wIndex-1, (x)); \ + writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); \ +} #else -#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status) -#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1]) +#define WR_RH_STAT(x) \ + writel((x), &gohci.regs->roothub.status) +#define WR_RH_PORTSTAT(x)\ + writel((x), &gohci.regs->roothub.portstatus[wIndex-1]) #endif -#define RD_RH_STAT roothub_status(&gohci) -#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1) +#define RD_RH_STAT roothub_status(&gohci) +#define RD_RH_PORTSTAT roothub_portstatus(&gohci, wIndex-1) /* request to virtual root hub */ @@ -988,14 +1018,13 @@ int rh_check_port_status(ohci_t *controller) int res; res = -1; - temp = roothub_a (controller); + temp = roothub_a(controller); ndp = (temp & RH_A_NDP); for (i = 0; i < ndp; i++) { - temp = roothub_portstatus (controller, i); + temp = roothub_portstatus(controller, i); /* check for a device disconnect */ if (((temp & (RH_PS_PESC | RH_PS_CSC)) == - (RH_PS_PESC | RH_PS_CSC)) && - ((temp & RH_PS_CCS) == 0)) { + (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) { res = i; break; } @@ -1004,22 +1033,24 @@ int rh_check_port_status(ohci_t *controller) } static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe, - void *buffer, int transfer_len, struct devrequest *cmd) + void *buffer, int transfer_len, + struct devrequest *cmd) { - void * data = buffer; + void *data = buffer; int leni = transfer_len; int len = 0; int stat = 0; __u32 datab[4]; - __u8 *data_buf = (__u8 *)datab; + __u8 *data_buf = (__u8 *) datab; __u16 bmRType_bReq; __u16 wValue; __u16 wIndex; __u16 wLength; #ifdef DEBUG -urb_priv.actual_length = 0; -pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe)); + urb_priv.actual_length = 0; + pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", + usb_pipein(pipe)); #else wait_ms(1); #endif @@ -1028,189 +1059,216 @@ pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe)); return 0; } - bmRType_bReq = cmd->requesttype | (cmd->request << 8); - wValue = m16_swap (cmd->value); - wIndex = m16_swap (cmd->index); - wLength = m16_swap (cmd->length); + bmRType_bReq = cmd->requesttype | (cmd->request << 8); + wValue = m16_swap(cmd->value); + wIndex = m16_swap(cmd->index); + wLength = m16_swap(cmd->length); info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x", - dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength); + dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength); switch (bmRType_bReq) { - /* Request Destination: - without flags: Device, - RH_INTERFACE: interface, - RH_ENDPOINT: endpoint, - RH_CLASS means HUB here, - RH_OTHER | RH_CLASS almost ever means HUB_PORT here - */ + /* Request Destination: + without flags: Device, + RH_INTERFACE: interface, + RH_ENDPOINT: endpoint, + RH_CLASS means HUB here, + RH_OTHER | RH_CLASS almost ever means HUB_PORT here + */ case RH_GET_STATUS: - *(__u16 *) data_buf = m16_swap (1); OK (2); + *(__u16 *) data_buf = m16_swap(1); + OK(2); case RH_GET_STATUS | RH_INTERFACE: - *(__u16 *) data_buf = m16_swap (0); OK (2); + *(__u16 *) data_buf = m16_swap(0); + OK(2); case RH_GET_STATUS | RH_ENDPOINT: - *(__u16 *) data_buf = m16_swap (0); OK (2); + *(__u16 *) data_buf = m16_swap(0); + OK(2); case RH_GET_STATUS | RH_CLASS: - *(__u32 *) data_buf = m32_swap ( - RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE)); - OK (4); + *(__u32 *) data_buf = + m32_swap(RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE)); + OK(4); case RH_GET_STATUS | RH_OTHER | RH_CLASS: - *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4); + *(__u32 *) data_buf = m32_swap(RD_RH_PORTSTAT); + OK(4); case RH_CLEAR_FEATURE | RH_ENDPOINT: switch (wValue) { - case (RH_ENDPOINT_STALL): OK (0); + case (RH_ENDPOINT_STALL): + OK(0); } break; case RH_CLEAR_FEATURE | RH_CLASS: switch (wValue) { - case RH_C_HUB_LOCAL_POWER: - OK(0); - case (RH_C_HUB_OVER_CURRENT): - WR_RH_STAT(RH_HS_OCIC); OK (0); + case RH_C_HUB_LOCAL_POWER: + OK(0); + case (RH_C_HUB_OVER_CURRENT): + WR_RH_STAT(RH_HS_OCIC); + OK(0); } break; case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS: switch (wValue) { - case (RH_PORT_ENABLE): - WR_RH_PORTSTAT (RH_PS_CCS ); OK (0); - case (RH_PORT_SUSPEND): - WR_RH_PORTSTAT (RH_PS_POCI); OK (0); - case (RH_PORT_POWER): - WR_RH_PORTSTAT (RH_PS_LSDA); OK (0); - case (RH_C_PORT_CONNECTION): - WR_RH_PORTSTAT (RH_PS_CSC ); OK (0); - case (RH_C_PORT_ENABLE): - WR_RH_PORTSTAT (RH_PS_PESC); OK (0); - case (RH_C_PORT_SUSPEND): - WR_RH_PORTSTAT (RH_PS_PSSC); OK (0); - case (RH_C_PORT_OVER_CURRENT): - WR_RH_PORTSTAT (RH_PS_OCIC); OK (0); - case (RH_C_PORT_RESET): - WR_RH_PORTSTAT (RH_PS_PRSC); OK (0); + case (RH_PORT_ENABLE): + WR_RH_PORTSTAT(RH_PS_CCS); + OK(0); + case (RH_PORT_SUSPEND): + WR_RH_PORTSTAT(RH_PS_POCI); + OK(0); + case (RH_PORT_POWER): + WR_RH_PORTSTAT(RH_PS_LSDA); + OK(0); + case (RH_C_PORT_CONNECTION): + WR_RH_PORTSTAT(RH_PS_CSC); + OK(0); + case (RH_C_PORT_ENABLE): + WR_RH_PORTSTAT(RH_PS_PESC); + OK(0); + case (RH_C_PORT_SUSPEND): + WR_RH_PORTSTAT(RH_PS_PSSC); + OK(0); + case (RH_C_PORT_OVER_CURRENT): + WR_RH_PORTSTAT(RH_PS_OCIC); + OK(0); + case (RH_C_PORT_RESET): + WR_RH_PORTSTAT(RH_PS_PRSC); + OK(0); } break; case RH_SET_FEATURE | RH_OTHER | RH_CLASS: switch (wValue) { - case (RH_PORT_SUSPEND): - WR_RH_PORTSTAT (RH_PS_PSS ); OK (0); - case (RH_PORT_RESET): /* BUG IN HUP CODE *********/ - if (RD_RH_PORTSTAT & RH_PS_CCS) - WR_RH_PORTSTAT (RH_PS_PRS); - OK (0); - case (RH_PORT_POWER): - WR_RH_PORTSTAT (RH_PS_PPS ); OK (0); - case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/ - if (RD_RH_PORTSTAT & RH_PS_CCS) - WR_RH_PORTSTAT (RH_PS_PES ); - OK (0); + case (RH_PORT_SUSPEND): + WR_RH_PORTSTAT(RH_PS_PSS); + OK(0); + case (RH_PORT_RESET): /* BUG IN HUP CODE ******** */ + if (RD_RH_PORTSTAT & RH_PS_CCS) + WR_RH_PORTSTAT(RH_PS_PRS); + OK(0); + case (RH_PORT_POWER): + WR_RH_PORTSTAT(RH_PS_PPS); + OK(0); + case (RH_PORT_ENABLE): /* BUG IN HUP CODE ******** */ + if (RD_RH_PORTSTAT & RH_PS_CCS) + WR_RH_PORTSTAT(RH_PS_PES); + OK(0); } break; - case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0); + case RH_SET_ADDRESS: + gohci.rh.devnum = wValue; + OK(0); case RH_GET_DESCRIPTOR: switch ((wValue & 0xff00) >> 8) { - case (0x01): /* device descriptor */ + case (0x01): /* device descriptor */ + len = min_t(unsigned int, + leni, + min_t(unsigned int, + sizeof(root_hub_dev_des), wLength)); + data_buf = root_hub_dev_des; + OK(len); + case (0x02): /* configuration descriptor */ + len = min_t(unsigned int, + leni, + min_t(unsigned int, + sizeof(root_hub_config_des), + wLength)); + data_buf = root_hub_config_des; + OK(len); + case (0x03): /* string descriptors */ + if (wValue == 0x0300) { len = min_t(unsigned int, - leni, - min_t(unsigned int, - sizeof (root_hub_dev_des), - wLength)); - data_buf = root_hub_dev_des; OK(len); - case (0x02): /* configuration descriptor */ + leni, + min_t(unsigned int, + sizeof(root_hub_str_index0), + wLength)); + data_buf = root_hub_str_index0; + OK(len); + } + if (wValue == 0x0301) { len = min_t(unsigned int, - leni, - min_t(unsigned int, - sizeof (root_hub_config_des), - wLength)); - data_buf = root_hub_config_des; OK(len); - case (0x03): /* string descriptors */ - if(wValue==0x0300) { - len = min_t(unsigned int, - leni, - min_t(unsigned int, - sizeof (root_hub_str_index0), - wLength)); - data_buf = root_hub_str_index0; - OK(len); - } - if(wValue==0x0301) { - len = min_t(unsigned int, - leni, - min_t(unsigned int, - sizeof (root_hub_str_index1), - wLength)); - data_buf = root_hub_str_index1; - OK(len); + leni, + min_t(unsigned int, + sizeof(root_hub_str_index1), + wLength)); + data_buf = root_hub_str_index1; + OK(len); } - default: - stat = USB_ST_STALLED; + default: + stat = USB_ST_STALLED; } break; case RH_GET_DESCRIPTOR | RH_CLASS: - { - __u32 temp = roothub_a (&gohci); - - data_buf [0] = 9; /* min length; */ - data_buf [1] = 0x29; - data_buf [2] = temp & RH_A_NDP; - data_buf [3] = 0; - if (temp & RH_A_PSM) /* per-port power switching? */ - data_buf [3] |= 0x1; - if (temp & RH_A_NOCP) /* no overcurrent reporting? */ - data_buf [3] |= 0x10; - else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */ - data_buf [3] |= 0x8; - - /* corresponds to data_buf[4-7] */ - datab [1] = 0; - data_buf [5] = (temp & RH_A_POTPGT) >> 24; - temp = roothub_b (&gohci); - data_buf [7] = temp & RH_B_DR; - if (data_buf [2] < 7) { - data_buf [8] = 0xff; - } else { - data_buf [0] += 2; - data_buf [8] = (temp & RH_B_DR) >> 8; - data_buf [10] = data_buf [9] = 0xff; - } - - len = min_t(unsigned int, leni, - min_t(unsigned int, data_buf [0], wLength)); - OK (len); + { + __u32 temp = roothub_a(&gohci); + + data_buf[0] = 9; /* min length; */ + data_buf[1] = 0x29; + data_buf[2] = temp & RH_A_NDP; + data_buf[3] = 0; + if (temp & RH_A_PSM) + /* per-port power switching? */ + data_buf[3] |= 0x1; + if (temp & RH_A_NOCP) + /* no overcurrent reporting? */ + data_buf[3] |= 0x10; + else if (temp & RH_A_OCPM) + /* per-port overcurrent reporting? */ + data_buf[3] |= 0x8; + + /* corresponds to data_buf[4-7] */ + datab[1] = 0; + data_buf[5] = (temp & RH_A_POTPGT) >> 24; + temp = roothub_b(&gohci); + data_buf[7] = temp & RH_B_DR; + if (data_buf[2] < 7) { + data_buf[8] = 0xff; + } else { + data_buf[0] += 2; + data_buf[8] = (temp & RH_B_DR) >> 8; + data_buf[10] = data_buf[9] = 0xff; + } + + len = min_t(unsigned int, leni, + min_t(unsigned int, data_buf[0], wLength)); + OK(len); } - case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1); + case RH_GET_CONFIGURATION: + *(__u8 *) data_buf = 0x01; + OK(1); - case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0); + case RH_SET_CONFIGURATION: + WR_RH_STAT(0x10000); + OK(0); default: - dbg ("unsupported root hub command"); + dbg("unsupported root hub command"); stat = USB_ST_STALLED; } #ifdef DEBUG - ohci_dump_roothub (&gohci, 1); + ohci_dump_roothub(&gohci, 1); #else wait_ms(1); #endif len = min_t(int, len, leni); if (data != data_buf) - memcpy (data, data_buf, len); + memcpy(data, data_buf, len); dev->act_len = len; dev->status = stat; #ifdef DEBUG if (transfer_len) urb_priv.actual_length = transfer_len; - pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/); + pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", + 0 /*usb_pipein(pipe) */); #else wait_ms(1); #endif @@ -1223,7 +1281,7 @@ pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe)); /* common code for handling submit messages - used for all but root hub */ /* accesses. */ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int transfer_len, struct devrequest *setup, int interval) + int transfer_len, struct devrequest *setup, int interval) { int stat = 0; int maxsize = usb_maxpacket(dev, pipe); @@ -1234,20 +1292,21 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, dev->status = USB_ST_CRC_ERR; return 0; } - #ifdef DEBUG urb_priv.actual_length = 0; - pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe)); + pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", + usb_pipein(pipe)); #else wait_ms(1); #endif if (!maxsize) { err("submit_common_message: pipesize for pipe %lx is zero", - pipe); + pipe); return -1; } - if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) { + if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < + 0) { err("sohci_submit_job failed"); return -1; } @@ -1256,7 +1315,7 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, /* ohci_dump_status(&gohci); */ /* allow more time for a BULK device to react - some are slow */ -#define BULK_TO 5000 /* timeout in milliseconds */ +#define BULK_TO 5000 /* timeout in milliseconds */ if (usb_pipebulk(pipe)) timeout = BULK_TO; else @@ -1304,13 +1363,14 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, /* we got an Root Hub Status Change interrupt */ if (got_rhsc) { #ifdef DEBUG - ohci_dump_roothub (&gohci, 1); + ohci_dump_roothub(&gohci, 1); #endif got_rhsc = 0; /* abuse timeout */ timeout = rh_check_port_status(&gohci); if (timeout >= 0) { -#if 0 /* this does nothing useful, but leave it here in case that changes */ +#if 0 /* this does nothing useful, but leave it here + in case that changes */ /* the called routine adds 1 to the passed value */ usb_hub_port_connect_change(gohci.rh.dev, timeout - 1); #endif @@ -1328,53 +1388,55 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, dev->act_len = transfer_len; #ifdef DEBUG - pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe)); + pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", + usb_pipein(pipe)); #else wait_ms(1); #endif /* free TDs in urb_priv */ - urb_free_priv (&urb_priv); + urb_free_priv(&urb_priv); return 0; } /* submit routines called from usb.c */ int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int transfer_len) + int transfer_len) { info("submit_bulk_msg"); return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0); } int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int transfer_len, struct devrequest *setup) + int transfer_len, struct devrequest *setup) { int maxsize = usb_maxpacket(dev, pipe); info("submit_control_msg"); #ifdef DEBUG urb_priv.actual_length = 0; - pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe)); + pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", + usb_pipein(pipe)); #else wait_ms(1); #endif if (!maxsize) { err("submit_control_message: pipesize for pipe %lx is zero", - pipe); + pipe); return -1; } if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) { gohci.rh.dev = dev; /* root hub - redirect */ return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len, - setup); + setup); } return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0); } int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int transfer_len, int interval) + int transfer_len, int interval) { info("submit_int_msg"); return -1; @@ -1386,16 +1448,17 @@ int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, /* reset the HC and BUS */ -static int hc_reset (ohci_t *ohci) +static int hc_reset(ohci_t *ohci) { int timeout = 30; - int smm_timeout = 50; /* 0,5 sec */ + int smm_timeout = 50; /* 0,5 sec */ - if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */ - writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */ + if (readl(&ohci->regs->control) & OHCI_CTRL_IR) { + /* SMM owns the HC - request ownership */ + writel(OHCI_OCR, &ohci->regs->cmdstatus); info("USB HC TakeOver from SMM"); - while (readl (&ohci->regs->control) & OHCI_CTRL_IR) { - wait_ms (10); + while (readl(&ohci->regs->control) & OHCI_CTRL_IR) { + wait_ms(10); if (--smm_timeout == 0) { err("USB HC TakeOver failed!"); return -1; @@ -1404,23 +1467,22 @@ static int hc_reset (ohci_t *ohci) } /* Disable HC interrupts */ - writel (OHCI_INTR_MIE, &ohci->regs->intrdisable); + writel(OHCI_INTR_MIE, &ohci->regs->intrdisable); dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;", - ohci->slot_name, - readl (&ohci->regs->control)); + ohci->slot_name, readl(&ohci->regs->control)); /* Reset USB (needed by some controllers) */ - writel (0, &ohci->regs->control); + writel(0, &ohci->regs->control); /* HC Reset requires max 10 us delay */ - writel (OHCI_HCR, &ohci->regs->cmdstatus); - while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) { + writel(OHCI_HCR, &ohci->regs->cmdstatus); + while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) { if (--timeout == 0) { err("USB HC reset timed out!"); return -1; } - udelay (1); + udelay(1); } return 0; } @@ -1431,7 +1493,7 @@ static int hc_reset (ohci_t *ohci) * enable interrupts * connect the virtual root hub */ -static int hc_start (ohci_t * ohci) +static int hc_start(ohci_t *ohci) { __u32 mask; unsigned int fminterval; @@ -1441,44 +1503,45 @@ static int hc_start (ohci_t * ohci) /* Tell the controller where the control and bulk lists are * The lists are empty now. */ - writel (0, &ohci->regs->ed_controlhead); - writel (0, &ohci->regs->ed_bulkhead); + writel(0, &ohci->regs->ed_controlhead); + writel(0, &ohci->regs->ed_bulkhead); - writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */ + /* a reset clears this */ + writel((__u32) ohci->hcca, &ohci->regs->hcca); fminterval = 0x2edf; - writel ((fminterval * 9) / 10, &ohci->regs->periodicstart); + writel((fminterval * 9) / 10, &ohci->regs->periodicstart); fminterval |= ((((fminterval - 210) * 6) / 7) << 16); - writel (fminterval, &ohci->regs->fminterval); - writel (0x628, &ohci->regs->lsthresh); + writel(fminterval, &ohci->regs->fminterval); + writel(0x628, &ohci->regs->lsthresh); /* start controller operations */ ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER; ohci->disabled = 0; - writel (ohci->hc_control, &ohci->regs->control); + writel(ohci->hc_control, &ohci->regs->control); /* disable all interrupts */ mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD | - OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC | - OHCI_INTR_OC | OHCI_INTR_MIE); - writel (mask, &ohci->regs->intrdisable); + OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC | + OHCI_INTR_OC | OHCI_INTR_MIE); + writel(mask, &ohci->regs->intrdisable); /* clear all interrupts */ mask &= ~OHCI_INTR_MIE; - writel (mask, &ohci->regs->intrstatus); + writel(mask, &ohci->regs->intrstatus); /* Choose the interrupts we care about now - but w/o MIE */ mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO; - writel (mask, &ohci->regs->intrenable); + writel(mask, &ohci->regs->intrenable); #ifdef OHCI_USE_NPS /* required for AMD-756 and some Mac platforms */ - writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM, - &ohci->regs->roothub.a); - writel (RH_HS_LPSC, &ohci->regs->roothub.status); -#endif /* OHCI_USE_NPS */ + writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM, + &ohci->regs->roothub.a); + writel(RH_HS_LPSC, &ohci->regs->roothub.status); +#endif /* OHCI_USE_NPS */ #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);}) /* POTPGT delay is bits 24-31, in 2 ms units. */ - mdelay ((roothub_a (ohci) >> 23) & 0x1fe); + mdelay((roothub_a(ohci) >> 23) & 0x1fe); /* connect the virtual root hub */ ohci->rh.devnum = 0; @@ -1490,8 +1553,7 @@ static int hc_start (ohci_t * ohci) /* an interrupt happens */ -static int -hc_interrupt (void) +static int hc_interrupt(void) { ohci_t *ohci = &gohci; struct ohci_regs *regs = ohci->regs; @@ -1499,21 +1561,26 @@ hc_interrupt (void) int stat = -1; if ((ohci->hcca->done_head != 0) && - !(m32_swap (ohci->hcca->done_head) & 0x01)) { + !(m32_swap(ohci->hcca->done_head) & 0x01)) { - ints = OHCI_INTR_WDH; + ints = OHCI_INTR_WDH; - } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) { - ohci->disabled++; - err ("%s device removed!", ohci->slot_name); - return -1; - - } else if ((ints &= readl (&regs->intrenable)) == 0) { - dbg("hc_interrupt: returning..\n"); - return 0xff; + } else { + ints = readl(&regs->intrstatus); + if (ints == ~(u32) 0) { + ohci->disabled++; + err("%s device removed!", ohci->slot_name); + return -1; + } + ints &= readl(&regs->intrenable); + if (ints == 0) { + dbg("hc_interrupt: returning..\n"); + return 0xff; + } } - /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */ + /* dbg("Interrupt: %x frame: %x", ints, + le16_to_cpu(ohci->hcca->frame_no)); */ if (ints & OHCI_INTR_RHSC) { got_rhsc = 1; @@ -1522,48 +1589,48 @@ hc_interrupt (void) if (ints & OHCI_INTR_UE) { ohci->disabled++; - err ("OHCI Unrecoverable Error, controller usb-%s disabled", - ohci->slot_name); + err("OHCI Unrecoverable Error, controller usb-%s disabled", + ohci->slot_name); /* e.g. due to PCI Master/Target Abort */ #ifdef DEBUG - ohci_dump (ohci, 1); + ohci_dump(ohci, 1); #else - wait_ms(1); + wait_ms(1); #endif /* FIXME: be optimistic, hope that bug won't repeat often. */ /* Make some non-interrupt context restart the controller. */ /* Count and limit the retries though; either hardware or */ /* software errors can go forever... */ - hc_reset (ohci); + hc_reset(ohci); return -1; } if (ints & OHCI_INTR_WDH) { wait_ms(1); - writel (OHCI_INTR_WDH, &regs->intrdisable); - stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci)); - writel (OHCI_INTR_WDH, &regs->intrenable); + writel(OHCI_INTR_WDH, &regs->intrdisable); + stat = dl_done_list(&gohci, dl_reverse_done_list(&gohci)); + writel(OHCI_INTR_WDH, &regs->intrenable); } if (ints & OHCI_INTR_SO) { dbg("USB Schedule overrun\n"); - writel (OHCI_INTR_SO, &regs->intrenable); + writel(OHCI_INTR_SO, &regs->intrenable); stat = -1; } /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */ if (ints & OHCI_INTR_SF) { - unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1; + unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1; wait_ms(1); - writel (OHCI_INTR_SF, &regs->intrdisable); + writel(OHCI_INTR_SF, &regs->intrdisable); if (ohci->ed_rm_list[frame] != NULL) - writel (OHCI_INTR_SF, &regs->intrenable); + writel(OHCI_INTR_SF, &regs->intrenable); stat = 0xff; } - writel (ints, &regs->intrstatus); + writel(ints, &regs->intrstatus); return stat; } @@ -1573,12 +1640,12 @@ hc_interrupt (void) /* De-allocate all resources.. */ -static void hc_release_ohci (ohci_t *ohci) +static void hc_release_ohci(ohci_t *ohci) { - dbg ("USB HC release ohci usb-%s", ohci->slot_name); + dbg("USB HC release ohci usb-%s", ohci->slot_name); if (!ohci->disabled) - hc_reset (ohci); + hc_reset(ohci); } /*-------------------------------------------------------------------------*/ @@ -1590,44 +1657,44 @@ static char ohci_inited = 0; int usb_lowlevel_init(void) { - S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); - S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); + struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER(); + struct s3c24x0_gpio *gpio = S3C24X0_GetBase_GPIO(); /* * Set the 48 MHz UPLL clocking. Values are taken from * "PLL value selection guide", 6-23, s3c2400_UM.pdf. */ clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2); - gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */ + gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */ /* * Enable USB host clock. */ clk_power->CLKCON |= (1 << 4); - memset (&gohci, 0, sizeof (ohci_t)); - memset (&urb_priv, 0, sizeof (urb_priv_t)); + memset(&gohci, 0, sizeof(ohci_t)); + memset(&urb_priv, 0, sizeof(urb_priv_t)); /* align the storage */ - if ((__u32)&ghcca[0] & 0xff) { + if ((__u32) &ghcca[0] & 0xff) { err("HCCA not aligned!!"); return -1; } phcca = &ghcca[0]; info("aligned ghcca %p", phcca); memset(&ohci_dev, 0, sizeof(struct ohci_device)); - if ((__u32)&ohci_dev.ed[0] & 0x7) { + if ((__u32) &ohci_dev.ed[0] & 0x7) { err("EDs not aligned!!"); return -1; } memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1)); - if ((__u32)gtd & 0x7) { + if ((__u32) gtd & 0x7) { err("TDs not aligned!!"); return -1; } ptd = gtd; gohci.hcca = phcca; - memset (phcca, 0, sizeof (struct ohci_hcca)); + memset(phcca, 0, sizeof(struct ohci_hcca)); gohci.disabled = 1; gohci.sleeping = 0; @@ -1637,8 +1704,8 @@ int usb_lowlevel_init(void) gohci.flags = 0; gohci.slot_name = "s3c2400"; - if (hc_reset (&gohci) < 0) { - hc_release_ohci (&gohci); + if (hc_reset(&gohci) < 0) { + hc_release_ohci(&gohci); /* Initialization failed */ clk_power->CLKCON &= ~(1 << 4); return -1; @@ -1646,19 +1713,18 @@ int usb_lowlevel_init(void) /* FIXME this is a second HC reset; why?? */ gohci.hc_control = OHCI_USB_RESET; - writel (gohci.hc_control, &gohci.regs->control); - wait_ms (10); + writel(gohci.hc_control, &gohci.regs->control); + wait_ms(10); - if (hc_start (&gohci) < 0) { - err ("can't start usb-%s", gohci.slot_name); - hc_release_ohci (&gohci); + if (hc_start(&gohci) < 0) { + err("can't start usb-%s", gohci.slot_name); + hc_release_ohci(&gohci); /* Initialization failed */ clk_power->CLKCON &= ~(1 << 4); return -1; } - #ifdef DEBUG - ohci_dump (&gohci, 1); + ohci_dump(&gohci, 1); #else wait_ms(1); #endif @@ -1670,7 +1736,7 @@ int usb_lowlevel_init(void) int usb_lowlevel_stop(void) { - S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); + struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER(); /* this gets called really early - before the controller has */ /* even been initialized! */ @@ -1678,7 +1744,7 @@ int usb_lowlevel_stop(void) return 0; /* TODO release any interrupts, etc. */ /* call hc_release_ohci() here ? */ - hc_reset (&gohci); + hc_reset(&gohci); /* may not want to do this */ clk_power->CLKCON &= ~(1 << 4); return 0; diff --git a/cpu/arm920t/s3c24x0/usb_ohci.h b/cpu/arm920t/s3c24x0/usb_ohci.h index 8e093fb..6ae1716 100644 --- a/cpu/arm920t/s3c24x0/usb_ohci.h +++ b/cpu/arm920t/s3c24x0/usb_ohci.h @@ -11,22 +11,22 @@ static int cc_to_error[16] = { /* mapping of the OHCI CC status to error codes */ - /* No Error */ 0, - /* CRC Error */ USB_ST_CRC_ERR, - /* Bit Stuff */ USB_ST_BIT_ERR, - /* Data Togg */ USB_ST_CRC_ERR, - /* Stall */ USB_ST_STALLED, - /* DevNotResp */ -1, - /* PIDCheck */ USB_ST_BIT_ERR, - /* UnExpPID */ USB_ST_BIT_ERR, - /* DataOver */ USB_ST_BUF_ERR, - /* DataUnder */ USB_ST_BUF_ERR, - /* reservd */ -1, - /* reservd */ -1, - /* BufferOver */ USB_ST_BUF_ERR, - /* BuffUnder */ USB_ST_BUF_ERR, - /* Not Access */ -1, - /* Not Access */ -1 + /* No Error */ 0, + /* CRC Error */ USB_ST_CRC_ERR, + /* Bit Stuff */ USB_ST_BIT_ERR, + /* Data Togg */ USB_ST_CRC_ERR, + /* Stall */ USB_ST_STALLED, + /* DevNotResp */ -1, + /* PIDCheck */ USB_ST_BIT_ERR, + /* UnExpPID */ USB_ST_BIT_ERR, + /* DataOver */ USB_ST_BUF_ERR, + /* DataUnder */ USB_ST_BUF_ERR, + /* reservd */ -1, + /* reservd */ -1, + /* BufferOver */ USB_ST_BUF_ERR, + /* BuffUnder */ USB_ST_BUF_ERR, + /* Not Access */ -1, + /* Not Access */ -1 }; /* ED States */ @@ -55,14 +55,14 @@ struct ed { struct usb_device *usb_dev; __u32 unused[3]; -} __attribute__((aligned(16))); +} __attribute__ ((aligned(16))); typedef struct ed ed_t; - /* TD info field */ #define TD_CC 0xf0000000 -#define TD_CC_GET(td_p) ((td_p >>28) & 0x0f) -#define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28) +#define TD_CC_GET(td_p) (((td_p) >> 28) & 0x0f) +#define TD_CC_SET(td_p, cc) \ + {(td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)} #define TD_EC 0x0C000000 #define TD_T 0x03000000 #define TD_T_DATA0 0x02000000 @@ -112,7 +112,7 @@ struct td { __u32 data; __u32 unused2[2]; -} __attribute__((aligned(32))); +} __attribute__ ((aligned(32))); typedef struct td td_t; #define OHCI_ED_SKIP (1 << 14) @@ -123,15 +123,14 @@ typedef struct td td_t; * told the base address of. It must be 256-byte aligned. */ -#define NUM_INTS 32 /* part of the OHCI standard */ +#define NUM_INTS 32 /* part of the OHCI standard */ struct ohci_hcca { - __u32 int_table[NUM_INTS]; /* Interrupt ED table */ - __u16 frame_no; /* current frame number */ - __u16 pad1; /* set to 0 on each frame_no change */ - __u32 done_head; /* info returned for an interrupt */ - u8 reserved_for_hc[116]; -} __attribute__((aligned(256))); - + __u32 int_table[NUM_INTS]; /* Interrupt ED table */ + __u16 frame_no; /* current frame number */ + __u16 pad1; /* set to 0 on each frame_no change */ + __u32 done_head; /* info returned for an interrupt */ + u8 reserved_for_hc[116]; +} __attribute__ ((aligned(256))); /* * Maximum number of root hub ports. @@ -145,35 +144,34 @@ struct ohci_hcca { */ struct ohci_regs { /* control and status registers */ - __u32 revision; - __u32 control; - __u32 cmdstatus; - __u32 intrstatus; - __u32 intrenable; - __u32 intrdisable; + __u32 revision; + __u32 control; + __u32 cmdstatus; + __u32 intrstatus; + __u32 intrenable; + __u32 intrdisable; /* memory pointers */ - __u32 hcca; - __u32 ed_periodcurrent; - __u32 ed_controlhead; - __u32 ed_controlcurrent; - __u32 ed_bulkhead; - __u32 ed_bulkcurrent; - __u32 donehead; + __u32 hcca; + __u32 ed_periodcurrent; + __u32 ed_controlhead; + __u32 ed_controlcurrent; + __u32 ed_bulkhead; + __u32 ed_bulkcurrent; + __u32 donehead; /* frame counters */ - __u32 fminterval; - __u32 fmremaining; - __u32 fmnumber; - __u32 periodicstart; - __u32 lsthresh; + __u32 fminterval; + __u32 fmremaining; + __u32 fmnumber; + __u32 periodicstart; + __u32 lsthresh; /* Root hub ports */ - struct ohci_roothub_regs { - __u32 a; - __u32 b; - __u32 status; - __u32 portstatus[MAX_ROOT_PORTS]; + struct ohci_roothub_regs { + __u32 a; + __u32 b; + __u32 status; + __u32 portstatus[MAX_ROOT_PORTS]; } roothub; -} __attribute__((aligned(32))); - +} __attribute__ ((aligned(32))); /* OHCI CONTROL AND STATUS REGISTER MASKS */ @@ -221,11 +219,10 @@ struct ohci_regs { #define OHCI_INTR_OC (1 << 30) /* ownership change */ #define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */ - /* Virtual Root HUB */ struct virt_root_hub { - int devnum; /* Address of Root Hub endpoint */ - void *dev; /* was urb */ + int devnum; /* Address of Root Hub endpoint */ + void *dev; /* was urb */ void *int_addr; int send; int interval; @@ -288,51 +285,51 @@ struct virt_root_hub { /* OHCI ROOT HUB REGISTER MASKS */ /* roothub.portstatus [i] bits */ -#define RH_PS_CCS 0x00000001 /* current connect status */ -#define RH_PS_PES 0x00000002 /* port enable status*/ -#define RH_PS_PSS 0x00000004 /* port suspend status */ -#define RH_PS_POCI 0x00000008 /* port over current indicator */ -#define RH_PS_PRS 0x00000010 /* port reset status */ -#define RH_PS_PPS 0x00000100 /* port power status */ -#define RH_PS_LSDA 0x00000200 /* low speed device attached */ -#define RH_PS_CSC 0x00010000 /* connect status change */ -#define RH_PS_PESC 0x00020000 /* port enable status change */ -#define RH_PS_PSSC 0x00040000 /* port suspend status change */ -#define RH_PS_OCIC 0x00080000 /* over current indicator change */ -#define RH_PS_PRSC 0x00100000 /* port reset status change */ +#define RH_PS_CCS 0x00000001 /* current connect status */ +#define RH_PS_PES 0x00000002 /* port enable status */ +#define RH_PS_PSS 0x00000004 /* port suspend status */ +#define RH_PS_POCI 0x00000008 /* port over current indicator */ +#define RH_PS_PRS 0x00000010 /* port reset status */ +#define RH_PS_PPS 0x00000100 /* port power status */ +#define RH_PS_LSDA 0x00000200 /* low speed device attached */ +#define RH_PS_CSC 0x00010000 /* connect status change */ +#define RH_PS_PESC 0x00020000 /* port enable status change */ +#define RH_PS_PSSC 0x00040000 /* port suspend status change */ +#define RH_PS_OCIC 0x00080000 /* over current indicator change */ +#define RH_PS_PRSC 0x00100000 /* port reset status change */ /* roothub.status bits */ -#define RH_HS_LPS 0x00000001 /* local power status */ -#define RH_HS_OCI 0x00000002 /* over current indicator */ -#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */ -#define RH_HS_LPSC 0x00010000 /* local power status change */ -#define RH_HS_OCIC 0x00020000 /* over current indicator change */ -#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */ +#define RH_HS_LPS 0x00000001 /* local power status */ +#define RH_HS_OCI 0x00000002 /* over current indicator */ +#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */ +#define RH_HS_LPSC 0x00010000 /* local power status change */ +#define RH_HS_OCIC 0x00020000 /* over current indicator change */ +#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */ /* roothub.b masks */ -#define RH_B_DR 0x0000ffff /* device removable flags */ -#define RH_B_PPCM 0xffff0000 /* port power control mask */ +#define RH_B_DR 0x0000ffff /* device removable flags */ +#define RH_B_PPCM 0xffff0000 /* port power control mask */ /* roothub.a masks */ -#define RH_A_NDP (0xff << 0) /* number of downstream ports */ -#define RH_A_PSM (1 << 8) /* power switching mode */ -#define RH_A_NPS (1 << 9) /* no power switching */ -#define RH_A_DT (1 << 10) /* device type (mbz) */ -#define RH_A_OCPM (1 << 11) /* over current protection mode */ -#define RH_A_NOCP (1 << 12) /* no over current protection */ -#define RH_A_POTPGT (0xff << 24) /* power on to power good time */ +#define RH_A_NDP (0xff << 0) /* number of downstream ports */ +#define RH_A_PSM (1 << 8) /* power switching mode */ +#define RH_A_NPS (1 << 9) /* no power switching */ +#define RH_A_DT (1 << 10) /* device type (mbz) */ +#define RH_A_OCPM (1 << 11) /* over current protection mode */ +#define RH_A_NOCP (1 << 12) /* no over current protection */ +#define RH_A_POTPGT (0xff << 24) /* power on to power good time */ /* urb */ #define N_URB_TD 48 -typedef struct -{ +typedef struct { ed_t *ed; - __u16 length; /* number of tds associated with this request */ - __u16 td_cnt; /* number of tds already serviced */ - int state; + __u16 length; /* number of tds associated with this request */ + __u16 td_cnt; /* number of tds already serviced */ + int state; unsigned long pipe; int actual_length; - td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */ + td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs + associated with this request */ } urb_priv_t; #define URB_DEL 1 @@ -375,9 +372,9 @@ struct ohci_device { /* hcd */ /* endpoint */ -static int ep_link (ohci_t * ohci, ed_t * ed); -static int ep_unlink (ohci_t * ohci, ed_t * ed); -static ed_t *ep_add_ed (struct usb_device *usb_dev, unsigned long pipe); +static int ep_link(ohci_t *ohci, ed_t *ed); +static int ep_unlink(ohci_t *ohci, ed_t *ed); +static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe); /*-------------------------------------------------------------------------*/ @@ -391,7 +388,7 @@ td_t gtd[NUM_TD + 1]; td_t *ptd; /* TDs ... */ -static inline struct td *td_alloc (struct usb_device *usb_dev) +static inline struct td *td_alloc(struct usb_device *usb_dev) { int i; struct td *td; @@ -408,7 +405,7 @@ static inline struct td *td_alloc (struct usb_device *usb_dev) return td; } -static inline void ed_free (struct ed *ed) +static inline void ed_free(struct ed *ed) { ed->usb_dev = NULL; } diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 475cdaf..c19df61 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -38,7 +38,7 @@ .globl _start -_start: b start_code +_start: b start_code ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -110,13 +110,13 @@ start_code: /* * set the cpu to SVC32 mode */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 + mrs r0, cpsr + bic r0, r0, #0x1f + orr r0, r0, #0xd3 + msr cpsr, r0 - bl coloured_LED_init - bl red_LED_on + bl coloured_LED_init + bl red_LED_on #if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) /* @@ -136,19 +136,19 @@ copyex: /* turn off the watchdog */ # if defined(CONFIG_S3C2400) -# define pWTCON 0x15300000 -# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ +# define pWTCON 0x15300000 +# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ # define CLKDIVN 0x14800014 /* clock divisor register */ #else -# define pWTCON 0x53000000 -# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ +# define pWTCON 0x53000000 +# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ # define INTSUBMSK 0x4A00001C # define CLKDIVN 0x4C000014 /* clock divisor register */ # endif - ldr r0, =pWTCON - mov r1, #0x0 - str r1, [r0] + ldr r0, =pWTCON + mov r1, #0x0 + str r1, [r0] /* * mask all IRQs by setting all bits in the INTMR - default @@ -181,8 +181,8 @@ copyex: relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup + cmp r0, r1 /* don't reloc during debug */ + beq stack_setup ldr r2, _armboot_start ldr r3, _bss_start @@ -199,8 +199,8 @@ copy_loop: /* Set up the stack */ stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ + sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif @@ -298,8 +298,8 @@ cpu_init_crit: #define S_R1 4 #define S_R0 0 -#define MODE_SVC 0x13 -#define I_BIT 0x80 +#define MODE_SVC 0x13 +#define I_BIT 0x80 /* * use bad_save_user_regs for abort/prefetch/undef/swi ... @@ -312,7 +312,8 @@ cpu_init_crit: ldr r2, _armboot_start sub r2, r2, #(CONFIG_STACKSIZE) sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack + /* set base 2 words into abort stack */ + sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) ldmia r2, {r2 - r3} @ get pc, cpsr add r0, sp, #S_FRAME_SIZE @ restore sp_SVC @@ -325,12 +326,12 @@ cpu_init_crit: .macro irq_save_user_regs sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Calling r0-r12 - add r7, sp, #S_PC - stmdb r7, {sp, lr}^ @ Calling SP, LR - str lr, [r7, #0] @ Save calling PC - mrs r6, spsr - str r6, [r7, #4] @ Save CPSR - str r0, [r7, #8] @ Save OLD_R0 + add r7, sp, #S_PC + stmdb r7, {sp, lr}^ @ Calling SP, LR + str lr, [r7, #0] @ Save calling PC + mrs r6, spsr + str r6, [r7, #4] @ Save CPSR + str r0, [r7, #8] @ Save OLD_R0 mov r0, sp .endm @@ -339,18 +340,20 @@ cpu_init_crit: mov r0, r0 ldr lr, [sp, #S_PC] @ Get PC add sp, sp, #S_FRAME_SIZE - subs pc, lr, #4 @ return & move spsr_svc into cpsr + /* return & move spsr_svc into cpsr */ + subs pc, lr, #4 .endm .macro get_bad_stack ldr r13, _armboot_start @ setup our mode stack sub r13, r13, #(CONFIG_STACKSIZE) sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack + /* reserve a couple spots in abort stack */ + sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) str lr, [r13] @ save caller lr / spsr mrs lr, spsr - str lr, [r13, #4] + str lr, [r13, #4] mov r13, #MODE_SVC @ prepare SVC-Mode @ msr spsr_c, r13 -- 1.6.1.2

3 4

[U-Boot] [PATCH] usb: Fix compiler warning with gcc4.4
by Kumar Gala 11 Jul '09

11 Jul '09

ehci-hcd.c: In function 'ehci_submit_root': ehci-hcd.c:719: warning: value computed is not used ehci-hcd.c:748: warning: value computed is not used Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- drivers/usb/host/ehci-hcd.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index bbd547b..423ea5d 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -716,7 +716,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, goto unknown; } /* unblock posted writes */ - ehci_readl(&hcor->or_usbcmd); + (void) ehci_readl(&hcor->or_usbcmd); break; case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): reg = ehci_readl(status_reg); @@ -745,7 +745,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, } ehci_writel(status_reg, reg); /* unblock posted write */ - ehci_readl(&hcor->or_usbcmd); + (void) ehci_readl(&hcor->or_usbcmd); break; default: debug("Unknown request\n"); -- 1.6.0.6

2 1

[U-Boot] [PATCHv2 1/3] A320: driver for FTMAC100 ethernet controller
by Po-Yu Chuang 11 Jul '09

11 Jul '09

This patch adds an FTMAC100 ethernet driver for Faraday A320 evaluation board. Signed-off-by: Po-Yu Chuang <ratbert(a)faraday-tech.com> --- drivers/net/Makefile | 1 + drivers/net/ftmac100.c | 268 ++++++++++++++++++++++++++++++++++++++++++++++++ drivers/net/ftmac100.h | 154 +++++++++++++++++++++++++++ include/netdev.h | 1 + 4 files changed, 424 insertions(+), 0 deletions(-) create mode 100644 drivers/net/ftmac100.c create mode 100644 drivers/net/ftmac100.h diff --git a/drivers/net/Makefile b/drivers/net/Makefile index c6097c3..8edf529 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -38,6 +38,7 @@ COBJS-$(CONFIG_E1000) += e1000.o COBJS-$(CONFIG_EEPRO100) += eepro100.o COBJS-$(CONFIG_ENC28J60) += enc28j60.o COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o +COBJS-$(CONFIG_DRIVER_FTMAC100) += ftmac100.o COBJS-$(CONFIG_GRETH) += greth.o COBJS-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o COBJS-$(CONFIG_KIRKWOOD_EGIGA) += kirkwood_egiga.o diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c new file mode 100644 index 0000000..3057822 --- /dev/null +++ b/drivers/net/ftmac100.c @@ -0,0 +1,268 @@ +/* + * Faraday FTMAC100 Ethernet + * + * (C) Copyright 2009 Faraday Technology + * Po-Yu Chuang <ratbert(a)faraday-tech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#undef DEBUG + +#include <config.h> +#include <common.h> +#include <malloc.h> +#include <net.h> +#include <asm/io.h> + +#include "ftmac100.h" + +struct ftmac100_data { + volatile struct ftmac100_txdes txdes[1]; + volatile struct ftmac100_rxdes rxdes[PKTBUFSRX]; + int rx_index; +}; + +/* + * Reset MAC + */ +static void ftmac100_reset (struct eth_device *dev) +{ + volatile struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase; + + debug ("%s()\n", __func__); + + writel (FTMAC100_MACCR_SW_RST, &ftmac100->maccr); + + while (readl (&ftmac100->maccr) & FTMAC100_MACCR_SW_RST) ; +} + +/* + * Set MAC address + */ +static void ftmac100_set_mac (struct eth_device *dev, const unsigned char *mac) +{ + volatile struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase; + unsigned int maddr = mac[0] << 8 | mac[1]; + unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5]; + + debug ("%s(%x %x)\n", __func__, maddr, laddr); + + writel (maddr, &ftmac100->mac_madr); + writel (laddr, &ftmac100->mac_ladr); +} + +/* + * disable transmitter, receiver + */ +static void ftmac100_halt (struct eth_device *dev) +{ + volatile struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase; + + debug ("%s()\n", __func__); + + writel (0, &ftmac100->maccr); +} + +static int ftmac100_init (struct eth_device *dev, bd_t * bd) +{ + volatile struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase; + struct ftmac100_data *priv = dev->priv; + volatile struct ftmac100_txdes *txdes = priv->txdes; + volatile struct ftmac100_rxdes *rxdes = priv->rxdes; + unsigned int maccr; + int i; + + debug ("%s()\n", __func__); + + ftmac100_reset (dev); + + /* set the ethernet address */ + + ftmac100_set_mac (dev, dev->enetaddr); + + /* disable all interrupts */ + + writel (0, &ftmac100->imr); + + /* initialize descriptors */ + + priv->rx_index = 0; + + txdes[0].txdes1 = FTMAC100_TXDES1_EDOTR; + rxdes[PKTBUFSRX - 1].rxdes1 = FTMAC100_RXDES1_EDORR; + + for (i = 0; i < PKTBUFSRX; i++) { + /* RXBUF_BADR */ + rxdes[i].rxdes2 = (unsigned int)NetRxPackets[i]; + rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE (PKTSIZE_ALIGN); + rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN; + } + + /* transmit ring */ + + writel ((unsigned int)txdes, &ftmac100->txr_badr); + + /* receive ring */ + + writel ((unsigned int)rxdes, &ftmac100->rxr_badr); + + /* poll receive descriptor automatically */ + + writel (FTMAC100_APTC_RXPOLL_CNT (1), &ftmac100->aptc); + + /* enable transmitter, receiver */ + + maccr = FTMAC100_MACCR_XMT_EN | + FTMAC100_MACCR_RCV_EN | + FTMAC100_MACCR_XDMA_EN | + FTMAC100_MACCR_RDMA_EN | + FTMAC100_MACCR_CRC_APD | + FTMAC100_MACCR_ENRX_IN_HALFTX | + FTMAC100_MACCR_RX_RUNT | + FTMAC100_MACCR_RX_BROADPKT; + + writel (maccr, &ftmac100->maccr); + + return 0; +} + +/* + * Get a data block via Ethernet + */ +static int ftmac100_recv (struct eth_device *dev) +{ + struct ftmac100_data *priv = dev->priv; + volatile struct ftmac100_rxdes *curr_des; + unsigned short rxlen; + + curr_des = &priv->rxdes[priv->rx_index]; + + if (curr_des->rxdes0 & FTMAC100_RXDES0_RXDMA_OWN) + return -1; + + if (curr_des->rxdes0 & (FTMAC100_RXDES0_RX_ERR | + FTMAC100_RXDES0_CRC_ERR | + FTMAC100_RXDES0_FTL | + FTMAC100_RXDES0_RUNT | + FTMAC100_RXDES0_RX_ODD_NB)) { + return -1; + } + + rxlen = FTMAC100_RXDES0_RFL (curr_des->rxdes0); + + debug ("%s(): RX buffer %d, %x received\n", + __func__, priv->rx_index, rxlen); + + /* pass the packet up to the protocol layers. */ + + NetReceive ((void *)curr_des->rxdes2, rxlen); + + /* release buffer to DMA */ + + curr_des->rxdes0 |= FTMAC100_RXDES0_RXDMA_OWN; + + priv->rx_index = (priv->rx_index + 1) % PKTBUFSRX; + + return 0; +} + +/* + * Send a data block via Ethernet + */ +static int +ftmac100_send (struct eth_device *dev, volatile void *packet, int length) +{ + volatile struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase; + struct ftmac100_data *priv = dev->priv; + volatile struct ftmac100_txdes *curr_des = priv->txdes; + int tmo; + + if (curr_des->txdes0 & FTMAC100_TXDES0_TXPKT_TXDMA_OWN) { + debug ("%s(): no TX descriptor available\n", __func__); + return -1; + } + + debug ("%s(%x, %x)\n", __func__, (int)packet, length); + + length = (length < 64) ? 64 : length; + + /* initiate a transmit sequence */ + + curr_des->txdes2 = (unsigned int)packet; /* TXBUF_BADR */ + + curr_des->txdes1 &= FTMAC100_TXDES1_EDOTR; + curr_des->txdes1 |= FTMAC100_TXDES1_FTS | + FTMAC100_TXDES1_LTS | + FTMAC100_TXDES1_TXBUF_SIZE (length); + + curr_des->txdes0 = FTMAC100_TXDES0_TXPKT_TXDMA_OWN; + + /* start transmit */ + + writel (1, &ftmac100->txpd); + + /* wait for transfer to succeed */ + + tmo = get_timer (0) + 5 * CONFIG_SYS_HZ; + while (curr_des->txdes0 & FTMAC100_TXDES0_TXPKT_TXDMA_OWN) { + if (get_timer (0) >= tmo) { + debug ("%s(): timed out\n", __func__); + return -1; + } + } + + debug ("%s(): packet sent\n", __func__); + + return 0; +} + +int ftmac100_initialize (bd_t * bd) +{ + struct eth_device *dev; + struct ftmac100_data *priv; + + if (!(dev = malloc (sizeof *dev))) { + printf ("%s(): failed to allocate dev\n", __func__); + goto out; + } + + /* Transmit and receive descriptors should align to 16 bytes */ + + if (!(priv = memalign (16, sizeof (struct ftmac100_data)))) { + printf ("%s(): failed to allocate priv\n", __func__); + goto free_dev; + } + + memset (dev, 0, sizeof (*dev)); + memset (priv, 0, sizeof (*priv)); + + sprintf (dev->name, "FTMAC100"); + dev->iobase = CONFIG_SYS_MAC100_BASE; + dev->init = ftmac100_init; + dev->halt = ftmac100_halt; + dev->send = ftmac100_send; + dev->recv = ftmac100_recv; + dev->priv = priv; + + eth_register (dev); + + return 1; + +free_dev: + free (dev); +out: + return 0; +} diff --git a/drivers/net/ftmac100.h b/drivers/net/ftmac100.h new file mode 100644 index 0000000..49c508e --- /dev/null +++ b/drivers/net/ftmac100.h @@ -0,0 +1,154 @@ +/* + * Faraday FTMAC100 Ethernet + * + * (C) Copyright 2009 Faraday Technology + * Po-Yu Chuang <ratbert(a)faraday-tech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __FTMAC100_H +#define __FTMAC100_H + +struct ftmac100 { + unsigned int isr; /* 0x00 */ + unsigned int imr; /* 0x04 */ + unsigned int mac_madr; /* 0x08 */ + unsigned int mac_ladr; /* 0x0c */ + unsigned int maht0; /* 0x10 */ + unsigned int maht1; /* 0x14 */ + unsigned int txpd; /* 0x18 */ + unsigned int rxpd; /* 0x1c */ + unsigned int txr_badr; /* 0x20 */ + unsigned int rxr_badr; /* 0x24 */ + unsigned int itc; /* 0x28 */ + unsigned int aptc; /* 0x2c */ + unsigned int dblac; /* 0x30 */ + unsigned int pad1[3]; /* 0x34 - 0x3c */ + unsigned int pad2[16]; /* 0x40 - 0x7c */ + unsigned int pad3[2]; /* 0x80 - 0x84 */ + unsigned int maccr; /* 0x88 */ + unsigned int macsr; /* 0x8c */ + unsigned int phycr; /* 0x90 */ + unsigned int phywdata; /* 0x94 */ + unsigned int fcr; /* 0x98 */ + unsigned int bpr; /* 0x9c */ + unsigned int pad4[8]; /* 0xa0 - 0xbc */ + unsigned int pad5; /* 0xc0 */ + unsigned int ts; /* 0xc4 */ + unsigned int dmafifos; /* 0xc8 */ + unsigned int tm; /* 0xcc */ + unsigned int pad6; /* 0xd0 */ + unsigned int tx_mcol_scol; /* 0xd4 */ + unsigned int rpf_aep; /* 0xd8 */ + unsigned int xm_pg; /* 0xdc */ + unsigned int runt_tlcc; /* 0xe0 */ + unsigned int crcer_ftl; /* 0xe4 */ + unsigned int rlc_rcc; /* 0xe8 */ + unsigned int broc; /* 0xec */ + unsigned int mulca; /* 0xf0 */ + unsigned int rp; /* 0xf4 */ + unsigned int xp; /* 0xf8 */ +}; + +/* + * Interrupt status register & interrupt mask register + */ +#define FTMAC100_INT_RPKT_FINISH (1 << 0) +#define FTMAC100_INT_NORXBUF (1 << 1) +#define FTMAC100_INT_XPKT_FINISH (1 << 2) +#define FTMAC100_INT_NOTXBUF (1 << 3) +#define FTMAC100_INT_XPKT_OK (1 << 4) +#define FTMAC100_INT_XPKT_LOST (1 << 5) +#define FTMAC100_INT_RPKT_SAV (1 << 6) +#define FTMAC100_INT_RPKT_LOST (1 << 7) +#define FTMAC100_INT_AHB_ERR (1 << 8) +#define FTMAC100_INT_PHYSTS_CHG (1 << 9) + +/* + * Automatic polling timer control register + */ +#define FTMAC100_APTC_RXPOLL_CNT(x) (((x) & 0xf) << 0) +#define FTMAC100_APTC_RXPOLL_TIME_SEL (1 << 4) +#define FTMAC100_APTC_TXPOLL_CNT(x) (((x) & 0xf) << 8) +#define FTMAC100_APTC_TXPOLL_TIME_SEL (1 << 12) + +/* + * MAC control register + */ +#define FTMAC100_MACCR_XDMA_EN (1 << 0) +#define FTMAC100_MACCR_RDMA_EN (1 << 1) +#define FTMAC100_MACCR_SW_RST (1 << 2) +#define FTMAC100_MACCR_LOOP_EN (1 << 3) +#define FTMAC100_MACCR_CRC_DIS (1 << 4) +#define FTMAC100_MACCR_XMT_EN (1 << 5) +#define FTMAC100_MACCR_ENRX_IN_HALFTX (1 << 6) +#define FTMAC100_MACCR_RCV_EN (1 << 8) +#define FTMAC100_MACCR_HT_MULTI_EN (1 << 9) +#define FTMAC100_MACCR_RX_RUNT (1 << 10) +#define FTMAC100_MACCR_RX_FTL (1 << 11) +#define FTMAC100_MACCR_RCV_ALL (1 << 12) +#define FTMAC100_MACCR_CRC_APD (1 << 14) +#define FTMAC100_MACCR_FULLDUP (1 << 15) +#define FTMAC100_MACCR_RX_MULTIPKT (1 << 16) +#define FTMAC100_MACCR_RX_BROADPKT (1 << 17) + +/* + * Transmit descriptor, aligned to 16 bytes + */ +struct ftmac100_txdes { + unsigned int txdes0; + unsigned int txdes1; + unsigned int txdes2; /* TXBUF_BADR */ + unsigned int txdes3; /* not used by HW */ +} __attribute__ ((aligned(16))); + +#define FTMAC100_TXDES0_TXPKT_LATECOL (1 << 0) +#define FTMAC100_TXDES0_TXPKT_EXSCOL (1 << 1) +#define FTMAC100_TXDES0_TXPKT_TXDMA_OWN (1 << 31) + +#define FTMAC100_TXDES1_TXBUF_SIZE(x) ((x) & 0x7ff) +#define FTMAC100_TXDES1_LTS (1 << 27) +#define FTMAC100_TXDES1_FTS (1 << 28) +#define FTMAC100_TXDES1_TX2FIC (1 << 29) +#define FTMAC100_TXDES1_TXIC (1 << 30) +#define FTMAC100_TXDES1_EDOTR (1 << 31) + +/* + * Receive descriptor, aligned to 16 bytes + */ +struct ftmac100_rxdes { + unsigned int rxdes0; + unsigned int rxdes1; + unsigned int rxdes2; /* RXBUF_BADR */ + unsigned int rxdes3; /* not used by HW */ +} __attribute__ ((aligned(16))); + +#define FTMAC100_RXDES0_RFL(des) ((des) & 0x7ff) +#define FTMAC100_RXDES0_MULTICAST (1 << 16) +#define FTMAC100_RXDES0_BROADCAST (1 << 17) +#define FTMAC100_RXDES0_RX_ERR (1 << 18) +#define FTMAC100_RXDES0_CRC_ERR (1 << 19) +#define FTMAC100_RXDES0_FTL (1 << 20) +#define FTMAC100_RXDES0_RUNT (1 << 21) +#define FTMAC100_RXDES0_RX_ODD_NB (1 << 22) +#define FTMAC100_RXDES0_LRS (1 << 28) +#define FTMAC100_RXDES0_FRS (1 << 29) +#define FTMAC100_RXDES0_RXDMA_OWN (1 << 31) + +#define FTMAC100_RXDES1_RXBUF_SIZE(x) ((x) & 0x7ff) +#define FTMAC100_RXDES1_EDORR (1 << 31) + +#endif /* __FTMAC100_H */ diff --git a/include/netdev.h b/include/netdev.h index aed5c4c..88e286f 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -50,6 +50,7 @@ int e1000_initialize(bd_t *bis); int eepro100_initialize(bd_t *bis); int eth_3com_initialize (bd_t * bis); int fec_initialize (bd_t *bis); +int ftmac100_initialize(bd_t *bits); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); int inca_switch_initialize(bd_t *bis); -- 1.6.3.3

4 5

[U-Boot] Request pull: u-boot-sh
by Nobuhiro Iwamatsu 11 Jul '09

11 Jul '09

Dear Wolfgang. Please pull u-boot-sh master branch. Best regards, Nobuhiro The following changes since commit 3672cd5c3b53d219d33345eebad4e25ad5bf6d52: Wolfgang Denk (1): MAINTAINERS: fix sorting, remove duplicates. are available in the git repository at: git://git.denx.de/u-boot-sh.git master Jean-Christophe PLAGNIOL-VILLARD (6): sh7785lcr: fix out of tree build sh: make the linker scripts more generic sh: unify linker script sh: introduce clock framework sh3/sh4: fix CONFIG_SYS_HZ to 1000 sh3/sh4: rename config option TMU_CLK_DIVIDER to CONFIG_SYS_TMU_CLK_DIV Nobuhiro Iwamatsu (4): sh: Revised the build with newest compiler sh: Add support ESPT-GIGA borad sh: Add espt-gita board to MAKEALL sh: Update pci config for Renesas r7780mp board MAKEALL | 1 + Makefile | 15 +- board/espt/Makefile | 50 ++++ board/espt/config.mk | 9 + board/espt/espt.c | 50 ++++ board/espt/lowlevel_init.S | 334 +++++++++++++++++++++++ board/ms7720se/u-boot.lds | 108 -------- board/ms7722se/u-boot.lds | 105 ------- board/ms7750se/u-boot.lds | 105 ------- board/renesas/MigoR/u-boot.lds | 105 ------- board/renesas/ap325rxa/u-boot.lds | 105 ------- board/renesas/r2dplus/u-boot.lds | 105 ------- board/renesas/r7780mp/u-boot.lds | 105 ------- board/renesas/sh7763rdp/u-boot.lds | 105 ------- board/renesas/sh7785lcr/Makefile | 2 +- board/renesas/sh7785lcr/lowlevel_init.S | 58 ++-- board/renesas/sh7785lcr/u-boot_29bit | 96 ------- board/renesas/sh7785lcr/u-boot_32bit | 96 ------- {board/renesas/rsk7203 => cpu/sh2}/u-boot.lds | 10 +- {board/mpr2 => cpu/sh3}/u-boot.lds | 13 +- {board/renesas/sh7785lcr => cpu/sh4}/u-boot.lds | 15 +- include/asm-sh/clk.h | 35 +++ include/asm-sh/macro.h | 2 +- include/configs/MigoR.h | 4 +- include/configs/ap325rxa.h | 4 +- include/configs/espt.h | 126 +++++++++ include/configs/mpr2.h | 4 +- include/configs/ms7720se.h | 4 +- include/configs/ms7722se.h | 4 +- include/configs/ms7750se.h | 4 +- include/configs/r2dplus.h | 4 +- include/configs/r7780mp.h | 7 +- include/configs/sh7763rdp.h | 4 +- include/configs/sh7785lcr.h | 4 +- lib_sh/time.c | 55 +++-- sh_config.mk | 3 + 36 files changed, 720 insertions(+), 1136 deletions(-) create mode 100644 board/espt/Makefile create mode 100644 board/espt/config.mk create mode 100644 board/espt/espt.c create mode 100644 board/espt/lowlevel_init.S delete mode 100644 board/ms7720se/u-boot.lds delete mode 100644 board/ms7722se/u-boot.lds delete mode 100644 board/ms7750se/u-boot.lds delete mode 100644 board/renesas/MigoR/u-boot.lds delete mode 100644 board/renesas/ap325rxa/u-boot.lds delete mode 100644 board/renesas/r2dplus/u-boot.lds delete mode 100644 board/renesas/r7780mp/u-boot.lds delete mode 100644 board/renesas/sh7763rdp/u-boot.lds delete mode 100644 board/renesas/sh7785lcr/u-boot_29bit delete mode 100644 board/renesas/sh7785lcr/u-boot_32bit rename {board/renesas/rsk7203 => cpu/sh2}/u-boot.lds (89%) rename {board/mpr2 => cpu/sh3}/u-boot.lds (87%) rename {board/renesas/sh7785lcr => cpu/sh4}/u-boot.lds (90%) create mode 100644 include/asm-sh/clk.h create mode 100644 include/configs/espt.h

2 2

[U-Boot] [PATCH] envcrc: extract default environment from target ELF files
by Mike Frysinger 11 Jul '09

11 Jul '09

Rather than rely on dirty hacks to compile the environment on the host and extract the CRC from that, have envcrc extract the environment straight from the ELF object that will be linked into u-boot itself. This makes the envcrc code a bit more complicated, but it simplifies the build process and host requirements because we don't have to try and recreate the environment that the target will be seeing on the host. This avoids some issues that crop up from time to time where the preprocessor defines on the host don't expand in the same way as for the target -- in case the target uses those defines to customize the environment, or the host defines conflicts with some of the target values. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- common/Makefile | 4 +- common/env_embedded.c | 30 +--------- tools/Makefile | 3 +- tools/envcrc.c | 156 ++++++++++++++++++++++++++++++++++++++++++------- diff --git a/common/Makefile b/common/Makefile index c8e5d26..02bc71b 100644 --- a/common/Makefile +++ b/common/Makefile @@ -173,9 +173,9 @@ all: $(LIB) $(AOBJS) $(LIB): $(obj).depend $(OBJS) $(AR) $(ARFLAGS) $@ $(OBJS) -$(obj)env_embedded.o: $(src)env_embedded.c $(obj)../tools/envcrc +$(obj)env_embedded.o: $(src)env_embedded.c $(obj)env_common.o $(obj)../tools/envcrc $(CC) $(AFLAGS) -Wa,--no-warn \ - -DENV_CRC=$(shell $(obj)../tools/envcrc) \ + -DENV_CRC=$(shell $(obj)../tools/envcrc $(obj)env_common.o) \ -c -o $@ $(src)env_embedded.c $(obj)../tools/envcrc: diff --git a/common/env_embedded.c b/common/env_embedded.c index ae6cac4..60736c7 100644 --- a/common/env_embedded.c +++ b/common/env_embedded.c @@ -21,26 +21,10 @@ * MA 02111-1307 USA */ -#ifndef __ASSEMBLY__ -#define __ASSEMBLY__ /* Dirty trick to get only #defines */ -#endif -#define __ASM_STUB_PROCESSOR_H__ /* don't include asm/processor. */ #include <config.h> -#undef __ASSEMBLY__ #include <environment.h> /* - * Handle HOSTS that have prepended - * crap on symbol names, not TARGETS. - */ -#if defined(__APPLE__) -/* Leading underscore on symbols */ -# define SYM_CHAR "_" -#else /* No leading character on symbols */ -# define SYM_CHAR -#endif - -/* * Generate embedded environment table * inside U-Boot image, if needed. */ @@ -75,7 +59,7 @@ #else # define GEN_SET_VALUE(name, value) asm (GEN_SYMNAME(name) " = " GEN_VALUE(value)) #endif -#define GEN_SYMNAME(str) SYM_CHAR #str +#define GEN_SYMNAME(str) #str #define GEN_VALUE(str) #str #define GEN_ABS(name, value) \ asm (".globl " GEN_SYMNAME(name)); \ @@ -197,17 +181,7 @@ env_t redundand_environment __PPCENV__ = { #endif /* CONFIG_ENV_ADDR_REDUND */ /* - * These will end up in the .text section - * if the environment strings are embedded - * in the image. When this is used for - * tools/envcrc, they are placed in the - * .data/.sdata section. - * - */ -unsigned long env_size __PPCTEXT__ = sizeof(env_t); - -/* - * Add in absolutes. + * Add in absolutes. This symbol is only referenced from linker scripts. */ GEN_ABS(env_offset, CONFIG_ENV_OFFSET); diff --git a/tools/Makefile b/tools/Makefile index 43c284c..982d65a 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -80,7 +80,6 @@ BIN_FILES-$(CONFIG_INCA_IP) += inca-swap-bytes$(SFX) BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX) # Source files which exist outside the tools directory -EXT_OBJ_FILES-y += common/env_embedded.o EXT_OBJ_FILES-y += lib_generic/crc32.o EXT_OBJ_FILES-y += lib_generic/md5.o EXT_OBJ_FILES-y += lib_generic/sha1.o @@ -156,7 +155,7 @@ MAKEDEPEND = makedepend all: $(obj).depend $(BINS) $(LOGO-y) subdirs -$(obj)envcrc$(SFX): $(obj)envcrc.o $(obj)crc32.o $(obj)env_embedded.o $(obj)sha1.o +$(obj)envcrc$(SFX): $(obj)envcrc.o $(obj)crc32.o $(obj)sha1.o $(CC) $(CFLAGS) -o $@ $^ $(obj)ubsha1$(SFX): $(obj)ubsha1.o $(obj)sha1.o $(obj)os_support.o diff --git a/tools/envcrc.c b/tools/envcrc.c index 5b0f7cd..87453e5 100644 --- a/tools/envcrc.c +++ b/tools/envcrc.c @@ -21,11 +21,15 @@ * MA 02111-1307 USA */ +#include "compiler.h" +#include <errno.h> +#include <stdbool.h> #include <stdio.h> #include <stdint.h> #include <stdlib.h> #include <string.h> #include <unistd.h> +#include "elf.h" #ifndef __ASSEMBLY__ #define __ASSEMBLY__ /* Dirty trick to get only #defines */ @@ -67,48 +71,156 @@ #define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE) +unsigned char host_endian(void) +{ + struct { + union { + uint16_t sint; + unsigned char str[2]; + } u; + } data; + data.u.sint = 0xBBAA; + return data.u.str[0] == 0xBB ? ELFDATA2MSB : ELFDATA2LSB; +} +bool swapit; +#define EGET(val) ( \ + !swapit ? (val) : \ + sizeof(val) == 1 ? (val) : \ + sizeof(val) == 2 ? uswap_16(val) : \ + sizeof(val) == 4 ? uswap_32(val) : \ + sizeof(val) == 8 ? uswap_64(val) : \ + 1 \ +) extern uint32_t crc32 (uint32_t, const unsigned char *, unsigned int); -#ifdef ENV_IS_EMBEDDED -extern unsigned int env_size; -extern unsigned char environment; -#endif /* ENV_IS_EMBEDDED */ +static bool elfread(FILE *fp, long offset, void *ptr, size_t size, size_t nmemb) +{ + if (fseek(fp, offset, SEEK_SET)) + return false; + if (fread(ptr, size, nmemb, fp) != nmemb) + return false; + return true; +} + +/* Avoid using elf.h since not all systems have it */ +unsigned char environment[CONFIG_ENV_SIZE]; +bool read_env_from_elf(const char *elf_file) +{ + const char env_symbol[] = "default_environment"; + char buf[256]; + FILE *fp; + bool ret = false; + int i; + + Elf32_Ehdr ehdr; + Elf32_Shdr shdr, strtab, symtab; + Elf32_Sym sym; + + fp = fopen(elf_file, "r"); + if (!fp) + return false; + + /* Make sure this is a valid ELF */ + if (!elfread(fp, 0, &ehdr, sizeof(ehdr), 1)) + goto done; + if (memcmp(ehdr.e_ident, ELFMAG, SELFMAG)) { + errno = EINVAL; + goto done; + } + if (ehdr.e_ident[EI_CLASS] != ELFCLASS32) { + errno = EINVAL; + goto done; + } + swapit = host_endian() == ehdr.e_ident[EI_DATA] ? false : true; + + /* Find the string & symbol table */ + memset(&strtab, 0, sizeof(strtab)); /* shut gcc the hell up */ + memset(&symtab, 0, sizeof(symtab)); /* shut gcc the hell up */ + strtab.sh_type = SHT_NULL; + symtab.sh_type = SHT_NULL; + for (i = 0; i < EGET(ehdr.e_shnum); ++i) { + long off = EGET(ehdr.e_shoff) + i * EGET(ehdr.e_shentsize); + if (!elfread(fp, off, &shdr, sizeof(shdr), 1)) + goto done; + if (EGET(shdr.sh_type) == SHT_STRTAB) + strtab = shdr; + else if (EGET(shdr.sh_type) == SHT_SYMTAB) + symtab = shdr; + } + if (strtab.sh_type == SHT_NULL || symtab.sh_type == SHT_NULL) { + errno = EINVAL; + goto done; + } + + /* Find the environment symbol */ + for (i = 0; i < EGET(symtab.sh_size) / EGET(symtab.sh_entsize); ++i) { + char *tbuf; + long off = EGET(symtab.sh_offset) + i * sizeof(sym); + if (!elfread(fp, off, &sym, sizeof(sym), 1)) + goto done; + off = EGET(strtab.sh_offset) + EGET(sym.st_name); + tbuf = buf; + if (!elfread(fp, off, tbuf, 1, sizeof(env_symbol))) + goto done; + /* handle ABI prefixed symbols automatically */ + if (tbuf[0] == '_') { + tbuf[sizeof(env_symbol)] = '\0'; + ++tbuf; + } + if (!strcmp(tbuf, env_symbol)) { + off = EGET(ehdr.e_shoff) + EGET(sym.st_shndx) * EGET(ehdr.e_shentsize); + if (!elfread(fp, off, &shdr, sizeof(shdr), 1)) + goto done; + off = EGET(shdr.sh_offset) + EGET(sym.st_value); + if (!elfread(fp, off, environment + ENV_HEADER_SIZE, 1, EGET(sym.st_size))) + goto done; + ret = true; + break; + } + } + + done: + fclose(fp); + return ret; +} int main (int argc, char **argv) { -#ifdef ENV_IS_EMBEDDED +#ifdef ENV_IS_EMBEDDED unsigned char pad = 0x00; uint32_t crc; - unsigned char *envptr = &environment, + unsigned char *envptr = environment, *dataptr = envptr + ENV_HEADER_SIZE; unsigned int datasize = ENV_SIZE; - unsigned int eoe; + const char *env_file; - if (argv[1] && !strncmp(argv[1], "--binary", 8)) { + if (argc < 2) { + puts("Usage: envcrc <environment object> [--binary [le]]"); + return 1; + } + env_file = argv[1]; + + if (argv[2] && !strncmp(argv[2], "--binary", 8)) { int ipad = 0xff; - if (argv[1][8] == '=') - sscanf(argv[1] + 9, "%i", &ipad); + if (argv[2][8] == '=') + sscanf(argv[2] + 9, "%i", &ipad); pad = ipad; } + memset(dataptr, pad, datasize); - if (pad) { - /* find the end of env */ - for (eoe = 0; eoe < datasize - 1; ++eoe) - if (!dataptr[eoe] && !dataptr[eoe+1]) { - eoe += 2; - break; - } - if (eoe < datasize - 1) - memset(dataptr + eoe, pad, datasize - eoe); + if (!read_env_from_elf(env_file)) { + fprintf(stderr, "unable to read environment from %s: %s\n", + env_file, strerror(errno)); + return 1; } crc = crc32 (0, dataptr, datasize); /* Check if verbose mode is activated passing a parameter to the program */ - if (argc > 1) { - if (!strncmp(argv[1], "--binary", 8)) { - int le = (argc > 2 ? !strcmp(argv[2], "le") : 1); + if (argc > 2) { + if (!strncmp(argv[2], "--binary", 8)) { + int le = (argc > 3 ? !strcmp(argv[3], "le") : 1); size_t i, start, end, step; if (le) { start = 0; -- 1.6.3.1

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