April 2009 - U-Boot

[U-Boot] U-boot initialization test
by eija_flight 02 Apr '09

02 Apr '09

Hello, Below is my board initialization process : U-Boot 1.3.1 (Nov 27 2008 - 08:30:43) MPC83XX Reset Status: Software Hard, External/Internal Soft, External/Internal Hard CPU: e300c1, MPC8349E, Rev: 31 at 528 MHz, CSB: 264 MHz Board: MPX8349GC PCI1: 32 bit, 33 MHz SRAM: 1 MB I2C: ready DRAM: 512 MB (DDR2, 64-bit, ECC on) FLASH: 16 MB PCI: Bus Dev VenId DevId Class Int 00 0f 10cf 202b 0380 00 In: serial Out: serial Err: serial Net: TSEC0, TSEC1 During above initialization process of u-boot, 1. Does it conduct a test to all board hardware listed? 2. If above answer is yes, what method is used to do the test? -- View this message in context: http://www.nabble.com/U-boot-initialization-test-tp22840615p22840615.html Sent from the Uboot - Users mailing list archive at Nabble.com.

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[U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx (v2)
by Kyungmin Park 02 Apr '09

02 Apr '09

Move machine specific code to smdk6400. Some board use OneNAND instead of NAND. Some register MP0_CS_CFG[5:0] are controled by both h/w and s/w. So it's better to use macro instead of hard-coded value. Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S index e0119a7..47f72f6 100644 --- a/board/samsung/smdk6400/lowlevel_init.S +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -104,6 +104,13 @@ lowlevel_init: bl nand_asm_init #endif + /* Memory subsystem address 0x7e00f120 */ + ldr r0, =ELFIN_MEM_SYS_CFG + + /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */ + mov r1, #S3C64XX_MEM_SYS_CFG_NAND + str r1, [r0] + bl mem_ctrl_asm_init /* Wakeup support. Don't know if it's going to be used, untested. */ diff --git a/cpu/arm1176/s3c64xx/cpu_init.S b/cpu/arm1176/s3c64xx/cpu_init.S index 08bda99..32bb467 100644 --- a/cpu/arm1176/s3c64xx/cpu_init.S +++ b/cpu/arm1176/s3c64xx/cpu_init.S @@ -28,13 +28,6 @@ .globl mem_ctrl_asm_init mem_ctrl_asm_init: - /* Memory subsystem address 0x7e00f120 */ - ldr r0, =ELFIN_MEM_SYS_CFG - - /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */ - mov r1, #0xd - str r1, [r0] - /* DMC1 base address 0x7e001000 */ ldr r0, =ELFIN_DMC1_BASE diff --git a/include/s3c6400.h b/include/s3c6400.h index fd3e99b..d3f136d 100644 --- a/include/s3c6400.h +++ b/include/s3c6400.h @@ -380,6 +380,11 @@ */ #define ELFIN_MEM_SYS_CFG 0x7e00f120 +#define S3C64XX_MEM_SYS_CFG_16BIT (1 << 12) + +#define S3C64XX_MEM_SYS_CFG_NAND 0x0008 +#define S3C64XX_MEM_SYS_CFG_ONENAND S3C64XX_MEM_SYS_CFG_16BIT + #define GPACON (ELFIN_GPIO_BASE + GPACON_OFFSET) #define GPADAT (ELFIN_GPIO_BASE + GPADAT_OFFSET) #define GPAPUD (ELFIN_GPIO_BASE + GPAPUD_OFFSET)

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[U-Boot] [PATCH] omap3: mmc: mmc2 support
by Minkyu Kang 02 Apr '09

02 Apr '09

There are 3 MMC/SD/SDIO host controllers inside the device. This patch will support mmc2 and mmc3(mmc3 have not tested) Signed-off-by: Minkyu Kang <mk7.kang(a)samsung.com> --- drivers/mmc/omap3_mmc.c | 74 ++++++++++++++++++++++++----- include/asm-arm/arch-omap3/mmc_host_def.h | 10 +++- include/asm-arm/arch-omap3/omap3.h | 3 + 3 files changed, 73 insertions(+), 14 deletions(-) diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c index e90db7e..934caff 100644 --- a/drivers/mmc/omap3_mmc.c +++ b/drivers/mmc/omap3_mmc.c @@ -51,7 +51,8 @@ const unsigned short mmc_transspeed_val[15][4] = { mmc_card_data cur_card_data; static block_dev_desc_t mmc_blk_dev; -static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC_BASE; +static hsmmc_t *mmc_base; +static int curr_device = -1; block_dev_desc_t *mmc_get_dev(int dev) { @@ -62,10 +63,21 @@ void twl4030_mmc_config(void) { unsigned char data; - data = DEV_GRP_P1; - i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEV_GRP, 1, &data, 1); - data = VMMC1_VSEL_30; - i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEDICATED, 1, &data, 1); + switch (curr_device) { + case 1: + data = DEV_GRP_P1; + i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEV_GRP, 1, &data, 1); + data = VMMC1_VSEL_30; + i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEDICATED, 1, &data, 1); + break; + case 2: + case 3: + data = DEV_GRP_P1; + i2c_write(PWRMGT_ADDR_ID4, VMMC2_DEV_GRP, 1, &data, 1); + data = VMMC2_VSEL_185; + i2c_write(PWRMGT_ADDR_ID4, VMMC2_DEDICATED, 1, &data, 1); + break; + } } unsigned char mmc_board_init(void) @@ -74,12 +86,21 @@ unsigned char mmc_board_init(void) twl4030_mmc_config(); - writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 | - PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, - &t2_base->pbias_lite); + switch (curr_device) { + case 1: + writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 | + PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, + &t2_base->pbias_lite); - writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, - &t2_base->devconf0); + writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, + &t2_base->devconf0); + break; + case 2: + case 3: + writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL, + &t2_base->devconf1); + break; + } return 1; } @@ -525,8 +546,37 @@ unsigned long mmc_bread(int dev_num, unsigned long blknr, lbaint_t blkcnt, return 1; } -int mmc_legacy_init(int verbose) +int mmc_set_dev(int dev) +{ + if (dev < 0) { + printf("unknwon device\n"); + return 1; + } else { + switch (dev) { + case 1: + mmc_base = (hsmmc_t *)OMAP_HSMMC_BASE_MMC1; + break; + case 2: + mmc_base = (hsmmc_t *)OMAP_HSMMC_BASE_MMC2; + break; + case 3: + mmc_base = (hsmmc_t *)OMAP_HSMMC_BASE_MMC3; + break; + default: + printf("unknwon device\n"); + return 1; + } + curr_device = dev; + } + + return 0; +} + +int mmc_legacy_init(int dev) { + if (mmc_set_dev(dev) != 0) + return 1; + if (configure_mmc(&cur_card_data) != 1) return 1; @@ -538,7 +588,7 @@ int mmc_legacy_init(int verbose) /* FIXME fill in the correct size (is set to 32MByte) */ mmc_blk_dev.blksz = MMCSD_SECTOR_SIZE; - mmc_blk_dev.lba = 0x10000; + mmc_blk_dev.lba = cur_card_data.size; mmc_blk_dev.removable = 0; mmc_blk_dev.block_read = mmc_bread; diff --git a/include/asm-arm/arch-omap3/mmc_host_def.h b/include/asm-arm/arch-omap3/mmc_host_def.h index aa751c9..8b234ef 100644 --- a/include/asm-arm/arch-omap3/mmc_host_def.h +++ b/include/asm-arm/arch-omap3/mmc_host_def.h @@ -31,7 +31,9 @@ typedef struct t2 { unsigned char res1[0x274]; unsigned int devconf0; /* 0x274 */ - unsigned char res2[0x2A8]; + unsigned char res2[0x60]; + unsigned int devconf1; /* 0x2D8 */ + unsigned char res3[0x244]; unsigned int pbias_lite; /* 0x520 */ } t2_t; @@ -41,10 +43,14 @@ typedef struct t2 { #define PBIASSPEEDCTRL0 (1 << 2) #define PBIASLITEPWRDNZ1 (1 << 9) +#define MMCSDIO2ADPCLKISEL (1 << 6) + /* * OMAP HSMMC register definitions */ -#define OMAP_HSMMC_BASE 0x4809C000 +#define OMAP_HSMMC_BASE_MMC1 0x4809C000 +#define OMAP_HSMMC_BASE_MMC2 0x480B4000 +#define OMAP_HSMMC_BASE_MMC3 0x480AD000 typedef struct hsmmc { unsigned char res1[0x10]; diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h index 8c9656f..b5b5def 100644 --- a/include/asm-arm/arch-omap3/omap3.h +++ b/include/asm-arm/arch-omap3/omap3.h @@ -206,6 +206,8 @@ typedef struct gpio { #define VAUX3_DEDICATED 0x7D #define VMMC1_DEV_GRP 0x82 #define VMMC1_DEDICATED 0x85 +#define VMMC2_DEV_GRP 0x86 +#define VMMC2_DEDICATED 0x89 #define VPLL2_DEV_GRP 0x8E #define VPLL2_DEDICATED 0x91 #define VDAC_DEV_GRP 0x96 @@ -219,5 +221,6 @@ typedef struct gpio { #define VPLL2_VSEL_18 0x05 #define VDAC_VSEL_18 0x03 #define VMMC1_VSEL_30 0x02 +#define VMMC2_VSEL_185 0x06 #endif

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[U-Boot] Zoom2 respin 1
by Tom 02 Apr '09

02 Apr '09

The main structural change was to move the board specific serial init out of the common drivers/serial/ns16550.c and into the board file board/omap3/zoom2/zoom2_serial.c. Some fixes spawned fixes in other omap boards. Last patch is to follow change to recent renaming of OMAP time divisor. Tom

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[U-Boot] [PATCH] ZOOM2 Add initial support for Zoom2
by Tom Rix 02 Apr '09

02 Apr '09

Zoom2 is a new board from Texas Instruments and LogicPD This is the product description http://www.logicpd.com/products/development-kits/texas-instruments-zoom%E2%… This patch provides a zoom2 base target by copying zoom1 and by making some obvious changes. This target compiles but does not yet run. To configure, run make omap3_zoom2_config Signed-off-by: Tom Rix <Tom.Rix(a)windriver.com> --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/omap3/common/Makefile | 1 + board/omap3/zoom2/Makefile | 49 ++++++ board/omap3/zoom2/config.mk | 33 ++++ board/omap3/zoom2/u-boot.lds | 63 ++++++++ board/omap3/zoom2/zoom2.c | 79 ++++++++++ board/omap3/zoom2/zoom2.h | 134 +++++++++++++++++ include/configs/omap3_zoom2.h | 328 +++++++++++++++++++++++++++++++++++++++++ 10 files changed, 695 insertions(+), 0 deletions(-) create mode 100644 board/omap3/zoom2/Makefile create mode 100644 board/omap3/zoom2/config.mk create mode 100644 board/omap3/zoom2/u-boot.lds create mode 100644 board/omap3/zoom2/zoom2.c create mode 100644 board/omap3/zoom2/zoom2.h create mode 100644 include/configs/omap3_zoom2.h diff --git a/MAINTAINERS b/MAINTAINERS index 25b28d6..f89e01a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -610,6 +610,10 @@ Stelian Pop <stelian.pop(a)leadtechdesign.com> at91sam9263ek ARM926EJS (AT91SAM9263 SoC) at91sam9rlek ARM926EJS (AT91SAM9RL SoC) +Tom Rix <Tom.Rix(a)windriver.com> + + omap3_zoom2 ARM CORTEX-A8 (OMAP3xx SoC) + Stefan Roese <sr(a)denx.de> ixdpg425 xscale diff --git a/MAKEALL b/MAKEALL index aa7095e..e2d7556 100755 --- a/MAKEALL +++ b/MAKEALL @@ -560,6 +560,7 @@ LIST_ARM_CORTEX_A8=" \ omap3_evm \ omap3_pandora \ omap3_zoom1 \ + omap3_zoom2 \ " ######################################################################### diff --git a/Makefile b/Makefile index b6fb939..c02a282 100644 --- a/Makefile +++ b/Makefile @@ -2971,6 +2971,9 @@ omap3_pandora_config : unconfig omap3_zoom1_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 omap3 omap3 +omap3_zoom2_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom2 omap3 omap3 + ######################################################################### ## XScale Systems ######################################################################### diff --git a/board/omap3/common/Makefile b/board/omap3/common/Makefile index 7b892fa..b8a0b14 100644 --- a/board/omap3/common/Makefile +++ b/board/omap3/common/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_OMAP3_BEAGLE) += power.o COBJS-$(CONFIG_OMAP3_OVERO) += power.o COBJS-$(CONFIG_OMAP3_PANDORA) += power.o COBJS-$(CONFIG_OMAP3_ZOOM1) += power.o +COBJS-$(CONFIG_OMAP3_ZOOM2) += power.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/board/omap3/zoom2/Makefile b/board/omap3/zoom2/Makefile new file mode 100644 index 0000000..088b8cb --- /dev/null +++ b/board/omap3/zoom2/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := zoom2.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/omap3/zoom2/config.mk b/board/omap3/zoom2/config.mk new file mode 100644 index 0000000..ef2ae97 --- /dev/null +++ b/board/omap3/zoom2/config.mk @@ -0,0 +1,33 @@ +# +# (C) Copyright 2009 +# Texas Instruments, <www.ti.com> +# +# Zoom II uses OMAP3 (ARM-CortexA8) cpu +# see http://www.ti.com/ for more information on Texas Instruments +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# Physical Address: +# 8000'0000 (bank0) +# A000/0000 (bank1) +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) + +# For use with external or internal boots. +TEXT_BASE = 0x80e80000 diff --git a/board/omap3/zoom2/u-boot.lds b/board/omap3/zoom2/u-boot.lds new file mode 100644 index 0000000..0eb318b --- /dev/null +++ b/board/omap3/zoom2/u-boot.lds @@ -0,0 +1,63 @@ +/* + * January 2004 - Changed to support H4 device + * Copyright (c) 2004-2008 Texas Instruments + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm_cortexa8/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } + __exidx_start = .; + .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } + __exidx_end = .; + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/board/omap3/zoom2/zoom2.c b/board/omap3/zoom2/zoom2.c new file mode 100644 index 0000000..f861691 --- /dev/null +++ b/board/omap3/zoom2/zoom2.c @@ -0,0 +1,79 @@ +/* + * (C) Copyright 2009 + * Windriver + * + * Author : + * Tom Rix <Tom.Rix(a)windriver.com> + * + * Derived from Zoom1 code by + * Nishanth Menon <nm(a)ti.com> + * Sunil Kumar <sunilsaini05(a)gmail.com> + * Shashi Ranjan <shashiranjanmca05(a)gmail.com> + * Richard Woodruff <r-woodruff2(a)ti.com> + * Syed Mohammed Khasim <khasim(a)ti.com> + * + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <asm/io.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/mach-types.h> +#include "zoom2.h" + +/****************************************************************************** + * Routine: board_init + * Description: Early hardware init. + *****************************************************************************/ +int board_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ + /* board id for Linux */ + gd->bd->bi_arch_number = MACH_TYPE_OMAP_ZOOM2; + /* boot param addr */ + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + + return 0; +} + +/****************************************************************************** + * Routine: misc_init_r + * Description: Configure zoom board specific configurations + *****************************************************************************/ +int misc_init_r(void) +{ + power_init_r(); + dieid_num_r(); + return 0; +} + +/****************************************************************************** + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + *****************************************************************************/ +void set_muxconf_regs(void) +{ + /* platform specific muxes */ + MUX_ZOOM2(); +} diff --git a/board/omap3/zoom2/zoom2.h b/board/omap3/zoom2/zoom2.h new file mode 100644 index 0000000..3199fa9 --- /dev/null +++ b/board/omap3/zoom2/zoom2.h @@ -0,0 +1,134 @@ +/* + * (C) Copyright 2009 + * Windriver + * Tom Rix <Tom.Rix(a)windriver.com> + * + * Derived from: board/omap3/zoom1/zoom1.h + * Nishanth Menon <nm(a)ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _BOARD_ZOOM2_H_ +#define _BOARD_ZOOM2_H_ + +const omap3_sysinfo sysinfo = { + SDP_3430_V1, + SDP_3430_V2, + DDR_STACKED, + "OMAP3 Zoom2 ", + "NAND", +}; + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ +#define MUX_ZOOM2() \ + /*SDRC*/\ + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ + /*GPMC*/\ + MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\ + MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\ + MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\ + MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\ + MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\ + MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\ + MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\ + MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\ + MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\ + MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\ + MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\ + MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\ + MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\ + MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\ + MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\ + MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\ + MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\ + MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\ + MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\ + MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\ + MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\ + MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\ + MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\ + MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\ + MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\ + MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ + MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M7)) /*GPMC_nCS1*/\ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M7)) /*GPMC_nCS2*/\ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M7)) /*GPMC_nCS3*/\ + MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M7)) /*GPMC_nCS4*/\ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M7)) /*GPMC_nCS5*/\ + MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M7)) /*GPMC_nCS6*/\ + MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M7)) /*GPMC_nCS7*/\ + MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ + MUX_VAL(CP(GPMC_NWP), (IDIS | PTU | DIS | M0)) /*GPMC_nWP*/\ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nBE1*/\ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTD | EN | M0)) /*GPMC_WAIT0*/\ + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /*GPMC_WAIT2*/\ + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_WAIT3*/ + +#endif /* _BOARD_ZOOM_H_ */ diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h new file mode 100644 index 0000000..9ea8ea0 --- /dev/null +++ b/include/configs/omap3_zoom2.h @@ -0,0 +1,328 @@ +/* + * (C) Copyright 2006-2009 + * Texas Instruments. + * Richard Woodruff <r-woodruff2(a)ti.com> + * Syed Mohammed Khasim <x0khasim(a)ti.com> + * Nishanth Menon <nm(a)ti.com> + * Tom Rix <Tom.Rix(a)windriver.com> + * + * Configuration settings for the TI OMAP3430 Zoom II board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/* + * High Level Configuration Options + */ +#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ +#define CONFIG_OMAP 1 /* in a TI OMAP core */ +#define CONFIG_OMAP34XX 1 /* which is a 34XX */ +#define CONFIG_OMAP3430 1 /* which is in a 3430 */ +#define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */ + +#include <asm/arch/cpu.h> /* get chip and board defs */ +#include <asm/arch/omap3.h> + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#undef CONFIG_USE_IRQ /* no support for IRQs */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#define CONFIG_REVISION_TAG 1 + +/* + * Size of malloc() pool + */ +#define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */ + /* Sector */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ + /* initial data */ + +/* + * Hardware drivers + */ + +/* + * NS16550 Configuration + */ +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK + +/* + * select serial console configuration + */ +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CONFIG_SERIAL3 3 /* UART3 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ + 115200} +#define CONFIG_MMC 1 +#define CONFIG_OMAP3_MMC 1 +#define CONFIG_DOS_PARTITION 1 + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ + +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_NAND /* NAND support */ +#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */ + +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ +#undef CONFIG_CMD_IMI /* iminfo */ +#undef CONFIG_CMD_IMLS /* List all found images */ +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#undef CONFIG_CMD_NFS /* NFS support */ + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_BUS 0 +#define CONFIG_SYS_I2C_BUS_SELECT 1 +#define CONFIG_DRIVER_OMAP34XX_I2C 1 + +/* + * Board NAND Info. + */ +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ + /* to access nand */ +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ + /* to access nand at */ + /* CS0 */ +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 + +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ + /* devices */ +#define SECTORSIZE 512 + +#define NAND_ALLOW_ERASE_ALL +#define ADDR_COLUMN 1 +#define ADDR_PAGE 2 +#define ADDR_COLUMN_PAGE 3 + +#define NAND_ChipID_UNKNOWN 0x00 +#define NAND_MAX_FLOORS 1 +#define NAND_MAX_CHIPS 1 +#define NAND_NO_RB 1 +#define CONFIG_SYS_NAND_WP + +#define CONFIG_JFFS2_NAND +/* nand device jffs2 lives on */ +#define CONFIG_JFFS2_DEV "nand0" +/* start of jffs2 partition */ +#define CONFIG_JFFS2_PART_OFFSET 0x680000 +#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ + /* partition */ + +/* Environment information */ +#define CONFIG_BOOTDELAY 10 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=0x82000000\0" \ + "console=ttyS2,115200n8\0" \ + "videomode=1024x768@60,vxres=1024,vyres=768\0" \ + "videospec=omapfb:vram:2M,vram:4M\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "video=${videospec},mode:${videomode} " \ + "root=/dev/mmcblk0p2 rw " \ + "rootfstype=ext3 rootwait\0" \ + "nandargs=setenv bootargs console=${console} " \ + "video=${videospec},mode:${videomode} " \ + "root=/dev/mtdblock4 rw " \ + "rootfstype=jffs2\0" \ + "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "autoscr ${loadaddr}\0" \ + "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "bootm ${loadaddr}\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${loadaddr} 280000 400000; " \ + "bootm ${loadaddr}\0" \ + +#define CONFIG_BOOTCOMMAND \ + "if mmcinit; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loaduimage; then " \ + "run mmcboot; " \ + "else run nandboot; " \ + "fi; " \ + "fi; " \ + "else run nandboot; fi" + +#define CONFIG_AUTO_COMPLETE 1 +/* + * Miscellaneous configurable options + */ +#define V_PROMPT "OMAP3 Zoom1# " + +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT V_PROMPT +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) + +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ + /* works on */ +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ + 0x01F00000) /* 31MB */ + +#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ + /* load address */ + +/* + * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by + * 32KHz clk, or from external sig. This rate is divided by a local divisor. + */ +#define V_PVT 7 + +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE SZ_128K /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */ +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* SDRAM Bank Allocation method */ +#define SDRC_R_B_C 1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ + +/* **** PISMO SUPPORT *** */ + +/* Configure the PISMO */ +#define PISMO1_NAND_SIZE GPMC_SIZE_128M +#define PISMO1_ONEN_SIZE GPMC_SIZE_128M + +#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ + /* one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ +#define CONFIG_SYS_MONITOR_LEN SZ_256K /* Reserve 2 sectors */ + +#define CONFIG_SYS_FLASH_BASE boot_flash_base + +/* Monitor at start of flash */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP + +#define CONFIG_ENV_IS_IN_NAND 1 +#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ +#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ + +#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec +#define CONFIG_ENV_OFFSET boot_flash_off +#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET + +/*----------------------------------------------------------------------- + * CFI FLASH driver setup + */ +/* timeout values are in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) + +/* Flash banks JFFS2 should use */ +#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ + CONFIG_SYS_MAX_NAND_DEVICE) +#define CONFIG_SYS_JFFS2_MEM_NAND +/* use flash_info[2] */ +#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS +#define CONFIG_SYS_JFFS2_NUM_BANKS 1 + +#ifndef __ASSEMBLY__ +extern gpmc_csx_t *nand_cs_base; +extern gpmc_t *gpmc_cfg_base; +extern unsigned int boot_flash_base; +extern volatile unsigned int boot_flash_env_addr; +extern unsigned int boot_flash_off; +extern unsigned int boot_flash_sec; +extern unsigned int boot_flash_type; +#endif + + +#define WRITE_NAND_COMMAND(d, adr)\ + writel(d, &nand_cs_base->nand_cmd) +#define WRITE_NAND_ADDRESS(d, adr)\ + writel(d, &nand_cs_base->nand_adr) +#define WRITE_NAND(d, adr) writew(d, &nand_cs_base->nand_dat) +#define READ_NAND(adr) readl(&nand_cs_base->nand_dat) + +/* Other NAND Access APIs */ +#define NAND_WP_OFF() do {readl(&gpmc_cfg_base->config) |= GPMC_CONFIG_WP; } \ + while (0) +#define NAND_WP_ON() do {readl(&gpmc_cfg_base->config) &= ~GPMC_CONFIG_WP; } \ + while (0) +#define NAND_DISABLE_CE(nand) +#define NAND_ENABLE_CE(nand) +#define NAND_WAIT_READY(nand) udelay(10) + +#endif /* __CONFIG_H */ -- 1.6.0.5

4 12

[U-Boot] [PATCH 4/4] libfdt: Fix C++ compile-time cast error on gnu 4.2.1
by Jerry Van Baren 02 Apr '09

02 Apr '09

Allow the inclusion of libfdt.h in C++ source. Signed-off-by: Laurent Gregoire <laurent.gregoire(a)tomtom.com> Acked-by: David Gibson <david(a)gibson.dropbear.id.au> --- include/libfdt.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/libfdt.h b/include/libfdt.h index ce374fd..d23d40e 100644 --- a/include/libfdt.h +++ b/include/libfdt.h @@ -156,7 +156,7 @@ int fdt_next_node(const void *fdt, int offset, int *depth); #define __fdt_set_hdr(name) \ static inline void fdt_set_##name(void *fdt, uint32_t val) \ { \ - struct fdt_header *fdth = fdt; \ + struct fdt_header *fdth = (struct fdt_header*)fdt; \ fdth->name = cpu_to_fdt32(val); \ } __fdt_set_hdr(magic); -- 1.5.6.5

1 0

[U-Boot] [PATCH 3/4] Fix a possible overflow case detected by gcc 4.3.2
by Jerry Van Baren 02 Apr '09

02 Apr '09

.../dtc/libfdt/fdt_sw.c: In function 'fdt_end_node': .../dtc/libfdt/fdt_sw.c:81: error: assuming signed overflow does not occur when assuming that (X + c) < X is always false Signed-off-by: Emil Medve <Emilian.Medve(a)Freescale.com> --- libfdt/fdt_sw.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/libfdt/fdt_sw.c b/libfdt/fdt_sw.c index 2380b27..55ebebf 100644 --- a/libfdt/fdt_sw.c +++ b/libfdt/fdt_sw.c @@ -70,7 +70,7 @@ static int _fdt_sw_check_header(void *fdt) return err; \ } -static void *_fdt_grab_space(void *fdt, int len) +static void *_fdt_grab_space(void *fdt, size_t len) { int offset = fdt_size_dt_struct(fdt); int spaceleft; -- 1.5.6.5

1 0

[U-Boot] [PATCH 2/4] libfdt: Rework/cleanup fdt_next_tag()
by Jerry Van Baren 02 Apr '09

02 Apr '09

Currently, callers of fdt_next_tag() must usually follow the call with some sort of call to fdt_offset_ptr() to verify that the blob isn't truncated in the middle of the tag data they're going to process. This is a bit silly, since fdt_next_tag() generally has to call fdt_offset_ptr() on at least some of the data following the tag for its own operation. This patch alters fdt_next_tag() to always use fdt_offset_ptr() to verify the data between its starting offset and the offset it returns in nextoffset. This simplifies fdt_get_property() which no longer has to verify itself that the property data is all present. At the same time, I neaten and clarify the error handling for fdt_next_tag(). Previously, fdt_next_tag() could return -1 instead of a tag value in some circumstances - which almost none of the callers checked for. Also, fdt_next_tag() could return FDT_END either because it encountered an FDT_END tag, or because it reached the end of the structure block - no way was provided to tell between these cases. With this patch, fdt_next_tag() always returns FDT_END with a negative value in nextoffset for an error. This means the several places which loop looking for FDT_END will still work correctly - they only need to check for errors at the end. The errors which fdt_next_tag() can report are: - -FDT_ERR_TRUNCATED if it reached the end of the structure block instead of finding a tag. - -FDT_BADSTRUCTURE if a bad tag was encountered, or if the tag data couldn't be verified with fdt_offset_ptr(). This patch also updates the callers of fdt_next_tag(), where appropriate, to make use of the new error reporting. Finally, the prototype for the long gone _fdt_next_tag() is removed from libfdt_internal.h. Signed-off-by: David Gibson <david(a)gibson.dropbear.id.au> --- libfdt/fdt.c | 46 +++++++++++++++++++++++++++++----------------- libfdt/fdt_ro.c | 33 +++++++++------------------------ libfdt/fdt_rw.c | 2 ++ libfdt/fdt_sw.c | 9 ++++----- libfdt/libfdt_internal.h | 1 - 5 files changed, 44 insertions(+), 47 deletions(-) diff --git a/libfdt/fdt.c b/libfdt/fdt.c index 940cee8..b09ea6f 100644 --- a/libfdt/fdt.c +++ b/libfdt/fdt.c @@ -94,42 +94,53 @@ const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len) return p; } -uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset) +uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) { const uint32_t *tagp, *lenp; uint32_t tag; + int offset = startoffset; const char *p; - if (offset % FDT_TAGSIZE) - return -1; - + *nextoffset = -FDT_ERR_TRUNCATED; tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE); - if (! tagp) + if (!tagp) return FDT_END; /* premature end */ tag = fdt32_to_cpu(*tagp); offset += FDT_TAGSIZE; + *nextoffset = -FDT_ERR_BADSTRUCTURE; switch (tag) { case FDT_BEGIN_NODE: /* skip name */ do { p = fdt_offset_ptr(fdt, offset++, 1); } while (p && (*p != '\0')); - if (! p) - return FDT_END; + if (!p) + return FDT_END; /* premature end */ break; + case FDT_PROP: lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp)); - if (! lenp) - return FDT_END; - /* skip name offset, length and value */ - offset += 2*FDT_TAGSIZE + fdt32_to_cpu(*lenp); + if (!lenp) + return FDT_END; /* premature end */ + /* skip-name offset, length and value */ + offset += sizeof(struct fdt_property) - FDT_TAGSIZE + + fdt32_to_cpu(*lenp); + break; + + case FDT_END: + case FDT_END_NODE: + case FDT_NOP: break; + + default: + return FDT_END; } - if (nextoffset) - *nextoffset = FDT_TAGALIGN(offset); + if (!fdt_offset_ptr(fdt, startoffset, offset - startoffset)) + return FDT_END; /* premature end */ + *nextoffset = FDT_TAGALIGN(offset); return tag; } @@ -171,10 +182,11 @@ int fdt_next_node(const void *fdt, int offset, int *depth) break; case FDT_END: - return -FDT_ERR_NOTFOUND; - - default: - return -FDT_ERR_BADSTRUCTURE; + if ((nextoffset >= 0) + || ((nextoffset == -FDT_ERR_TRUNCATED) && !depth)) + return -FDT_ERR_NOTFOUND; + else + return nextoffset; } } while (tag != FDT_BEGIN_NODE); diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c index d682a40..1e1e322 100644 --- a/libfdt/fdt_ro.c +++ b/libfdt/fdt_ro.c @@ -205,7 +205,6 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt, { uint32_t tag; const struct fdt_property *prop; - int namestroff; int offset, nextoffset; int err; @@ -220,38 +219,24 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt, tag = fdt_next_tag(fdt, offset, &nextoffset); switch (tag) { case FDT_END: - err = -FDT_ERR_TRUNCATED; + if (nextoffset < 0) + err = nextoffset; + else + /* FDT_END tag with unclosed nodes */ + err = -FDT_ERR_BADSTRUCTURE; goto fail; - case FDT_BEGIN_NODE: - case FDT_END_NODE: - case FDT_NOP: - break; - case FDT_PROP: - err = -FDT_ERR_BADSTRUCTURE; - prop = fdt_offset_ptr(fdt, offset, sizeof(*prop)); - if (! prop) - goto fail; - namestroff = fdt32_to_cpu(prop->nameoff); - if (_fdt_string_eq(fdt, namestroff, name, namelen)) { + prop = _fdt_offset_ptr(fdt, offset); + if (_fdt_string_eq(fdt, fdt32_to_cpu(prop->nameoff), + name, namelen)) { /* Found it! */ - int len = fdt32_to_cpu(prop->len); - prop = fdt_offset_ptr(fdt, offset, - sizeof(*prop)+len); - if (! prop) - goto fail; - if (lenp) - *lenp = len; + *lenp = fdt32_to_cpu(prop->len); return prop; } break; - - default: - err = -FDT_ERR_BADSTRUCTURE; - goto fail; } } while ((tag != FDT_BEGIN_NODE) && (tag != FDT_END_NODE)); diff --git a/libfdt/fdt_rw.c b/libfdt/fdt_rw.c index cd06178..5c27a67 100644 --- a/libfdt/fdt_rw.c +++ b/libfdt/fdt_rw.c @@ -410,6 +410,8 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize) struct_size = 0; while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END) ; + if (struct_size < 0) + return struct_size; } if (!_fdt_blocks_misordered(fdt, mem_rsv_size, struct_size)) { diff --git a/libfdt/fdt_sw.c b/libfdt/fdt_sw.c index 698329e..2380b27 100644 --- a/libfdt/fdt_sw.c +++ b/libfdt/fdt_sw.c @@ -82,7 +82,7 @@ static void *_fdt_grab_space(void *fdt, int len) return NULL; fdt_set_size_dt_struct(fdt, offset + len); - return fdt_offset_ptr_w(fdt, offset, len); + return _fdt_offset_ptr_w(fdt, offset); } int fdt_create(void *buf, int bufsize) @@ -237,18 +237,17 @@ int fdt_finish(void *fdt) while ((tag = fdt_next_tag(fdt, offset, &nextoffset)) != FDT_END) { if (tag == FDT_PROP) { struct fdt_property *prop = - fdt_offset_ptr_w(fdt, offset, sizeof(*prop)); + _fdt_offset_ptr_w(fdt, offset); int nameoff; - if (! prop) - return -FDT_ERR_BADSTRUCTURE; - nameoff = fdt32_to_cpu(prop->nameoff); nameoff += fdt_size_dt_strings(fdt); prop->nameoff = cpu_to_fdt32(nameoff); } offset = nextoffset; } + if (nextoffset < 0) + return nextoffset; /* Finally, adjust the header */ fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt)); diff --git a/libfdt/libfdt_internal.h b/libfdt/libfdt_internal.h index 46eb93e..d2dcbd6 100644 --- a/libfdt/libfdt_internal.h +++ b/libfdt/libfdt_internal.h @@ -62,7 +62,6 @@ return err; \ } -uint32_t _fdt_next_tag(const void *fdt, int startoffset, int *nextoffset); int _fdt_check_node_offset(const void *fdt, int offset); const char *_fdt_find_string(const char *strtab, int tabsize, const char *s); int _fdt_node_end_offset(void *fdt, int nodeoffset); -- 1.5.6.5

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[U-Boot] [PATCH 1/4] libfdt: Rework fdt_next_node()
by Jerry Van Baren 02 Apr '09

02 Apr '09

Currently fdt_next_node() will find the next node in the blob regardless of whether it is above, below or at the same level in the tree as the starting node - the depth parameter is updated to indicate which is the case. When a depth parameter is supplied, this patch makes it instead terminate immediately when it finds the END_NODE tag for a node at depth 0. In this case it returns the offset immediately past the END_NODE tag. This has a couple of advantages. First, this slightly simplifies fdt_subnode_offset(), which no longer needs to explicitly check that fdt_next_node()'s iteration hasn't left the starting node. Second, this allows fdt_next_node() to be used to implement _fdt_node_end_offset() considerably simplifying the latter function. The other users of fdt_next_node() either don't need to iterate out of the starting node, or don't pass a depth parameter at all. Any callers that really need to iterate out of the starting node, but keep tracking depth can do so by biasing the initial depth value. This is a semantic change, but I think it's very unlikely to break any existing library users. Signed-off-by: David Gibson <david(a)gibson.dropbear.id.au> --- libfdt/fdt.c | 4 ++-- libfdt/fdt_ro.c | 20 ++++++++------------ libfdt/fdt_wip.c | 41 +++++++---------------------------------- 3 files changed, 17 insertions(+), 48 deletions(-) diff --git a/libfdt/fdt.c b/libfdt/fdt.c index a59a518..940cee8 100644 --- a/libfdt/fdt.c +++ b/libfdt/fdt.c @@ -166,8 +166,8 @@ int fdt_next_node(const void *fdt, int offset, int *depth) break; case FDT_END_NODE: - if (depth) - (*depth)--; + if (depth && ((--(*depth)) < 0)) + return nextoffset; break; case FDT_END: diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c index fdc9c29..d682a40 100644 --- a/libfdt/fdt_ro.c +++ b/libfdt/fdt_ro.c @@ -112,24 +112,20 @@ int fdt_num_mem_rsv(const void *fdt) int fdt_subnode_offset_namelen(const void *fdt, int offset, const char *name, int namelen) { - int depth = 0; + int depth; FDT_CHECK_HEADER(fdt); - for (depth = 0, offset = fdt_next_node(fdt, offset, &depth); - (offset >= 0) && (depth > 0); - offset = fdt_next_node(fdt, offset, &depth)) { - if (depth < 0) - return -FDT_ERR_NOTFOUND; - else if ((depth == 1) - && _fdt_nodename_eq(fdt, offset, name, namelen)) + for (depth = 0; + (offset >= 0) && (depth >= 0); + offset = fdt_next_node(fdt, offset, &depth)) + if ((depth == 1) + && _fdt_nodename_eq(fdt, offset, name, namelen)) return offset; - } - if (offset < 0) - return offset; /* error */ - else + if (depth < 0) return -FDT_ERR_NOTFOUND; + return offset; /* error */ } int fdt_subnode_offset(const void *fdt, int parentoffset, diff --git a/libfdt/fdt_wip.c b/libfdt/fdt_wip.c index e30c81d..e373677 100644 --- a/libfdt/fdt_wip.c +++ b/libfdt/fdt_wip.c @@ -98,41 +98,14 @@ int fdt_nop_property(void *fdt, int nodeoffset, const char *name) return 0; } -int _fdt_node_end_offset(void *fdt, int nodeoffset) +int _fdt_node_end_offset(void *fdt, int offset) { - int level = 0; - uint32_t tag; - int offset, nextoffset; - - tag = fdt_next_tag(fdt, nodeoffset, &nextoffset); - if (tag != FDT_BEGIN_NODE) - return -FDT_ERR_BADOFFSET; - do { - offset = nextoffset; - tag = fdt_next_tag(fdt, offset, &nextoffset); - - switch (tag) { - case FDT_END: - return offset; - - case FDT_BEGIN_NODE: - level++; - break; - - case FDT_END_NODE: - level--; - break; - - case FDT_PROP: - case FDT_NOP: - break; - - default: - return -FDT_ERR_BADSTRUCTURE; - } - } while (level >= 0); - - return nextoffset; + int depth = 0; + + while ((offset >= 0) && (depth >= 0)) + offset = fdt_next_node(fdt, offset, &depth); + + return offset; } int fdt_nop_node(void *fdt, int nodeoffset) -- 1.5.6.5

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[U-Boot] [PATCH 0/4] libfdt: Catch up with upstream dtc/libfdt
by Jerry Van Baren 02 Apr '09

02 Apr '09

The following series of patches are bugfixes from dtc/libfdt. gvb

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