April 2009 - U-Boot

[U-Boot] setting of ARCH based on HOSTARCH?
by Kumar Gala 20 Apr '09

20 Apr '09

Wolfgang, I've been building for sometime now on a native PPC box w/o any issue. However in looking at the Kconfig patches it showed in an issue in that I don't ever set ARCH to anything. It seems like there are two solutions to this: 1. ARCH is expected to be set explicitly be the user 2. add something like: ifndef ARCH ARCH = $(HOSTARCH) endif into the toplevel Makefile. Feelings? - k

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[U-Boot] AmigaOneG3SE
by Peter Tyser 20 Apr '09

20 Apr '09

Hi all, I just tried compiling u-boot for the AmigaOneG3SE during testing of a code change and ran into a number of compiler warnings followed by a compiler error. CONFIG_AMIGAONEG3SE is also found in a lot of common files: common/cmd_bootm.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_fdc.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_fdc.c:#ifndef CONFIG_AMIGAONEG3SE common/cmd_fdc.c:#ifndef CONFIG_AMIGAONEG3SE common/cmd_fdc.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_fdc.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_fdc.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_fdc.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#ifndef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#ifndef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3) common/cmd_ide.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#ifndef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3) common/cmd_ide.c:#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3) common/cmd_ide.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_ide.c: !defined(CONFIG_AMIGAONEG3SE)&& \ common/cmd_ide.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_ide.c:#endif /* CONFIG_AMIGAONEG3SE */ common/cmd_nvedit.c:#ifdef CONFIG_AMIGAONEG3SE common/cmd_nvedit.c:#endif /* CONFIG_AMIGAONEG3SE */ common/console.c:#ifdef CONFIG_AMIGAONEG3SE common/env_common.c:#ifdef CONFIG_AMIGAONEG3SE common/env_common.c:#ifdef CONFIG_AMIGAONEG3SE common/env_common.c:#ifdef CONFIG_AMIGAONEG3SE common/env_common.c:#ifdef CONFIG_AMIGAONEG3SE common/env_nvram.c:#ifdef CONFIG_AMIGAONEG3SE common/env_nvram.c:#ifdef CONFIG_AMIGAONEG3SE common/env_nvram.c:#ifdef CONFIG_AMIGAONEG3SE common/env_nvram.c:#ifdef CONFIG_AMIGAONEG3SE common/env_nvram.c:#ifdef CONFIG_AMIGAONEG3SE common/main.c:#ifdef CONFIG_AMIGAONEG3SE cpu/74xx_7xx/cpu.c:#ifdef CONFIG_AMIGAONEG3SE cpu/74xx_7xx/cpu.c:#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SYS_CONFIG_BUS_CLK) cpu/74xx_7xx/cpu.c:#else /* ! CONFIG_AMIGAONEG3SE and !CONFIG_SYS_CONFIG_BUS_CLK*/ cpu/74xx_7xx/cpu.c:#endif /* CONFIG_AMIGAONEG3SE or CONFIG_SYS_CONFIG_BUS_CLK*/ cpu/74xx_7xx/interrupts.c:#if defined(DEBUG) && !defined(CONFIG_AMIGAONEG3SE) cpu/74xx_7xx/speed.c:#ifdef CONFIG_AMIGAONEG3SE cpu/74xx_7xx/start.S:#if defined(CONFIG_AMIGAONEG3SE) || \ cpu/74xx_7xx/traps.c:#ifdef CONFIG_AMIGAONEG3SE cpu/74xx_7xx/traps.c:#ifdef CONFIG_AMIGAONEG3SE drivers/rtc/mc146818.c:#ifdef CONFIG_AMIGAONEG3SE drivers/rtc/mc146818.c:#ifdef CONFIG_AMIGAONEG3SE drivers/rtc/mk48t59.c:#elif defined(CONFIG_AMIGAONEG3SE) include/asm-ppc/global_data.h:#ifdef CONFIG_AMIGAONEG3SE lib_ppc/board.c:#ifdef CONFIG_AMIGAONEG3SE Anyway, just wanted to drop a line that the build appears to be broken, and drop a hint that it would be great if someone (Thomas?) would clean up the Amiga #ifdefs that currently are litter a number of common files. Is the AmigaOne port being maintained? Does anyone use it? Can it be removed?:) It looks like someone else brought this up a while back: http://lists.denx.de/pipermail/u-boot/2006-January/013030.html Best, Peter

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[U-Boot] ppc 85xx inline assembly
by Qingyu Song 20 Apr '09

20 Apr '09

Hello, I am trying to understand the inline assembly function out_be32 extern inline void out_be32(volatile unsigned __iomem *addr, int val) { __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); } I am not familiar with the syntax here, especially for the %U0%X0 part, can someone help me to translate this into assemble code? Thanks Qingyu

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[U-Boot] Problem cloning Git
by Remco Poelstra 20 Apr '09

20 Apr '09

Hi, While doing > git clone git://git.denx.de/u-boot.git, I get the following errors: > remote: Compressing objects: 100% (16533/16533), done. > remote: Total 90263 (delta 74103), reused 89209 (delta 73184) > Receiving objects: 100% (90263/90263), 29.61 MiB | 175 KiB/s, done. > Resolving deltas: 100% (74103/74103), done. > error: Trying to write ref REMOTE_HEAD with nonexistant object f75a729b5c1434d5a5bbf453b1b699bf1c3ffbce > fatal: Cannot update the ref 'REMOTE_HEAD'. > error: Trying to write ref refs/remotes/origin/i.MX31 with nonexistant object a6e0e74f933745c45d2b5ee83a0898d973acaf71 > fatal: Cannot update the ref 'refs/remotes/origin/i.MX31'. > error: Trying to write ref refs/remotes/origin/lwmon5 with nonexistant object 0008e2abc8456d51e0e1bfae71e6f14f74790cc5 > fatal: Cannot update the ref 'refs/tags/LABEL_2003_03_06_0050'. <A few pages of these errors> > error: Trying to write ref refs/tags/LABEL_2003_03_06_0200 with nonexistant object db2f721ffcf9693086a7e5c6c7015f2019e7f52e > fatal: Cannot update the ref 'refs/tags/LABEL_2003_03_06_0200'. > error: Trying to write ref refs/tags/LABEL_2003_03_06_1440 with nonexistant object 500545cc6b83958209128bffa825b3c842a21a4e > fatal: Cannot update the ref 'refs/tags/LABEL_2003_03_06_1440'. > error: Trying to write ref refs/tags/LABEL_2003_03_06_2255 with nonexistant object 1cb8e980c41e86760fa93de63f4e4cf643bef9d9 > fatal: Cannot update the ref 'refs/tags/LABEL_2003_03_06_2255'. > Warning: Remote HEAD refers to nonexistent ref, unable to checkout. Am I doing something wrong? Kind regards, Remco Poelstra

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[U-Boot] mpc83xx: USB: "Machine check in kernel mode" with usb start on mpc8315erdb
by Mahajan Vivek-B08308 20 Apr '09

20 Apr '09

Hello there, I built u-boot for mpc8315erdb from the current master @ http://git.denx.de/u-boot.git/ after enabling USB via adding the following #defines in include/configs/MPC8315ERDB.h:- #define CONFIG_CMD_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_FSL But I ran into the following "machine check" after running usb start from the u-boot prompt. No USB device is plugged in. Please let me know if the above mentioned USB config options are sufficient to get the basic USB up and running. Any help in this matter is highly appreciated. Thanks, Vivek /************************************************************************************************************************** U-Boot 2009.03-00333-g7ee38c0-dirty (Apr 17 2009 - 10:33:36) MPC83XX Reset Status: Software Hard, External/Internal Soft, External/Internal Hard CPU: e300c3, MPC8315E, Rev: 1.1 at 400 MHz, CSB: 133.333 MHz Board: Freescale MPC8315ERDB Rev 0.0 I2C: ready DRAM: 128 MB FLASH: 8 MB NAND: 32 MiB *** Warning - bad CRC, using default environment PCIE0: No link PCIE1: No link In: serial Out: serial Err: serial Net: eTSEC0, eTSEC1 Hit any key to stop autoboot: 0 => version U-Boot 2009.03-00333-g7ee38c0-dirty (Apr 17 2009 - 10:33:36) MPC83XX => he usb usb reset - reset (rescan) USB controller usb tree - show USB device tree usb info [dev] - show available USB devices => usb start (Re)start USB... USB: Machine check in kernel mode. Caused by (from msr): regs 07f1bc80 Unknown values in msr NIP: 07FD7CC0 XER: 00000000 LR: 07FD7CA0 REGS: 07f1bc80 TRAP: 0200 DAR: 00000000 MSR: 0000b030 EE: 1 PR: 0 FP: 1 ME: 1 IR/DR: 11 GPR00: 07FD7328 07F1BD70 07F1BF44 00000000 00000001 07F1BC50 07F1F638 00000000 GPR08: FFFFFFFF 00000000 E0000000 E0023100 42000084 00000000 07FEC000 00000000 GPR16: 00000000 07FE072C 07FEB264 07FE6B1C 00000000 00000000 00000000 07F1F588 GPR24: 00000000 00000000 00000000 00000000 00000001 00000000 07FE7CA0 07FFB4CC Call backtrace: 00000001 07FD7328 07FC6D80 07FBBC2C 07FC2234 07FC183C 07FC1A08 07FC46A4 07FA29B8 07FA15E8 machine check Âesetting the board. **********************************************************************************************************************/

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[U-Boot] [PATCH] net: fix ULI 526x macro usage in netdev.h
by Timur Tabi 20 Apr '09

20 Apr '09

Change netdev.h to use CONFIG_ULI526X instead of CONFIG_ULI526. CONFIG_ULI526X is used everywhere else, so that's the correct macro name. Without this fix, Ethernet will not work on the Freescale MPC8610 HPCD. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- include/netdev.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/netdev.h b/include/netdev.h index 2794ddd..63cf730 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -108,7 +108,7 @@ static inline int pci_eth_init(bd_t *bis) #if defined(CONFIG_RTL8169) num += rtl8169_initialize(bis); #endif -#if defined(CONFIG_ULI526) +#if defined(CONFIG_ULI526X) num += uli526x_initialize(bis); #endif -- 1.6.0.6

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[U-Boot] [patch u-boot git 5/5] davinci: add basic dm355/dm350/dm335 support
by David Brownell 18 Apr '09

18 Apr '09

From: David Brownell <dbrownell(a)users.sourceforge.net> Add some basic declarations for DaVinci DM355/DM350/DM335 support, keyed on CONFIG_SOC_DM355. (DM35X isn't quite right because the DM357 is very different; while the DM355 is like a DM355 without the MPEG/JPEG coprocessor). These have different peripherals than the DM6446, and some of the peripherals are at different addresses. Notably for U-Boot, there's no EMAC, and the NAND controller address is different Signed-off-by: David Brownell <dbrownell(a)users.sourceforge.net> --- cpu/arm926ejs/davinci/Makefile | 1 cpu/arm926ejs/davinci/dm355.c | 45 ++++++++++++++++++++++++ include/asm-arm/arch-davinci/hardware.h | 55 ++++++++++++++++++++---------- 3 files changed, 84 insertions(+), 17 deletions(-) --- a/cpu/arm926ejs/davinci/Makefile +++ b/cpu/arm926ejs/davinci/Makefile @@ -28,6 +28,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a COBJS-y += timer.o psc.o +COBJS-$(CONFIG_SOC_DM355) += dm355.o COBJS-$(CONFIG_SOC_DM644X) += dm644x.o COBJS-$(CONFIG_DRIVER_TI_EMAC) += ether.o lxt972.o dp83848.o --- /dev/null +++ b/cpu/arm926ejs/davinci/dm355.c @@ -0,0 +1,45 @@ +/* + * SoC-specific code for tms320dm355 and similar chips + * + * Copyright (C) 2009 David Brownell + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <asm/arch/hardware.h> + + +void davinci_enable_uart0(void) +{ + lpsc_on(DAVINCI_LPSC_UART0); + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x00006001; +} + + +#ifdef CONFIG_DRIVER_DAVINCI_I2C +void davinci_enable_i2c(void) +{ + lpsc_on(DAVINCI_LPSC_I2C); + + /* Enable I2C pin Mux */ + REG(PINMUX3) |= (1 << 20) | (1 << 19); +} +#endif --- a/include/asm-arm/arch-davinci/hardware.h +++ b/include/asm-arm/arch-davinci/hardware.h @@ -44,13 +44,16 @@ typedef volatile unsigned int * dv_reg_p /* * Base register addresses + * + * NOTE: some of these DM6446-specific addresses DO NOT WORK + * on other DaVinci chips. Double check them before you try + * using the addresses ... or PSC module identifiers, etc. */ #define DAVINCI_DMA_3PCC_BASE (0x01c00000) #define DAVINCI_DMA_3PTC0_BASE (0x01c10000) #define DAVINCI_DMA_3PTC1_BASE (0x01c10400) #define DAVINCI_UART0_BASE (0x01c20000) #define DAVINCI_UART1_BASE (0x01c20400) -#define DAVINCI_UART2_BASE (0x01c20800) #define DAVINCI_I2C_BASE (0x01c21000) #define DAVINCI_TIMER0_BASE (0x01c21400) #define DAVINCI_TIMER1_BASE (0x01c21800) @@ -62,30 +65,41 @@ typedef volatile unsigned int * dv_reg_p #define DAVINCI_PLL_CNTRL0_BASE (0x01c40800) #define DAVINCI_PLL_CNTRL1_BASE (0x01c40c00) #define DAVINCI_PWR_SLEEP_CNTRL_BASE (0x01c41000) -#define DAVINCI_SYSTEM_DFT_BASE (0x01c42000) #define DAVINCI_ARM_INTC_BASE (0x01c48000) -#define DAVINCI_IEEE1394_BASE (0x01c60000) #define DAVINCI_USB_OTG_BASE (0x01c64000) #define DAVINCI_CFC_ATA_BASE (0x01c66000) #define DAVINCI_SPI_BASE (0x01c66800) #define DAVINCI_GPIO_BASE (0x01c67000) -#define DAVINCI_UHPI_BASE (0x01c67800) #define DAVINCI_VPSS_REGS_BASE (0x01c70000) -#define DAVINCI_EMAC_CNTRL_REGS_BASE (0x01c80000) -#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE (0x01c81000) -#define DAVINCI_EMAC_WRAPPER_RAM_BASE (0x01c82000) -#define DAVINCI_MDIO_CNTRL_REGS_BASE (0x01c84000) -#define DAVINCI_IMCOP_BASE (0x01cc0000) -#define DAVINCI_ASYNC_EMIF_CNTRL_BASE (0x01e00000) -#define DAVINCI_VLYNQ_BASE (0x01e01000) -#define DAVINCI_MCBSP_BASE (0x01e02000) -#define DAVINCI_MMC_SD_BASE (0x01e10000) -#define DAVINCI_MS_BASE (0x01e20000) #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE (0x02000000) #define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000) #define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000) #define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000) -#define DAVINCI_VLYNQ_REMOTE_BASE (0x0c000000) + +#ifdef CONFIG_SOC_DM644X +#define DAVINCI_UART2_BASE 0x01c20800 +#define DAVINCI_UHPI_BASE 0x01c67800 +#define DAVINCI_EMAC_CNTRL_REGS_BASE 0x01c80000 +#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0x01c81000 +#define DAVINCI_EMAC_WRAPPER_RAM_BASE 0x01c82000 +#define DAVINCI_MDIO_CNTRL_REGS_BASE 0x01c84000 +#define DAVINCI_IMCOP_BASE 0x01cc0000 +#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01e00000 +#define DAVINCI_VLYNQ_BASE 0x01e01000 +#define DAVINCI_ASP_BASE 0x01e02000 +#define DAVINCI_MMC_SD_BASE 0x01e10000 +#define DAVINCI_MS_BASE 0x01e20000 +#define DAVINCI_VLYNQ_REMOTE_BASE 0x0c000000 + +#elif defined(CONFIG_SOC_DM355) +#define DAVINCI_MMC_SD1_BASE 0x01e00000 +#define DAVINCI_ASP0_BASE 0x01e02000 +#define DAVINCI_ASP1_BASE 0x01e04000 +#define DAVINCI_UART2_BASE 0x01e06000 +#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01e10000 +#define DAVINCI_MMC_SD0_BASE 0x01e11000 + +#endif /* Power and Sleep Controller (PSC) Domains */ #define DAVINCI_GPSC_ARMDOMAIN 0 @@ -168,7 +182,14 @@ void davinci_errata_workarounds(void); /* Miscellania... */ #define VBPR (0x20000020) -#define PINMUX0 (0x01c40000) -#define PINMUX1 (0x01c40004) + +/* NOTE: system control modules are *highly* chip-specific, both + * as to register content (e.g. for muxing) and which registers exist. + */ +#define PINMUX0 0x01c40000 +#define PINMUX1 0x01c40004 +#define PINMUX2 0x01c40008 +#define PINMUX3 0x01c4000c +#define PINMUX4 0x01c40010 #endif /* __ASM_ARCH_HARDWARE_H */

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[U-Boot] [patch u-boot git 4/5] davinci: fix dm644x buglets
by David Brownell 18 Apr '09

18 Apr '09

From: David Brownell <dbrownell(a)users.sourceforge.net> Fix two buglets in the dm644x support: don't set two must-be-zero bits in the UART management register; and only include the I2C hooks if the I2C driver is being included. Signed-off-by: David Brownell <dbrownell(a)users.sourceforge.net> --- cpu/arm926ejs/davinci/dm644x.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) --- a/cpu/arm926ejs/davinci/dm644x.c +++ b/cpu/arm926ejs/davinci/dm644x.c @@ -41,7 +41,7 @@ void davinci_enable_uart0(void) lpsc_on(DAVINCI_LPSC_UART0); /* Bringup UART0 out of reset */ - REG(UART0_PWREMU_MGMT) = 0x0000e003; + REG(UART0_PWREMU_MGMT) = 0x00006001; /* Enable UART0 MUX lines */ REG(PINMUX1) |= PINMUX1_UART0; @@ -62,6 +62,7 @@ void davinci_enable_emac(void) } #endif +#ifdef CONFIG_DRIVER_DAVINCI_I2C void davinci_enable_i2c(void) { lpsc_on(DAVINCI_LPSC_I2C); @@ -69,6 +70,7 @@ void davinci_enable_i2c(void) /* Enable I2C pin Mux */ REG(PINMUX1) |= PINMUX1_I2C; } +#endif void davinci_errata_workarounds(void) {

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[U-Boot] [patch u-boot git 3/5] davinci: split out some dm644x-specific bits from psc
by David Brownell 18 Apr '09

18 Apr '09

From: David Brownell <dbrownell(a)users.sourceforge.net> Split out DaVinci DM6446-specific bits from more generic bits: - Add a CONFIG_SOC_DM644X. All current boards use DM6446 chips; DM6443 and DM6441 chips differ in available peripherals. - Move most DM644X-specific bits from psc.c to a new dm644x.c file, which is conditionally built. It provides device-specific setup. Plus minor coding style and comment updates with respect to the PSC. Signed-off-by: David Brownell <dbrownell(a)users.sourceforge.net> --- cpu/arm926ejs/davinci/Makefile | 1 cpu/arm926ejs/davinci/dm644x.c | 94 +++++++++++++++++++++++++++++++ cpu/arm926ejs/davinci/psc.c | 103 +++++++++------------------------- include/configs/davinci_dvevm.h | 1 include/configs/davinci_schmoogie.h | 1 include/configs/davinci_sffsdr.h | 1 include/configs/davinci_sonata.h | 1 7 files changed, 127 insertions(+), 75 deletions(-) --- a/cpu/arm926ejs/davinci/Makefile +++ b/cpu/arm926ejs/davinci/Makefile @@ -28,6 +28,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a COBJS-y += timer.o psc.o +COBJS-$(CONFIG_SOC_DM644X) += dm644x.o COBJS-$(CONFIG_DRIVER_TI_EMAC) += ether.o lxt972.o dp83848.o SOBJS = reset.o --- /dev/null +++ b/cpu/arm926ejs/davinci/dm644x.c @@ -0,0 +1,94 @@ +/* + * SoC-specific code for tms320dm644x chips + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * Copyright (C) 2004 Texas Instruments. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <asm/arch/hardware.h> + + +#define PINMUX0_EMACEN (1 << 31) +#define PINMUX0_AECS5 (1 << 11) +#define PINMUX0_AECS4 (1 << 10) + +#define PINMUX1_I2C (1 << 7) +#define PINMUX1_UART1 (1 << 1) +#define PINMUX1_UART0 (1 << 0) + + +void davinci_enable_uart0(void) +{ + lpsc_on(DAVINCI_LPSC_UART0); + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x0000e003; + + /* Enable UART0 MUX lines */ + REG(PINMUX1) |= PINMUX1_UART0; +} + +#ifdef CONFIG_DRIVER_TI_EMAC +void davinci_enable_emac(void) +{ + lpsc_on(DAVINCI_LPSC_EMAC); + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); + lpsc_on(DAVINCI_LPSC_MDIO); + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0; + + /* Enable EMAC. */ + REG(PINMUX0) |= PINMUX0_EMACEN; +} +#endif + +void davinci_enable_i2c(void) +{ + lpsc_on(DAVINCI_LPSC_I2C); + + /* Enable I2C pin Mux */ + REG(PINMUX1) |= PINMUX1_I2C; +} + +void davinci_errata_workarounds(void) +{ + /* + * Workaround for TMS320DM6446 errata 1.3.22: + * PSC: PTSTAT Register Does Not Clear After Warm/Maximum Reset + * Revision(s) Affected: 1.3 and earlier + */ + REG(PSC_SILVER_BULLET) = 0; + + /* + * Set the PR_OLD_COUNT bits in the Bus Burst Priority Register (PBBPR) + * as suggested in TMS320DM6446 errata 2.1.2: + * + * On DM6446 Silicon Revision 2.1 and earlier, under certain conditions + * low priority modules can occupy the bus and prevent high priority + * modules like the VPSS from getting the required DDR2 throughput. + * A hex value of 0x20 should provide a good ARM (cache enabled) + * performance and still allow good utilization by the VPSS or other + * modules. + */ + REG(VBPR) = 0x20; +} --- a/cpu/arm926ejs/davinci/psc.c +++ b/cpu/arm926ejs/davinci/psc.c @@ -26,22 +26,22 @@ #include <common.h> #include <asm/arch/hardware.h> -#define PINMUX0_EMACEN (1 << 31) -#define PINMUX0_AECS5 (1 << 11) -#define PINMUX0_AECS4 (1 << 10) - -#define PINMUX1_I2C (1 << 7) -#define PINMUX1_UART1 (1 << 1) -#define PINMUX1_UART0 (1 << 0) - /* - * The DM6446 includes two separate power domains: "Always On" and "DSP". The - * "Always On" power domain is always on when the chip is on. The "Always On" - * domain is powered by the VDD pins of the DM6446. The majority of the - * DM6446's modules lie within the "Always On" power domain. A separate - * domain called the "DSP" domain houses the C64x+ and VICP. The "DSP" domain - * is not always on. The "DSP" power domain is powered by the CVDDDSP pins of - * the DM6446. + * The PSC manages three inputs to a "module" which may be a peripheral or + * CPU. Those inputs are the module's: clock; reset signal; and sometimes + * its power domain. For our purposes, we only care whether clock and power + * are active, and the module is out of reset. + * + * DaVinci chips may include two separate power domains: "Always On" and "DSP". + * Chips without a DSP generally have only one domain. + * + * The "Always On" power domain is always on when the chip is on, and is + * powered by the VDD pins (on DM644X). The majority of DaVinci modules + * lie within the "Always On" power domain. + * + * A separate domain called the "DSP" domain houses the C64x+ and other video + * hardware such as VICP. In some chips, the "DSP" domain is not always on. + * The "DSP" power domain is powered by the CVDDDSP pins (on DM644X). */ /* Works on Always On power domain only (no PD argument) */ @@ -55,15 +55,17 @@ void lpsc_on(unsigned int id) mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); - while (REG(PSC_PTSTAT) & 0x01); + while (REG(PSC_PTSTAT) & 0x01) + continue; if ((*mdstat & 0x1f) == 0x03) return; /* Already on and enabled */ *mdctl |= 0x03; - /* Special treatment for some modules as for sprue14 p.7.4.2 */ switch (id) { +#ifdef CONFIG_SOC_DM644X + /* Special treatment for some modules as for sprue14 p.7.4.2 */ case DAVINCI_LPSC_VPSSSLV: case DAVINCI_LPSC_EMAC: case DAVINCI_LPSC_EMAC_WRAPPER: @@ -80,14 +82,20 @@ void lpsc_on(unsigned int id) case DAVINCI_LPSC_GPIO: *mdctl |= 0x200; break; +#endif } REG(PSC_PTCMD) = 0x01; - while (REG(PSC_PTSTAT) & 0x03); - while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */ + while (REG(PSC_PTSTAT) & 0x03) + continue; + while ((*mdstat & 0x1f) != 0x03) /* Probably an overkill... */ + continue; } +/* Not all DaVinci chips have a DSP power domain. */ +#ifdef CONFIG_SOC_DM644X + /* If DSPLINK is used, we don't want U-Boot to power on the DSP. */ #if !defined(CONFIG_SYS_USE_DSPLINK) void dsp_on(void) @@ -124,59 +132,4 @@ void dsp_on(void) } #endif /* CONFIG_SYS_USE_DSPLINK */ -void davinci_enable_uart0(void) -{ - lpsc_on(DAVINCI_LPSC_UART0); - - /* Bringup UART0 out of reset */ - REG(UART0_PWREMU_MGMT) = 0x0000e003; - - /* Enable UART0 MUX lines */ - REG(PINMUX1) |= PINMUX1_UART0; -} - -#ifdef CONFIG_DRIVER_TI_EMAC -void davinci_enable_emac(void) -{ - lpsc_on(DAVINCI_LPSC_EMAC); - lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); - lpsc_on(DAVINCI_LPSC_MDIO); - - /* Enable GIO3.3V cells used for EMAC */ - REG(VDD3P3V_PWDN) = 0; - - /* Enable EMAC. */ - REG(PINMUX0) |= PINMUX0_EMACEN; -} -#endif - -void davinci_enable_i2c(void) -{ - lpsc_on(DAVINCI_LPSC_I2C); - - /* Enable I2C pin Mux */ - REG(PINMUX1) |= PINMUX1_I2C; -} - -void davinci_errata_workarounds(void) -{ - /* - * Workaround for TMS320DM6446 errata 1.3.22: - * PSC: PTSTAT Register Does Not Clear After Warm/Maximum Reset - * Revision(s) Affected: 1.3 and earlier - */ - REG(PSC_SILVER_BULLET) = 0; - - /* - * Set the PR_OLD_COUNT bits in the Bus Burst Priority Register (PBBPR) - * as suggested in TMS320DM6446 errata 2.1.2: - * - * On DM6446 Silicon Revision 2.1 and earlier, under certain conditions - * low priority modules can occupy the bus and prevent high priority - * modules like the VPSS from getting the required DDR2 throughput. - * A hex value of 0x20 should provide a good ARM (cache enabled) - * performance and still allow good utilization by the VPSS or other - * modules. - */ - REG(VBPR) = 0x20; -} +#endif /* have a DSP */ --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -59,6 +59,7 @@ #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CONFIG_SYS_HZ 1000 +#define CONFIG_SOC_DM644X /*====================================================*/ /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -34,6 +34,7 @@ #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CONFIG_SYS_HZ 1000 +#define CONFIG_SOC_DM644X /*=============*/ /* Memory Info */ /*=============*/ --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -35,6 +35,7 @@ #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CONFIG_SYS_HZ 1000 +#define CONFIG_SOC_DM644X /* EEPROM definitions for Atmel 24LC64 EEPROM chip */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -59,6 +59,7 @@ #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CONFIG_SYS_HZ 1000 +#define CONFIG_SOC_DM644X /*====================================================*/ /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */

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[U-Boot] [patch u-boot git 2/5] davinci: cpu-specific build uses conditional make syntax
by David Brownell 18 Apr '09

18 Apr '09

From: David Brownell <dbrownell(a)users.sourceforge.net> Update cpu/arm926ejs/davinci/Makefile to use COBJ-y type syntax. Add the first conditional: for EMAC driver support. Not all chips have an EMAC; and boards might not use it, anyway. This doesn't touch PHY configuration; that should eventually become conditional too. Signed-off-by: David Brownell <dbrownell(a)users.sourceforge.net> --- cpu/arm926ejs/davinci/Makefile | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) --- a/cpu/arm926ejs/davinci/Makefile +++ b/cpu/arm926ejs/davinci/Makefile @@ -27,15 +27,17 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a -COBJS = timer.o ether.o lxt972.o dp83848.o psc.o +COBJS-y += timer.o psc.o +COBJS-$(CONFIG_DRIVER_TI_EMAC) += ether.o lxt972.o dp83848.o + SOBJS = reset.o ifndef CONFIG_SKIP_LOWLEVEL_INIT SOBJS += lowlevel_init.o endif -SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) START := $(addprefix $(obj),$(START)) all: $(obj).depend $(LIB)

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