February 2009 - U-Boot

[U-Boot] [PATCH] sh: use write{8,16,32} in ms7720se lowlevel_init
by Nobuhiro Iwamatsu 03 Feb '09

03 Feb '09

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com> --- board/ms7720se/lowlevel_init.S | 156 +++++++++++----------------------------- 1 files changed, 42 insertions(+), 114 deletions(-) diff --git a/board/ms7720se/lowlevel_init.S b/board/ms7720se/lowlevel_init.S index dcb77ef..7593811 100644 --- a/board/ms7720se/lowlevel_init.S +++ b/board/ms7720se/lowlevel_init.S @@ -18,6 +18,8 @@ * MA 02111-1307 USA */ +#include <asm/macro.h> + .global lowlevel_init .text @@ -25,157 +27,83 @@ lowlevel_init: - mov.l WTCSR_A,r1 - mov.l WTCSR_D,r0 - mov.w r0,@r1 + write16 WTCSR_A, WTCSR_D + + write16 WTCNT_A, WTCNT_D - mov.l WTCNT_A,r1 - mov.l WTCNT_D,r0 - mov.w r0,@r1 + write16 FRQCR_A, FRQCR_D - mov.l FRQCR_A,r1 - mov.l FRQCR_D,r0 - mov.w r0,@r1 + write16 UCLKCR_A, UCLKCR_D - mov.l UCLKCR_A,r1 - mov.l UCLKCR_D,r0 - mov.w r0,@r1 + write32 CMNCR_A, CMNCR_D - mov.l CMNCR_A, r1 - mov.l CMNCR_D, r0 - mov.l r0, @r1 + write32 CMNCR_A, CMNCR_D - mov.l CS0BCR_A, r1 - mov.l CS0BCR_D, r0 - mov.l r0, @r1 + write32 CS0BCR_A, CS0BCR_D - mov.l CS2BCR_A, r1 - mov.l CS2BCR_D, r0 - mov.l r0, @r1 + write32 CS2BCR_A, CS2BCR_D - mov.l CS3BCR_A, r1 - mov.l CS3BCR_D, r0 - mov.l r0, @r1 + write32 CS3BCR_A, CS3BCR_D - mov.l CS4BCR_A, r1 - mov.l CS4BCR_D, r0 - mov.l r0, @r1 + write32 CS4BCR_A, CS4BCR_D - mov.l CS5ABCR_A, r1 - mov.l CS5ABCR_D, r0 - mov.l r0, @r1 + write32 CS5ABCR_A, CS5ABCR_D - mov.l CS5BBCR_A, r1 - mov.l CS5BBCR_D, r0 - mov.l r0, @r1 + write32 CS5BBCR_A, CS5BBCR_D - mov.l CS6ABCR_A, r1 - mov.l CS6ABCR_D, r0 - mov.l r0, @r1 + write32 CS6ABCR_A, CS6ABCR_D - mov.l CS6BBCR_A, r1 - mov.l CS6BBCR_D, r0 - mov.l r0, @r1 + write32 CS6BBCR_A, CS6BBCR_D - mov.l CS0WCR_A, r1 - mov.l CS0WCR_D, r0 - mov.l r0, @r1 + write32 CS0WCR_A, CS0WCR_D - mov.l CS2WCR_A, r1 - mov.l CS2WCR_D, r0 - mov.l r0, @r1 + write32 CS2WCR_A, CS2WCR_D - mov.l CS3WCR_A, r1 - mov.l CS3WCR_D, r0 - mov.l r0, @r1 + write32 CS3WCR_A, CS3WCR_D - mov.l CS4WCR_A, r1 - mov.l CS4WCR_D, r0 - mov.l r0, @r1 + write32 CS4WCR_A, CS4WCR_D - mov.l CS5AWCR_A, r1 - mov.l CS5AWCR_D, r0 - mov.l r0, @r1 + write32 CS5AWCR_A, CS5AWCR_D - mov.l CS5BWCR_A, r1 - mov.l CS5BWCR_D, r0 - mov.l r0, @r1 + write32 CS5BWCR_A, CS5BWCR_D - mov.l CS6AWCR_A, r1 - mov.l CS6AWCR_D, r0 - mov.l r0, @r1 + write32 CS6AWCR_A, CS6AWCR_D - mov.l CS6BWCR_A, r1 - mov.l CS6BWCR_D, r0 - mov.l r0, @r1 + write32 CS6BWCR_A, CS6BWCR_D - mov.l SDCR_A, r1 - mov.l SDCR_D1, r0 - mov.l r0, @r1 + write32 SDCR_A, SDCR_D1 - mov.l RTCSR_A, r1 - mov.l RTCSR_D, r0 - mov.l r0, @r1 + write32 RTCSR_A, RTCSR_D - mov.l RTCNT_A, r1 - mov.l RTCNT_D, r0 - mov.l r0, @r1 + write32 RTCNT_A RTCNT_D - mov.l RTCOR_A, r1 - mov.l RTCOR_D, r0 - mov.l r0, @r1 + write32 RTCOR_A, RTCOR_D - mov.l SDCR_A, r1 - mov.l SDCR_D2, r0 - mov.l r0, @r1 + write32 SDCR_A, SDCR_D2 - mov.l SDMR3_A, r1 - mov.l SDMR3_D, r0 - mov.w r0, @r1 + write16 SDMR3_A, SDMR3_D - mov.l PCCR_A, r1 - mov.l PCCR_D, r0 - mov.w r0, @r1 + write16 PCCR_A, PCCR_D - mov.l PDCR_A, r1 - mov.l PDCR_D, r0 - mov.w r0, @r1 + write16 PDCR_A, PDCR_D - mov.l PECR_A, r1 - mov.l PECR_D, r0 - mov.w r0, @r1 + write16 PECR_A, PECR_D - mov.l PGCR_A, r1 - mov.l PGCR_D, r0 - mov.w r0, @r1 + write16 PGCR_A, PGCR_D - mov.l PHCR_A, r1 - mov.l PHCR_D, r0 - mov.w r0, @r1 + write16 PHCR_A, PHCR_D - mov.l PPCR_A, r1 - mov.l PPCR_D, r0 - mov.w r0, @r1 + write16 PPCR_A, PPCR_D - mov.l PTCR_A, r1 - mov.l PTCR_D, r0 - mov.w r0, @r1 + write16 PTCR_A, PTCR_D - mov.l PVCR_A, r1 - mov.l PVCR_D, r0 - mov.w r0, @r1 + write16 PVCR_A, PVCR_D - mov.l PSELA_A, r1 - mov.l PSELA_D, r0 - mov.w r0, @r1 + write16 PSELA_A, PSELA_D - mov.l CCR_A, r1 - mov.l CCR_D, r0 - mov.l r0, @r1 + write32 CCR_A, CCR_D - mov.l LED_A, r1 - mov.l LED_D, r0 - mov.b r0, @r1 + write8 LED_A, LED_D rts nop -- 1.5.6.5

1 0

[U-Boot] [PATCH 6/8 v2] Add support for the Freescale eSDHC found on 8379 and 8536 SoCs
by Andy Fleming 03 Feb '09

03 Feb '09

This uses the new MMC framework Some contributions by Dave Liu <daveliu(a)freescale.com> Signed-off-by: Andy Fleming <afleming(a)freescale.com> --- Changed how we got eSDHC address, and used clrsetbits_be32, where appropriate. drivers/mmc/Makefile | 1 + drivers/mmc/fsl_esdhc.c | 348 +++++++++++++++++++++++++++++++++++++++++++++++ include/fsl_esdhc.h | 145 ++++++++++++++++++++ 3 files changed, 494 insertions(+), 0 deletions(-) create mode 100644 drivers/mmc/fsl_esdhc.c create mode 100644 include/fsl_esdhc.h diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index d5a969c..040be8d 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -27,6 +27,7 @@ LIB := $(obj)libmmc.a COBJS-$(CONFIG_GENERIC_MMC) += mmc.o COBJS-$(CONFIG_ATMEL_MCI) += atmel_mci.o +COBJS-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c new file mode 100644 index 0000000..0ba45cd --- /dev/null +++ b/drivers/mmc/fsl_esdhc.c @@ -0,0 +1,348 @@ +/* + * Copyright 2007, Freescale Semiconductor, Inc + * Andy Fleming + * + * Based vaguely on the pxa mmc code: + * (C) Copyright 2003 + * Kyle Harris, Nexus Technologies, Inc. kharris(a)nexus-tech.net + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <common.h> +#include <command.h> +#include <mmc.h> +#include <part.h> +#include <malloc.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <asm/io.h> + + +DECLARE_GLOBAL_DATA_PTR; + +struct fsl_esdhc { + uint dsaddr; + uint blkattr; + uint cmdarg; + uint xfertyp; + uint cmdrsp0; + uint cmdrsp1; + uint cmdrsp2; + uint cmdrsp3; + uint datport; + uint prsstat; + uint proctl; + uint sysctl; + uint irqstat; + uint irqstaten; + uint irqsigen; + uint autoc12err; + uint hostcapblt; + uint wml; + char reserved1[8]; + uint fevt; + char reserved2[168]; + uint hostver; + char reserved3[780]; + uint scr; +}; + +/* Return the XFERTYP flags for a given command and data packet */ +uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) +{ + uint xfertyp = 0; + + if (data) { + xfertyp |= XFERTYP_DPSEL | XFERTYP_DMAEN; + + if (data->blocks > 1) { + xfertyp |= XFERTYP_MSBSEL; + xfertyp |= XFERTYP_BCEN; + } + + if (data->flags & MMC_DATA_READ) + xfertyp |= XFERTYP_DTDSEL; + } + + if (cmd->resp_type & MMC_RSP_CRC) + xfertyp |= XFERTYP_CCCEN; + if (cmd->resp_type & MMC_RSP_OPCODE) + xfertyp |= XFERTYP_CICEN; + if (cmd->resp_type & MMC_RSP_136) + xfertyp |= XFERTYP_RSPTYP_136; + else if (cmd->resp_type & MMC_RSP_BUSY) + xfertyp |= XFERTYP_RSPTYP_48_BUSY; + else if (cmd->resp_type & MMC_RSP_PRESENT) + xfertyp |= XFERTYP_RSPTYP_48; + + return XFERTYP_CMD(cmd->cmdidx) | xfertyp; +} + +static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) +{ + uint wml_value; + int timeout; + struct fsl_esdhc *regs = mmc->priv; + + wml_value = data->blocksize/4; + + if (data->flags & MMC_DATA_READ) { + if (wml_value > 0x10) + wml_value = 0x10; + + wml_value = 0x100000 | wml_value; + + out_be32(&regs->dsaddr, (u32)data->dest); + } else { + if (wml_value > 0x80) + wml_value = 0x80; + if ((in_be32(&regs->prsstat) & PRSSTAT_WPSPL) == 0) { + printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); + return TIMEOUT; + } + wml_value = wml_value << 16 | 0x10; + out_be32(&regs->dsaddr, (u32)data->src); + } + + out_be32(&regs->wml, wml_value); + + out_be32(&regs->blkattr, data->blocks << 16 | data->blocksize); + + /* Calculate the timeout period for data transactions */ + timeout = __ilog2(mmc->tran_speed/10); + timeout -= 13; + + if (timeout > 14) + timeout = 14; + + if (timeout < 0) + timeout = 0; + + clrsetbits_be32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, timeout << 16); + + return 0; +} + + +/* + * Sends a command out on the bus. Takes the mmc pointer, + * a command pointer, and an optional data pointer. + */ +static int +esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) +{ + uint xfertyp; + uint irqstat; + volatile struct fsl_esdhc *regs = mmc->priv; + + out_be32(&regs->irqstat, -1); + + sync(); + + /* Wait for the bus to be idle */ + while ((in_be32(&regs->prsstat) & PRSSTAT_CICHB) || + (in_be32(&regs->prsstat) & PRSSTAT_CIDHB)); + + while (in_be32(&regs->prsstat) & PRSSTAT_DLA); + + /* Wait at least 8 SD clock cycles before the next command */ + /* + * Note: This is way more than 8 cycles, but 1ms seems to + * resolve timing issues with some cards + */ + udelay(1000); + + /* Set up for a data transfer if we have one */ + if (data) { + int err; + + err = esdhc_setup_data(mmc, data); + if(err) + return err; + } + + /* Figure out the transfer arguments */ + xfertyp = esdhc_xfertyp(cmd, data); + + /* Send the command */ + out_be32(&regs->cmdarg, cmd->cmdarg); + out_be32(&regs->xfertyp, xfertyp); + + /* Wait for the command to complete */ + while (!(in_be32(&regs->irqstat) & IRQSTAT_CC)); + + irqstat = in_be32(&regs->irqstat); + out_be32(&regs->irqstat, irqstat); + + if (irqstat & CMD_ERR) + return COMM_ERR; + + if (irqstat & IRQSTAT_CTOE) + return TIMEOUT; + + /* Copy the response to the response buffer */ + if (cmd->resp_type & MMC_RSP_136) { + u32 cmdrsp3, cmdrsp2, cmdrsp1, cmdrsp0; + + cmdrsp3 = in_be32(&regs->cmdrsp3); + cmdrsp2 = in_be32(&regs->cmdrsp2); + cmdrsp1 = in_be32(&regs->cmdrsp1); + cmdrsp0 = in_be32(&regs->cmdrsp0); + ((uint *)(cmd->response))[0] = (cmdrsp3 << 8) | (cmdrsp2 >> 24); + ((uint *)(cmd->response))[1] = (cmdrsp2 << 8) | (cmdrsp1 >> 24); + ((uint *)(cmd->response))[2] = (cmdrsp1 << 8) | (cmdrsp0 >> 24); + ((uint *)(cmd->response))[3] = (cmdrsp0 << 8); + } else + ((uint *)(cmd->response))[0] = in_be32(&regs->cmdrsp0); + + /* Wait until all of the blocks are transferred */ + if (data) { + do { + irqstat = in_be32(&regs->irqstat); + + if (irqstat & DATA_ERR) + return COMM_ERR; + + if (irqstat & IRQSTAT_DTOE) + return TIMEOUT; + } while (!(irqstat & IRQSTAT_TC) && + (in_be32(&regs->prsstat) & PRSSTAT_DLA)); + } + + out_be32(&regs->irqstat, -1); + + return 0; +} + +void set_sysctl(struct mmc *mmc, uint clock) +{ + int sdhc_clk = gd->sdhc_clk; + int div, pre_div; + volatile struct fsl_esdhc *regs = mmc->priv; + uint clk; + + if (sdhc_clk / 16 > clock) { + for (pre_div = 2; pre_div < 256; pre_div *= 2) + if ((sdhc_clk / pre_div) <= (clock * 16)) + break; + } else + pre_div = 2; + + for (div = 1; div <= 16; div++) + if ((sdhc_clk / (div * pre_div)) <= clock) + break; + + pre_div >>= 1; + div -= 1; + + clk = (pre_div << 8) | (div << 4); + + clrsetbits_be32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk); + + udelay(10000); + + setbits_be32(&regs->sysctl, SYSCTL_PEREN); +} + +static void esdhc_set_ios(struct mmc *mmc) +{ + struct fsl_esdhc *regs = mmc->priv; + + /* Set the clock speed */ + set_sysctl(mmc, mmc->clock); + + /* Set the bus width */ + clrbits_be32(&regs->proctl, PROCTL_DTW_4 | PROCTL_DTW_8); + + if (mmc->bus_width == 4) + setbits_be32(&regs->proctl, PROCTL_DTW_4); + else if (mmc->bus_width == 8) + setbits_be32(&regs->proctl, PROCTL_DTW_8); +} + +static int esdhc_init(struct mmc *mmc) +{ + struct fsl_esdhc *regs = mmc->priv; + int timeout = 1000; + + /* Enable cache snooping */ + out_be32(&regs->scr, 0x00000040); + + out_be32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); + + /* Set the initial clock speed */ + set_sysctl(mmc, 400000); + + /* Disable the BRR and BWR bits in IRQSTAT */ + clrbits_be32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); + + /* Put the PROCTL reg back to the default */ + out_be32(&regs->proctl, PROCTL_INIT); + + while (!(in_be32(&regs->prsstat) & PRSSTAT_CINS) && --timeout) + udelay(1000); + + if (timeout <= 0) + return NO_CARD_ERR; + + return 0; +} + +static int esdhc_initialize(bd_t *bis) +{ + struct fsl_esdhc *regs = (struct fsl_esdhc *)CONFIG_SYS_FSL_ESDHC_ADDR; + struct mmc *mmc; + u32 caps; + + mmc = malloc(sizeof(struct mmc)); + + sprintf(mmc->name, "FSL_ESDHC"); + mmc->priv = regs; + mmc->send_cmd = esdhc_send_cmd; + mmc->set_ios = esdhc_set_ios; + mmc->init = esdhc_init; + + caps = regs->hostcapblt; + + if (caps & ESDHC_HOSTCAPBLT_VS18) + mmc->voltages |= MMC_VDD_165_195; + if (caps & ESDHC_HOSTCAPBLT_VS30) + mmc->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31; + if (caps & ESDHC_HOSTCAPBLT_VS33) + mmc->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34; + + mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT; + + if (caps & ESDHC_HOSTCAPBLT_HSS) + mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; + + mmc->f_min = 400000; + mmc->f_max = MIN(gd->sdhc_clk, 50000000); + + mmc_register(mmc); + + return 0; +} + +int fsl_esdhc_mmc_init(bd_t *bis) +{ + return esdhc_initialize(bis); +} diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h new file mode 100644 index 0000000..0a5c5d6 --- /dev/null +++ b/include/fsl_esdhc.h @@ -0,0 +1,145 @@ +/* + * FSL SD/MMC Defines + *------------------------------------------------------------------- + * + * Copyright 2007-2008, Freescale Semiconductor, Inc + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + *------------------------------------------------------------------- + * + */ + +#ifndef __FSL_ESDHC_H__ +#define __FSL_ESDHC_H__ + +/* FSL eSDHC-specific constants */ +#define SYSCTL 0x0002e02c +#define SYSCTL_INITA 0x08000000 +#define SYSCTL_TIMEOUT_MASK 0x000f0000 +#define SYSCTL_CLOCK_MASK 0x00000fff +#define SYSCTL_PEREN 0x00000004 +#define SYSCTL_HCKEN 0x00000002 +#define SYSCTL_IPGEN 0x00000001 + +#define IRQSTAT 0x0002e030 +#define IRQSTAT_DMAE (0x10000000) +#define IRQSTAT_AC12E (0x01000000) +#define IRQSTAT_DEBE (0x00400000) +#define IRQSTAT_DCE (0x00200000) +#define IRQSTAT_DTOE (0x00100000) +#define IRQSTAT_CIE (0x00080000) +#define IRQSTAT_CEBE (0x00040000) +#define IRQSTAT_CCE (0x00020000) +#define IRQSTAT_CTOE (0x00010000) +#define IRQSTAT_CINT (0x00000100) +#define IRQSTAT_CRM (0x00000080) +#define IRQSTAT_CINS (0x00000040) +#define IRQSTAT_BRR (0x00000020) +#define IRQSTAT_BWR (0x00000010) +#define IRQSTAT_DINT (0x00000008) +#define IRQSTAT_BGE (0x00000004) +#define IRQSTAT_TC (0x00000002) +#define IRQSTAT_CC (0x00000001) + +#define CMD_ERR (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE) +#define DATA_ERR (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE) + +#define IRQSTATEN 0x0002e034 +#define IRQSTATEN_DMAE (0x10000000) +#define IRQSTATEN_AC12E (0x01000000) +#define IRQSTATEN_DEBE (0x00400000) +#define IRQSTATEN_DCE (0x00200000) +#define IRQSTATEN_DTOE (0x00100000) +#define IRQSTATEN_CIE (0x00080000) +#define IRQSTATEN_CEBE (0x00040000) +#define IRQSTATEN_CCE (0x00020000) +#define IRQSTATEN_CTOE (0x00010000) +#define IRQSTATEN_CINT (0x00000100) +#define IRQSTATEN_CRM (0x00000080) +#define IRQSTATEN_CINS (0x00000040) +#define IRQSTATEN_BRR (0x00000020) +#define IRQSTATEN_BWR (0x00000010) +#define IRQSTATEN_DINT (0x00000008) +#define IRQSTATEN_BGE (0x00000004) +#define IRQSTATEN_TC (0x00000002) +#define IRQSTATEN_CC (0x00000001) + +#define PRSSTAT 0x0002e024 +#define PRSSTAT_CLSL (0x00800000) +#define PRSSTAT_WPSPL (0x00080000) +#define PRSSTAT_CDPL (0x00040000) +#define PRSSTAT_CINS (0x00010000) +#define PRSSTAT_BREN (0x00000800) +#define PRSSTAT_DLA (0x00000004) +#define PRSSTAT_CICHB (0x00000002) +#define PRSSTAT_CIDHB (0x00000001) + +#define PROCTL 0x0002e028 +#define PROCTL_INIT 0x00000020 +#define PROCTL_DTW_4 0x00000002 +#define PROCTL_DTW_8 0x00000004 + +#define CMDARG 0x0002e008 + +#define XFERTYP 0x0002e00c +#define XFERTYP_CMD(x) ((x & 0x3f) << 24) +#define XFERTYP_CMDTYP_NORMAL 0x0 +#define XFERTYP_CMDTYP_SUSPEND 0x00400000 +#define XFERTYP_CMDTYP_RESUME 0x00800000 +#define XFERTYP_CMDTYP_ABORT 0x00c00000 +#define XFERTYP_DPSEL 0x00200000 +#define XFERTYP_CICEN 0x00100000 +#define XFERTYP_CCCEN 0x00080000 +#define XFERTYP_RSPTYP_NONE 0 +#define XFERTYP_RSPTYP_136 0x00010000 +#define XFERTYP_RSPTYP_48 0x00020000 +#define XFERTYP_RSPTYP_48_BUSY 0x00030000 +#define XFERTYP_MSBSEL 0x00000020 +#define XFERTYP_DTDSEL 0x00000010 +#define XFERTYP_AC12EN 0x00000004 +#define XFERTYP_BCEN 0x00000002 +#define XFERTYP_DMAEN 0x00000001 + +#define CINS_TIMEOUT 1000 + +#define DSADDR 0x2e004 + +#define CMDRSP0 0x2e010 +#define CMDRSP1 0x2e014 +#define CMDRSP2 0x2e018 +#define CMDRSP3 0x2e01c + +#define DATPORT 0x2e020 + +#define WML 0x2e044 +#define WML_WRITE 0x00010000 + +#define BLKATTR 0x2e004 +#define BLKATTR_CNT(x) ((x & 0xffff) << 16) +#define BLKATTR_SIZE(x) (x & 0x1fff) +#define MAX_BLK_CNT 0x7fff /* so malloc will have enough room with 32M */ + +#define ESDHC_HOSTCAPBLT_VS18 0x04000000 +#define ESDHC_HOSTCAPBLT_VS30 0x02000000 +#define ESDHC_HOSTCAPBLT_VS33 0x01000000 +#define ESDHC_HOSTCAPBLT_SRS 0x00800000 +#define ESDHC_HOSTCAPBLT_DMAS 0x00400000 +#define ESDHC_HOSTCAPBLT_HSS 0x00200000 + +int fsl_esdhc_mmc_init(bd_t *bis); + +#endif /* __FSL_ESDHC_H__ */ -- 1.5.4.GIT

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[U-Boot] u-boot environment variable storage
by twebb 02 Feb '09

02 Feb '09

Does u-boot have support for storage of environment variables in file form? For example, in a file on a FAT32 file system residing on a MMC card? Thanks.

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Re: [U-Boot] [ARM] Environment variables not available during, console initialisation?
by Derek Ou 02 Feb '09

02 Feb '09

Is this a catch 22? If console is initialized after loading environment variables, this means NAND (or other memories) driver are loaded before console being available and there is no console output to debug NAND driver initialization. If console is initialized before loading NAND driver, environment variable is available after the console is configured? Derek

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[U-Boot] [RFC] fdt expert advice needed
by Matthias Fuchs 02 Feb '09

02 Feb '09

Hi FDT experts, some time ago I posted a patch to fix U-Boot's approach to set all ns16550 compatible nodes' clock-frequency property in ppc4xx device tree's: do_fixup_by_compat_u32(blob, "ns16550", "clock-frequency", gd->uart_clk, 1); Typically this works fine. It is intended to configure all CPU internal UART's clock. We have some additional UARTs attached to an external bus. From the device tree's point of view they have a different path, but are also ns16550 compatible. So the above line will also overwrite thier clock-frequency. This must not be done, because they have a separate external clock and the value in the device tree is correct! Now I want to replace the above code to only touch the ns16550 compatible nodes that are direct childs of /plb/opb. Not those under /plb/ebc and even not those under /plb/opb/ebc. This is not easy to do with the fdt API. Below you find my first and dirty hack. Isn't there a more simple way to do so? Don't bother me about the printf, variable names etc. It's just for discussion. Please tell me if I have to explain my code :-) Matthias From c915c5a8f38940cf0a5047863fb953712049e0be Mon Sep 17 00:00:00 2001 From: Matthias Fuchs <matthias.fuchs(a)esd-electronics.com> Date: Fri, 30 Jan 2009 11:00:33 +0100 Subject: [PATCH] ppc4xx: Only fixup opb attached (CPU internal) UARTs Signed-off-by: Matthias Fuchs <matthias.fuchs(a)esd-electronics.com> --- cpu/ppc4xx/fdt.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 65 insertions(+), 0 deletions(-) diff --git a/cpu/ppc4xx/fdt.c b/cpu/ppc4xx/fdt.c index c55e1cf..f668ac6 100644 --- a/cpu/ppc4xx/fdt.c +++ b/cpu/ppc4xx/fdt.c @@ -110,9 +110,48 @@ void fdt_pcie_setup(void *blob) } } +int ft_path_end_offset(void *blob, char *path) +{ + int start, stop; + int off; + uint32_t tag; + int nextoffset; + int level = 0; + + off = fdt_path_offset(blob, path); + if (off < 0) + return -1; + + stop = start = off; + + while (stop == start) { + tag = fdt_next_tag(blob, off, &nextoffset); + switch(tag) { + case FDT_BEGIN_NODE: + level++; + break; + + case FDT_END_NODE: + if (level == 1) + stop = off; + level--; + break; + + default: + break; + } + off = nextoffset; + } + + return stop; +} + void ft_cpu_setup(void *blob, bd_t *bd) { sys_info_t sys_info; + int start, stop; + int start2, stop2; + int off; get_sys_info(&sys_info); @@ -135,7 +174,33 @@ void ft_cpu_setup(void *blob, bd_t *bd) /* * Setup all baudrates for the UARTs */ +#if 0 do_fixup_by_compat_u32(blob, "ns16550", "clock-frequency", gd->uart_clk, 1); +#endif + start = fdt_path_offset(blob, "/plb/opb"); + stop = ft_path_end_offset(blob, "/plb/opb"); + printf("/plb/opb start=%d, stop=%d\n", start, stop); + + start2 = fdt_path_offset(blob, "/plb/opb/ebc"); + stop2 = ft_path_end_offset(blob, "/plb/opb/ebc"); + printf("/plb/opb/obc start=%d, stop=%d\n", start, stop); + + off = start; + while (off != -FDT_ERR_NOTFOUND) { + off = fdt_node_offset_by_compatible(blob, off, "ns16550"); + printf("off=%d\n", off); + if ((off > start) && (off < stop)) { + if ((start2 < 0) || (off < start2) || (off > stop2)) { + printf("ns16550 directly on OPB\n"); + if (fdt_get_property(blob, off, + "clock-frequency", + 0) != NULL) + fdt_setprop(blob, off, + "clock-frequency", + (void*)&(gd->uart_clk), 4); + } + } + } /* * Fixup all ethernet nodes -- 1.6.1

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[U-Boot] Support for both NAND and NOR flashes in one u-boot image
by Deven Balani 02 Feb '09

02 Feb '09

Hello all, I have a reference board design which allows user to select one of the NOR or NAND flash as onboard boot devices via a jumper setting. I have a register setting in the hardware which can be used to identify the boot device type (NAND or NOR) during execution of bootloader. I'm interested in using u-boot to automatically check the boot device type (NAND or NOR) during startup, load/store environment from the detected (NAND or NOR) flash device and enable supported u-boot commands for that flash device. I need some advice on, how this mechanism is supported in u-boot? In other words, Is it possible to support both NAND and NOR flash as boot devices in one binary image of u-boot? Thanks, Deven

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[U-Boot] Winning Notification
by annual31nl 02 Feb '09

02 Feb '09

Winning Notification This is to notify you that you have won 570,000.00 Euros in our online email lottery in which e-mail addresses are picked randomly by computerised balloting, powered by the Internet. Your email address was amongst those chosen for this period. Ticket no: LPN655/228/91 Serial No:7543301-PD7 *************************************** 1.Agent Name: Mr.Rob Van De Van 2.Agent Email: nl2008national(a)aim.com 3.Agent Tel: + 0031-643-860-690 *************************************** Claims Requirements: 1.full name: 2.Home Address: 3.Age: 4.Sex: 5.Telephone: 6.Occupation: 7.Country Of Residence: 8.Nationality: 9.Amount Won: 10.Religon *************************************** Congratulations once more from all members and staff of this program. Lotto Officer: Rebecca Wetzel Pls send reply to axasecuritycomp(a)hotmail.com or nl2008national(a)aim.com

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[U-Boot] Allow board specific overwriting of library code
by Michael Roth 02 Feb '09

02 Feb '09

Hello, recently there were some discussion how to support board specfic lowlevel_init code on the at91 plattform. For example in Nov 2008 there was a discussion about CONFIG_USER_LOWLEVEL_INIT or so and recently there was a patch proposal from Jean-Christophe to provide a cmd_link_o_target macro that creates a combinend object file instead an archive. The combined object file was needed because weak linking somehow doesn't work with archive files. Very annoying. I had large problems with weak linking regarding coloured LED support on my board, too. I came to the conclusion that weak linking across archives are somehow broken. However I was not able to create a small test case to trigger this behavior (bug?) in gcc/bintuils. Ok, so here my proposal that is generic and allows any library code to get overwritten by board specific functions without defining any weak symbols in the library code. It is based purely on sequence of object files presented to 'ld'. Please take a look and tell me your opinion. I have patches to support a new board in my queue but I need any possibility to provide a board specific lowlevel_init. Which solution is selected plays no role to me. Michael Roth

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[U-Boot] How to do a basic memory test test using BDI??
by Afzal Nadirshah 02 Feb '09

02 Feb '09

Hi, Can I write simple tests for the RAM on a PPC460 and execute it using the BDI debugger? If I don't have linux / u-boot up on my board, how can I test the RAM? Thanks & Regards Afzal Nadirshah| Senior Engineer | MindTree Ltd. Phase - I, Global Village West Campus, RVCE post, Mysore Road, Bangalore - 560059 | Voice +91 80 26264100 Extn: 66759 / Fax +91 80 2671 4000 | email: afzal_nadirshah(a)mindtree.com<mailto:afzal_nadirshah@mindtree.com> |www.mindtree.com<http://www.mindtree.com/> | ________________________________ http://www.mindtree.com/email/disclaimer.html

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[U-Boot] [PATCH] Removed unused CONFIG_CMD_AT91_SPIMUX
by Michael Roth 02 Feb '09

02 Feb '09

CONFIG_CMD_AT91_SPIMUX was introduced as CONFIG_CMD_MUX in commit d4fc6012fd0a5c211b825691f44b06f8032c0551 and renamed in commit 557ab89d294f08dd532f21d19861b40093200a33. However these were never used by any code. Signed-off-by: Michael Roth <mroth(a)nessie.de> --- include/config_cmd_all.h | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index d771696..d382b4d 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -82,6 +82,5 @@ #define CONFIG_CMD_USB /* USB Support */ #define CONFIG_CMD_VFD /* VFD support (TRAB) */ #define CONFIG_CMD_XIMG /* Load part of Multi Image */ -#define CONFIG_CMD_AT91_SPIMUX /* AT91 MMC/SPI Mux Support */ #endif /* _CONFIG_CMD_ALL_H */ -- 1.6.0.6

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