February 2009 - U-Boot

[U-Boot] JFFS2 scanning bug
by Mark Jackson 30 Apr '09

30 Apr '09

I've just updated from v2008.10 to v2009.01 on my AVR32 board (MIMC200). JFFS2 no longer works (it hangs at "Scanning JFFS2 FS:", so I've done a git bisect, and here's the result:- 8a36d31f72411144ac0412ee7e1880e801acd754 is first bad commit commit 8a36d31f72411144ac0412ee7e1880e801acd754 Author: Ilya Yanok <yanok(a)emcraft.com> Date: Thu Nov 13 19:49:33 2008 +0300 jffs2: rewrite jffs2 scanning code based on Linux one Rewrites jffs2_1pass_build_lists() function in style of Linux's jffs2_scan_medium() and jffs2_scan_eraseblock(). This includes: - Caching flash acceses - Smart dealing with free space Signed-off-by: Alexey Neyman <avn(a)emcraft.com> Signed-off-by: Ilya Yanok <yanok(a)emcraft.com> :040000 040000 9c5a40532bce0ea6df7a287e3dff47189d513dd0 8d4145b1d15ebd9a1281c5c8e7dd2e32ef168b26 M fs Is this a known problem ? Regards Mark

3 7

[U-Boot] [PATCH 1/2] rtl8169: fix cache coherency problem
by Yoshihiro Shimoda 28 Apr '09

28 Apr '09

Fix the problem that cannot access actual data when CPU data cache enabled. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> --- drivers/net/rtl8169.c | 11 ++++++++++- 1 files changed, 10 insertions(+), 1 deletions(-) diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index e9f6391..b441ec4 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -420,6 +420,8 @@ static int rtl_recv(struct eth_device *dev) ioaddr = dev->iobase; cur_rx = tpc->cur_rx; + flush_cache((unsigned long)&tpc->RxDescArray[cur_rx], + sizeof(struct RxDesc)); if ((le32_to_cpu(tpc->RxDescArray[cur_rx].status) & OWNbit) == 0) { if (!(le32_to_cpu(tpc->RxDescArray[cur_rx].status) & RxRES)) { unsigned char rxdata[RX_BUF_LEN]; @@ -437,6 +439,8 @@ static int rtl_recv(struct eth_device *dev) cpu_to_le32(OWNbit + RX_BUF_SIZE); tpc->RxDescArray[cur_rx].buf_addr = cpu_to_le32((unsigned long)tpc->RxBufferRing[cur_rx]); + flush_cache((unsigned long)tpc->RxBufferRing[cur_rx], + RX_BUF_SIZE); } else { puts("Error Rx"); } @@ -478,6 +482,7 @@ static int rtl_send(struct eth_device *dev, volatile void *packet, int length) /* point to the current txb incase multiple tx_rings are used */ ptxb = tpc->Tx_skbuff[entry * MAX_ETH_FRAME_SIZE]; memcpy(ptxb, (char *)packet, (int)length); + flush_cache((unsigned long)ptxb, length); while (len < ETH_ZLEN) ptxb[len++] = '\0'; @@ -497,7 +502,10 @@ static int rtl_send(struct eth_device *dev, volatile void *packet, int length) tpc->cur_tx++; to = currticks() + TX_TIMEOUT; - while ((le32_to_cpu(tpc->TxDescArray[entry].status) & OWNbit) + do { + flush_cache((unsigned long)&tpc->TxDescArray[entry], + sizeof(struct TxDesc)); + } while ((le32_to_cpu(tpc->TxDescArray[entry].status) & OWNbit) && (currticks() < to)); /* wait */ if (currticks() >= to) { @@ -639,6 +647,7 @@ static void rtl8169_init_ring(struct eth_device *dev) tpc->RxBufferRing[i] = &rxb[i * RX_BUF_SIZE]; tpc->RxDescArray[i].buf_addr = cpu_to_le32((unsigned long)tpc->RxBufferRing[i]); + flush_cache((unsigned long)tpc->RxBufferRing[i], RX_BUF_SIZE); } #ifdef DEBUG_RTL8169 -- 1.5.5

4 5

[U-Boot] [PATCH] Add feature-removal-schedule.txt
by Peter Tyser 15 Apr '09

15 Apr '09

Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> --- See the following threads for background: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/48429 http://article.gmane.org/gmane.comp.boot-loaders.u-boot/47755 http://article.gmane.org/gmane.comp.boot-loaders.u-boot/53340 doc/feature-removal-schedule.txt | 37 +++++++++++++++++++++++++++++++++++++ 1 files changed, 37 insertions(+), 0 deletions(-) create mode 100644 doc/feature-removal-schedule.txt diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt new file mode 100644 index 0000000..901dc46 --- /dev/null +++ b/doc/feature-removal-schedule.txt @@ -0,0 +1,37 @@ +The following is a list of files and features that are going to be +removed from the U-Boot source tree. Every entry should contain what +exactly is going away, when it will be gone, why it is being removed, +and who is going to be doing the work. When the feature is removed +from U-Boot, its corresponding entry should also be removed from this +file. + +--------------------------- + +What: "autoscr" command +When: August 2009 +Why: "autosrc" is an ugly and completely non-standard name. The "autoscr" + command is deprecated and will be replaced the "source" command as + used by other shells such as bash. Both commands will be supported + for a transition period of 6 months after which "autoscr" will be + removed. +Who: Peter Tyser <ptyser(a)xes-inc.com> + +--------------------------- + +What: Individual I2C commands +When: April 2009 +Why: Per the U-Boot README, individual I2C commands such as "imd", "imm", + "imw", etc are deprecated. The single "i2c" command which is + currently enabled via CONFIG_I2C_CMD_TREE contains the same + functionality as the individual I2C commands. The individual + I2C commands should be removed as well as any references to + CONFIG_I2C_CMD_TREE. +Who: Peter Tyser <ptyser(a)xes-inc.com> + +--------------------------- + +What: Legacy NAND code +When: April 2009 +Why: Legacy NAND code is deprecated. Similar functionality exists in + more recent NAND code ported from the Linux kernel. +Who: Scott Wood <scottwood(a)freescale.com> -- 1.6.0.2.GIT

3 3

[U-Boot] [PATCH v2] Support for PXA27X UDC.
by Vivek Kutal 06 Apr '09

06 Apr '09

Signed-off-by: Vivek Kutal <vivek.kutal(a)azingo.com> --- drivers/serial/usbtty.h | 4 +- drivers/usb/Makefile | 1 + drivers/usb/usbdcore_pxa27x.c | 712 +++++++++++++++++++++++++++++++++++ include/asm-arm/arch-pxa/pxa-regs.h | 337 +++++++++++++---- include/usbdcore_pxa27x.h | 68 ++++ 5 files changed, 1049 insertions(+), 73 deletions(-) create mode 100644 drivers/usb/usbdcore_pxa27x.c create mode 100644 include/usbdcore_pxa27x.h diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h index ecefde5..5fe872e 100644 --- a/drivers/serial/usbtty.h +++ b/drivers/serial/usbtty.h @@ -27,8 +27,10 @@ #include <usbdcore.h> #if defined(CONFIG_PPC) #include <usbdcore_mpc8xx.h> -#elif defined(CONFIG_ARM) +#elif defined(CONFIG_OMAP1510) #include <usbdcore_omap1510.h> +#elif defined(CONFIG_PXA27X) +#include <usbdcore_pxa27x.h> #endif #include <version_autogenerated.h> diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile index b306a65..0a1886a 100644 --- a/drivers/usb/Makefile +++ b/drivers/usb/Makefile @@ -47,6 +47,7 @@ COBJS-y += usbdcore_ep0.o COBJS-$(CONFIG_OMAP1510) += usbdcore_omap1510.o COBJS-$(CONFIG_OMAP1610) += usbdcore_omap1510.o COBJS-$(CONFIG_MPC885_FAMILY) += usbdcore_mpc8xx.o +COBJS-$(CONFIG_PXA27X) += usbdcore_pxa27x.o endif COBJS := $(COBJS-y) diff --git a/drivers/usb/usbdcore_pxa27x.c b/drivers/usb/usbdcore_pxa27x.c new file mode 100644 index 0000000..6dfbf3d --- /dev/null +++ b/drivers/usb/usbdcore_pxa27x.c @@ -0,0 +1,712 @@ +/* + * PXA27x USB device driver for u-boot. + * + * Copyright (C) 2007 Rodolfo Giometti <giometti(a)linux.it> + * Copyright (C) 2007 Eurotech S.p.A. <info(a)eurotech.it> + * Copyright (C) 2008 Vivek Kutal <vivek.kutal(a)azingo.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + + +#include <common.h> +#include <config.h> +#include <asm/byteorder.h> +#include <usbdcore.h> +#include <usbdcore_ep0.h> +#include <asm/arch/hardware.h> +#include <usbdcore_pxa27x.h> + +#define UDC_MAX_ENDPOINTS 24 /* number of endpoints on this UDC */ + +static struct urb *ep0_urb = NULL; +static struct usb_device_instance *udc_device; +static int ep0state = EP0_IDLE; + +#ifdef USBDDBG +static void udc_dump_buffer(char *name, u8 *buf, int len) +{ + int i, p, flag = 1; + + usbdbg("%s - buf %p, len %d", name, buf, len); + for (i = p = 0; i < len; i++, p++) { + if (p == 0) { + flag = 0; + usbdbg("\t"); + } + + usbdbg("%02x ", buf[i]); + + if (p == 15) { + flag = 1; + usbdbg("\n"); + p = -1; + } + } + if (!flag) + usbdbg("\n"); +} +#else +#define udc_dump_buffer(name, buf, len) /* void */ +#endif + +static inline void udc_ack_int_UDCCR(int mask) +{ + USIR1 = mask | USIR1; +} + +/* + * If the endpoint has an active tx_urb, then the next packet of data from the + * URB is written to the tx FIFO. + * The total amount of data in the urb is given by urb->actual_length. + * The maximum amount of data that can be sent in any one packet is given by + * endpoint->tx_packetSize. + * The number of data bytes from this URB that have already been transmitted + * is given by endpoint->sent. + * endpoint->last is updated by this routine with the number of data bytes + * transmitted in this packet. + */ +static int udc_write_urb(struct usb_endpoint_instance *endpoint) +{ + struct urb *urb = endpoint->tx_urb; + int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; + + u32 *addr32 = (u32 *) &UDCDN(ep_num), + *data32 = (u32 *) urb->buffer; + u8 *addr8 = (u8 *) &UDCDN(ep_num), + *data8 = (u8 *) urb->buffer; + unsigned int i, n, w, b, is_short; + int timeout = 2000; /* 2ms */ + + if (!urb || !urb->actual_length) + return -1; + + n = MIN(urb->actual_length - endpoint->sent, endpoint->tx_packetSize); + if (n <= 0) + return -1; + + usbdbg("write urb on ep %d", ep_num); +#if defined(USBDDBG) && defined(USBDPARANOIA) + usbdbg("urb: buf %p, buf_len %d, actual_len %d", + urb->buffer, urb->buffer_length, urb->actual_length); + usbdbg("endpoint: sent %d, tx_packetSize %d, last %d", + endpoint->sent, endpoint->tx_packetSize, endpoint->last); +#endif + + is_short = n != endpoint->tx_packetSize; + w = n / 4; + b = n % 4; + usbdbg("n %d%s w %d b %d", n, is_short ? "-s" : "", w, b); + udc_dump_buffer("urb write", data8 + endpoint->sent, n); + /* Prepare for data send */ + + if (ep_num) + UDCCSN(ep_num) = UDCCSR_PC; + + for (i = 0; i < w; i++) + *addr32 = data32[endpoint->sent/4 + i]; + for (i = 0; i < b; i++) + *addr8 = data8[endpoint->sent + w*4 + i]; + + /* Set "Packet Complete" if less data then tx_packetSize */ + if (is_short) + UDCCSN(ep_num) = ep_num ? UDCCSR_SP : UDCCSR0_IPR; + + /* Wait for data sent */ + while (!(UDCCSN(ep_num) & (ep_num ? UDCCSR_PC : UDCCSR0_IPR))) { + if (ep_num) { + if (timeout-- == 0) + return -1; + else + udelay(1); + }; + } + endpoint->last = n; + + if(ep_num) { + usbd_tx_complete(endpoint); + } else { + endpoint->sent += n; + endpoint->last -= n; + } + + if( (endpoint->tx_urb->actual_length - endpoint->sent) <= 0 ) { + urb->actual_length = 0; + endpoint->sent = 0; + endpoint->last = 0; + } + + if ((endpoint->sent >= urb->actual_length) && (!ep_num)) { + usbdbg("ep0 IN stage done"); + if(is_short) + ep0state = EP0_IDLE; + else + ep0state = EP0_XFER_COMPLETE; + } + + return 0; +} + +static int udc_read_urb(struct usb_endpoint_instance *endpoint) +{ + struct urb *urb = endpoint->rcv_urb; + int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; + u32 *addr32 = (u32 *) &UDCDN(ep_num), + *data32 = (u32 *) urb->buffer; + unsigned int i, n, is_short ; + + usbdbg("read urb on ep %d", ep_num); +#if defined(USBDDBG) && defined(USBDPARANOIA) + usbdbg("urb: buf %p, buf_len %d, actual_len %d", + urb->buffer, urb->buffer_length, urb->actual_length); + usbdbg("endpoint: rcv_packetSize %d", + endpoint->rcv_packetSize); +#endif + + if (UDCCSN(ep_num) & UDCCSR_BNE) + n = UDCBCN(ep_num) & 0x3ff; + else /* zlp */ + n = 0; + is_short = n != endpoint->rcv_packetSize; + + usbdbg("n %d%s", n, is_short ? "-s" : ""); + for (i = 0; i < n; i += 4) + data32[urb->actual_length/4 + i/4] = *addr32; + + udc_dump_buffer("urb read", (u8 *) data32, urb->actual_length + n); + + usbd_rcv_complete(endpoint, n, 0); + + return 0; +} + +static int udc_read_urb_ep0(void) +{ + u32 *addr32 = (u32 *) &UDCDN(0), + *data32 = (u32 *) ep0_urb->buffer; + u8 *addr8 = (u8 *) &UDCDN(0), + *data8 = (u8 *) ep0_urb->buffer; + unsigned int i, n, w, b; + + n = UDCBCR0; + w = n / 4; + b = n % 4; + + for (i = 0; i < w; i++) { + data32[ep0_urb->actual_length/4 + i] = *addr32; + ep0_urb->actual_length += 4; + } + + for (i = 0; i < b; i++ ) { + data8[ep0_urb->actual_length + w*4 + i] = *addr8; + ep0_urb->actual_length++; + } + + UDCCSR0 = UDCCSR0_OPC | UDCCSR0_IPR; + if(ep0_urb->actual_length == ep0_urb->device_request.wLength) + return 1; + return 0; +} + +static void udc_handle_ep0(struct usb_endpoint_instance *endpoint) +{ + u32 udccsr0 = UDCCSR0; + u32 *data = (u32 *) &ep0_urb->device_request; + int i; + + usbdbg("udccsr0 %x", udccsr0); + + /* Clear stall status */ + if (udccsr0 & UDCCSR0_SST) { + usberr("clear stall status"); + UDCCSR0 = UDCCSR0_SST; + ep0state = EP0_IDLE; + } + + /* previous request unfinished? non-error iff back-to-back ... */ + if ((udccsr0 & UDCCSR0_SA) != 0 && ep0state != EP0_IDLE) + ep0state = EP0_IDLE; + + switch (ep0state) { + case EP0_IDLE : + + udccsr0 = UDCCSR0; + /* Start control request? */ + if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) + == (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) { + + /* Read SETUP packet. + * SETUP packet size is 8 bytes (aka 2 words) + */ + usbdbg("try reading SETUP packet"); + for (i = 0; i < 2; i++) { + if ((UDCCSR0 & UDCCSR0_RNE) == 0) { + usberr("setup packet too short (%d)", i); + goto stall; + } + data[i] = UDCDR0; + } + UDCCSR0 |= (UDCCSR0_OPC | UDCCSR0_SA); + if ((UDCCSR0 & UDCCSR0_RNE) != 0) { + usberr("setup packet too long"); + goto stall; + } + + udc_dump_buffer("ep0 setup read", (u8 *) data, 8); + + if(ep0_urb->device_request.wLength == 0) { + + usbdbg("Zero Data control Packet\n"); + + if(ep0_recv_setup(ep0_urb)) { + usberr("Invalid Setup Packet\n"); + udc_dump_buffer("ep0 setup read", (u8 *) data, 8); + goto stall; + } + UDCCSR0 = UDCCSR0_IPR; + ep0state = EP0_IDLE; + } + else { + /* Check direction */ + if ((ep0_urb->device_request.bmRequestType + & USB_REQ_DIRECTION_MASK) == USB_REQ_HOST2DEVICE) { + ep0state = EP0_OUT_DATA; + ep0_urb->buffer = (u8 *)ep0_urb->buffer_data; + ep0_urb->buffer_length = sizeof(ep0_urb->buffer_data); + ep0_urb->actual_length = 0; + UDCCSR0 = UDCCSR0_IPR; + } + else { + /* The ep0_recv_setup function has already placed our + * response packet data in ep0_urb->buffer and the + * packet length in ep0_urb->actual_length. + */ + if (ep0_recv_setup(ep0_urb)) { +stall: + usberr("Invalid setup packet"); + udc_dump_buffer("ep0 setup read", (u8 *) data, 8); + ep0state= EP0_IDLE; + UDCCSR0 = UDCCSR0_SA|UDCCSR0_OPC | UDCCSR0_FST | UDCCS0_FTF; + return; + } + + endpoint->tx_urb = ep0_urb; + endpoint->sent = 0; + usbdbg("EP0_IN_DATA"); + ep0state = EP0_IN_DATA; + if(udc_write_urb(endpoint) < 0) + goto stall; + + } + } + return; + } + else if ((udccsr0 & (UDCCSR0_OPC |UDCCSR0_SA)) + == (UDCCSR0_OPC|UDCCSR0_SA)) { + usberr("Setup Active but no data. Stalling ....\n"); + goto stall; + } + else { + usbdbg("random early IRQs"); + /* Some random early IRQs: + * - we acked FST + * - IPR cleared + * - OPC got set, without SA (likely status stage) + */ + UDCCSR0 = udccsr0 & (UDCCSR0_SA | UDCCSR0_OPC); + + } + break; + + case EP0_OUT_DATA : + + if ((udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_SA)) { + if(udc_read_urb_ep0()) { +read_complete: + ep0state = EP0_IDLE; + if (ep0_recv_setup(ep0_urb)) { + /* Not a setup packet, stall next EP0 transaction */ + udc_dump_buffer("ep0 setup read", (u8 *) data, 8); + usberr("can't parse setup packet\n"); + goto stall; + } + } + } + else if(!(udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_IPR)) { + if(ep0_urb->device_request.wLength == ep0_urb->actual_length) + goto read_complete; + usberr("Premature Status\n"); + ep0state = EP0_IDLE; + } + break; + + case EP0_IN_DATA : + /* GET_DESCRIPTOR etc */ + if (udccsr0 & UDCCSR0_OPC) { + UDCCSR0 = UDCCSR0_OPC | UDCCSR0_FTF; + usberr("ep0in premature status"); + ep0state = EP0_IDLE; + } + else { + /* irq was IPR clearing */ + if(udc_write_urb(endpoint) < 0) { + usberr("ep0_write_error\n"); + goto stall; + } + } + break; + + case EP0_XFER_COMPLETE: + UDCCSR0 = UDCCSR0_IPR; + ep0state = EP0_IDLE; + break; + + default: + usbdbg("Default\n"); + } + USIR0 = USIR0_IR0; +} + +static void udc_handle_ep(struct usb_endpoint_instance *endpoint) +{ + int ep_addr = endpoint->endpoint_address; + int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; + int ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; + + u32 flags = UDCCSN(ep_num) & (UDCCSR_SST | UDCCSR_TRN); + if (flags) + UDCCSN(ep_num) = flags; + + if (ep_isout) + udc_read_urb(endpoint); + else + udc_write_urb(endpoint); + + UDCCSN(ep_num) = UDCCSR_PC; +} + +static void udc_state_changed(void) +{ + int config, interface, alternate; + + UDCCR |= UDCCR_SMAC; + + config = (UDCCR & UDCCR_ACN) >> UDCCR_ACN_S; + interface = (UDCCR & UDCCR_AIN) >> UDCCR_AIN_S; + alternate = (UDCCR & UDCCR_AAISN) >> UDCCR_AAISN_S; + + usbdbg("New UDC settings are: conf %d - inter %d - alter %d", + config, interface, alternate); + + usbd_device_event_irq (udc_device, DEVICE_CONFIGURED, 0); + + UDCISR1 = UDCISR1_IRCC; +} + + + +void udc_irq(void) +{ + int handled; + struct usb_endpoint_instance *endpoint; + int ep_num, i; + u32 udcisr0; + + do { + handled = 0; + /* Suspend Interrupt Request */ + if (USIR1 & UDCCR_SUSIR) { + + usbdbg("Suspend\n"); + udc_ack_int_UDCCR(UDCCR_SUSIR); + handled = 1; + ep0state = EP0_IDLE; + } + + /* Resume Interrupt Request */ + if (USIR1 & UDCCR_RESIR) { + udc_ack_int_UDCCR(UDCCR_RESIR); + handled = 1; + usbdbg( "USB resume\n"); + + } + + if (USIR1 & (1<<31) ){ + handled=1; + udc_state_changed(); + } + + /* Reset Interrupt Request */ + if (USIR1 & UDCCR_RSTIR) { + udc_ack_int_UDCCR(UDCCR_RSTIR); + handled = 1; + usbdbg("Reset\n"); + usbd_device_event_irq(udc_device, DEVICE_RESET, 0); + } else { + if(USIR0) + usbdbg("UISR0: %x \n",USIR0); + + if (USIR0 & 0x2) USIR0 = 0x2; + + /* Control traffic */ + if (USIR0 & USIR0_IR0) { + handled = 1; + udc_handle_ep0(udc_device->bus->endpoint_array); + USIR0 = USIR0_IR0; + } + + endpoint = udc_device->bus->endpoint_array; + for (i = 0; i < udc_device->bus->max_endpoints; i++) { + ep_num = (endpoint[i].endpoint_address) & USB_ENDPOINT_NUMBER_MASK; + if (!ep_num) + continue; + udcisr0 = UDCISR0; + if (udcisr0 & UDCISR_INT(ep_num, UDC_INT_PACKETCMP)) { + UDCISR0 = UDCISR_INT(ep_num, UDC_INT_PACKETCMP); + udc_handle_ep(&endpoint[i]); + + } + } + + } + + } while (handled); +} + +/* The UDCCR reg contains mask and interrupt status bits, + * so using '|=' isn't safe as it may ack an interrupt. + */ +#define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ +#define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE) + +static inline void udc_set_mask_UDCCR(int mask) +{ + UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS); +} + +static inline void udc_clear_mask_UDCCR(int mask) +{ + UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS); +} + + +static void pio_irq_enable(int ep_num) +{ + if (ep_num < 16) + UDCICR0 |= 3 << (ep_num * 2); + else { + ep_num -= 16; + UDCICR1 |= 3 << (ep_num * 2); + } +} + +/* + * udc_set_nak + * + * Allow upper layers to signal lower layers should not accept more RX data + */ +void udc_set_nak(int ep_num) +{ + /* TODO */ +} + +/* + * udc_unset_nak + * + * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint. + * Switch off NAKing on this endpoint to accept more data output from host. + */ +void udc_unset_nak(int ep_num) +{ + /* TODO */ +} + +int udc_endpoint_write(struct usb_endpoint_instance *endpoint) +{ + return udc_write_urb(endpoint); +} + +/* Associate a physical endpoint with endpoint instance */ +void udc_setup_ep(struct usb_device_instance *device, unsigned int id, struct usb_endpoint_instance *endpoint) +{ + int ep_num, ep_addr, ep_isout, ep_type, ep_size; + int config, interface, alternate; + u32 tmp; + + usbdbg("setting up endpoint id %d", id); + + if (!endpoint) { + usberr("endpoint void!"); + return; + } + + ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; + if (ep_num >= UDC_MAX_ENDPOINTS) { + usberr("unable to setup ep %d!",ep_num); + return; + } + + pio_irq_enable(ep_num); + if (ep_num == 0) { + /* Done for ep0 */ + return; + } + + config = 1; + interface = 0; + alternate = 0; + + usbdbg("config %d - interface %d - alternate %d", + config, interface, alternate); + + ep_addr = endpoint->endpoint_address; + ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; + ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; + ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes; + ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize; + + usbdbg("addr %x, num %d, dir %s, type %s, packet size %d", + ep_addr, ep_num, + ep_isout ? "out" : "in", + ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" : + ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" : + ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???", + ep_size + ); + + /* Configure UDCCRx */ + tmp = 0; + tmp |= (config << UDCCONR_CN_S) & UDCCONR_CN; + tmp |= (interface << UDCCONR_IN_S) & UDCCONR_IN; + tmp |= (alternate << UDCCONR_AISN_S) & UDCCONR_AISN; + tmp |= (ep_num << UDCCONR_EN_S) & UDCCONR_EN; + tmp |= (ep_type << UDCCONR_ET_S) & UDCCONR_ET; + tmp |= ep_isout ? 0 : UDCCONR_ED; + tmp |= (ep_size << UDCCONR_MPS_S ) & UDCCONR_MPS; + tmp |= /* UDCCONR_DE | */ UDCCONR_EE; + + UDCCN(ep_num) = tmp; + + usbdbg("UDCCR%c = %x", 'A' + ep_num-1, UDCCN(ep_num)); + usbdbg("UDCCSR%c = %x", 'A' + ep_num-1, UDCCSN(ep_num)); +} + + + +#define CONFIG_USB_DEV_PULLUP_GPIO 87 + +/* Connect the USB device to the bus */ +void udc_connect(void) +{ + usbdbg("UDC connect"); + + /* Turn on the USB connection by enabling the pullup resistor */ + set_GPIO_mode(CONFIG_USB_DEV_PULLUP_GPIO | GPIO_OUT); + GPSR(CONFIG_USB_DEV_PULLUP_GPIO) = GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO); +} + +/* Disconnect the USB device to the bus */ +void udc_disconnect(void) +{ + usbdbg("UDC disconnect"); + + /* Turn off the USB connection by disabling the pullup resistor */ + GPCR(CONFIG_USB_DEV_PULLUP_GPIO) = GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO); +} + +/* Switch on the UDC */ +void udc_enable(struct usb_device_instance *device) +{ + + ep0state = EP0_IDLE; + CKEN |= CKEN11_USB; + + /* enable endpoint 0, A, B's Packet Complete Interrupt. */ + UDCICR0 = 0x0000003f; + UDCICR1 = 0xa8000000; + + /* clear the interrupt status/control registers */ + UDCISR0 = 0xffffffff; + UDCISR1 = 0xffffffff; + + /* set UDC-enable */ + udc_set_mask_UDCCR( UDCCR_UDE); + + udc_device = device; + if (!ep0_urb) + ep0_urb = usbd_alloc_urb(udc_device,udc_device->bus->endpoint_array); + else + usbinfo("ep0_urb %p already allocated", ep0_urb); + + usbdbg("UDC Enabled\n"); +} + +/* Need to check this again */ +void udc_disable(void) +{ + usbdbg("disable UDC"); + + udc_clear_mask_UDCCR(UDCCR_UDE); + + /* Disable clock for USB device */ + CKEN &= ~CKEN11_USB; + + /* Free ep0 URB */ + if (ep0_urb) { + usbd_dealloc_urb(ep0_urb); + ep0_urb = NULL; + } + + /* Reset device pointer */ + udc_device = NULL; +} + +/* Allow udc code to do any additional startup */ +void udc_startup_events(struct usb_device_instance *device) +{ + /* The DEVICE_INIT event puts the USB device in the state STATE_INIT */ + usbd_device_event_irq(device, DEVICE_INIT, 0); + + /* The DEVICE_CREATE event puts the USB device in the state + * STATE_ATTACHED */ + usbd_device_event_irq(device, DEVICE_CREATE, 0); + + /* Some USB controller driver implementations signal + * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here. + * DEVICE_HUB_CONFIGURED causes a transition to the state STATE_POWERED, + * and DEVICE_RESET causes a transition to the state STATE_DEFAULT. + */ + udc_enable(device); +} + +/* Initialize h/w stuff */ +int udc_init(void) +{ + udc_device = NULL; + usbdbg("PXA27x usbd start"); + + /* Disable the UDC */ + udc_clear_mask_UDCCR(UDCCR_UDE); + + /* Disable clock for USB device */ + CKEN &= ~CKEN11_USB; + + /* Disable IRQs: we don't use them */ + UDCICR0 = UDCICR1 = 0; + + return 0; +} diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index e014568..7aeac1e 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -596,56 +596,68 @@ typedef void (*ExcpHndlr) (void) ; /* * USB Device Controller */ -#ifndef CONFIG_CPU_MONAHANS -#define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */ -#define UDC_RES2 __REG(0x40600008) /* UDC Undocumented - Reserved2 */ -#define UDC_RES3 __REG(0x4060000C) /* UDC Undocumented - Reserved3 */ - -#define UDCCR __REG(0x40600000) /* UDC Control Register */ -#define UDCCR_UDE (1 << 0) /* UDC enable */ -#define UDCCR_UDA (1 << 1) /* UDC active */ -#define UDCCR_RSM (1 << 2) /* Device resume */ -#define UDCCR_RESIR (1 << 3) /* Resume interrupt request */ -#define UDCCR_SUSIR (1 << 4) /* Suspend interrupt request */ -#define UDCCR_SRM (1 << 5) /* Suspend/resume interrupt mask */ -#define UDCCR_RSTIR (1 << 6) /* Reset interrupt request */ -#define UDCCR_REM (1 << 7) /* Reset interrupt mask */ - -#define UDCCS0 __REG(0x40600010) /* UDC Endpoint 0 Control/Status Register */ -#define UDCCS0_OPR (1 << 0) /* OUT packet ready */ -#define UDCCS0_IPR (1 << 1) /* IN packet ready */ -#define UDCCS0_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS0_DRWF (1 << 3) /* Device remote wakeup feature */ -#define UDCCS0_SST (1 << 4) /* Sent stall */ -#define UDCCS0_FST (1 << 5) /* Force stall */ -#define UDCCS0_RNE (1 << 6) /* Receive FIFO no empty */ -#define UDCCS0_SA (1 << 7) /* Setup active */ +#ifdef CONFIG_PXA27X + +#define UDCCR __REG(0x40600000) /* UDC Control Register */ +#define UDCCR_UDE (1 << 0) /* UDC enable */ +#define UDCCR_UDA (1 << 1) /* UDC active */ +#define UDCCR_RSM (1 << 2) /* Device resume */ +#define UDCCR_EMCE (1 << 3) /* Endpoint Memory Configuration Error */ +#define UDCCR_SMAC (1 << 4) /* Switch Endpoint Memory to Active Configuration */ +#define UDCCR_RESIR (1 << 29) /* Resume interrupt request */ +#define UDCCR_SUSIR (1 << 28) /* Suspend interrupt request */ +#define UDCCR_SM (1 << 28) /* Suspend interrupt mask */ +#define UDCCR_RSTIR (1 << 27) /* Reset interrupt request */ +#define UDCCR_REM (1 << 27) /* Reset interrupt mask */ +#define UDCCR_RM (1 << 29) /* resume interrupt mask */ +#define UDCCR_SRM UDCCR_SM|UDCCR_RM +#define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ +#define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation Protocol Port Support */ +#define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol Support */ +#define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol Enable */ +#define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */ +#define UDCCR_ACN (0x03 << 11) /* Active UDC configuration Number */ +#define UDCCR_ACN_S 11 +#define UDCCR_AIN (0x07 << 8) /* Active UDC interface Number */ +#define UDCCR_AIN_S 8 +#define UDCCR_AAISN (0x07 << 5) /* Active UDC Alternate Interface Setting Number */ +#define UDCCR_AAISN_S 5 + +#define UDCCS0 __REG(0x40600100) /* UDC Endpoint 0 Control/Status Register */ +#define UDCCS0_OPR (1 << 0) /* OUT packet ready */ +#define UDCCS0_IPR (1 << 1) /* IN packet ready */ +#define UDCCS0_FTF (1 << 2) /* Flush Tx FIFO */ +#define UDCCS0_DRWF (1 << 16) /* Device remote wakeup feature */ +#define UDCCS0_SST (1 << 4) /* Sent stall */ +#define UDCCS0_FST (1 << 5) /* Force stall */ +#define UDCCS0_RNE (1 << 6) /* Receive FIFO no empty */ +#define UDCCS0_SA (1 << 7) /* Setup active */ /* Bulk IN - Endpoint 1,6,11 */ -#define UDCCS1 __REG(0x40600014) /* UDC Endpoint 1 (IN) Control/Status Register */ -#define UDCCS6 __REG(0x40600028) /* UDC Endpoint 6 (IN) Control/Status Register */ -#define UDCCS11 __REG(0x4060003C) /* UDC Endpoint 11 (IN) Control/Status Register */ - -#define UDCCS_BI_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_BI_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_BI_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS_BI_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_BI_SST (1 << 4) /* Sent stall */ -#define UDCCS_BI_FST (1 << 5) /* Force stall */ -#define UDCCS_BI_TSP (1 << 7) /* Transmit short packet */ +#define UDCCS1 __REG(0x40600104) /* UDC Endpoint 1 (IN) Control/Status Register */ +#define UDCCS6 __REG(0x40600028) /* UDC Endpoint 6 (IN) Control/Status Register */ +#define UDCCS11 __REG(0x4060003C) /* UDC Endpoint 11 (IN) Control/Status Register */ + +#define UDCCS_BI_TFS (1 << 0) /* Transmit FIFO service */ +#define UDCCS_BI_TPC (1 << 1) /* Transmit packet complete */ +#define UDCCS_BI_FTF (1 << 8) /* Flush Tx FIFO */ +#define UDCCS_BI_TUR (1 << 3) /* Transmit FIFO underrun */ +#define UDCCS_BI_SST (1 << 4) /* Sent stall */ +#define UDCCS_BI_FST (1 << 5) /* Force stall */ +#define UDCCS_BI_TSP (1 << 7) /* Transmit short packet */ /* Bulk OUT - Endpoint 2,7,12 */ -#define UDCCS2 __REG(0x40600018) /* UDC Endpoint 2 (OUT) Control/Status Register */ -#define UDCCS7 __REG(0x4060002C) /* UDC Endpoint 7 (OUT) Control/Status Register */ -#define UDCCS12 __REG(0x40600040) /* UDC Endpoint 12 (OUT) Control/Status Register */ - -#define UDCCS_BO_RFS (1 << 0) /* Receive FIFO service */ -#define UDCCS_BO_RPC (1 << 1) /* Receive packet complete */ -#define UDCCS_BO_DME (1 << 3) /* DMA enable */ -#define UDCCS_BO_SST (1 << 4) /* Sent stall */ -#define UDCCS_BO_FST (1 << 5) /* Force stall */ -#define UDCCS_BO_RNE (1 << 6) /* Receive FIFO not empty */ -#define UDCCS_BO_RSP (1 << 7) /* Receive short packet */ +#define UDCCS2 __REG(0x40600108) /* UDC Endpoint 2 (OUT) Control/Status Register */ +#define UDCCS7 __REG(0x4060002C) /* UDC Endpoint 7 (OUT) Control/Status Register */ +#define UDCCS12 __REG(0x40600040) /* UDC Endpoint 12 (OUT) Control/Status Register */ + +#define UDCCS_BO_RFS (1 << 0) /* Receive FIFO service */ +#define UDCCS_BO_RPC (1 << 1) /* Receive packet complete */ +#define UDCCS_BO_DME (1 << 3) /* DMA enable */ +#define UDCCS_BO_SST (1 << 4) /* Sent stall */ +#define UDCCS_BO_FST (1 << 5) /* Force stall */ +#define UDCCS_BO_RNE (1 << 6) /* Receive FIFO not empty */ +#define UDCCS_BO_RSP (1 << 7) /* Receive short packet */ /* Isochronous IN - Endpoint 3,8,13 */ #define UDCCS3 __REG(0x4060001C) /* UDC Endpoint 3 (IN) Control/Status Register */ @@ -684,16 +696,16 @@ typedef void (*ExcpHndlr) (void) ; #define UDCCS_INT_TSP (1 << 7) /* Transmit short packet */ #define UFNRH __REG(0x40600060) /* UDC Frame Number Register High */ -#define UFNRL __REG(0x40600064) /* UDC Frame Number Register Low */ -#define UBCR2 __REG(0x40600068) /* UDC Byte Count Reg 2 */ +#define UFNRL __REG(0x40600014) /* UDC Frame Number Register Low */ +#define UBCR2 __REG(0x40600208) /* UDC Byte Count Reg 2 */ #define UBCR4 __REG(0x4060006c) /* UDC Byte Count Reg 4 */ #define UBCR7 __REG(0x40600070) /* UDC Byte Count Reg 7 */ #define UBCR9 __REG(0x40600074) /* UDC Byte Count Reg 9 */ #define UBCR12 __REG(0x40600078) /* UDC Byte Count Reg 12 */ #define UBCR14 __REG(0x4060007c) /* UDC Byte Count Reg 14 */ -#define UDDR0 __REG(0x40600080) /* UDC Endpoint 0 Data Register */ -#define UDDR1 __REG(0x40600100) /* UDC Endpoint 1 Data Register */ -#define UDDR2 __REG(0x40600180) /* UDC Endpoint 2 Data Register */ +#define UDDR0 __REG(0x40600300) /* UDC Endpoint 0 Data Register */ +#define UDDR1 __REG(0x40600304) /* UDC Endpoint 1 Data Register */ +#define UDDR2 __REG(0x40600308) /* UDC Endpoint 2 Data Register */ #define UDDR3 __REG(0x40600200) /* UDC Endpoint 3 Data Register */ #define UDDR4 __REG(0x40600400) /* UDC Endpoint 4 Data Register */ #define UDDR5 __REG(0x406000A0) /* UDC Endpoint 5 Data Register */ @@ -708,7 +720,7 @@ typedef void (*ExcpHndlr) (void) ; #define UDDR14 __REG(0x40600E00) /* UDC Endpoint 14 Data Register */ #define UDDR15 __REG(0x406000E0) /* UDC Endpoint 15 Data Register */ -#define UICR0 __REG(0x40600050) /* UDC Interrupt Control Register 0 */ +#define UICR0 __REG(0x40600004) /* UDC Interrupt Control Register 0 */ #define UICR0_IM0 (1 << 0) /* Interrupt mask ep 0 */ #define UICR0_IM1 (1 << 1) /* Interrupt mask ep 1 */ @@ -719,7 +731,7 @@ typedef void (*ExcpHndlr) (void) ; #define UICR0_IM6 (1 << 6) /* Interrupt mask ep 6 */ #define UICR0_IM7 (1 << 7) /* Interrupt mask ep 7 */ -#define UICR1 __REG(0x40600054) /* UDC Interrupt Control Register 1 */ +#define UICR1 __REG(0x40600008) /* UDC Interrupt Control Register 1 */ #define UICR1_IM8 (1 << 0) /* Interrupt mask ep 8 */ #define UICR1_IM9 (1 << 1) /* Interrupt mask ep 9 */ @@ -730,18 +742,18 @@ typedef void (*ExcpHndlr) (void) ; #define UICR1_IM14 (1 << 6) /* Interrupt mask ep 14 */ #define UICR1_IM15 (1 << 7) /* Interrupt mask ep 15 */ -#define USIR0 __REG(0x40600058) /* UDC Status Interrupt Register 0 */ +#define USIR0 __REG(0x4060000C) /* UDC Status Interrupt Register 0 */ #define USIR0_IR0 (1 << 0) /* Interrup request ep 0 */ -#define USIR0_IR1 (1 << 1) /* Interrup request ep 1 */ -#define USIR0_IR2 (1 << 2) /* Interrup request ep 2 */ +#define USIR0_IR1 (1 << 2) /* Interrup request ep 1 */ +#define USIR0_IR2 (1 << 4) /* Interrup request ep 2 */ #define USIR0_IR3 (1 << 3) /* Interrup request ep 3 */ #define USIR0_IR4 (1 << 4) /* Interrup request ep 4 */ #define USIR0_IR5 (1 << 5) /* Interrup request ep 5 */ #define USIR0_IR6 (1 << 6) /* Interrup request ep 6 */ #define USIR0_IR7 (1 << 7) /* Interrup request ep 7 */ -#define USIR1 __REG(0x4060005C) /* UDC Status Interrupt Register 1 */ +#define USIR1 __REG(0x40600010) /* UDC Status Interrupt Register 1 */ #define USIR1_IR8 (1 << 0) /* Interrup request ep 8 */ #define USIR1_IR9 (1 << 1) /* Interrup request ep 9 */ @@ -751,23 +763,204 @@ typedef void (*ExcpHndlr) (void) ; #define USIR1_IR13 (1 << 5) /* Interrup request ep 13 */ #define USIR1_IR14 (1 << 6) /* Interrup request ep 14 */ #define USIR1_IR15 (1 << 7) /* Interrup request ep 15 */ -#endif /* ! CONFIG_CPU_MONAHANS */ -#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) -/* - * USB Client Controller (incomplete) - */ -#define UDCCR __REG(0x40600000) -#define UDCICR0 __REG(0x40600004) -#define UDCCIR0 __REG(0x40600008) -#define UDCISR0 __REG(0x4060000c) -#define UDCSIR1 __REG(0x40600010) -#define UDCFNR __REG(0x40600014) -#define UDCOTGICR __REG(0x40600018) -#define UDCOTGISR __REG(0x4060001c) -#define UP2OCR __REG(0x40600020) -#define UP3OCR __REG(0x40600024) +#define UDCICR0 __REG(0x40600004) /* UDC Interrupt Control Register0 */ +#define UDCICR1 __REG(0x40600008) /* UDC Interrupt Control Register1 */ +#define UDCICR_FIFOERR (1 << 1) /* FIFO Error interrupt for EP */ +#define UDCICR_PKTCOMPL (1 << 0) /* Packet Complete interrupt for EP */ + +#define UDCICR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) +#define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */ +#define UDCICR1_IESOF (1 << 30) /* IntEn - Start of Frame */ +#define UDCICR1_IERU (1 << 29) /* IntEn - Resume */ +#define UDCICR1_IESU (1 << 28) /* IntEn - Suspend */ +#define UDCICR1_IERS (1 << 27) /* IntEn - Reset */ + +#define UDCISR0 __REG(0x4060000C) /* UDC Interrupt Status Register 0 */ +#define UDCISR1 __REG(0x40600010) /* UDC Interrupt Status Register 1 */ +#define UDCISR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) +#define UDCISR1_IRCC (1 << 31) /* IntEn - Configuration Change */ +#define UDCISR1_IRSOF (1 << 30) /* IntEn - Start of Frame */ +#define UDCISR1_IRRU (1 << 29) /* IntEn - Resume */ +#define UDCISR1_IRSU (1 << 28) /* IntEn - Suspend */ +#define UDCISR1_IRRS (1 << 27) /* IntEn - Reset */ + + +#define UDCFNR __REG(0x40600014) /* UDC Frame Number Register */ +#define UDCOTGICR __REG(0x40600018) /* UDC On-The-Go interrupt control */ +#define UDCOTGICR_IESF (1 << 24) /* OTG SET_FEATURE command recvd */ +#define UDCOTGICR_IEXR (1 << 17) /* Extra Transciever Interrupt Rising Edge Interrupt Enable */ +#define UDCOTGICR_IEXF (1 << 16) /* Extra Transciever Interrupt Falling Edge Interrupt Enable */ +#define UDCOTGICR_IEVV40R (1 << 9) /* OTG Vbus Valid 4.0V Rising Edge Interrupt Enable */ +#define UDCOTGICR_IEVV40F (1 << 8) /* OTG Vbus Valid 4.0V Falling Edge Interrupt Enable */ +#define UDCOTGICR_IEVV44R (1 << 7) /* OTG Vbus Valid 4.4V Rising Edge Interrupt Enable */ +#define UDCOTGICR_IEVV44F (1 << 6) /* OTG Vbus Valid 4.4V Falling Edge Interrupt Enable */ +#define UDCOTGICR_IESVR (1 << 5) /* OTG Session Valid Rising Edge Interrupt Enable */ +#define UDCOTGICR_IESVF (1 << 4) /* OTG Session Valid Falling Edge Interrupt Enable */ +#define UDCOTGICR_IESDR (1 << 3) /* OTG A-Device SRP Detect Rising Edge Interrupt Enable */ +#define UDCOTGICR_IESDF (1 << 2) /* OTG A-Device SRP Detect Falling Edge Interrupt Enable */ +#define UDCOTGICR_IEIDR (1 << 1) /* OTG ID Change Rising Edge Interrupt Enable */ +#define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge Interrupt Enable */ + +#define UDCCSN(x) __REG2(0x40600100, (x) << 2) +#define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ + +#define UDCCSR0_SA (1 << 7) /* Setup Active */ +#define UDCCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */ +#define UDCCSR0_FST (1 << 5) /* Force Stall */ +#define UDCCSR0_SST (1 << 4) /* Sent Stall */ +#define UDCCSR0_DME (1 << 3) /* DMA Enable */ +#define UDCCSR0_FTF (1 << 2) /* Flush Transmit FIFO */ +#define UDCCSR0_IPR (1 << 1) /* IN Packet Ready */ +#define UDCCSR0_OPC (1 << 0) /* OUT Packet Complete */ + +#define UDCCSRA __REG(0x40600104) /* UDC Control/Status register - Endpoint A */ +#define UDCCSRB __REG(0x40600108) /* UDC Control/Status register - Endpoint B */ +#define UDCCSRC __REG(0x4060010C) /* UDC Control/Status register - Endpoint C */ +#define UDCCSRD __REG(0x40600110) /* UDC Control/Status register - Endpoint D */ +#define UDCCSRE __REG(0x40600114) /* UDC Control/Status register - Endpoint E */ +#define UDCCSRF __REG(0x40600118) /* UDC Control/Status register - Endpoint F */ +#define UDCCSRG __REG(0x4060011C) /* UDC Control/Status register - Endpoint G */ +#define UDCCSRH __REG(0x40600120) /* UDC Control/Status register - Endpoint H */ +#define UDCCSRI __REG(0x40600124) /* UDC Control/Status register - Endpoint I */ +#define UDCCSRJ __REG(0x40600128) /* UDC Control/Status register - Endpoint J */ +#define UDCCSRK __REG(0x4060012C) /* UDC Control/Status register - Endpoint K */ +#define UDCCSRL __REG(0x40600130) /* UDC Control/Status register - Endpoint L */ +#define UDCCSRM __REG(0x40600134) /* UDC Control/Status register - Endpoint M */ +#define UDCCSRN __REG(0x40600138) /* UDC Control/Status register - Endpoint N */ +#define UDCCSRP __REG(0x4060013C) /* UDC Control/Status register - Endpoint P */ +#define UDCCSRQ __REG(0x40600140) /* UDC Control/Status register - Endpoint Q */ +#define UDCCSRR __REG(0x40600144) /* UDC Control/Status register - Endpoint R */ +#define UDCCSRS __REG(0x40600148) /* UDC Control/Status register - Endpoint S */ +#define UDCCSRT __REG(0x4060014C) /* UDC Control/Status register - Endpoint T */ +#define UDCCSRU __REG(0x40600150) /* UDC Control/Status register - Endpoint U */ +#define UDCCSRV __REG(0x40600154) /* UDC Control/Status register - Endpoint V */ +#define UDCCSRW __REG(0x40600158) /* UDC Control/Status register - Endpoint W */ +#define UDCCSRX __REG(0x4060015C) /* UDC Control/Status register - Endpoint X */ + +#define UDCCSR_DPE (1 << 9) /* Data Packet Error */ +#define UDCCSR_FEF (1 << 8) /* Flush Endpoint FIFO */ +#define UDCCSR_SP (1 << 7) /* Short Packet Control/Status */ +#define UDCCSR_BNE (1 << 6) /* Buffer Not Empty (IN endpoints) */ +#define UDCCSR_BNF (1 << 6) /* Buffer Not Full (OUT endpoints) */ +#define UDCCSR_FST (1 << 5) /* Force STALL */ +#define UDCCSR_SST (1 << 4) /* Sent STALL */ +#define UDCCSR_DME (1 << 3) /* DMA Enable */ +#define UDCCSR_TRN (1 << 2) /* Tx/Rx NAK */ +#define UDCCSR_PC (1 << 1) /* Packet Complete */ +#define UDCCSR_FS (1 << 0) /* FIFO needs service */ + +#define UDCBCN(x) __REG2(0x40600200, (x)<<2) +#define UDCBCR0 __REG(0x40600200) /* Byte Count Register - EP0 */ +#define UDCBCRA __REG(0x40600204) /* Byte Count Register - EPA */ +#define UDCBCRB __REG(0x40600208) /* Byte Count Register - EPB */ +#define UDCBCRC __REG(0x4060020C) /* Byte Count Register - EPC */ +#define UDCBCRD __REG(0x40600210) /* Byte Count Register - EPD */ +#define UDCBCRE __REG(0x40600214) /* Byte Count Register - EPE */ +#define UDCBCRF __REG(0x40600218) /* Byte Count Register - EPF */ +#define UDCBCRG __REG(0x4060021C) /* Byte Count Register - EPG */ +#define UDCBCRH __REG(0x40600220) /* Byte Count Register - EPH */ +#define UDCBCRI __REG(0x40600224) /* Byte Count Register - EPI */ +#define UDCBCRJ __REG(0x40600228) /* Byte Count Register - EPJ */ +#define UDCBCRK __REG(0x4060022C) /* Byte Count Register - EPK */ +#define UDCBCRL __REG(0x40600230) /* Byte Count Register - EPL */ +#define UDCBCRM __REG(0x40600234) /* Byte Count Register - EPM */ +#define UDCBCRN __REG(0x40600238) /* Byte Count Register - EPN */ +#define UDCBCRP __REG(0x4060023C) /* Byte Count Register - EPP */ +#define UDCBCRQ __REG(0x40600240) /* Byte Count Register - EPQ */ +#define UDCBCRR __REG(0x40600244) /* Byte Count Register - EPR */ +#define UDCBCRS __REG(0x40600248) /* Byte Count Register - EPS */ +#define UDCBCRT __REG(0x4060024C) /* Byte Count Register - EPT */ +#define UDCBCRU __REG(0x40600250) /* Byte Count Register - EPU */ +#define UDCBCRV __REG(0x40600254) /* Byte Count Register - EPV */ +#define UDCBCRW __REG(0x40600258) /* Byte Count Register - EPW */ +#define UDCBCRX __REG(0x4060025C) /* Byte Count Register - EPX */ + +#define UDCDN(x) __REG2(0x40600300, (x)<<2) +#define PHYS_UDCDN(x) (0x40600300 + ((x)<<2)) +#define PUDCDN(x) (volatile u32 *)(io_p2v(PHYS_UDCDN((x)))) +#define UDCDR0 __REG(0x40600300) /* Data Register - EP0 */ +#define UDCDRA __REG(0x40600304) /* Data Register - EPA */ +#define UDCDRB __REG(0x40600308) /* Data Register - EPB */ +#define UDCDRC __REG(0x4060030C) /* Data Register - EPC */ +#define UDCDRD __REG(0x40600310) /* Data Register - EPD */ +#define UDCDRE __REG(0x40600314) /* Data Register - EPE */ +#define UDCDRF __REG(0x40600318) /* Data Register - EPF */ +#define UDCDRG __REG(0x4060031C) /* Data Register - EPG */ +#define UDCDRH __REG(0x40600320) /* Data Register - EPH */ +#define UDCDRI __REG(0x40600324) /* Data Register - EPI */ +#define UDCDRJ __REG(0x40600328) /* Data Register - EPJ */ +#define UDCDRK __REG(0x4060032C) /* Data Register - EPK */ +#define UDCDRL __REG(0x40600330) /* Data Register - EPL */ +#define UDCDRM __REG(0x40600334) /* Data Register - EPM */ +#define UDCDRN __REG(0x40600338) /* Data Register - EPN */ +#define UDCDRP __REG(0x4060033C) /* Data Register - EPP */ +#define UDCDRQ __REG(0x40600340) /* Data Register - EPQ */ +#define UDCDRR __REG(0x40600344) /* Data Register - EPR */ +#define UDCDRS __REG(0x40600348) /* Data Register - EPS */ +#define UDCDRT __REG(0x4060034C) /* Data Register - EPT */ +#define UDCDRU __REG(0x40600350) /* Data Register - EPU */ +#define UDCDRV __REG(0x40600354) /* Data Register - EPV */ +#define UDCDRW __REG(0x40600358) /* Data Register - EPW */ +#define UDCDRX __REG(0x4060035C) /* Data Register - EPX */ + +#define UDCCN(x) __REG2(0x40600400, (x)<<2) +#define UDCCRA __REG(0x40600404) /* Configuration register EPA */ +#define UDCCRB __REG(0x40600408) /* Configuration register EPB */ +#define UDCCRC __REG(0x4060040C) /* Configuration register EPC */ +#define UDCCRD __REG(0x40600410) /* Configuration register EPD */ +#define UDCCRE __REG(0x40600414) /* Configuration register EPE */ +#define UDCCRF __REG(0x40600418) /* Configuration register EPF */ +#define UDCCRG __REG(0x4060041C) /* Configuration register EPG */ +#define UDCCRH __REG(0x40600420) /* Configuration register EPH */ +#define UDCCRI __REG(0x40600424) /* Configuration register EPI */ +#define UDCCRJ __REG(0x40600428) /* Configuration register EPJ */ +#define UDCCRK __REG(0x4060042C) /* Configuration register EPK */ +#define UDCCRL __REG(0x40600430) /* Configuration register EPL */ +#define UDCCRM __REG(0x40600434) /* Configuration register EPM */ +#define UDCCRN __REG(0x40600438) /* Configuration register EPN */ +#define UDCCRP __REG(0x4060043C) /* Configuration register EPP */ +#define UDCCRQ __REG(0x40600440) /* Configuration register EPQ */ +#define UDCCRR __REG(0x40600444) /* Configuration register EPR */ +#define UDCCRS __REG(0x40600448) /* Configuration register EPS */ +#define UDCCRT __REG(0x4060044C) /* Configuration register EPT */ +#define UDCCRU __REG(0x40600450) /* Configuration register EPU */ +#define UDCCRV __REG(0x40600454) /* Configuration register EPV */ +#define UDCCRW __REG(0x40600458) /* Configuration register EPW */ +#define UDCCRX __REG(0x4060045C) /* Configuration register EPX */ + +#define UDCCONR_CN (0x03 << 25) /* Configuration Number */ +#define UDCCONR_CN_S (25) +#define UDCCONR_IN (0x07 << 22) /* Interface Number */ +#define UDCCONR_IN_S (22) +#define UDCCONR_AISN (0x07 << 19) /* Alternate Interface Number */ +#define UDCCONR_AISN_S (19) +#define UDCCONR_EN (0x0f << 15) /* Endpoint Number */ +#define UDCCONR_EN_S (15) +#define UDCCONR_ET (0x03 << 13) /* Endpoint Type: */ +#define UDCCONR_ET_S (13) +#define UDCCONR_ET_INT (0x03 << 13) /* Interrupt */ +#define UDCCONR_ET_BULK (0x02 << 13) /* Bulk */ +#define UDCCONR_ET_ISO (0x01 << 13) /* Isochronous */ +#define UDCCONR_ET_NU (0x00 << 13) /* Not used */ +#define UDCCONR_ED (1 << 12) /* Endpoint Direction */ +#define UDCCONR_MPS (0x3ff << 2) /* Maximum Packet Size */ +#define UDCCONR_MPS_S (2) +#define UDCCONR_DE (1 << 1) /* Double Buffering Enable */ +#define UDCCONR_EE (1 << 0) /* Endpoint Enable */ + + +#define UDC_INT_FIFOERROR (0x2) +#define UDC_INT_PACKETCMP (0x1) +#define UDC_FNR_MASK (0x7ff) +#define UDCCSR_WR_MASK (UDCCSR_DME|UDCCSR_FST) +#define UDC_BCR_MASK (0x3ff) + + +#endif /* CONFIG_PXA27X */ + +#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) /* * USB Host Controller diff --git a/include/usbdcore_pxa27x.h b/include/usbdcore_pxa27x.h new file mode 100644 index 0000000..81bf3fb --- /dev/null +++ b/include/usbdcore_pxa27x.h @@ -0,0 +1,68 @@ +/* + * PXA27x register declarations and HCD data structures + * + * Copyright (C) 2007 Rodolfo Giometti <giometti(a)linux.it> + * Copyright (C) 2007 Eurotech S.p.A. <info(a)eurotech.it> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#ifndef __USBDCORE_PXA270X_H__ +#define __USBDCORE_PXA270X_H__ + +#include <asm/byteorder.h> + +/* Endpoint 0 states */ +#define EP0_IDLE 0 +#define EP0_IN_DATA 1 +#define EP0_OUT_DATA 2 +#define EP0_XFER_COMPLETE 3 + + +/* Endpoint parameters */ +#define MAX_ENDPOINTS 4 +#define EP_MAX_PACKET_SIZE 64 + +#define EP0_MAX_PACKET_SIZE 16 +#define UDC_OUT_ENDPOINT 0x02 +#define UDC_OUT_PACKET_SIZE EP_MAX_PACKET_SIZE +#define UDC_IN_ENDPOINT 0x01 +#define UDC_IN_PACKET_SIZE EP_MAX_PACKET_SIZE +#define UDC_INT_ENDPOINT 0x05 +#define UDC_INT_PACKET_SIZE EP_MAX_PACKET_SIZE +#define UDC_BULK_PACKET_SIZE EP_MAX_PACKET_SIZE + +void udc_irq (void); +/* Flow control */ +void udc_set_nak(int epid); +void udc_unset_nak (int epid); + +/* Higher level functions for abstracting away from specific device */ +int udc_endpoint_write(struct usb_endpoint_instance *endpoint); + +int udc_init (void); + +void udc_enable(struct usb_device_instance *device); +void udc_disable(void); + +void udc_connect(void); +void udc_disconnect(void); + +void udc_startup_events(struct usb_device_instance *device); +void udc_setup_ep(struct usb_device_instance *device, unsigned int ep, struct usb_endpoint_instance *endpoint); + +#endif -- 1.5.6.3

5 10

[U-Boot] Xilinx LL-TEMAC driver
by monstr＠monstr.eu 06 Apr '09

06 Apr '09

Hi Ben and Wolfgang, first patch just sort labels in drivers/net/Makefile I think this patch could be applied directly to Wolfgang tree. The second patch is Xilinx LL Temac driver. This driver was sent to mailing list some month ago by Yoshio Kashiwagi. I clean the driver and add support for Fifo mode. This driver is tested on some Microblaze boards. There is one part which should be rework in future. (FIXME comment) It is about PHY lib which we discussed in past. I believe that this part won't be a problem. Thanks for your comments, Michal

5 17

[U-Boot] [PATCH 1/2] i.MX31: Use do_div for some calculations.
by Magnus Lilja 04 Apr '09

04 Apr '09

Use do_div in TICK_TO_TIME in order to get the code through the compiler when CONFIG_MX31_CLK32 is 32768. Signed-off-by: Magnus Lilja <lilja.magnus(a)gmail.com> --- This is a quick patch to get the i.MX31 PDK patch to compile. If someone has a better solution to this problem please submit a patch that can replace this one. cpu/arm1136/mx31/interrupts.c | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/cpu/arm1136/mx31/interrupts.c b/cpu/arm1136/mx31/interrupts.c index b36c58c..31ad4a5 100644 --- a/cpu/arm1136/mx31/interrupts.c +++ b/cpu/arm1136/mx31/interrupts.c @@ -22,6 +22,7 @@ */ #include <common.h> +#include <div64.h> #include <asm/arch/mx31-regs.h> #define TIMER_BASE 0x53f90000 /* General purpose timer 1 */ @@ -49,7 +50,13 @@ /* ~2% error */ #define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ) #define US_PER_TICK (1000000 / CONFIG_MX31_CLK32) -#define TICK_TO_TIME(t) ((t) / TICK_PER_TIME) +static inline ulong TICK_TO_TIME(unsigned long long t) +{ + unsigned long long res = t; + + do_div(res, TICK_PER_TIME); + return res; +} #define TIME_TO_TICK(t) ((unsigned long long)(t) * TICK_PER_TIME) #define US_TO_TICK(t) (((t) + US_PER_TICK - 1) / US_PER_TICK) #endif -- 1.5.2.4

2 3

[U-Boot] [PATCH 1/1 V3] cmd_bdinfo: move implementation to arch instead of common
by Jean-Christophe PLAGNIOL-VILLARD 03 Apr '09

03 Apr '09

introduce two new weak functions board_bdinfo and cpu_bdinfo to allow board and cpu to print more information Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> Cc: Haavard Skinnemoen <haavard.skinnemoen(a)atmel.com> Cc: Mike Frysinger <vapier(a)gentoo.org> --- rebase for-next Precedent version Ack-by: Mike Frysinger <vapier(a)gentoo.org> Ack-by: Haavard Skinnemoen <haavard.skinnemoen(a)atmel.com> common/cmd_bdinfo.c | 455 ++++++++--------------------------------------- include/bdinfo.h | 48 +++++ lib_arm/Makefile | 1 + lib_arm/bdinfo.c | 53 ++++++ lib_avr32/Makefile | 1 + lib_avr32/bdinfo.c | 47 +++++ lib_blackfin/Makefile | 1 + lib_blackfin/bdinfo.c | 55 ++++++ lib_i386/Makefile | 1 + lib_i386/bdinfo.c | 47 +++++ lib_m68k/Makefile | 1 + lib_m68k/bdinfo.c | 75 ++++++++ lib_microblaze/Makefile | 1 + lib_microblaze/bdinfo.c | 51 ++++++ lib_mips/Makefile | 1 + lib_mips/bdinfo.c | 47 +++++ lib_nios/Makefile | 1 + lib_nios/bdinfo.c | 46 +++++ lib_nios2/Makefile | 1 + lib_nios2/bdinfo.c | 54 ++++++ lib_ppc/Makefile | 1 + lib_ppc/bdinfo.c | 107 +++++++++++ lib_sh/Makefile | 1 + lib_sh/bdinfo.c | 47 +++++ lib_sparc/Makefile | 13 +- lib_sparc/bdinfo.c | 61 +++++++ 26 files changed, 829 insertions(+), 388 deletions(-) rewrite common/cmd_bdinfo.c (88%) create mode 100644 include/bdinfo.h create mode 100644 lib_arm/bdinfo.c create mode 100644 lib_avr32/bdinfo.c create mode 100644 lib_blackfin/bdinfo.c create mode 100644 lib_i386/bdinfo.c create mode 100644 lib_m68k/bdinfo.c create mode 100644 lib_microblaze/bdinfo.c create mode 100644 lib_mips/bdinfo.c create mode 100644 lib_nios/bdinfo.c create mode 100644 lib_nios2/bdinfo.c create mode 100644 lib_ppc/bdinfo.c create mode 100644 lib_sh/bdinfo.c create mode 100644 lib_sparc/bdinfo.c diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c dissimilarity index 88% index 700314b..75e5e83 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -1,384 +1,71 @@ -/* - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Boot support - */ -#include <common.h> -#include <command.h> - -DECLARE_GLOBAL_DATA_PTR; - -static void print_num(const char *, ulong); - -static void print_eth(int idx); - -#ifndef CONFIG_ARM /* PowerPC and other */ -static void print_lnum(const char *, u64); - -#ifdef CONFIG_PPC -static void print_str(const char *, const char *); - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - bd_t *bd = gd->bd; - char buf[32]; - -#ifdef DEBUG - print_num ("bd address", (ulong)bd ); -#endif - print_num ("memstart", bd->bi_memstart ); - print_lnum ("memsize", bd->bi_memsize ); - print_num ("flashstart", bd->bi_flashstart ); - print_num ("flashsize", bd->bi_flashsize ); - print_num ("flashoffset", bd->bi_flashoffset ); - print_num ("sramstart", bd->bi_sramstart ); - print_num ("sramsize", bd->bi_sramsize ); -#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \ - defined(CONFIG_8260) || defined(CONFIG_E500) - print_num ("immr_base", bd->bi_immr_base ); -#endif - print_num ("bootflags", bd->bi_bootflags ); -#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \ - defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \ - defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ - defined(CONFIG_440SP) || defined(CONFIG_440SPE) - print_str ("procfreq", strmhz(buf, bd->bi_procfreq)); - print_str ("plb_busfreq", strmhz(buf, bd->bi_plb_busfreq)); -#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \ - defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE) || \ - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) - print_str ("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq)); -#endif -#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ -#if defined(CONFIG_CPM2) - print_str ("vco", strmhz(buf, bd->bi_vco)); - print_str ("sccfreq", strmhz(buf, bd->bi_sccfreq)); - print_str ("brgfreq", strmhz(buf, bd->bi_brgfreq)); -#endif - print_str ("intfreq", strmhz(buf, bd->bi_intfreq)); -#if defined(CONFIG_CPM2) - print_str ("cpmfreq", strmhz(buf, bd->bi_cpmfreq)); -#endif - print_str ("busfreq", strmhz(buf, bd->bi_busfreq)); -#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ -#if defined(CONFIG_MPC8220) - print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq)); - print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq)); - print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq)); - print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq)); - print_str ("pevfreq", strmhz(buf, bd->bi_pevfreq)); -#endif - - print_eth(0); -#if defined(CONFIG_HAS_ETH1) - print_eth(1); -#endif -#if defined(CONFIG_HAS_ETH2) - print_eth(2); -#endif -#if defined(CONFIG_HAS_ETH3) - print_eth(3); -#endif -#if defined(CONFIG_HAS_ETH4) - print_eth(4); -#endif -#if defined(CONFIG_HAS_ETH5) - print_eth(5); -#endif - -#ifdef CONFIG_HERMES - print_str ("ethspeed", strmhz(buf, bd->bi_ethspeed)); -#endif - printf ("IP addr = %pI4\n", &bd->bi_ip_addr); - printf ("baudrate = %6ld bps\n", bd->bi_baudrate ); - return 0; -} - -#elif defined(CONFIG_NIOS) /* NIOS*/ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - bd_t *bd = gd->bd; - - print_num ("memstart", (ulong)bd->bi_memstart); - print_lnum ("memsize", (u64)bd->bi_memsize); - print_num ("flashstart", (ulong)bd->bi_flashstart); - print_num ("flashsize", (ulong)bd->bi_flashsize); - print_num ("flashoffset", (ulong)bd->bi_flashoffset); - - print_eth(0); - printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); - printf ("baudrate = %ld bps\n", bd->bi_baudrate); - - return 0; -} - -#elif defined(CONFIG_NIOS2) /* Nios-II */ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - bd_t *bd = gd->bd; - - print_num ("mem start", (ulong)bd->bi_memstart); - print_lnum ("mem size", (u64)bd->bi_memsize); - print_num ("flash start", (ulong)bd->bi_flashstart); - print_num ("flash size", (ulong)bd->bi_flashsize); - print_num ("flash offset", (ulong)bd->bi_flashoffset); - -#if defined(CONFIG_SYS_SRAM_BASE) - print_num ("sram start", (ulong)bd->bi_sramstart); - print_num ("sram size", (ulong)bd->bi_sramsize); -#endif - -#if defined(CONFIG_CMD_NET) - print_eth(0); - printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); -#endif - - printf ("baudrate = %ld bps\n", bd->bi_baudrate); - - return 0; -} -#elif defined(CONFIG_MICROBLAZE) /* ! PPC, which leaves Microblaze */ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - bd_t *bd = gd->bd; - print_num ("mem start ", (ulong)bd->bi_memstart); - print_lnum ("mem size ", (u64)bd->bi_memsize); - print_num ("flash start ", (ulong)bd->bi_flashstart); - print_num ("flash size ", (ulong)bd->bi_flashsize); - print_num ("flash offset ", (ulong)bd->bi_flashoffset); -#if defined(CONFIG_SYS_SRAM_BASE) - print_num ("sram start ", (ulong)bd->bi_sramstart); - print_num ("sram size ", (ulong)bd->bi_sramsize); -#endif -#if defined(CONFIG_CMD_NET) - print_eth(0); - printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); -#endif - printf ("baudrate = %ld bps\n", (ulong)bd->bi_baudrate); - return 0; -} - -#elif defined(CONFIG_SPARC) /* SPARC */ -int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -{ - bd_t *bd = gd->bd; - -#ifdef DEBUG - print_num("bd address ", (ulong) bd); -#endif - print_num("memstart ", bd->bi_memstart); - print_lnum("memsize ", bd->bi_memsize); - print_num("flashstart ", bd->bi_flashstart); - print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE); - print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR); - printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%lx (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE, - CONFIG_SYS_MONITOR_LEN); - printf("CONFIG_SYS_MALLOC_BASE = 0x%lx (%d)\n", CONFIG_SYS_MALLOC_BASE, - CONFIG_SYS_MALLOC_LEN); - printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_INIT_SP_OFFSET, - CONFIG_SYS_STACK_SIZE); - printf("CONFIG_SYS_PROM_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_PROM_OFFSET, - CONFIG_SYS_PROM_SIZE); - printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET, - CONFIG_SYS_GBL_DATA_SIZE); - -#if defined(CONFIG_CMD_NET) - print_eth(0); - printf("ip_addr = %pI4\n", &bd->bi_ip_addr); -#endif - printf("baudrate = %6ld bps\n", bd->bi_baudrate); - return 0; -} - -#elif defined(CONFIG_M68K) /* M68K */ -static void print_str(const char *, const char *); - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - bd_t *bd = gd->bd; - char buf[32]; - - print_num ("memstart", (ulong)bd->bi_memstart); - print_lnum ("memsize", (u64)bd->bi_memsize); - print_num ("flashstart", (ulong)bd->bi_flashstart); - print_num ("flashsize", (ulong)bd->bi_flashsize); - print_num ("flashoffset", (ulong)bd->bi_flashoffset); -#if defined(CONFIG_SYS_INIT_RAM_ADDR) - print_num ("sramstart", (ulong)bd->bi_sramstart); - print_num ("sramsize", (ulong)bd->bi_sramsize); -#endif -#if defined(CONFIG_SYS_MBAR) - print_num ("mbar", bd->bi_mbar_base); -#endif - print_str ("cpufreq", strmhz(buf, bd->bi_intfreq)); - print_str ("busfreq", strmhz(buf, bd->bi_busfreq)); -#ifdef CONFIG_PCI - print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq)); -#endif -#ifdef CONFIG_EXTRA_CLOCK - print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq)); - print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq)); - print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq)); -#endif -#if defined(CONFIG_CMD_NET) - print_eth(0); -#if defined(CONFIG_HAS_ETH1) - print_eth(1); -#endif -#if defined(CONFIG_HAS_ETH2) - print_eth(2); -#endif -#if defined(CONFIG_HAS_ETH3) - print_eth(3); -#endif - - printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); -#endif - printf ("baudrate = %ld bps\n", bd->bi_baudrate); - - return 0; -} - -#elif defined(CONFIG_BLACKFIN) -static void print_str(const char *, const char *); - -int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - bd_t *bd = gd->bd; - char buf[32]; - - printf("U-Boot = %s\n", bd->bi_r_version); - printf("CPU = %s\n", bd->bi_cpu); - printf("Board = %s\n", bd->bi_board_name); - print_str("VCO", strmhz(buf, bd->bi_vco)); - print_str("CCLK", strmhz(buf, bd->bi_cclk)); - print_str("SCLK", strmhz(buf, bd->bi_sclk)); - - print_num("boot_params", (ulong)bd->bi_boot_params); - print_num("memstart", (ulong)bd->bi_memstart); - print_lnum("memsize", (u64)bd->bi_memsize); - print_num("flashstart", (ulong)bd->bi_flashstart); - print_num("flashsize", (ulong)bd->bi_flashsize); - print_num("flashoffset", (ulong)bd->bi_flashoffset); - - print_eth(0); - printf("ip_addr = %pI4\n", &bd->bi_ip_addr); - printf("baudrate = %d bps\n", bd->bi_baudrate); - - return 0; -} - -#else /* ! PPC, which leaves MIPS */ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - bd_t *bd = gd->bd; - - print_num ("boot_params", (ulong)bd->bi_boot_params); - print_num ("memstart", (ulong)bd->bi_memstart); - print_lnum ("memsize", (u64)bd->bi_memsize); - print_num ("flashstart", (ulong)bd->bi_flashstart); - print_num ("flashsize", (ulong)bd->bi_flashsize); - print_num ("flashoffset", (ulong)bd->bi_flashoffset); - - print_eth(0); - printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); - printf ("baudrate = %d bps\n", bd->bi_baudrate); - - return 0; -} -#endif /* MIPS */ - -#else /* ARM */ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - int i; - bd_t *bd = gd->bd; - - print_num ("arch_number", bd->bi_arch_number); - print_num ("env_t", (ulong)bd->bi_env); - print_num ("boot_params", (ulong)bd->bi_boot_params); - - for (i=0; i<CONFIG_NR_DRAM_BANKS; ++i) { - print_num("DRAM bank", i); - print_num("-> start", bd->bi_dram[i].start); - print_num("-> size", bd->bi_dram[i].size); - } - -#if defined(CONFIG_CMD_NET) - print_eth(0); - printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); -#endif - printf ("baudrate = %d bps\n", bd->bi_baudrate); - - return 0; -} - -#endif /* CONFIG_ARM XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ - -static void print_num(const char *name, ulong value) -{ - printf ("%-12s= 0x%08lX\n", name, value); -} - -static void print_eth(int idx) -{ - char name[10], *val; - if (idx) - sprintf(name, "eth%iaddr", idx); - else - strcpy(name, "ethaddr"); - val = getenv(name); - if (!val) - val = "(not set)"; - printf("%-12s= %s\n", name, val); -} - -#ifndef CONFIG_ARM -static void print_lnum(const char *name, u64 value) -{ - printf ("%-12s= 0x%.8llX\n", name, value); -} -#endif - -#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_BLACKFIN) -static void print_str(const char *name, const char *str) -{ - printf ("%-12s= %6s MHz\n", name, str); -} -#endif /* CONFIG_PPC */ - - -/* -------------------------------------------------------------------- */ - -U_BOOT_CMD( - bdinfo, 1, 1, do_bdinfo, - "print Board Info structure", - NULL -); +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +void board_bdinfo(cmd_tbl_t *, int, int, char **) __attribute__((weak)); +void cpu_bdinfo(cmd_tbl_t *, int, int, char **) __attribute__((weak)); + +int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + /* call arch bdinfo */ + arch_bdinfo(cmdtp, flag, argc, argv); + + /* call soc bdinfo */ + if(cpu_bdinfo) { + printf("CPU Info\n"); + cpu_bdinfo(cmdtp, flag, argc, argv); + } + + /* call board bdinfo */ + if(board_bdinfo) { + printf("Board Info\n"); + board_bdinfo(cmdtp, flag, argc, argv); + } + + return 0; +} + +void print_eth(int idx) +{ + char name[10], *val; + if (idx) + sprintf(name, "eth%iaddr", idx); + else + strcpy(name, "ethaddr"); + val = getenv(name); + if (!val) + val = "(not set)"; + printf("%-12s= %s\n", name, val); +} + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "print Board Info structure", + NULL +); diff --git a/include/bdinfo.h b/include/bdinfo.h new file mode 100644 index 0000000..5d56bec --- /dev/null +++ b/include/bdinfo.h @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2008 + * Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _BDINFO_H_ +#define _BDINFO_H_ + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char **argv); +void board_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char **argv); +void cpu_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char **argv); + +static inline void print_num(const char *name, ulong value) +{ + printf ("%-12s= 0x%08lX\n", name, value); +} + +static inline void print_lnum(const char *name, u64 value) +{ + printf ("%-12s= 0x%.8llX\n", name, value); +} + +static inline void print_str(const char *name, const char *str) +{ + printf ("%-12s= %6s MHz\n", name, str); +} + +void print_eth(int idx); + +#endif /* _BDINFO_H_ */ diff --git a/lib_arm/Makefile b/lib_arm/Makefile index c8795b2..3ca7c74 100644 --- a/lib_arm/Makefile +++ b/lib_arm/Makefile @@ -32,6 +32,7 @@ SOBJS-y += _modsi3.o SOBJS-y += _udivsi3.o SOBJS-y += _umodsi3.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o diff --git a/lib_arm/bdinfo.c b/lib_arm/bdinfo.c new file mode 100644 index 0000000..0e5084b --- /dev/null +++ b/lib_arm/bdinfo.c @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + + print_num ("arch_number", bd->bi_arch_number); + print_num ("env_t", (ulong)bd->bi_env); + print_num ("boot_params", (ulong)bd->bi_boot_params); + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { + print_num("DRAM bank", i); + print_num("-> start", bd->bi_dram[i].start); + print_num("-> size", bd->bi_dram[i].size); + } + +#if defined(CONFIG_CMD_NET) + print_eth(0); + printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); +#endif + printf ("baudrate = %d bps\n", bd->bi_baudrate); +} diff --git a/lib_avr32/Makefile b/lib_avr32/Makefile index 37b8051..b014721 100644 --- a/lib_avr32/Makefile +++ b/lib_avr32/Makefile @@ -29,6 +29,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += memset.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += interrupts.o diff --git a/lib_avr32/bdinfo.c b/lib_avr32/bdinfo.c new file mode 100644 index 0000000..616481d --- /dev/null +++ b/lib_avr32/bdinfo.c @@ -0,0 +1,47 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; + + print_num ("boot_params", (ulong)bd->bi_boot_params); + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); + + print_eth(0); + printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); + printf ("baudrate = %d bps\n", bd->bi_baudrate); +} diff --git a/lib_blackfin/Makefile b/lib_blackfin/Makefile index 46ef7f3..44b9660 100644 --- a/lib_blackfin/Makefile +++ b/lib_blackfin/Makefile @@ -36,6 +36,7 @@ SOBJS-y += memcpy.o SOBJS-y += memmove.o SOBJS-y += memset.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += boot.o COBJS-y += cache.o diff --git a/lib_blackfin/bdinfo.c b/lib_blackfin/bdinfo.c new file mode 100644 index 0000000..1b1aaa5 --- /dev/null +++ b/lib_blackfin/bdinfo.c @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; + char buf[32]; + + printf("U-Boot = %s\n", bd->bi_r_version); + printf("CPU = %s\n", bd->bi_cpu); + printf("Board = %s\n", bd->bi_board_name); + print_str("VCO", strmhz(buf, bd->bi_vco)); + print_str("CCLK", strmhz(buf, bd->bi_cclk)); + print_str("SCLK", strmhz(buf, bd->bi_sclk)); + + print_num("boot_params", (ulong)bd->bi_boot_params); + print_num("memstart", (ulong)bd->bi_memstart); + print_lnum("memsize", (u64)bd->bi_memsize); + print_num("flashstart", (ulong)bd->bi_flashstart); + print_num("flashsize", (ulong)bd->bi_flashsize); + print_num("flashoffset", (ulong)bd->bi_flashoffset); + + print_eth(0); + printf("ip_addr = %pI4\n", &bd->bi_ip_addr); + printf("baudrate = %d bps\n", bd->bi_baudrate); +} diff --git a/lib_i386/Makefile b/lib_i386/Makefile index 4fbcd08..7ed130e 100644 --- a/lib_i386/Makefile +++ b/lib_i386/Makefile @@ -29,6 +29,7 @@ SOBJS-y += bios.o SOBJS-y += bios_pci.o SOBJS-y += realmode_switch.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += bios_setup.o COBJS-y += board.o COBJS-y += bootm.o diff --git a/lib_i386/bdinfo.c b/lib_i386/bdinfo.c new file mode 100644 index 0000000..616481d --- /dev/null +++ b/lib_i386/bdinfo.c @@ -0,0 +1,47 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; + + print_num ("boot_params", (ulong)bd->bi_boot_params); + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); + + print_eth(0); + printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); + printf ("baudrate = %d bps\n", bd->bi_baudrate); +} diff --git a/lib_m68k/Makefile b/lib_m68k/Makefile index 6db35ed..d261d7e 100644 --- a/lib_m68k/Makefile +++ b/lib_m68k/Makefile @@ -27,6 +27,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o diff --git a/lib_m68k/bdinfo.c b/lib_m68k/bdinfo.c new file mode 100644 index 0000000..e77a1cf --- /dev/null +++ b/lib_m68k/bdinfo.c @@ -0,0 +1,75 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; + char buf[32]; + + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); +#if defined(CONFIG_SYS_INIT_RAM_ADDR) + print_num ("sramstart", (ulong)bd->bi_sramstart); + print_num ("sramsize", (ulong)bd->bi_sramsize); +#endif +#if defined(CONFIG_SYS_MBAR) + print_num ("mbar", bd->bi_mbar_base); +#endif + print_str ("cpufreq", strmhz(buf, bd->bi_intfreq)); + print_str ("busfreq", strmhz(buf, bd->bi_busfreq)); +#ifdef CONFIG_PCI + print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq)); +#endif +#ifdef CONFIG_EXTRA_CLOCK + print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq)); + print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq)); + print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq)); +#endif +#if defined(CONFIG_CMD_NET) + print_eth(0); +#if defined(CONFIG_HAS_ETH1) + print_eth(1); +#endif +#if defined(CONFIG_HAS_ETH2) + print_eth(2); +#endif +#if defined(CONFIG_HAS_ETH3) + print_eth(3); +#endif + + printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); +#endif + printf ("baudrate = %ld bps\n", bd->bi_baudrate); +} diff --git a/lib_microblaze/Makefile b/lib_microblaze/Makefile index 9b0f296..821d1cf 100644 --- a/lib_microblaze/Makefile +++ b/lib_microblaze/Makefile @@ -27,6 +27,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o diff --git a/lib_microblaze/bdinfo.c b/lib_microblaze/bdinfo.c new file mode 100644 index 0000000..eba2f4d --- /dev/null +++ b/lib_microblaze/bdinfo.c @@ -0,0 +1,51 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; + + print_num ("mem start ", (ulong)bd->bi_memstart); + print_lnum ("mem size ", (u64)bd->bi_memsize); + print_num ("flash start ", (ulong)bd->bi_flashstart); + print_num ("flash size ", (ulong)bd->bi_flashsize); + print_num ("flash offset ", (ulong)bd->bi_flashoffset); +#if defined(CONFIG_SYS_SRAM_BASE) + print_num ("sram start ", (ulong)bd->bi_sramstart); + print_num ("sram size ", (ulong)bd->bi_sramsize); +#endif +#if defined(CONFIG_CMD_NET) + print_eth(0); + printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); +#endif + printf ("baudrate = %ld bps\n", (ulong)bd->bi_baudrate); +} diff --git a/lib_mips/Makefile b/lib_mips/Makefile index 7967e58..a42219c 100644 --- a/lib_mips/Makefile +++ b/lib_mips/Makefile @@ -27,6 +27,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o ifeq ($(CONFIG_QEMU_MIPS),y) COBJS-y += bootm_qemu_mips.o diff --git a/lib_mips/bdinfo.c b/lib_mips/bdinfo.c new file mode 100644 index 0000000..616481d --- /dev/null +++ b/lib_mips/bdinfo.c @@ -0,0 +1,47 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; + + print_num ("boot_params", (ulong)bd->bi_boot_params); + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); + + print_eth(0); + printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); + printf ("baudrate = %d bps\n", bd->bi_baudrate); +} diff --git a/lib_nios/Makefile b/lib_nios/Makefile index f66e989..f50605c 100644 --- a/lib_nios/Makefile +++ b/lib_nios/Makefile @@ -27,6 +27,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o diff --git a/lib_nios/bdinfo.c b/lib_nios/bdinfo.c new file mode 100644 index 0000000..6e42c24 --- /dev/null +++ b/lib_nios/bdinfo.c @@ -0,0 +1,46 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; + + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); + + print_eth(0); + printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); + printf ("baudrate = %ld bps\n", bd->bi_baudrate); +} diff --git a/lib_nios2/Makefile b/lib_nios2/Makefile index b69bc38..f5a7bbe 100644 --- a/lib_nios2/Makefile +++ b/lib_nios2/Makefile @@ -27,6 +27,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += cache.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += divmod.o diff --git a/lib_nios2/bdinfo.c b/lib_nios2/bdinfo.c new file mode 100644 index 0000000..5b39fb1 --- /dev/null +++ b/lib_nios2/bdinfo.c @@ -0,0 +1,54 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; + + print_num ("mem start", (ulong)bd->bi_memstart); + print_lnum ("mem size", (u64)bd->bi_memsize); + print_num ("flash start", (ulong)bd->bi_flashstart); + print_num ("flash size", (ulong)bd->bi_flashsize); + print_num ("flash offset", (ulong)bd->bi_flashoffset); + +#if defined(CONFIG_SYS_SRAM_BASE) + print_num ("sram start", (ulong)bd->bi_sramstart); + print_num ("sram size", (ulong)bd->bi_sramsize); +#endif + +#if defined(CONFIG_CMD_NET) + print_eth(0); + printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); +#endif + + printf ("baudrate = %ld bps\n", bd->bi_baudrate); +} diff --git a/lib_ppc/Makefile b/lib_ppc/Makefile index 60ea0c9..865cfc0 100644 --- a/lib_ppc/Makefile +++ b/lib_ppc/Makefile @@ -30,6 +30,7 @@ SOBJS-y += ppcstring.o SOBJS-y += ticks.o COBJS-y += bat_rw.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o diff --git a/lib_ppc/bdinfo.c b/lib_ppc/bdinfo.c new file mode 100644 index 0000000..5aad37c --- /dev/null +++ b/lib_ppc/bdinfo.c @@ -0,0 +1,107 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; + char buf[32]; + +#ifdef DEBUG + print_num ("bd address", (ulong)bd ); +#endif + print_num ("memstart", bd->bi_memstart ); + print_lnum ("memsize", bd->bi_memsize ); + print_num ("flashstart", bd->bi_flashstart ); + print_num ("flashsize", bd->bi_flashsize ); + print_num ("flashoffset", bd->bi_flashoffset ); + print_num ("sramstart", bd->bi_sramstart ); + print_num ("sramsize", bd->bi_sramsize ); +#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \ + defined(CONFIG_8260) || defined(CONFIG_E500) + print_num ("immr_base", bd->bi_immr_base ); +#endif + print_num ("bootflags", bd->bi_bootflags ); +#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \ + defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \ + defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ + defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) + print_str ("procfreq", strmhz(buf, bd->bi_procfreq)); + print_str ("plb_busfreq", strmhz(buf, bd->bi_plb_busfreq)); +#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \ + defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE) || \ + defined(CONFIG_440EPX) || defined(CONFIG_440GRX) + print_str ("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq)); +#endif +#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ +#if defined(CONFIG_CPM2) + print_str ("vco", strmhz(buf, bd->bi_vco)); + print_str ("sccfreq", strmhz(buf, bd->bi_sccfreq)); + print_str ("brgfreq", strmhz(buf, bd->bi_brgfreq)); +#endif + print_str ("intfreq", strmhz(buf, bd->bi_intfreq)); +#if defined(CONFIG_CPM2) + print_str ("cpmfreq", strmhz(buf, bd->bi_cpmfreq)); +#endif + print_str ("busfreq", strmhz(buf, bd->bi_busfreq)); +#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ +#if defined(CONFIG_MPC8220) + print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq)); + print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq)); + print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq)); + print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq)); + print_str ("pevfreq", strmhz(buf, bd->bi_pevfreq)); +#endif + + print_eth(0); +#if defined(CONFIG_HAS_ETH1) + print_eth(1); +#endif +#if defined(CONFIG_HAS_ETH2) + print_eth(2); +#endif +#if defined(CONFIG_HAS_ETH3) + print_eth(3); +#endif +#if defined(CONFIG_HAS_ETH4) + print_eth(4); +#endif +#if defined(CONFIG_HAS_ETH5) + print_eth(5); +#endif + +#ifdef CONFIG_HERMES + print_str ("ethspeed", strmhz(buf, bd->bi_ethspeed)); +#endif + printf ("IP addr = %pI4\n", &bd->bi_ip_addr); + printf ("baudrate = %6ld bps\n", bd->bi_baudrate ); +} diff --git a/lib_sh/Makefile b/lib_sh/Makefile index f7c6479..e7ff16d 100644 --- a/lib_sh/Makefile +++ b/lib_sh/Makefile @@ -24,6 +24,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o ifeq ($(CONFIG_SH2),y) diff --git a/lib_sh/bdinfo.c b/lib_sh/bdinfo.c new file mode 100644 index 0000000..616481d --- /dev/null +++ b/lib_sh/bdinfo.c @@ -0,0 +1,47 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; + + print_num ("boot_params", (ulong)bd->bi_boot_params); + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); + + print_eth(0); + printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); + printf ("baudrate = %d bps\n", bd->bi_baudrate); +} diff --git a/lib_sparc/Makefile b/lib_sparc/Makefile index 040ca10..0952bd9 100644 --- a/lib_sparc/Makefile +++ b/lib_sparc/Makefile @@ -25,12 +25,17 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(ARCH).a -SOBJS = +SOBJS-y += -COBJS = board.o cache.o interrupts.o time.o bootm.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o +COBJS-y += board.o +COBJS-y += cache.o +COBJS-y += interrupts.o +COBJS-y += time.o +COBJS-y += bootm.o -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) $(LIB): $(obj).depend $(OBJS) $(AR) $(ARFLAGS) $@ $(OBJS) diff --git a/lib_sparc/bdinfo.c b/lib_sparc/bdinfo.c new file mode 100644 index 0000000..fdd4d11 --- /dev/null +++ b/lib_sparc/bdinfo.c @@ -0,0 +1,61 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <bdinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; + +#ifdef DEBUG + print_num("bd address ", (ulong) bd); +#endif + print_num("memstart ", bd->bi_memstart); + print_lnum("memsize ", bd->bi_memsize); + print_num("flashstart ", bd->bi_flashstart); + print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE); + print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR); + printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%lx (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE, + CONFIG_SYS_MONITOR_LEN); + printf("CONFIG_SYS_MALLOC_BASE = 0x%lx (%d)\n", CONFIG_SYS_MALLOC_BASE, + CONFIG_SYS_MALLOC_LEN); + printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_INIT_SP_OFFSET, + CONFIG_SYS_STACK_SIZE); + printf("CONFIG_SYS_PROM_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_PROM_OFFSET, + CONFIG_SYS_PROM_SIZE); + printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET, + CONFIG_SYS_GBL_DATA_SIZE); + +#if defined(CONFIG_CMD_NET) + print_eth(0); + printf("ip_addr = %pI4\n", &bd->bi_ip_addr); +#endif + printf("baudrate = %6ld bps\n", bd->bi_baudrate); +} -- 1.5.6.5

5 10

[U-Boot] [PATCH] mflash: Initial mflash support
by unsik Kim 03 Apr '09

03 Apr '09

Mflash is fusion memory device mainly targeted consumer eletronic and mobile phone. Internally, it have nand flash and other hardware logics and supports some different operation (ATA, IO, XIP) modes. IO mode is custom mode for the host that doesn't have IDE interface. (Many mobile targeted SoC doesn't have IDE bus) This driver support mflash IO mode. Followings are brief descriptions about IO mode. 1. IO mode based on ATA protocol and uses some custom command. (read confirm, write confirm) 2. IO mode uses SRAM bus interface. Signed-off-by: unsik Kim <donari75(a)gmail.com> --- This is all-in-one mflash patch. (Whole series of patches were squashed and rebased.) Please, use this if you forgot <49A210AC.3080605(a)gmail.com>. --- common/Makefile | 2 + common/cmd_mgdisk.c | 76 ++++++ common/cmd_nvedit.c | 8 +- common/env_mgdisk.c | 92 +++++++ disk/part.c | 8 +- disk/part_amiga.c | 5 +- disk/part_dos.c | 1 + disk/part_efi.c | 1 + disk/part_iso.c | 1 + disk/part_mac.c | 1 + doc/README.mflash | 94 +++++++ drivers/block/Makefile | 5 +- drivers/block/mg_disk.c | 582 +++++++++++++++++++++++++++++++++++++++++++ drivers/block/mg_disk_prv.h | 145 +++++++++++ fs/fat/fat.c | 2 + include/config_cmd_all.h | 1 + include/environment.h | 12 + include/mg_disk.h | 51 ++++ include/part.h | 1 + 19 files changed, 1080 insertions(+), 8 deletions(-) create mode 100644 common/cmd_mgdisk.c create mode 100644 common/env_mgdisk.c create mode 100644 doc/README.mflash create mode 100644 drivers/block/mg_disk.c create mode 100644 drivers/block/mg_disk_prv.h create mode 100644 include/mg_disk.h diff --git a/common/Makefile b/common/Makefile index f13cd11..72e8b7d 100644 --- a/common/Makefile +++ b/common/Makefile @@ -53,6 +53,7 @@ COBJS-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o COBJS-y += env_embedded.o COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o +COBJS-$(CONFIG_ENV_IS_IN_MG_DISK) += env_mgdisk.o COBJS-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o COBJS-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o @@ -104,6 +105,7 @@ COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o COBJS-$(CONFIG_ID_EEPROM) += cmd_mac.o COBJS-$(CONFIG_CMD_MEMORY) += cmd_mem.o COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o +COBJS-$(CONFIG_CMD_MG_DISK) += cmd_mgdisk.o COBJS-$(CONFIG_MII) += miiphyutil.o COBJS-$(CONFIG_CMD_MII) += miiphyutil.o COBJS-$(CONFIG_CMD_MII) += cmd_mii.o diff --git a/common/cmd_mgdisk.c b/common/cmd_mgdisk.c new file mode 100644 index 0000000..48323d4 --- /dev/null +++ b/common/cmd_mgdisk.c @@ -0,0 +1,76 @@ +/* + * (C) Copyright 2009 mGine co. + * unsik Kim <donari75(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> + +#if defined (CONFIG_CMD_MG_DISK) + +#include <mg_disk.h> + +int do_mg_disk_cmd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + u32 from, to, size; + + switch (argc) { + case 2: + if (!strcmp(argv[1], "init")) + mg_disk_init(); + else + return 1; + break; + case 5: + from = simple_strtoul(argv[2], NULL, 0); + to = simple_strtoul(argv[3], NULL, 0); + size = simple_strtoul(argv[4], NULL, 0); + + if (!strcmp(argv[1], "read")) + mg_disk_read(from, (u8 *)to, size); + else if (!strcmp(argv[1], "write")) + mg_disk_write(to, (u8 *)from, size); + else if (!strcmp(argv[1], "readsec")) + mg_disk_read_sects((void *)to, from, size); + else if (!strcmp(argv[1], "writesec")) + mg_disk_write_sects((void *)from, to, size); + else + return 1; + break; + default: + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + return 0; +} + +U_BOOT_CMD( + mgd, 5, 0, do_mg_disk_cmd, + "mgd - mgine m[g]flash command\n", + ": mgine mflash IO mode (disk) command\n" + " - initialize : mgd init\n" + " - random read : mgd read [from] [to] [size]\n" + " - random write : mgd write [from] [to] [size]\n" + " - sector read : mgd readsec [sector] [to] [counts]\n" + " - sector write : mgd writesec [from] [sector] [counts]\n" +); + +#endif diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 68c673e..8198688 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -52,15 +52,17 @@ DECLARE_GLOBAL_DATA_PTR; -#if !defined(CONFIG_ENV_IS_IN_NVRAM) && \ - !defined(CONFIG_ENV_IS_IN_EEPROM) && \ +#if !defined(CONFIG_ENV_IS_IN_EEPROM) && \ !defined(CONFIG_ENV_IS_IN_FLASH) && \ !defined(CONFIG_ENV_IS_IN_DATAFLASH) && \ + !defined(CONFIG_ENV_IS_IN_MG_DISK) && \ !defined(CONFIG_ENV_IS_IN_NAND) && \ + !defined(CONFIG_ENV_IS_IN_NVRAM) && \ !defined(CONFIG_ENV_IS_IN_ONENAND) && \ !defined(CONFIG_ENV_IS_IN_SPI_FLASH) && \ !defined(CONFIG_ENV_IS_NOWHERE) -# error Define one of CONFIG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|SPI_FLASH|NOWHERE} +# error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|ONENAND|\ +SPI_FLASH|MG_DISK|NVRAM|NOWHERE} #endif #define XMK_STR(x) #x diff --git a/common/env_mgdisk.c b/common/env_mgdisk.c new file mode 100644 index 0000000..363ee68 --- /dev/null +++ b/common/env_mgdisk.c @@ -0,0 +1,92 @@ +/* + * (C) Copyright 2009 mGine co. + * unsik Kim <donari75(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <environment.h> +#include <linux/stddef.h> +#include <mg_disk.h> + +/* references to names in env_common.c */ +extern uchar default_environment[]; +extern int default_environment_size; + +char * env_name_spec = "MG_DISK"; + +env_t *env_ptr = 0; + +DECLARE_GLOBAL_DATA_PTR; + +uchar env_get_char_spec(int index) +{ + return (*((uchar *) (gd->env_addr + index))); +} + +void env_relocate_spec(void) +{ + unsigned int err; + + err = mg_disk_init(); + if (err) { + puts ("*** Warning - mg_disk_init error"); + goto OUT; + } + err = mg_disk_read(CONFIG_ENV_ADDR, (u_char *)env_ptr, CONFIG_ENV_SIZE); + if (err) { + puts ("*** Warning - mg_disk_read error"); + goto OUT; + } + + if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc) { + puts ("*** Warning - CRC error"); + goto OUT; + } + + return; + +OUT: + printf (", using default environment\n\n"); + set_default_env(); +} + +int saveenv(void) +{ + unsigned int err; + + env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE); + err = mg_disk_write(CONFIG_ENV_ADDR, (u_char *)env_ptr, + CONFIG_ENV_SIZE); + if (err) + puts ("*** Warning - mg_disk_write error\n\n"); + + return err; +} + +int env_init(void) +{ + /* use default */ + gd->env_addr = (ulong) & default_environment[0]; + gd->env_valid = 1; + + return 0; +} diff --git a/disk/part.c b/disk/part.c index e353cee..fe299c7 100644 --- a/disk/part.c +++ b/disk/part.c @@ -35,6 +35,7 @@ #endif #if (defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_MG_DISK) || \ defined(CONFIG_CMD_SATA) || \ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_USB) || \ @@ -65,6 +66,9 @@ static const struct block_drvr block_drvr[] = { #if defined(CONFIG_SYSTEMACE) { .name = "ace", .get_dev = systemace_get_dev, }, #endif +#if defined(CONFIG_CMD_MG_DISK) + { .name = "mgd", .get_dev = mg_disk_get_dev, }, +#endif { }, }; @@ -91,6 +95,7 @@ block_dev_desc_t *get_dev(char* ifname, int dev) #endif #if (defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_MG_DISK) || \ defined(CONFIG_CMD_SATA) || \ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_USB) || \ @@ -203,11 +208,12 @@ void dev_print (block_dev_desc_t *dev_desc) #endif #if (defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_MG_DISK) || \ defined(CONFIG_CMD_SATA) || \ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_USB) || \ defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) ) + defined(CONFIG_SYSTEMACE) ) #if defined(CONFIG_MAC_PARTITION) || \ defined(CONFIG_DOS_PARTITION) || \ diff --git a/disk/part_amiga.c b/disk/part_amiga.c index c2daf6a..50efe39 100644 --- a/disk/part_amiga.c +++ b/disk/part_amiga.c @@ -27,6 +27,7 @@ #include "part_amiga.h" #if defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_MG_DISK) || \ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_USB) || \ defined(CONFIG_MMC) || \ @@ -154,7 +155,7 @@ struct rigid_disk_block *get_rdisk(block_dev_desc_t *dev_desc) s = getenv("amiga_scanlimit"); if (s) - limit = atoi(s); + limit = simple_strtoul(s, NULL, 10); else limit = AMIGA_BLOCK_LIMIT; @@ -195,7 +196,7 @@ struct bootcode_block *get_bootcode(block_dev_desc_t *dev_desc) s = getenv("amiga_scanlimit"); if (s) - limit = atoi(s); + limit = simple_strtoul(s, NULL, 10); else limit = AMIGA_BLOCK_LIMIT; diff --git a/disk/part_dos.c b/disk/part_dos.c index 4ab0b40..93bf3dd 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -36,6 +36,7 @@ #include "part_dos.h" #if defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_MG_DISK) || \ defined(CONFIG_CMD_SATA) || \ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_USB) || \ diff --git a/disk/part_efi.c b/disk/part_efi.c index 70f62cc..626f022 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -37,6 +37,7 @@ #include "part_efi.h" #if defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_MG_DISK) || \ defined(CONFIG_CMD_SATA) || \ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_USB) || \ diff --git a/disk/part_iso.c b/disk/part_iso.c index 719b949..8fe6148 100644 --- a/disk/part_iso.c +++ b/disk/part_iso.c @@ -26,6 +26,7 @@ #include "part_iso.h" #if defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_MG_DISK) || \ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_SATA) || \ defined(CONFIG_CMD_USB) || \ diff --git a/disk/part_mac.c b/disk/part_mac.c index c1afc8c..bebe415 100644 --- a/disk/part_mac.c +++ b/disk/part_mac.c @@ -35,6 +35,7 @@ #include "part_mac.h" #if defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_MG_DISK) || \ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_SATA) || \ defined(CONFIG_CMD_USB) || \ diff --git a/doc/README.mflash b/doc/README.mflash new file mode 100644 index 0000000..50133b4 --- /dev/null +++ b/doc/README.mflash @@ -0,0 +1,94 @@ + +This document describes m[g]flash support in u-boot. + +Contents + 1. Overview + 2. Porting mflash driver + 3. Mflash command + 4. Misc. + +1. Overview +Mflash and gflash are embedded flash drive. The only difference is mflash is +MCP(Multi Chip Package) device. These two device operate exactly same way. +So the rest mflash repersents mflash and gflash altogether. + +2. Porting mflash driver + +2-1. Board configuration +* Mflash driver support +#define CONFIG_CMD_MG_DISK +#define CONFIG_LIBATA + +* Environment variable support (optional) +#define CONFIG_ENV_IS_IN_MG_DISK +Also CONFIG_ENV_ADDR and CONFIG_ENV_SIZE should be defined. +CONFIG_ENV_ADDR is byte offset starting from 0. + +Following example sets environment variable location to 0x80000 (1024'th +sector) and size of 0x400 (1024 byte) +#define CONFIG_ENV_ADDR 0x80000 +#define CONFIG_ENV_SIZE 0x400 + +* Reserved size config (optional) +If you want to use some reserved area for bootloader, environment variable or +whatever, use CONFIG_MG_DISK_RES. The unit is KB. Mflash's block operation +method use this value as start offset. So any u-boot's partition table parser +and file system command work consistently. You can access this area by using +mflash command. + +Following example sets 10MB of reserved area. +#define CONFIG_MG_DISK_RES 10240 + +2-2. Porting mg_get_drv_data function +Mflash is active device and need some gpio control for proper operation. +This board dependency resolved by using mg_get_drv_data function. +Port this function at your board init file. See include/mg_disk.h + +Here is some pseudo example. + +static void custom_hdrst_pin (u8 level) +{ + if (level) + /* set hard reset pin to high */ + else + /* set hard reset pin to low */ +} + +static void custom_ctrl_pin_init (void) +{ + /* Set hard reset, write protect, deep power down pins + * to gpio. + * Set these pins to output high + */ +} + +struct mg_drv_data* mg_get_drv_data (void) +{ + static struct mg_drv_data prv; + + prv.base = /* base address of mflash */ + prv.mg_ctrl_pin_init = custom_ctrl_pin_init; + prv.mg_hdrst_pin = custom_hdrst_pin; + + return &prv; +} + +3. Mflash command + +* initialize : mgd init +* random read : mgd read [from] [to] [size] + ex) read 256 bytes from 0x300000 of mflash to 0xA0100000 of host memory + mgd read 0x300000 0xA0100000 256 +* random write : mgd write [from] [to] [size] +* sector read : mgd readsec [sector] [to] [count] + ex) read 10 sectors starts from 400 sector to 0xA0100000 + mgd readsec 400 0xA0100000 10 +* sector write : mgd writesec [from] [sector] [count] + +4. Misc. +Mflash's device interface name for block driver is "mgd". +Here is ext2 file system access example. + + mgd init + ext2ls mgd 0:1 /boot + ext2load mgd 0:1 0xa0010000 /boot/uImage 1954156 diff --git a/drivers/block/Makefile b/drivers/block/Makefile index 59388d9..eccefc1 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -25,13 +25,14 @@ include $(TOPDIR)/config.mk LIB := $(obj)libblock.a -COBJS-$(CONFIG_SCSI_AHCI) += ahci.o COBJS-$(CONFIG_ATA_PIIX) += ata_piix.o +COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o +COBJS-$(CONFIG_IDE_SIL680) += sil680.o COBJS-$(CONFIG_LIBATA) += libata.o COBJS-$(CONFIG_PATA_BFIN) += pata_bfin.o COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o -COBJS-$(CONFIG_IDE_SIL680) += sil680.o +COBJS-$(CONFIG_SCSI_AHCI) += ahci.o COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o COBJS-$(CONFIG_SYSTEMACE) += systemace.o diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c new file mode 100644 index 0000000..b74307a --- /dev/null +++ b/drivers/block/mg_disk.c @@ -0,0 +1,582 @@ +/* + * (C) Copyright 2009 mGine co. + * unsik Kim <donari75(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <malloc.h> +#include <part.h> +#include <ata.h> +#include <asm/io.h> +#include "mg_disk_prv.h" + +#ifndef CONFIG_MG_DISK_RES +#define CONFIG_MG_DISK_RES 0 +#endif + +#define MG_RES_SEC ((CONFIG_MG_DISK_RES) << 1) + +static struct mg_host host; + +static inline u32 mg_base(void) +{ + return host.drv_data->base; +} + +static block_dev_desc_t mg_disk_dev = { + .if_type = IF_TYPE_ATAPI, + .part_type = PART_TYPE_UNKNOWN, + .type = DEV_TYPE_HARDDISK, + .blksz = MG_SECTOR_SIZE, + .priv = &host }; + +static void mg_dump_status (const char *msg, unsigned int stat, unsigned err) +{ + char *name = MG_DEV_NAME; + + printf("%s: %s: status=0x%02x { ", name, msg, stat & 0xff); + if (stat & MG_REG_STATUS_BIT_BUSY) + printf("Busy "); + if (stat & MG_REG_STATUS_BIT_READY) + printf("DriveReady "); + if (stat & MG_REG_STATUS_BIT_WRITE_FAULT) + printf("WriteFault "); + if (stat & MG_REG_STATUS_BIT_SEEK_DONE) + printf("SeekComplete "); + if (stat & MG_REG_STATUS_BIT_DATA_REQ) + printf("DataRequest "); + if (stat & MG_REG_STATUS_BIT_CORRECTED_ERROR) + printf("CorrectedError "); + if (stat & MG_REG_STATUS_BIT_ERROR) + printf("Error "); + printf("}\n"); + + if ((stat & MG_REG_STATUS_BIT_ERROR)) { + printf("%s: %s: error=0x%02x { ", name, msg, err & 0xff); + if (err & MG_REG_ERR_BBK) + printf("BadSector "); + if (err & MG_REG_ERR_UNC) + printf("UncorrectableError "); + if (err & MG_REG_ERR_IDNF) + printf("SectorIdNotFound "); + if (err & MG_REG_ERR_ABRT) + printf("DriveStatusError "); + if (err & MG_REG_ERR_AMNF) + printf("AddrMarkNotFound "); + printf("}\n"); + } +} + +static unsigned int mg_wait (u32 expect, u32 msec) +{ + u8 status; + u32 from, cur, err; + + err = MG_ERR_NONE; + reset_timer(); + from = get_timer(0); + + status = readb(mg_base() + MG_REG_STATUS); + do { + cur = get_timer(from); + if (status & MG_REG_STATUS_BIT_BUSY) { + if (expect == MG_REG_STATUS_BIT_BUSY) + break; + } else { + /* Check the error condition! */ + if (status & MG_REG_STATUS_BIT_ERROR) { + err = readb(mg_base() + MG_REG_ERROR); + mg_dump_status("mg_wait", status, err); + break; + } + + if (expect == MG_STAT_READY) + if (MG_READY_OK(status)) + break; + + if (expect == MG_REG_STATUS_BIT_DATA_REQ) + if (status & MG_REG_STATUS_BIT_DATA_REQ) + break; + } + status = readb(mg_base() + MG_REG_STATUS); + } while (cur < msec); + + if (cur >= msec) + err = MG_ERR_TIMEOUT; + + return err; +} + +static int mg_get_disk_id (void) +{ + u16 id[(MG_SECTOR_SIZE / sizeof(u16))]; + hd_driveid_t *iop = (hd_driveid_t *)id; + u32 i, err, res; + + writeb(MG_CMD_ID, mg_base() + MG_REG_COMMAND); + err = mg_wait(MG_REG_STATUS_BIT_DATA_REQ, 3000); + if (err) + return err; + + for(i = 0; i < (MG_SECTOR_SIZE / sizeof(u16)); i++) + id[i] = readw(mg_base() + MG_BUFF_OFFSET + i * 2); + + writeb(MG_CMD_RD_CONF, mg_base() + MG_REG_COMMAND); + err = mg_wait(MG_STAT_READY, 3000); + if (err) + return err; + + ata_swap_buf_le16(id, MG_SECTOR_SIZE / sizeof(u16)); + + if((iop->field_valid & 1) == 0) + return MG_ERR_TRANSLATION; + + ata_id_c_string(id, (unsigned char *)mg_disk_dev.revision, + ATA_ID_FW_REV, sizeof(mg_disk_dev.revision)); + ata_id_c_string(id, (unsigned char *)mg_disk_dev.vendor, + ATA_ID_PROD, sizeof(mg_disk_dev.vendor)); + ata_id_c_string(id, (unsigned char *)mg_disk_dev.product, + ATA_ID_SERNO, sizeof(mg_disk_dev.product)); + +#ifdef __BIG_ENDIAN + iop->lba_capacity = (iop->lba_capacity << 16) | + (iop->lba_capacity >> 16); +#endif /* __BIG_ENDIAN */ + + if (MG_RES_SEC) { + MG_DBG("MG_RES_SEC=%d\n", MG_RES_SEC); + iop->cyls = (iop->lba_capacity - MG_RES_SEC) / + iop->sectors / iop->heads; + res = iop->lba_capacity - + iop->cyls * iop->heads * iop->sectors; + iop->lba_capacity -= res; + printf("mg_disk: %d sectors reserved\n", res); + } + + mg_disk_dev.lba = iop->lba_capacity; + return MG_ERR_NONE; +} + +static int mg_disk_reset (void) +{ + struct mg_drv_data *prv_data = host.drv_data; + s32 err; + u8 init_status; + + /* hdd rst low */ + prv_data->mg_hdrst_pin(0); + err = mg_wait(MG_REG_STATUS_BIT_BUSY, 300); + if(err) + return err; + + /* hdd rst high */ + prv_data->mg_hdrst_pin(1); + err = mg_wait(MG_STAT_READY, 3000); + if(err) + return err; + + /* soft reset on */ + writeb(MG_REG_CTRL_RESET | MG_REG_CTRL_INTR_DISABLE, + mg_base() + MG_REG_DRV_CTRL); + err = mg_wait(MG_REG_STATUS_BIT_BUSY, 3000); + if(err) + return err; + + /* soft reset off */ + writeb(MG_REG_CTRL_INTR_DISABLE, mg_base() + MG_REG_DRV_CTRL); + err = mg_wait(MG_STAT_READY, 3000); + if(err) + return err; + + init_status = readb(mg_base() + MG_REG_STATUS) & 0xf; + + if (init_status == 0xf) + return MG_ERR_INIT_STAT; + + return err; +} + + +static unsigned int mg_out(unsigned int sect_num, + unsigned int sect_cnt, + unsigned int cmd) +{ + u32 err = MG_ERR_NONE; + + err = mg_wait(MG_STAT_READY, 3000); + if (err) + return err; + + writeb((u8)sect_cnt, mg_base() + MG_REG_SECT_CNT); + writeb((u8)sect_num, mg_base() + MG_REG_SECT_NUM); + writeb((u8)(sect_num >> 8), mg_base() + MG_REG_CYL_LOW); + writeb((u8)(sect_num >> 16), mg_base() + MG_REG_CYL_HIGH); + writeb((u8)((sect_num >> 24) | MG_REG_HEAD_LBA_MODE), + mg_base() + MG_REG_DRV_HEAD); + writeb(cmd, mg_base() + MG_REG_COMMAND); + + return err; +} + +static unsigned int mg_do_read_sects(void *buff, u32 sect_num, u32 sect_cnt) +{ + u32 i, j, err; + u8 *buff_ptr = buff; + union mg_uniwb uniwb; + + err = mg_out(sect_num, sect_cnt, MG_CMD_RD); + if (err) + return err; + + for (i = 0; i < sect_cnt; i++) { + err = mg_wait(MG_REG_STATUS_BIT_DATA_REQ, 3000); + if (err) + return err; + + if ((u32)buff_ptr & 1) { + for (j = 0; j < MG_SECTOR_SIZE >> 1; j++) { + uniwb.w = readw(mg_base() + MG_BUFF_OFFSET + + (j << 1)); + *buff_ptr++ = uniwb.b[0]; + *buff_ptr++ = uniwb.b[1]; + } + } else { + for(j = 0; j < MG_SECTOR_SIZE >> 1; j++) { + *(u16 *)buff_ptr = readw(mg_base() + + MG_BUFF_OFFSET + (j << 1)); + buff_ptr += 2; + } + } + writeb(MG_CMD_RD_CONF, mg_base() + MG_REG_COMMAND); + + MG_DBG("%u (0x%8.8x) sector read", sect_num + i, + (sect_num + i) * MG_SECTOR_SIZE); + } + + return err; +} + +unsigned int mg_disk_read_sects(void *buff, u32 sect_num, u32 sect_cnt) +{ + u32 quotient, residue, i, err; + u8 *buff_ptr = buff; + + quotient = sect_cnt >> 8; + residue = sect_cnt % 256; + + for (i = 0; i < quotient; i++) { + MG_DBG("sect num : %u buff : 0x%8.8x", sect_num, (u32)buff_ptr); + err = mg_do_read_sects(buff_ptr, sect_num, 256); + if (err) + return err; + sect_num += 256; + buff_ptr += 256 * MG_SECTOR_SIZE; + } + + if (residue) { + MG_DBG("sect num : %u buff : %8.8x", sect_num, (u32)buff_ptr); + err = mg_do_read_sects(buff_ptr, sect_num, residue); + } + + return err; +} + +unsigned long mg_block_read (int dev, unsigned long start, + lbaint_t blkcnt, void *buffer) +{ + start += MG_RES_SEC; + if (! mg_disk_read_sects(buffer, start, blkcnt)) + return blkcnt; + else + return 0; +} + +unsigned int mg_disk_read (u32 addr, u8 *buff, u32 len) +{ + u8 *sect_buff, *buff_ptr = buff; + u32 cur_addr, next_sec_addr, end_addr, cnt, sect_num; + u32 err = MG_ERR_NONE; + + /* TODO : sanity chk */ + cnt = 0; + cur_addr = addr; + end_addr = addr + len; + + sect_buff = malloc(MG_SECTOR_SIZE); + + if (cur_addr & MG_SECTOR_SIZE_MASK) { + next_sec_addr = (cur_addr + MG_SECTOR_SIZE) & + ~MG_SECTOR_SIZE_MASK; + sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT; + err = mg_disk_read_sects(sect_buff, sect_num, 1); + if (err) + goto mg_read_exit; + + if (end_addr < next_sec_addr) { + memcpy(buff_ptr, + sect_buff + (cur_addr & MG_SECTOR_SIZE_MASK), + end_addr - cur_addr); + MG_DBG("copies %u byte from sector offset 0x%8.8x", + end_addr - cur_addr, cur_addr); + cur_addr = end_addr; + } else { + memcpy(buff_ptr, + sect_buff + (cur_addr & MG_SECTOR_SIZE_MASK), + next_sec_addr - cur_addr); + MG_DBG("copies %u byte from sector offset 0x%8.8x", + next_sec_addr - cur_addr, cur_addr); + buff_ptr += (next_sec_addr - cur_addr); + cur_addr = next_sec_addr; + } + } + + if (cur_addr < end_addr) { + sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT; + cnt = ((end_addr & ~MG_SECTOR_SIZE_MASK) - cur_addr) >> + MG_SECTOR_SIZE_SHIFT; + + if (cnt) + err = mg_disk_read_sects(buff_ptr, sect_num, cnt); + if (err) + goto mg_read_exit; + + buff_ptr += cnt * MG_SECTOR_SIZE; + cur_addr += cnt * MG_SECTOR_SIZE; + + if (cur_addr < end_addr) { + sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT; + err = mg_disk_read_sects(sect_buff, sect_num, 1); + if (err) + goto mg_read_exit; + memcpy(buff_ptr, sect_buff, end_addr - cur_addr); + MG_DBG("copies %u byte", end_addr - cur_addr); + } + } + +mg_read_exit: + free(sect_buff); + + return err; +} +static int mg_do_write_sects(void *buff, u32 sect_num, u32 sect_cnt) +{ + u32 i, j, err; + u8 *buff_ptr = buff; + union mg_uniwb uniwb; + + err = mg_out(sect_num, sect_cnt, MG_CMD_WR); + if (err) + return err; + + for (i = 0; i < sect_cnt; i++) { + err = mg_wait(MG_REG_STATUS_BIT_DATA_REQ, 3000); + if (err) + return err; + + if ((u32)buff_ptr & 1) { + uniwb.b[0] = *buff_ptr++; + uniwb.b[1] = *buff_ptr++; + writew(uniwb.w, mg_base() + MG_BUFF_OFFSET + (j << 1)); + } else { + for(j = 0; j < MG_SECTOR_SIZE >> 1; j++) { + writew(*(u16 *)buff_ptr, + mg_base() + MG_BUFF_OFFSET + + (j << 1)); + buff_ptr += 2; + } + } + writeb(MG_CMD_WR_CONF, mg_base() + MG_REG_COMMAND); + + MG_DBG("%u (0x%8.8x) sector write", + sect_num + i, (sect_num + i) * MG_SECTOR_SIZE); + } + + return err; +} + +unsigned int mg_disk_write_sects(void *buff, u32 sect_num, u32 sect_cnt) +{ + u32 quotient, residue, i; + u32 err = MG_ERR_NONE; + u8 *buff_ptr = buff; + + quotient = sect_cnt >> 8; + residue = sect_cnt % 256; + + for (i = 0; i < quotient; i++) { + MG_DBG("sect num : %u buff : %8.8x", sect_num, (u32)buff_ptr); + err = mg_do_write_sects(buff_ptr, sect_num, 256); + if (err) + return err; + sect_num += 256; + buff_ptr += 256 * MG_SECTOR_SIZE; + } + + if (residue) { + MG_DBG("sect num : %u buff : %8.8x", sect_num, (u32)buff_ptr); + err = mg_do_write_sects(buff_ptr, sect_num, residue); + } + + return err; +} + +unsigned long mg_block_write (int dev, unsigned long start, + lbaint_t blkcnt, const void *buffer) +{ + start += MG_RES_SEC; + if (!mg_disk_write_sects((void *)buffer, start, blkcnt)) + return blkcnt; + else + return 0; +} + +unsigned int mg_disk_write(u32 addr, u8 *buff, u32 len) +{ + u8 *sect_buff, *buff_ptr = buff; + u32 cur_addr, next_sec_addr, end_addr, cnt, sect_num; + u32 err = MG_ERR_NONE; + + /* TODO : sanity chk */ + cnt = 0; + cur_addr = addr; + end_addr = addr + len; + + sect_buff = malloc(MG_SECTOR_SIZE); + + if (cur_addr & MG_SECTOR_SIZE_MASK) { + + next_sec_addr = (cur_addr + MG_SECTOR_SIZE) & + ~MG_SECTOR_SIZE_MASK; + sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT; + err = mg_disk_read_sects(sect_buff, sect_num, 1); + if (err) + goto mg_write_exit; + + if (end_addr < next_sec_addr) { + memcpy(sect_buff + (cur_addr & MG_SECTOR_SIZE_MASK), + buff_ptr, end_addr - cur_addr); + MG_DBG("copies %u byte to sector offset 0x%8.8x", + end_addr - cur_addr, cur_addr); + cur_addr = end_addr; + } else { + memcpy(sect_buff + (cur_addr & MG_SECTOR_SIZE_MASK), + buff_ptr, next_sec_addr - cur_addr); + MG_DBG("copies %u byte to sector offset 0x%8.8x", + next_sec_addr - cur_addr, cur_addr); + buff_ptr += (next_sec_addr - cur_addr); + cur_addr = next_sec_addr; + } + + err = mg_disk_write_sects(sect_buff, sect_num, 1); + if (err) + goto mg_write_exit; + } + + if (cur_addr < end_addr) { + + sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT; + cnt = ((end_addr & ~MG_SECTOR_SIZE_MASK) - cur_addr) >> + MG_SECTOR_SIZE_SHIFT; + + if (cnt) + err = mg_disk_write_sects(buff_ptr, sect_num, cnt); + if (err) + goto mg_write_exit; + + buff_ptr += cnt * MG_SECTOR_SIZE; + cur_addr += cnt * MG_SECTOR_SIZE; + + if (cur_addr < end_addr) { + sect_num = cur_addr >> MG_SECTOR_SIZE_SHIFT; + err = mg_disk_read_sects(sect_buff, sect_num, 1); + if (err) + goto mg_write_exit; + memcpy(sect_buff, buff_ptr, end_addr - cur_addr); + MG_DBG("copies %u byte", end_addr - cur_addr); + err = mg_disk_write_sects(sect_buff, sect_num, 1); + } + + } + +mg_write_exit: + free(sect_buff); + + return err; +} + +block_dev_desc_t *mg_disk_get_dev(int dev) +{ + return ((block_dev_desc_t *) & mg_disk_dev); +} + +/* must override this function */ +struct mg_drv_data * __attribute__((weak)) mg_get_drv_data (void) +{ + puts ("### WARNING ### port mg_get_drv_data function\n"); + return NULL; +} + +unsigned int mg_disk_init (void) +{ + struct mg_drv_data *prv_data; + u32 err = MG_ERR_NONE; + + prv_data = mg_get_drv_data(); + if (! prv_data) { + printf("%s:%d fail (no driver_data)\n", __func__, __LINE__); + err = MG_ERR_NO_DRV_DATA; + return err; + } + + ((struct mg_host *)mg_disk_dev.priv)->drv_data = prv_data; + + /* init ctrl pin */ + if (prv_data->mg_ctrl_pin_init) + prv_data->mg_ctrl_pin_init(); + + if (! prv_data->mg_hdrst_pin) { + err = MG_ERR_CTRL_RST; + return err; + } + + /* disk reset */ + err = mg_disk_reset(); + if (err) { + printf("%s:%d fail (err code : %d)\n", __func__, __LINE__, err); + return err; + } + + /* get disk id */ + err = mg_get_disk_id(); + if (err) { + printf("%s:%d fail (err code : %d)\n", __func__, __LINE__, err); + return err; + } + + mg_disk_dev.block_read = mg_block_read; + mg_disk_dev.block_write = mg_block_write; + + init_part(&mg_disk_dev); + + dev_print(&mg_disk_dev); + + return err; +} diff --git a/drivers/block/mg_disk_prv.h b/drivers/block/mg_disk_prv.h new file mode 100644 index 0000000..8f22e28 --- /dev/null +++ b/drivers/block/mg_disk_prv.h @@ -0,0 +1,145 @@ +/* + * (C) Copyright 2009 mGine co. + * unsik Kim <donari75(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MG_DISK_PRV_H__ +#define __MG_DISK_PRV_H__ + +#include <mg_disk.h> + +/* name for block device */ +#define MG_DISK_NAME "mgd" +/* name for platform device */ +#define MG_DEV_NAME "mg_disk" + +#define MG_DISK_MAJ 240 +#define MG_DISK_MAX_PART 16 +#define MG_SECTOR_SIZE 512 +#define MG_SECTOR_SIZE_MASK (512 - 1) +#define MG_SECTOR_SIZE_SHIFT (9) +#define MG_MAX_SECTS 256 + +/* Register offsets */ +#define MG_BUFF_OFFSET 0x8000 +#define MG_STORAGE_BUFFER_SIZE 0x200 +#define MG_REG_OFFSET 0xC000 +#define MG_REG_FEATURE (MG_REG_OFFSET + 2) /* write case */ +#define MG_REG_ERROR (MG_REG_OFFSET + 2) /* read case */ +#define MG_REG_SECT_CNT (MG_REG_OFFSET + 4) +#define MG_REG_SECT_NUM (MG_REG_OFFSET + 6) +#define MG_REG_CYL_LOW (MG_REG_OFFSET + 8) +#define MG_REG_CYL_HIGH (MG_REG_OFFSET + 0xA) +#define MG_REG_DRV_HEAD (MG_REG_OFFSET + 0xC) +#define MG_REG_COMMAND (MG_REG_OFFSET + 0xE) /* write case */ +#define MG_REG_STATUS (MG_REG_OFFSET + 0xE) /* read case */ +#define MG_REG_DRV_CTRL (MG_REG_OFFSET + 0x10) +#define MG_REG_BURST_CTRL (MG_REG_OFFSET + 0x12) + +/* "Drive Select/Head Register" bit values */ +#define MG_REG_HEAD_MUST_BE_ON 0xA0 /* These 2 bits are always on */ +#define MG_REG_HEAD_DRIVE_MASTER (0x00 | MG_REG_HEAD_MUST_BE_ON) +#define MG_REG_HEAD_DRIVE_SLAVE (0x10 | MG_REG_HEAD_MUST_BE_ON) +#define MG_REG_HEAD_LBA_MODE (0x40 | MG_REG_HEAD_MUST_BE_ON) + + +/* "Device Control Register" bit values */ +#define MG_REG_CTRL_INTR_ENABLE 0x0 +#define MG_REG_CTRL_INTR_DISABLE (0x1 << 1) +#define MG_REG_CTRL_RESET (0x1 << 2) +#define MG_REG_CTRL_INTR_POLA_ACTIVE_HIGH 0x0 +#define MG_REG_CTRL_INTR_POLA_ACTIVE_LOW (0x1 << 4) +#define MG_REG_CTRL_DPD_POLA_ACTIVE_LOW 0x0 +#define MG_REG_CTRL_DPD_POLA_ACTIVE_HIGH (0x1 << 5) +#define MG_REG_CTRL_DPD_DISABLE 0x0 +#define MG_REG_CTRL_DPD_ENABLE (0x1 << 6) + +/* Status register bit */ + /* error bit in status register */ +#define MG_REG_STATUS_BIT_ERROR 0x01 + /* corrected error in status register */ +#define MG_REG_STATUS_BIT_CORRECTED_ERROR 0x04 + /* data request bit in status register */ +#define MG_REG_STATUS_BIT_DATA_REQ 0x08 + /* DSC - Drive Seek Complete */ +#define MG_REG_STATUS_BIT_SEEK_DONE 0x10 + /* DWF - Drive Write Fault */ +#define MG_REG_STATUS_BIT_WRITE_FAULT 0x20 +#define MG_REG_STATUS_BIT_READY 0x40 +#define MG_REG_STATUS_BIT_BUSY 0x80 + +/* handy status */ +#define MG_STAT_READY (MG_REG_STATUS_BIT_READY | MG_REG_STATUS_BIT_SEEK_DONE) +#define MG_READY_OK(s) (((s) & (MG_STAT_READY | \ + (MG_REG_STATUS_BIT_BUSY | \ + MG_REG_STATUS_BIT_WRITE_FAULT | \ + MG_REG_STATUS_BIT_ERROR))) == MG_STAT_READY) + +/* Error register */ +#define MG_REG_ERR_AMNF 0x01 +#define MG_REG_ERR_ABRT 0x04 +#define MG_REG_ERR_IDNF 0x10 +#define MG_REG_ERR_UNC 0x40 +#define MG_REG_ERR_BBK 0x80 + +/* error code for others */ +#define MG_ERR_NONE 0 +#define MG_ERR_TIMEOUT 0x100 +#define MG_ERR_INIT_STAT 0x101 +#define MG_ERR_TRANSLATION 0x102 +#define MG_ERR_CTRL_RST 0x103 +#define MG_ERR_NO_DRV_DATA 0x104 + +#define MG_MAX_ERRORS 16 /* Max read/write errors/sector */ +#define MG_RESET_FREQ 4 /* Reset controller every 4th retry */ + +/* command */ +#define MG_CMD_RD 0x20 +#define MG_CMD_WR 0x30 +#define MG_CMD_SLEEP 0x99 +#define MG_CMD_WAKEUP 0xC3 +#define MG_CMD_ID 0xEC +#define MG_CMD_WR_CONF 0x3C +#define MG_CMD_RD_CONF 0x40 + +union mg_uniwb{ + u16 w; + u8 b[2]; +}; + +/* main structure for mflash driver */ +struct mg_host { + struct mg_drv_data *drv_data; + /* for future use */ +}; + +/* + * Debugging macro and defines + */ +#undef DO_MG_DEBUG +#ifdef DO_MG_DEBUG +# define MG_DBG(fmt, args...) printf("%s:%d "fmt"\n", __func__, __LINE__,##args) +#else /* CONFIG_MG_DEBUG */ +# define MG_DBG(fmt, args...) do { } while(0) +#endif /* CONFIG_MG_DEBUG */ + +#endif + diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 8081ee7..602edae 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -84,6 +84,7 @@ fat_register_device(block_dev_desc_t *dev_desc, int part_no) return -1; } #if (defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_MG_DISK) || \ defined(CONFIG_CMD_SATA) || \ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_USB) || \ @@ -987,6 +988,7 @@ file_fat_detectfs(void) return 1; } #if defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_MG_DISK) || \ defined(CONFIG_CMD_SATA) || \ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_USB) || \ diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 205dd1f..76cb968 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -83,5 +83,6 @@ #define CONFIG_CMD_VFD /* VFD support (TRAB) */ #define CONFIG_CMD_XIMG /* Load part of Multi Image */ #define CONFIG_CMD_AT91_SPIMUX /* AT91 MMC/SPI Mux Support */ +#define CONFIG_CMD_MG_DISK /* mGine m(g)flash IO node support */ #endif /* _CONFIG_CMD_ALL_H */ diff --git a/include/environment.h b/include/environment.h index ea6b4d1..507e832 100644 --- a/include/environment.h +++ b/include/environment.h @@ -84,6 +84,18 @@ # endif #endif /* CONFIG_ENV_IS_IN_NAND */ +#if defined(CONFIG_ENV_IS_IN_MG_DISK) +# ifndef CONFIG_ENV_ADDR +# error "Need to define CONFIG_ENV_ADDR when using CONFIG_ENV_IS_IN_MG_DISK" +# endif +# ifndef CONFIG_ENV_SIZE +# error "Need to define CONFIG_ENV_SIZE when using CONFIG_ENV_IS_IN_MG_DISK" +# endif +# ifdef CONFIG_ENV_IS_EMBEDDED +# error "CONFIG_ENV_IS_EMBEDDED not supported when using CONFIG_ENV_IS_IN_MG_DISK" +# endif +#endif /* CONFIG_ENV_IS_IN_MG_DISK */ + #ifdef USE_HOSTCC # include <stdint.h> #else diff --git a/include/mg_disk.h b/include/mg_disk.h new file mode 100644 index 0000000..bd767a1 --- /dev/null +++ b/include/mg_disk.h @@ -0,0 +1,51 @@ +/* + * (C) Copyright 2009 mGine co. + * unsik Kim <donari75(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef MG_DISK_H_ +#define MG_DISK_H_ + +#include <asm/types.h> + +/* private driver data */ +struct mg_drv_data { + /* base address of mflash */ + u32 base; + /* Initialize hard reset, write protect, deep power down pins. + * Set these pins to GPIO and output high + */ + void (*mg_ctrl_pin_init) (void); + /* Set hard reset pin for given level + * level : logical level of hard reset pin (0 or 1) + */ + void (*mg_hdrst_pin) (u8 level); +}; + +struct mg_drv_data* mg_get_drv_data (void); + +unsigned int mg_disk_init (void); +unsigned int mg_disk_read (u32 addr, u8 *buff, u32 len); +unsigned int mg_disk_write(u32 addr, u8 *buff, u32 len); +unsigned int mg_disk_write_sects(void *buff, u32 sect_num, u32 sect_cnt); +unsigned int mg_disk_read_sects(void *buff, u32 sect_num, u32 sect_cnt); + +#endif /*MG_DISK_H_*/ diff --git a/include/part.h b/include/part.h index 980fd04..3cdae02 100644 --- a/include/part.h +++ b/include/part.h @@ -100,6 +100,7 @@ block_dev_desc_t* scsi_get_dev(int dev); block_dev_desc_t* usb_stor_get_dev(int dev); block_dev_desc_t* mmc_get_dev(int dev); block_dev_desc_t* systemace_get_dev(int dev); +block_dev_desc_t* mg_disk_get_dev(int dev); /* disk/part.c */ int get_partition_info (block_dev_desc_t * dev_desc, int part, disk_partition_t *info); -- 1.5.6.6 Regards, unsik Kim

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[U-Boot] [U-BOOT][PATCH 1/3] mflash : Fix some style issue
by unsik Kim 03 Apr '09

03 Apr '09

Signed-off-by: unsik Kim <donari75(a)gmail.com> --- common/env_mgdisk.c | 2 ++ drivers/block/mg_disk.c | 13 +++++-------- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/common/env_mgdisk.c b/common/env_mgdisk.c index 2b4949f..363ee68 100644 --- a/common/env_mgdisk.c +++ b/common/env_mgdisk.c @@ -72,11 +72,13 @@ OUT: int saveenv(void) { unsigned int err; + env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE); err = mg_disk_write(CONFIG_ENV_ADDR, (u_char *)env_ptr, CONFIG_ENV_SIZE); if (err) puts ("*** Warning - mg_disk_write error\n\n"); + return err; } diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c index 193a441..9ae8889 100644 --- a/drivers/block/mg_disk.c +++ b/drivers/block/mg_disk.c @@ -28,8 +28,6 @@ #include <asm/io.h> #include "mg_disk_prv.h" -#ifdef CONFIG_CMD_MG_DISK - #ifndef CONFIG_MG_DISK_RES #define CONFIG_MG_DISK_RES 0 #endif @@ -116,11 +114,11 @@ static void mg_ident_cpy (unsigned char *dst, unsigned char *src, goto OUT; /* skip leading white space */ - while ((*src) && (src<end) && (*src==' ')) + while ((*src) && (src < end) && (*src == ' ')) ++src; /* copy string, omitting trailing white space */ - while ((*src) && (src<end)) { + while ((*src) && (src < end)) { *dst++ = *src; if (*src++ != ' ') last = dst; @@ -278,9 +276,9 @@ static unsigned int mg_out(unsigned int sect_num, { u32 err = MG_ERR_NONE; - if ((err = mg_wait(MG_STAT_READY, 3000))) { + err = mg_wait(MG_STAT_READY, 3000); + if (err) return err; - } writeb((u8)sect_cnt, MG_BASE + MG_REG_SECT_CNT); writeb((u8)sect_num, MG_BASE + MG_REG_SECT_NUM); @@ -289,6 +287,7 @@ static unsigned int mg_out(unsigned int sect_num, writeb((u8)((sect_num >> 24) | MG_REG_HEAD_LBA_MODE), MG_BASE + MG_REG_DRV_HEAD); writeb(cmd, MG_BASE + MG_REG_COMMAND); + return err; } @@ -631,5 +630,3 @@ unsigned int mg_disk_init (void) return err; } - -#endif /* CONFIG_CMD_MG_DISK */ -- 1.5.6.6

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[U-Boot] [PATCH v2 0/2] at91: serial initialization cleanup
by Michael Roth 03 Apr '09

03 Apr '09

Hello, I took up the suggestions from Jean-Christophe and the discussion in http://lists.denx.de/pipermail/u-boot/2008-November/043131.html and reworked the patch so that cpu specfic code goes to specfic files. This results to less ifdefs. An argument to at91_serial_hw_init() is not needed because all can be done against CONFIG_USARTx in a91xyz_serial.c and atmel_usart.c. Additionally I extended the patch to rename CONFIG_USART3 to CONFIG_USART_DBGU on at91 plattforms. Michael Roth

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