November 2009 - U-Boot

[U-Boot] help on a compiler error in include/asm/system.h
by Lv Terry-R65388 19 Nov '09

19 Nov '09

Hi u-boot experts, Now our arm board is based on u-boot v2009.08 and I need to use ubifs. So I replace some files from u-boot's latest version. They are: fs/ubifs/ubifs.c fs/ubifs/ubifs.h include/asm-arm/bitops.h include/linux/bitops.h and define the following configs in config file: #define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS #define CONFIG_RBTREE #define CONFIG_LZO When compiling, I encountered an error: /opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnuea bi/bin/arm-none-linux-gnueabi-gcc -g -O0 -fno-strict-aliasing -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DTEXT_BASE=0x97800000 -I/home/r65388/uboot-v2009.08/uboot-imx/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnuea bi/lib/gcc/arm-none-linux-gnueabi/4.1.2/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mabi=aapcs-linux -mno-thumb-interwork -march=armv5 -Wall -Wstrict-prototypes -fno-stack-protector -o cpu.o cpu.c -c In file included from cpu.c:36: /home/r65388/uboot-v2009.08/uboot-imx/include/asm/system.h:71: error: expected identifier or '(' before 'asm' make[1]: *** [cpu.o] Error 1 make[1]: Leaving directory `/home/r65388/uboot-v2009.08/uboot-imx/cpu/arm_cortexa8' make: *** [cpu/arm_cortexa8/libarm_cortexa8.a] Error 2 Is there any other files I need to merge to resolve this error? Thanks~~ Yours Terry General Business Information Freescale Internal Use Only Freescale Confidential Proprietary

1 0

[U-Boot] [PATCH 00/10][v2] Support for LogicPD i.MX27-LITEKIT development board
by Ilya Yanok 19 Nov '09

19 Nov '09

This patch set adds support for LogicPD i.MX27-LITEKIT development board. It contains support for i.MX27 CPU, support for serial console, FEC ethernet controller, NFC NAND controller and SDHC controller. Signed-off-by: Ilya Yanok <yanok(a)emcraft.com>

10 33

[U-Boot] Database of emergency medicine physicians and many more specialties
by Araceli Carrier 19 Nov '09

19 Nov '09

Special Package for this week Board Certified Physicians in America 788,445 in total * 17,710 emails Many popular specialties like Emergency Medicine, Plastic Surgery, OBGYN, Oncology, Pediatrics and more 16 different sortable fields Pharmaceutical Companies in the USA Personal email addresses (47,000 in total) and names for top level executives Hospital Facilities in the United States Complete contact information for the important jobs held at the hospitals Complete and Accurate Database for Dental Service Providers A complete List or dentists and related services (valued at $399) Database of US Chiropractors Over than 100k chiropractors practicing in the United States This week's special price = $397 for all listed above send us an email: Nestor(a)bestmarketlists.be Offer ENDS TODAY Forward email to exit(a)bestmarketlists.be to purge you from our records

1 0

[U-Boot] [PATCH v2] Condense some lines in common/Makefile for readability.
by Robert P. J. Day 19 Nov '09

19 Nov '09

Collect object files corresponding to the same CONFIG variable on the same line for better readability. Signed-off-by: Robert P. J. Day <rpjday(a)crashcourse.ca> --- clearly no *functional* difference but it follows the standard set out in the rest of the file. compile tested for a beagle, for what it's worth. and the slight change to this version is that a duplicate and redundant check for ENV_IS_IN_EEPROM further down the file was also removed. diff --git a/common/Makefile b/common/Makefile index 3781738..b3d66aa 100644 --- a/common/Makefile +++ b/common/Makefile @@ -50,15 +50,12 @@ COBJS-y += cmd_nvedit.o # environment COBJS-y += env_common.o COBJS-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o -COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o +COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_embedded.o env_eeprom.o COBJS-$(CONFIG_ENV_IS_EMBEDDED) += env_embedded.o -COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_embedded.o -COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_embedded.o -COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_embedded.o -COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o +COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_embedded.o env_flash.o +COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_embedded.o env_nvram.o COBJS-$(CONFIG_ENV_IS_IN_MG_DISK) += env_mgdisk.o COBJS-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o -COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o COBJS-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o COBJS-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o COBJS-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o @@ -84,7 +81,6 @@ COBJS-$(CONFIG_CMD_DIAG) += cmd_diag.o endif COBJS-$(CONFIG_CMD_DISPLAY) += cmd_display.o COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o -COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += cmd_eeprom.o COBJS-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o COBJS-$(CONFIG_CMD_EXT2) += cmd_ext2.o ======================================================================== Robert P. J. Day Waterloo, Ontario, CANADA Linux Consulting, Training and Kernel Pedantry. Web page: http://crashcourse.ca Twitter: http://twitter.com/rpjday ========================================================================

2 1

[U-Boot] [PATCH V5 1/4] add TI DA8xx support: DA8xx includes
by Nick Thompson 18 Nov '09

18 Nov '09

Provides initial support for TI OMAP-L1x/DA8xx SoC devices. See http://www.ti.com The DA8xx devices are similar to DaVinci devices but have a differing memory map and updated peripheral versions. Signed-off-by: Nick Thompson <nick.thompson(a)gefanuc.com> Signed-off-by: Sekhar Nori <nsekhar(a)ti.com> --- Applies to u-boot-ti include/asm-arm/arch-davinci/hardware.h | 237 +++++++++++++++++++++++++++++++ include/asm-arm/arch-davinci/i2c_defs.h | 5 + 2 files changed, 242 insertions(+), 0 deletions(-) diff --git a/include/asm-arm/arch-davinci/hardware.h b/include/asm-arm/arch-davinci/hardware.h index acf12ea..81cc8ab 100644 --- a/include/asm-arm/arch-davinci/hardware.h +++ b/include/asm-arm/arch-davinci/hardware.h @@ -49,6 +49,8 @@ typedef volatile unsigned int * dv_reg_p; * on other DaVinci chips. Double check them before you try * using the addresses ... or PSC module identifiers, etc. */ +#ifndef CONFIG_SOC_DA8XX + #define DAVINCI_DMA_3PCC_BASE (0x01c00000) #define DAVINCI_DMA_3PTC0_BASE (0x01c10000) #define DAVINCI_DMA_3PTC1_BASE (0x01c10400) @@ -116,10 +118,46 @@ typedef volatile unsigned int * dv_reg_p; #endif +#else /* CONFIG_SOC_DA8XX */ + +#define DAVINCI_UART0_BASE 0x01c42000 +#define DAVINCI_UART1_BASE 0x01d0c000 +#define DAVINCI_UART2_BASE 0x01d0d000 +#define DAVINCI_I2C0_BASE 0x01c22000 +#define DAVINCI_I2C1_BASE 0x01e28000 +#define DAVINCI_TIMER0_BASE 0x01c20000 +#define DAVINCI_TIMER1_BASE 0x01c21000 +#define DAVINCI_WDOG_BASE 0x01c21000 +#define DAVINCI_PLL_CNTRL0_BASE 0x01c11000 +#define DAVINCI_PSC0_BASE 0x01c10000 +#define DAVINCI_PSC1_BASE 0x01e27000 +#define DAVINCI_SPI0_BASE 0x01c41000 +#define DAVINCI_USB_OTG_BASE 0x01e00000 +#define DAVINCI_SPI1_BASE 0x01e12000 +#define DAVINCI_GPIO_BASE 0x01e26000 +#define DAVINCI_EMAC_CNTRL_REGS_BASE 0x01e23000 +#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0x01e22000 +#define DAVINCI_EMAC_WRAPPER_RAM_BASE 0x01e20000 +#define DAVINCI_MDIO_CNTRL_REGS_BASE 0x01e24000 +#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x68000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x40000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x60000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x62000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE4_BASE 0x64000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE5_BASE 0x66000000 +#define DAVINCI_DDR_EMIF_CTRL_BASE 0xb0000000 +#define DAVINCI_DDR_EMIF_DATA_BASE 0xc0000000 +#define DAVINCI_INTC_BASE 0xfffee000 +#define DAVINCI_BOOTCFG_BASE 0x01c14000 + +#endif /* CONFIG_SOC_DA8XX */ + /* Power and Sleep Controller (PSC) Domains */ #define DAVINCI_GPSC_ARMDOMAIN 0 #define DAVINCI_GPSC_DSPDOMAIN 1 +#ifndef CONFIG_SOC_DA8XX + #define DAVINCI_LPSC_VPSSMSTR 0 #define DAVINCI_LPSC_VPSSSLV 1 #define DAVINCI_LPSC_TPCC 2 @@ -166,6 +204,52 @@ typedef volatile unsigned int * dv_reg_p; #define DAVINCI_DM646X_LPSC_UART0 26 #define DAVINCI_DM646X_LPSC_I2C 31 +#else /* CONFIG_SOC_DA8XX */ + +enum davinci_lpsc_ids { + DAVINCI_LPSC_TPCC = 0, + DAVINCI_LPSC_TPTC0, + DAVINCI_LPSC_TPTC1, + DAVINCI_LPSC_AEMIF, + DAVINCI_LPSC_SPI0, + DAVINCI_LPSC_MMC_SD, + DAVINCI_LPSC_AINTC, + DAVINCI_LPSC_ARM_RAM_ROM, + DAVINCI_LPSC_SECCTL_KEYMGR, + DAVINCI_LPSC_UART0, + DAVINCI_LPSC_SCR0, + DAVINCI_LPSC_SCR1, + DAVINCI_LPSC_SCR2, + DAVINCI_LPSC_DMAX, + DAVINCI_LPSC_ARM, + DAVINCI_LPSC_GEM, + /* for LPSCs in PSC1, offset from 32 for differentiation */ + DAVINCI_LPSC_PSC1_BASE = 32, + DAVINCI_LPSC_USB11, + DAVINCI_LPSC_USB20, + DAVINCI_LPSC_GPIO, + DAVINCI_LPSC_UHPI, + DAVINCI_LPSC_EMAC, + DAVINCI_LPSC_DDR_EMIF, + DAVINCI_LPSC_McASP0, + DAVINCI_LPSC_McASP1, + DAVINCI_LPSC_McASP2, + DAVINCI_LPSC_SPI1, + DAVINCI_LPSC_I2C1, + DAVINCI_LPSC_UART1, + DAVINCI_LPSC_UART2, + DAVINCI_LPSC_LCDC, + DAVINCI_LPSC_ePWM, + DAVINCI_LPSC_eCAP, + DAVINCI_LPSC_eQEP, + DAVINCI_LPSC_SCR_P0, + DAVINCI_LPSC_SCR_P1, + DAVINCI_LPSC_CR_P3, + DAVINCI_LPSC_L3_CBA_RAM +}; + +#endif /* CONFIG_SOC_DA8XX */ + void lpsc_on(unsigned int id); void dsp_on(void); @@ -174,6 +258,8 @@ void davinci_enable_emac(void); void davinci_enable_i2c(void); void davinci_errata_workarounds(void); +#ifndef CONFIG_SOC_DA8XX + /* Some PSC defines */ #define PSC_CHP_SHRTSW (0x01c40038) #define PSC_GBLCTL (0x01c41010) @@ -194,6 +280,39 @@ void davinci_errata_workarounds(void); #define PSC_SILVER_BULLET (0x01c41a20) +#else /* CONFIG_SOC_DA8XX */ + +#define PSC_PSC0_MODULE_ID_CNT 16 +#define PSC_PSC1_MODULE_ID_CNT 32 + +struct davinci_psc_regs { + dv_reg revid; + dv_reg rsvd0[71]; + dv_reg ptcmd; + dv_reg rsvd1; + dv_reg ptstat; + dv_reg rsvd2[437]; + union { + struct { + dv_reg mdstat[PSC_PSC0_MODULE_ID_CNT]; + dv_reg rsvd3[112]; + dv_reg mdctl[PSC_PSC0_MODULE_ID_CNT]; + } psc0; + struct { + dv_reg mdstat[PSC_PSC1_MODULE_ID_CNT]; + dv_reg rsvd3[96]; + dv_reg mdctl[PSC_PSC1_MODULE_ID_CNT]; + } psc1; + }; +}; + +#define davinci_psc0_regs ((struct davinci_psc_regs *)DAVINCI_PSC0_BASE) +#define davinci_psc1_regs ((struct davinci_psc_regs *)DAVINCI_PSC1_BASE) + +#endif /* CONFIG_SOC_DA8XX */ + +#ifndef CONFIG_SOC_DA8XX + /* Miscellania... */ #define VBPR (0x20000020) @@ -206,4 +325,122 @@ void davinci_errata_workarounds(void); #define PINMUX3 0x01c4000c #define PINMUX4 0x01c40010 +#else /* CONFIG_SOC_DA8XX */ + +struct davinci_pllc_regs { + dv_reg revid; + dv_reg rsvd1[56]; + dv_reg rstype; + dv_reg rsvd2[6]; + dv_reg pllctl; + dv_reg ocsel; + dv_reg rsvd3[2]; + dv_reg pllm; + dv_reg prediv; + dv_reg plldiv1; + dv_reg plldiv2; + dv_reg plldiv3; + dv_reg oscdiv; + dv_reg postdiv; + dv_reg rsvd4[3]; + dv_reg pllcmd; + dv_reg pllstat; + dv_reg alnctl; + dv_reg dchange; + dv_reg cken; + dv_reg ckstat; + dv_reg systat; + dv_reg rsvd5[3]; + dv_reg plldiv4; + dv_reg plldiv5; + dv_reg plldiv6; + dv_reg plldiv7; + dv_reg rsvd6[32]; + dv_reg emucnt0; + dv_reg emucnt1; +}; + +#define davinci_pllc_regs ((struct davinci_pllc_regs *)DAVINCI_PLL_CNTRL0_BASE) +#define DAVINCI_PLLC_DIV_MASK 0x1f + +/* Clock IDs */ +enum davinci_clk_ids { + DAVINCI_SPI0_CLKID = 2, + DAVINCI_UART2_CLKID = 2, + DAVINCI_MDIO_CLKID = 4, + DAVINCI_ARM_CLKID = 6, + DAVINCI_PLLM_CLKID = 0xff, + DAVINCI_PLLC_CLKID = 0x100, + DAVINCI_AUXCLK_CLKID = 0x101 +}; + +int clk_get(enum davinci_clk_ids id); + +/* Boot config */ +struct davinci_syscfg_regs { + dv_reg revid; + dv_reg rsvd[71]; + dv_reg pinmux[20]; + dv_reg suspsrc; + dv_reg chipsig; + dv_reg chipsig_clr; + dv_reg cfgchip0; + dv_reg cfgchip1; + dv_reg cfgchip2; + dv_reg cfgchip3; + dv_reg cfgchip4; +}; + +#define davinci_syscfg_regs \ + ((struct davinci_syscfg_regs *)DAVINCI_BOOTCFG_BASE) + +/* Emulation suspend bits */ +#define DAVINCI_SYSCFG_SUSPSRC_EMAC (1 << 5) +#define DAVINCI_SYSCFG_SUSPSRC_I2C (1 << 16) +#define DAVINCI_SYSCFG_SUSPSRC_SPI0 (1 << 21) +#define DAVINCI_SYSCFG_SUSPSRC_UART2 (1 << 20) +#define DAVINCI_SYSCFG_SUSPSRC_TIMER0 (1 << 27) + +/* Interrupt controller */ +struct davinci_aintc_regs { + dv_reg revid; + dv_reg cr; + dv_reg dummy0[2]; + dv_reg ger; + dv_reg dummy1[219]; + dv_reg ecr1; + dv_reg ecr2; + dv_reg ecr3; + dv_reg dummy2[1117]; + dv_reg hier; +}; + +#define davinci_aintc_regs ((struct davinci_aintc_regs *)DAVINCI_INTC_BASE) + +struct davinci_uart_ctrl_regs { + dv_reg revid1; + dv_reg revid2; + dv_reg pwremu_mgmt; + dv_reg mdr; +}; + +#define DAVINCI_UART_CTRL_BASE 0x28 +#define DAVINCI_UART0_CTRL_ADDR (DAVINCI_UART0_BASE + DAVINCI_UART_CTRL_BASE) +#define DAVINCI_UART1_CTRL_ADDR (DAVINCI_UART1_BASE + DAVINCI_UART_CTRL_BASE) +#define DAVINCI_UART2_CTRL_ADDR (DAVINCI_UART2_BASE + DAVINCI_UART_CTRL_BASE) + +#define davinci_uart0_ctrl_regs \ + ((struct davinci_uart_ctrl_regs *)DAVINCI_UART0_CTRL_ADDR) +#define davinci_uart1_ctrl_regs \ + ((struct davinci_uart_ctrl_regs *)DAVINCI_UART1_CTRL_ADDR) +#define davinci_uart2_ctrl_regs \ + ((struct davinci_uart_ctrl_regs *)DAVINCI_UART2_CTRL_ADDR) + +/* UART PWREMU_MGMT definitions */ +#define DAVINCI_UART_PWREMU_MGMT_FREE (1 << 0) +#define DAVINCI_UART_PWREMU_MGMT_URRST (1 << 13) +#define DAVINCI_UART_PWREMU_MGMT_UTRST (1 << 14) + +#endif /* CONFIG_SOC_DA8XX */ + #endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-davinci/i2c_defs.h b/include/asm-arm/arch-davinci/i2c_defs.h index 2e902e1..24cd268 100644 --- a/include/asm-arm/arch-davinci/i2c_defs.h +++ b/include/asm-arm/arch-davinci/i2c_defs.h @@ -28,7 +28,11 @@ #define I2C_WRITE 0 #define I2C_READ 1 +#ifndef CONFIG_SOC_DA8XX #define I2C_BASE 0x01c21000 +#else +#define I2C_BASE 0x01c22000 +#endif #define I2C_OA (I2C_BASE + 0x00) #define I2C_IE (I2C_BASE + 0x04) @@ -88,6 +92,7 @@ #define I2C_CON_XA (1 << 8) /* Expand address */ #define I2C_CON_STP (1 << 11) /* Stop condition (master mode only) */ #define I2C_CON_STT (1 << 13) /* Start condition (master mode only) */ +#define I2C_CON_FREE (1 << 14) /* Free run on emulation */ #define I2C_TIMEOUT 0xffff0000 /* Timeout mask for poll_i2c_irq() */

4 7

[U-Boot] [PATCH 1/4] ARM Add New Board GEC2410
by Hui.Tang 18 Nov '09

18 Nov '09

This patch add a new ARM board GEC2410. checkpatch.pl shows that all things are fine. total: 0 errors, 0 warnings, 1268 lines checked 0001-ARM-Add-New-Board-GEC2410.patch has no obvious style problems and is ready for submission. ========================================================= Signed-off-by: Hui.Tang <zetalabs(a)gmail.com> --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 7 + board/gec/gec2410/Makefile | 54 ++++++ board/gec/gec2410/README | 85 +++++++++ board/gec/gec2410/config.mk | 34 ++++ board/gec/gec2410/gec2410.c | 313 +++++++++++++++++++++++++++++++++ board/gec/gec2410/gec2410_mem.h | 122 +++++++++++++ board/gec/gec2410/lowlevel_init.S | 95 ++++++++++ board/gec/gec2410/u-boot-nand.lds | 61 +++++++ cpu/arm920t/s3c24x0/timer.c | 3 +- include/configs/gec2410.h | 262 +++++++++++++++++++++++++++ nand_spl/board/gec/gec2410/Makefile | 103 +++++++++++ nand_spl/board/gec/gec2410/config.mk | 40 +++++ nand_spl/board/gec/gec2410/u-boot.lds | 60 +++++++ 15 files changed, 1243 insertions(+), 1 deletions(-) create mode 100644 board/gec/gec2410/Makefile create mode 100644 board/gec/gec2410/README create mode 100644 board/gec/gec2410/config.mk create mode 100644 board/gec/gec2410/gec2410.c create mode 100644 board/gec/gec2410/gec2410_mem.h create mode 100644 board/gec/gec2410/lowlevel_init.S create mode 100644 board/gec/gec2410/u-boot-nand.lds create mode 100644 include/configs/gec2410.h create mode 100644 nand_spl/board/gec/gec2410/Makefile create mode 100644 nand_spl/board/gec/gec2410/config.mk create mode 100644 nand_spl/board/gec/gec2410/u-boot.lds diff --git a/MAINTAINERS b/MAINTAINERS index d70a9d2..6ecba41 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -429,6 +429,10 @@ Timur Tabi <timur(a)freescale.com> MPC8349E-mITX MPC8349 MPC8349E-mITX-GP MPC8349 +Hui Tang <zetalabs(a)gmail.com> + + gec2410 ARM920T + Erik Theisen <etheisen(a)mindspring.com> W7OLMC PPC4xx diff --git a/MAKEALL b/MAKEALL index d63c5c2..fffa58a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -548,6 +548,7 @@ LIST_ARM9=" \ cp926ejs \ cp946es \ cp966 \ + gec2410 \ imx27lite \ lpd7a400 \ mv88f6281gtw_ge \ diff --git a/Makefile b/Makefile index bcb3fe9..2de0b1d 100644 --- a/Makefile +++ b/Makefile @@ -2951,6 +2951,13 @@ davinci_dm365evm_config : unconfig davinci_dm6467evm_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci +gec2410_config : unconfig + @mkdir -p $(obj)include $(obj)board/gec/gec2410 + @mkdir -p $(obj)nand_spl/board/gec/gec2410 + @echo "RAM_TEXT = 0x33e00000" >> $(obj)board/gec/gec2410/config.tmp + @$(MKCONFIG) $(@:_config=) arm arm920t gec2410 gec s3c24x0 + @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk + imx27lite_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27 diff --git a/board/gec/gec2410/Makefile b/board/gec/gec2410/Makefile new file mode 100644 index 0000000..052f600 --- /dev/null +++ b/board/gec/gec2410/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# (C) Copyright 2009 +# Hui Tang <zetalabs(a)gmail.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := gec2410.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/gec/gec2410/README b/board/gec/gec2410/README new file mode 100644 index 0000000..952aae8 --- /dev/null +++ b/board/gec/gec2410/README @@ -0,0 +1,85 @@ +U-Boot for GEC2410 + +------------------------------------------------ +The supported features of the GEC2410 board are: + CPU (Samsung S3C2410 SoC) + SDRAM (64 MB , 2 pcs K4S561632, 32 bit) + NAND FLASH (64MB , 1 pcs K9F1208) + NOR FLASH (only on rev1.1 board, 2MB , 1 pcs SST39VF1601) + ETHERNET (10M , 1 pcs CS8900) + + +------------------------------------------------ +Memory Map from CPU point of view: + +for NAND FLASH boot: + Start Size Access to + ----------------------------------------------------- + 0x00000000 64MB NAND FLASH (first 4K SRAM for stepptingstone) + 0x19000300 CS8900 I/O base + 0x30000000 64MB SDRAM + 0x48000000 128MB Special Function Registers Area + + +for NOR FLASH boot: + Start Size Access to + ----------------------------------------------------- + 0x00000000 2MB NOR FLASH + 0x19000300 CS8900 I/O base + 0x30000000 64MB SDRAM + 0x40000000 4KB BootSRAM + 0x48000000 128MB Special Function Registers Area + + +------------------------------------------------ +Setting the board Jumpers & Switches: + + In order to get the board running with the default configuration the + jumpers need to be set as follows: + + Core board Jumpers: + JP1 close (Set boot mode, close for booting from NAND FLASH, + otherwise from NOR FLASH) + + Main board Jumpers: + J1 close (Set beep, close for enabling beep, or disabling beep) + J18 1-2 (1-2 set RXD2 as UART; 2-3 set RXD2 as IrDA) + J9,J10 2-3 (1-2 set USB HOST 1 to Host mode; + 2-3 set USB HOST 1 to Device mode) + J13 1-2 (1-2 set LCD working power to 5V; + 2-3 set LCD working power to 3.3V) + + Core board Switches: + S1 open (Reset button) + + Main board Switches: + K1~K16 open (4x4 keyboard) + + +------------------------------------------------ +LED & Connector Interfaces: + + Core board LEDs: + D1,D2 I/O port + D3 PWREN pin LED + D4 Core board power + + Main board LEDs: + D1~D4 GPIO + D5,D6 Ethernet + D11 Main board power + + Core board Connector Interfaces: + J1 JTAG (20 pins) + + Main board Connector Interfaces: + RJ1 Ethernet (RJ45) + J2 Audio In + J3 Audio Out + J4 Serial Port 1 + J5 Serial Port 2 + U4 IrDA Port + J7 USB HOST 0 + J9 USB HOST 1 / USB DEVICE + J11 USB DEVICE + J20 GPIO Pins diff --git a/board/gec/gec2410/config.mk b/board/gec/gec2410/config.mk new file mode 100644 index 0000000..f32ee2e --- /dev/null +++ b/board/gec/gec2410/config.mk @@ -0,0 +1,34 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> +# David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> +# +# GuangDong Embedded Software Center GEC2410 board with S3C2410X (ARM920T) cpu +# +# see http://www.gd-emb.com/sales_detail/menu-2410.html for more information on GEC2410 +# + +# +# GEC2410 has 1 bank of 64 MB DRAM +# +# 3000'0000 to 3400'0000 +# +# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000 +# optionally with a ramdisk at 3080'0000 +# +# we load ourself to 33e0'0000 +# +# download area is 3300'c000 +# + +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp + +ifndef CONFIG_NAND_SPL +TEXT_BASE = $(RAM_TEXT) +else +TEXT_BASE = 0 +endif + +LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot-nand.lds + +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/gec/gec2410 diff --git a/board/gec/gec2410/gec2410.c b/board/gec/gec2410/gec2410.c new file mode 100644 index 0000000..a9b6290 --- /dev/null +++ b/board/gec/gec2410/gec2410.c @@ -0,0 +1,313 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> + * + * (C) Copyright 2009 + * Hui Tang, <zetalabs(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <netdev.h> +#include <s3c2410.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define FCLK_SPEED 1 + +#if FCLK_SPEED == 0 /* Fout = 203MHz, Fin = 12MHz for Audio */ +#define M_MDIV 0xC3 +#define M_PDIV 0x4 +#define M_SDIV 0x1 +#elif FCLK_SPEED == 1 /* Fout = 202.8MHz */ +#define M_MDIV 0xA1 +#define M_PDIV 0x3 +#define M_SDIV 0x1 +#endif + +#define USB_CLOCK 1 + +#if USB_CLOCK == 0 +#define U_M_MDIV 0xA1 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x1 +#elif USB_CLOCK == 1 +#define U_M_MDIV 0x48 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x2 +#endif + +static inline void delay(unsigned long loops) +{ + __asm__ volatile ("1:\n" + "subs %0, %1, #1\n" + "bne 1b" : "=r" (loops) : "0" (loops)); +} + +/* + * Miscellaneous platform dependent initialisations + */ + +int board_init(void) +{ + struct s3c24x0_clock_power * const clk_power = + s3c24x0_get_base_clock_power(); + struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); + + /* to reduce PLL lock time, adjust the LOCKTIME register */ + writel(0xFFFFFF, &clk_power->LOCKTIME); + + /* configure MPLL */ + writel(((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV), &clk_power->MPLLCON); + + /* some delay between MPLL and UPLL */ + delay(4000); + + /* configure UPLL */ + writel(((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV), + &clk_power->UPLLCON); + + /* some delay between MPLL and UPLL */ + delay(8000); + + /* set up the I/O ports */ + /* configure GPA port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPA22 nFCE 1 + * GPA21 nRSTOUT 1 + * GPA20 nFRE 1 + * GPA19 nFWE 1 + * GPA18 ALE 1 + * GPA17 CLE 1 + * GPA16 nGCS5 1 + * GPA15 nGCS4 1 + * GPA14 nGCS3 1 + * GPA13 nGCS2 1 + * GPA12 nGCS1 1 + * GPA11 ADDR26 1 + * GPA10 ADDR25 1 + * GPA9 ADDR24 1 + * GPA8 ADDR23 1 + * GPA7 ADDR22 1 + * GPA6 ADDR21 1 + * GPA5 ADDR20 1 + * GPA4 ADDR19 1 + * GPA3 ADDR18 1 + * GPA2 ADDR17 1 + * GPA1 ADDR16 1 + * GPA0 ADDR0 1 + *====================================*/ + writel(0x007FFFFF, &gpio->GPACON); + + /* configure GPB port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPB10 Input 00 + * GPB9 Output 01 + * GPB8 Input 00 + * GPB7 Output 01 + * GPB6 Input 00 + * GPB5 Output 01 + * GPB4 Output 01 + * GPB3 Output 01 + * GPB2 Output 01 + * GPB1 Output 01 + * GPB0 Output 01 + *====================================*/ + writel(0x00044555, &gpio->GPBCON); + /* disable all pull-up register */ + writel(0x000007FF, &gpio->GPBUP); + + /* configure GPC port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPC15 VD7 10 + * GPC14 VD6 10 + * GPC13 VD5 10 + * GPC12 VD4 10 + * GPC11 VD3 10 + * GPC10 VD2 10 + * GPC9 VD1 10 + * GPC8 VD0 10 + * GPC7 LCDVF2 10 + * GPC6 LCDVF1 10 + * GPC5 LCDVF0 10 + * GPC4 VM 10 + * GPC3 VFRAME 10 + * GPC2 VLINE 10 + * GPC1 VCLK 10 + * GPC0 LEND 10 + *====================================*/ + writel(0xAAAAAAAA, &gpio->GPCCON); + /* disable all pull-up register */ + writel(0x0000FFFF, &gpio->GPCUP); + + /* configure GPD port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPD15 VD23 10 + * GPD14 VD22 10 + * GPD13 VD21 10 + * GPD12 VD20 10 + * GPD11 VD19 10 + * GPD10 VD18 10 + * GPD9 VD17 10 + * GPD8 VD16 10 + * GPD7 VD15 10 + * GPD6 VD14 10 + * GPD5 VD13 10 + * GPD4 VD12 10 + * GPD3 VD11 10 + * GPD2 VD10 10 + * GPD1 VD9 10 + * GPD0 VD8 10 + *====================================*/ + writel(0xAAAAAAAA, &gpio->GPDCON); + /* disable all pull-up register */ + writel(0x0000FFFF, &gpio->GPDUP); + + /* configure GPE port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPE15 IICSDA 10 + * GPE14 IICSCL 10 + * GPE13 SPICLK0 10 + * GPE12 SPIMOSIO 10 + * GPE11 SPIMISOO 10 + * GPE10 SDDAT3 10 + * GPE9 SDDAT2 10 + * GPE8 SDDAT1 10 + * GPE7 SDDAT0 10 + * GPE6 SDCMD 10 + * GPE5 SDCLK 10 + * GPE4 I2SSDO 10 + * GPE3 I2SSDI 10 + * GPE2 CDCLK 10 + * GPE1 I2SSCLK 10 + * GPE0 I2SLRCK 10 + *====================================*/ + writel(0xAAAAAAAA, &gpio->GPECON); + /* disable all pull-up register */ + writel(0x0000FFFF, &gpio->GPEUP); + + /* configure GPF port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPF7 Output 01 + * GPF6 Output 01 + * GPF5 Output 01 + * GPF4 Output 01 + * GPF3 EINT3 10 + * GPF2 EINT2 10 + * GPF1 EINT1 10 + * GPF0 EINT0 10 + *====================================*/ + writel(0x000055AA, &gpio->GPFCON); + /* disable all pull-up register */ + writel(0x000000FF, &gpio->GPFUP); + + /* configure GPG port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPG15 nYPON 11 + * GPG14 YMON 11 + * GPG13 nXPON 11 + * GPG12 XMON 11 + * GPG11 EINT19 10 + * GPG10 Output 01 + * GPG9 Output 01 + * GPG8 Output 01 + * GPG7 SPICLK1 11 + * GPG6 SPIMOSI1 11 + * GPG5 SPIMISO1 11 + * GPG4 LCD_PWREN 11 + * GPG3 EINT11 10 + * GPG2 nSS0 11 + * GPG1 EINT9 10 + * GPG0 EINT8 10 + *====================================*/ + writel(0xFF95FFBA, &gpio->GPGCON); + /* disable all pull-up register */ + writel(0x0000FFFF, &gpio->GPGUP); + + /* configure GPH port */ + /*====================================* + * PIN FUNCTION VALUE * + *====================================* + * GPH10 CLKOUT1 10 + * GPH9 CLKOUT0 10 + * GPH8 UEXTCLK 10 + * GPH7 nCTS1 11 + * GPH6 nRTS1 11 + * GPH5 RXD1 10 + * GPH4 TXD1 10 + * GPH3 RXD0 10 + * GPH2 TXD0 10 + * GPH1 nRTS0 10 + * GPH0 nCTS0 10 + *====================================*/ + writel(0x002AFAAA, &gpio->GPHCON); + /* disable all pull-up register */ + writel(0x000007FF, &gpio->GPHUP); + + /* arch number of GEC2410-Board */ + gd->bd->bi_arch_number = MACH_TYPE_GEC2410; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = 0x30000100; + + icache_enable(); + dcache_enable(); + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, + PHYS_SDRAM_1_SIZE); + + return 0; +} + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_CS8900 + rc = cs8900_initialize(0, CONFIG_CS8900_BASE); +#endif + return rc; +} +#endif diff --git a/board/gec/gec2410/gec2410_mem.h b/board/gec/gec2410/gec2410_mem.h new file mode 100644 index 0000000..911b34b --- /dev/null +++ b/board/gec/gec2410/gec2410_mem.h @@ -0,0 +1,122 @@ +/* + * Memory Setup stuff - taken from blob memsetup.S + * + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw(a)its.tudelft.nl) and + * Jan-Derk Bakker (J.D.Bakker(a)its.tudelft.nl) + * + * Modified for the Samsung SMDK2410 by + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> + * + * Copyright (C) 2009 Hui Tang <zetalabs(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * + * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S + * + * Copyright (C) 2002 Samsung Electronics SW.LEE <hitchcar(a)sec.samsung.com> + * + */ + +#define BWSCON 0x48000000 + +/* BWSCON */ +#define DW8 (0x0) +#define DW16 (0x1) +#define DW32 (0x2) +#define WAIT (0x1<<2) +#define UBLB (0x1<<3) + +#define B1_BWSCON (DW32) +#define B2_BWSCON (DW16) +#define B3_BWSCON (DW16 + WAIT + UBLB) +#define B4_BWSCON (DW16) +#define B5_BWSCON (DW16) +#define B6_BWSCON (DW32) +#define B7_BWSCON (DW32) + +/* BANK0CON */ +#define B0_Tacs 0x0 /* 0clk */ +#define B0_Tcos 0x0 /* 0clk */ +#define B0_Tacc 0x7 /* 14clk */ +#define B0_Tcoh 0x0 /* 0clk */ +#define B0_Tah 0x0 /* 0clk */ +#define B0_Tacp 0x0 +#define B0_PMC 0x0 /* normal */ + +/* BANK1CON */ +#define B1_Tacs 0x0 /* 0clk */ +#define B1_Tcos 0x0 /* 0clk */ +#define B1_Tacc 0x7 /* 14clk */ +#define B1_Tcoh 0x0 /* 0clk */ +#define B1_Tah 0x0 /* 0clk */ +#define B1_Tacp 0x0 +#define B1_PMC 0x0 + +#define B2_Tacs 0x0 +#define B2_Tcos 0x0 +#define B2_Tacc 0x7 +#define B2_Tcoh 0x0 +#define B2_Tah 0x0 +#define B2_Tacp 0x0 +#define B2_PMC 0x0 + +#define B3_Tacs 0x0 /* 0clk */ +#define B3_Tcos 0x3 /* 4clk */ +#define B3_Tacc 0x7 /* 14clk */ +#define B3_Tcoh 0x1 /* 1clk */ +#define B3_Tah 0x0 /* 0clk */ +#define B3_Tacp 0x3 /* 6clk */ +#define B3_PMC 0x0 /* normal */ + +#define B4_Tacs 0x0 /* 0clk */ +#define B4_Tcos 0x0 /* 0clk */ +#define B4_Tacc 0x7 /* 14clk */ +#define B4_Tcoh 0x0 /* 0clk */ +#define B4_Tah 0x0 /* 0clk */ +#define B4_Tacp 0x0 +#define B4_PMC 0x0 /* normal */ + +#define B5_Tacs 0x0 /* 0clk */ +#define B5_Tcos 0x0 /* 0clk */ +#define B5_Tacc 0x7 /* 14clk */ +#define B5_Tcoh 0x0 /* 0clk */ +#define B5_Tah 0x0 /* 0clk */ +#define B5_Tacp 0x0 +#define B5_PMC 0x0 /* normal */ + +#define B6_MT 0x3 /* SDRAM */ +#define B6_Trcd 0x1 +#define B6_SCAN 0x1 /* 9bit */ + +#define B7_MT 0x3 /* SDRAM */ +#define B7_Trcd 0x1 /* 3clk */ +#define B7_SCAN 0x1 /* 9bit */ + +/* REFRESH parameter */ +#define REFEN 0x1 /* Refresh enable */ +#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ +#define Trp 0x0 /* 2clk */ +#define Trc 0x3 /* 7clk */ +#define Tchr 0x2 /* 3clk */ +#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */ +/**************************************/ diff --git a/board/gec/gec2410/lowlevel_init.S b/board/gec/gec2410/lowlevel_init.S new file mode 100644 index 0000000..c40440b --- /dev/null +++ b/board/gec/gec2410/lowlevel_init.S @@ -0,0 +1,95 @@ +/* + * Memory Setup stuff - taken from blob memsetup.S + * + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw(a)its.tudelft.nl) and + * Jan-Derk Bakker (J.D.Bakker(a)its.tudelft.nl) + * + * Modified for the Samsung SMDK2410 by + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> + * + * Copyright (C) 2009 Hui Tang <zetalabs(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include <config.h> +#include <version.h> + +#include "gec2410_mem.h" + +_TEXT_BASE: + .word TEXT_BASE + +.globl lowlevel_init +lowlevel_init: +#if defined(CONFIG_NAND_SPL) || !defined(CONFIG_BOOT_NAND) + /* memory control configuration */ + /* make r0 relative the current location so that it */ + /* reads SMRDATA out of FLASH rather than memory ! */ + ldr r0, =SMRDATA + ldr r1, _TEXT_BASE + sub r0, r0, r1 + ldr r1, =BWSCON /* Bus Width Status Controller */ + add r2, r0, #13*4 +0: + ldr r3, [r0], #4 + str r3, [r1], #4 + cmp r2, r0 + bne 0b +#endif /* CONFIG_NAND_SPL */ + + /* everything is fine now */ + mov pc, lr + +/* dummy function, called by start_code() in cpu/arm920t/start.S */ +.globl coloured_LED_init +coloured_LED_init: + mov pc, lr + +/* dummy function, called by start_code() in cpu/arm920t/start.S */ +.globl red_LED_on +red_LED_on: + mov pc, lr + + .ltorg +/* the literal pools origin */ + +SMRDATA: + .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12) \ + +(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) + .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8) \ + +(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) + .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8) \ + +(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) + .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8) \ + +(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) + .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8) \ + +(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) + .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8) \ + +(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) + .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8) \ + +(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) + .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) + .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) + .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) + .word 0x32 + .word 0x30 + .word 0x30 diff --git a/board/gec/gec2410/u-boot-nand.lds b/board/gec/gec2410/u-boot-nand.lds new file mode 100644 index 0000000..a30ece3 --- /dev/null +++ b/board/gec/gec2410/u-boot-nand.lds @@ -0,0 +1,61 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm920t/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + .mmudata : { *(.mmudata) } + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) . = ALIGN(4); } + _end = .; +} diff --git a/cpu/arm920t/s3c24x0/timer.c b/cpu/arm920t/s3c24x0/timer.c index 20cedd4..d463a03 100644 --- a/cpu/arm920t/s3c24x0/timer.c +++ b/cpu/arm920t/s3c24x0/timer.c @@ -188,7 +188,8 @@ ulong get_tbclk(void) tbclk = timer_load_val * 100; #elif defined(CONFIG_SBC2410X) || \ defined(CONFIG_SMDK2410) || \ - defined(CONFIG_VCMA9) + defined(CONFIG_VCMA9) || \ + defined(CONFIG_GEC2410) tbclk = CONFIG_SYS_HZ; #else # error "tbclk not configured" diff --git a/include/configs/gec2410.h b/include/configs/gec2410.h new file mode 100644 index 0000000..8279e36 --- /dev/null +++ b/include/configs/gec2410.h @@ -0,0 +1,262 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * Gary Jennejohn <garyj(a)denx.de> + * David Mueller <d.mueller(a)elsoft.ch> + * + * Configuation settings for the GD-Embedded Software Center GEC2410 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ +#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */ +#define CONFIG_GEC2410 1 /* on a GEC2410 Board */ + +#define CONFIG_SYS_SDRAM_BASE 0x30000000 + +/* input clock of PLL */ +#define CONFIG_SYS_CLK_FREQ 12000000 /* the GEC2410 has 12MHz input clock */ + +#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000) +#define CONFIG_ENABLE_MMU +#endif + +#define CONFIG_MEMORY_UPPER_CODE + +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG + +#define USE_920T_MMU 1 +#if 0 +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#undef CONFIG_SKIP_RELOCATE_UBOOT +#endif + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * Hardware drivers + */ +#define CONFIG_NET_MULTI +#define CONFIG_CS8900 /* we have a CS8900 on-board */ +#define CONFIG_CS8900_BASE 0x19000300 +#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ + +/* + * select serial console configuration + */ +#define CONFIG_S3C24X0_SERIAL 1 +#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on GEC2410 */ + +/************************************************************ + * RTC + ************************************************************/ +#define CONFIG_RTC_S3C24X0 1 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_BAUDRATE 115200 + + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "GEC2410#" /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START \ + CONFIG_SYS_SDRAM_BASE /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END \ + (CONFIG_SYS_SDRAM_BASE + 0x3e00000) /* 62 MB in DRAM */ + +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */ + +#define CONFIG_SYS_HZ 1000 + +/* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE 0x40000 /* regular stack 256KB */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ + +#define CONFIG_SYS_FLASH_BASE 0x00000000 +#define CONFIG_SYS_MONITOR_BASE 0x00000000 + +#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ + +#define CONFIG_SYS_FLASH_CFI 1 /* Use CFI parameters (needed?) */ +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT + +#define PHYS_FLASH_SIZE 0x00200000 /* 2MB */ +#define CONFIG_ENV_ADDR \ + (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */ + +/* timeout values are in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT \ + (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT \ + (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ + +#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Parameters */ + +/* + * GEC2410 board specific data + */ + +#define CONFIG_IDENT_STRING " for GEC2410" + +/* base address for uboot */ +#define CONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS_SDRAM_BASE + 0x03e00000) +/* total memory available to uboot */ +#define CONFIG_SYS_UBOOT_SIZE (1024 * 1024) + +/* Put environment copies after the end of U-Boot owned RAM */ +#define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE) + +#ifdef CONFIG_ENABLE_MMU +#define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000 +#define CONFIG_BOOTCOMMAND "nand read 0xc0008000 0x60000 0x1a0000;" \ + "bootm 0xc0008000" +#else +#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE +#define CONFIG_BOOTCOMMAND "nand read 0x30008000 0x60000 0x1a0000;" \ + "bootm 0x30008000" +#endif + +/* NAND U-Boot load and start address */ +#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_MAPPED_RAM_BASE + 0x03e00000) +#define CONFIG_ENV_OFFSET 0x0040000 /* Offset of Environment Sector */ + +/* NAND configuration */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x4e00000c /* R/W NAND Flash data register */ +#define CONFIG_S3C2410_NAND_HWECC +#define CONFIG_S3C2410_NAND_BBT + +/* NUB load-addr */ +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE +/* NUB start-addr */ +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST + +/* Offset to RAM U-Boot image */ +#define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024) +/* Size of RAM U-Boot image */ +#define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024) + +/* NAND chip page size */ +#define CONFIG_SYS_NAND_PAGE_SIZE 512 +/* NAND chip block size */ +#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) +/* NAND chip page per block count */ +#define CONFIG_SYS_NAND_PAGE_COUNT 32 +/* Location of the bad-block label */ +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +/* Extra address cycle for > 32MiB */ +#define CONFIG_SYS_NAND_4_ADDR_CYCLE 1 /* Fourth addr used (>32MB) */ + +/* Size of the block protected by one OOB (Spare Area in Samsung terminology) */ +#define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE +/* Number of ECC bytes per OOB - S3C2410 calculates 4 bytes ECC in 1-bit mode */ +#define CONFIG_SYS_NAND_ECCBYTES 3 +/* Number of ECC-blocks per NAND page */ +#define CONFIG_SYS_NAND_ECCSTEPS \ + (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE) +/* Size of a single OOB region */ +#define CONFIG_SYS_NAND_OOBSIZE 16 +/* Number of ECC bytes per page */ +#define CONFIG_SYS_NAND_ECCTOTAL \ + (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS) +/* ECC byte positions */ +#define CONFIG_SYS_NAND_ECCPOS {0, 1, 2} + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + +/* Boot configuration */ +#define CONFIG_BOOT_NAND +#define CONFIG_NAND +#define CONFIG_NAND_S3C2410 1 + +/* Settings as above boot configuration */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_BOOTARGS "console=ttySAC,115200" + +#endif /* __CONFIG_H */ diff --git a/nand_spl/board/gec/gec2410/Makefile b/nand_spl/board/gec/gec2410/Makefile new file mode 100644 index 0000000..ece460d --- /dev/null +++ b/nand_spl/board/gec/gec2410/Makefile @@ -0,0 +1,103 @@ +# +# (C) Copyright 2006-2007 +# Stefan Roese, DENX Software Engineering, sr(a)denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CONFIG_NAND_SPL = y +CONFIG_SKIP_RELOCATE_UBOOT = y + +include $(TOPDIR)/config.mk +include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_NAND_SPL -DCONFIG_SKIP_RELOCATE_UBOOT +CFLAGS += -DCONFIG_NAND_SPL -DCONFIG_SKIP_RELOCATE_UBOOT + +SOBJS = start.o lowlevel_init.o +COBJS = nand_boot.o s3c2410_nand.o + +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +all: $(obj).depend $(ALL) + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +$(nandobj)u-boot.lds: $(LDSCRIPT) + $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@ + +# create symbolic links for common files + +# from cpu directory +$(obj)start.S: + @rm -f $@ + @ln -s $(TOPDIR)/cpu/arm920t/start.S $@ + +# from SoC directory + +# from board directory +$(obj)lowlevel_init.S: + @rm -f $@ + @ln -s $(TOPDIR)/board/gec/gec2410/lowlevel_init.S $@ + +# from nand_spl directory +$(obj)nand_boot.c: + @rm -f $@ + @ln -s $(TOPDIR)/nand_spl/nand_boot.c $@ + +# from drivers/mtd/nand directory +$(obj)s3c2410_nand.c: + @rm -f $@ + @ln -s $(TOPDIR)/drivers/mtd/nand/s3c2410_nand.c $@ + +######################################################################### + +$(obj)%.o: $(obj)%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(obj)%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/nand_spl/board/gec/gec2410/config.mk b/nand_spl/board/gec/gec2410/config.mk new file mode 100644 index 0000000..7db7fd1 --- /dev/null +++ b/nand_spl/board/gec/gec2410/config.mk @@ -0,0 +1,40 @@ +# +# (C) Copyright 2006 +# Stefan Roese, DENX Software Engineering, sr(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# +# GEC2410 Study Platform (gec2410) board + +# TEXT_BASE for SPL: +# +# On S3C2410 platforms the SPL is located in SRAM at 0. +# +TEXT_BASE = 0 + +include $(TOPDIR)/board/$(BOARDDIR)/config.mk + +# PAD_TO used to generate a 4kByte binary needed for the combined image +# -> PAD_TO = TEXT_BASE + 4096 +PAD_TO := 0x00001000 + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff --git a/nand_spl/board/gec/gec2410/u-boot.lds b/nand_spl/board/gec/gec2410/u-boot.lds new file mode 100644 index 0000000..5871f7e --- /dev/null +++ b/nand_spl/board/gec/gec2410/u-boot.lds @@ -0,0 +1,60 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + start.o (.text) + nand_boot.o (.text) + + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) . = ALIGN(4); } + _end = .; +} -- 1.6.0.4

4 4

[U-Boot] [PATCH v2] README: Add an example of adding a new board.
by Robert P. J. Day 18 Nov '09

18 Nov '09

Show the simple end result of adding an example board (BeagleBoard). Signed-off-by: Robert P. J. Day <rpjday(a)crashcourse.ca> --- based on dirk's earlier email, i'm emphasizing that this represents only the *end result* of adding BeagleBoard support to U-Boot. anything more involved than that wouldn't really belong in the README and would more properly be described in, say, an ARM porting guide. diff --git a/README b/README index 2c77687..3e5bb69 100644 --- a/README +++ b/README @@ -2874,6 +2874,75 @@ steps: [Of course, this last step is much harder than it sounds.] +A real-life example of adding a new board +========================================= + + As a working example of the end result of adding a new board, +here's a list of files and directories that were added/changed to +support the OMAP3-based BeagleBoard. Note that these changes don't +represent *how* this board was added, they represent only the +end result. + + First, the new BeagleBoard-related files: + + ./board/ti/beagle/ + beagle.c + beagle.h + config.mk + Makefile + ./include/configs/omap3_beagle.h + +Followed by eventual changes to some existing files: + + Makefile + ======== + + omap3_beagle_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 beagle ti omap3 + + MAKEALL + ======= + + LIST_ARM_CORTEX_A8=" \ + devkit8000 \ + omap3_beagle \ + omap3_overo \ + ... + + include/asm-arm/types.h + ======================= + + #ifdef CONFIG_MACH_OMAP3_BEAGLE + # ifdef machine_arch_type + # undef machine_arch_type + # define machine_arch_type __machine_arch_type + # else + # define machine_arch_type MACH_TYPE_OMAP3_BEAGLE + # endif + # define machine_is_omap3_beagle() (machine_arch_type == MACH_TYPE_OMAP3_BEAGLE) + #else + # define machine_is_omap3_beagle() (0) + #endif + + doc/README.omap3 + ================ + + Build + ===== + + * BeagleBoard: + + make omap3_beagle_config + make + + MAINTAINERS + =========== + + Dirk Behme <dirk.behme(a)gmail.com> + + omap3_beagle ARM CORTEX-A8 (OMAP3530 SoC) + + Testing of U-Boot Modifications, Ports to New Hardware, etc.: ============================================================== rday -- ======================================================================== Robert P. J. Day Waterloo, Ontario, CANADA Linux Consulting, Training and Kernel Pedantry. Web page: http://crashcourse.ca Twitter: http://twitter.com/rpjday ========================================================================

2 3

[U-Boot] [PATCH] fix flash_sect_erase() to display correct message
by 이승현 18 Nov '09

18 Nov '09

flash_sect_erase() displays message "Erased #N sectors" even when there are some protected sectors found and command "erase" fail. Signed-off-by: Seunghyeon Rhee <seunghyeon(a)lpmtec.com> --- common/cmd_flash.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/common/cmd_flash.c b/common/cmd_flash.c index 3773412..b3d982f 100644 --- a/common/cmd_flash.c +++ b/common/cmd_flash.c @@ -451,7 +451,10 @@ int flash_sect_erase (ulong addr_first, ulong addr_last) rcode = flash_erase (info, s_first[bank], s_last[bank]); } } - printf ("Erased %d sectors\n", erased); + if (rcode == ERR_PROTECTED) + printf ("Not erased - protected sector(s) found\n"); + else + printf ("Erased %d sectors\n", erased); } else if (rcode == 0) { puts ("Error: start and/or end address" " not on sector boundary\n"); -- 1.6.2.5 ------- Seunghyeon Rhee, Ph.D. / Director LPM Technology Inc. T +82-70-8255-6007 F +82-2-6442-6462 M +82-10-2790-0657

4 6

[U-Boot] [PATCH 1/4 v2] DA830: Add pinmux for USB0_DRVVBUS
by Ajay Kumar Gupta 18 Nov '09

18 Nov '09

USB0_DRVVBUS pinmux configuration is required for USB functinality in uboot. Signed-off-by: Ajay Kumar Gupta <ajay.gupta(a)ti.com> Signed-off-by: Swaminathan S <swami.iyer(a)ti.com> --- Created and tested against latest uboot-ti/master branch. Changes from v1: - Added GPIO definitions - Used GPIO register pointer to program GPIO - Fixed alignment and tabs - Used SYSCONFIG pointer to program USB PHY in chipcfg2 register board/davinci/da830evm/da830evm.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/board/davinci/da830evm/da830evm.c b/board/davinci/da830evm/da830evm.c index bb8cc3c..7cf6013 100644 --- a/board/davinci/da830evm/da830evm.c +++ b/board/davinci/da830evm/da830evm.c @@ -65,6 +65,11 @@ const struct pinmux_config i2c_pins[] = { { pinmux[9], 2, 4 } }; +/* USB0_DRVVBUS pin muxer settings */ +const struct pinmux_config usb_pins[] = { + { pinmux[9], 1, 1 } +}; + int board_init(void) { #ifndef CONFIG_USE_IRQ @@ -118,6 +123,9 @@ int board_init(void) if (davinci_configure_pin_mux(i2c_pins, ARRAY_SIZE(i2c_pins)) != 0) return 1; + if (davinci_configure_pin_mux(usb_pins, ARRAY_SIZE(usb_pins)) != 0) + return 1; + /* enable the console UART */ writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | DAVINCI_UART_PWREMU_MGMT_UTRST), -- 1.6.2.4

5 10

[U-Boot] [PATCH 1/1] S3C2410 NAND Flash Add Missing Function
by Hui.Tang 18 Nov '09

18 Nov '09

This patch add nand_read_buf() for S3C2410 NAND SPL. In nand_spl/nand_boot.c, nand_boot() will check nand->select_chip, so nand->select_chip should also be initialized. Signed-off-by: Hui.Tang <zetalabs(a)gmail.com> --- drivers/mtd/nand/s3c2410_nand.c | 31 +++++++++++++++++++++++++++---- 1 files changed, 27 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/s3c2410_nand.c b/drivers/mtd/nand/s3c2410_nand.c index f2f3e72..815c78e 100644 --- a/drivers/mtd/nand/s3c2410_nand.c +++ b/drivers/mtd/nand/s3c2410_nand.c @@ -36,6 +36,21 @@ #define S3C2410_ADDR_NALE 4 #define S3C2410_ADDR_NCLE 8 +#ifdef CONFIG_NAND_SPL + +/* in the early stage of NAND flash booting, printf() is not available */ +#define printf(fmt, args...) + +static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) +{ + int i; + struct nand_chip *this = mtd->priv; + + for (i = 0; i < len; i++) + buf[i] = readb(this->IO_ADDR_R); +} +#endif + static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *chip = mtd->priv; @@ -83,9 +98,10 @@ void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) { - ecc_code[0] = NFECC0; - ecc_code[1] = NFECC1; - ecc_code[2] = NFECC2; + struct s3c2410_nand *nand = s3c2410_get_base_nand(); + ecc_code[0] = readb(&nand->NFECC); + ecc_code[1] = readb(&nand->NFECC + 1); + ecc_code[2] = readb(&nand->NFECC + 2); debugX(1, "s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n", mtd , ecc_code[0], ecc_code[1], ecc_code[2]); @@ -130,8 +146,13 @@ int board_nand_init(struct nand_chip *nand) /* initialize nand_chip data structure */ nand->IO_ADDR_R = nand->IO_ADDR_W = (void *)&nand_reg->NFDATA; + nand->select_chip = NULL; + /* read_buf and write_buf are default */ /* read_byte and write_byte are default */ +#ifdef CONFIG_NAND_SPL + nand->read_buf = nand_read_buf; +#endif /* hwcontrol always must be implemented */ nand->cmd_ctrl = s3c2410_hwcontrol; @@ -142,7 +163,9 @@ int board_nand_init(struct nand_chip *nand) nand->ecc.hwctl = s3c2410_nand_enable_hwecc; nand->ecc.calculate = s3c2410_nand_calculate_ecc; nand->ecc.correct = s3c2410_nand_correct_data; - nand->ecc.mode = NAND_ECC_HW3_512; + nand->ecc.mode = NAND_ECC_HW; + nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE; + nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES; #else nand->ecc.mode = NAND_ECC_SOFT; #endif -- 1.6.3.3

2 1