October 2009 - U-Boot

Re: [U-Boot] [PATCH] add u-boot sja1000/can support
by Mike Frysinger 26 Oct '09

26 Oct '09

On Monday 26 October 2009 00:48:39 miaofng wrote: > Thanks for careful review. I'll resend the patch according to your remarks > except follwing: 1) > > > +int register_candev(struct can_device *dev) > > use "can" or "candev", dont mix the two > > answer: register_candev is origin from register_netdev(...). CAN is > something like network, it may has high level protocols such as open-can > and etc, so i want to keep that story. i know what CAN is. the Linux approach makes sense because they've architected CAN at the socket() layer, and all of the network layers are written with common coding style. but there is no such socket/network layer in u-boot so the can/candev distinction isnt necessary. > > +int sja1000_interrupt(struct can_device *dev) > > u-boot is a polled architecture, not an interrupt based one. i guess this > driver needs rewriting to do that. > > answer: no, i want to keep that structure. Then linux drivers can be ported > to u-boot easily. take an example, in sja1000, i only need to replace > "_net" to "_can" at most of time. To gain this convience, i added the wrap > layer of can_core.c. the convenience factor doesnt mean you can ignore u-boot design principles. the default behavior for all frameworks/drivers is a polled mode because it's simple and straightforward. not all u-boot ports even support interrupts > In order to work in u-boot polled mode, people only > need to call sja1000_interrupt periodly. It works fine on my board. erm, no, that's not how things work in u-boot. u-boot processes commands given to it (either via scripts or from user input), and each command does not return until it is completely done processing. there is no "backgrounding" of drivers -- u-boot is not an OS and it is not threaded. that means any CAN operation does not return until it has finished sending/receiving everything it was told to. -mike

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Re: [U-Boot] [PATCH] add u-boot sja1000/can support
by miaofng 26 Oct '09

26 Oct '09

Hi Mike, Thanks for your careful review. I'll resend the patch according to your remarks except below: 1) > +int register_candev(struct can_device *dev) use "can" or "candev", dont mix the two answer: register_candev is origin from register_netdev(...). CAN is something like network, it may has high level protocols such as open-can and etc, so i want to keep that story. 2) > +int sja1000_interrupt(struct can_device *dev) u-boot is a polled architecture, not an interrupt based one. i guess this driver needs rewriting to do that. answer: no, i want to keep that structure. Then linux drivers can be ported to u-boot easily. take an example, in sja1000, i only need to replace "_net" to "_can" at most of time. To gain this convience, i added the wrap layer of can_core.c. In order to work in u-boot polled mode, people only need to call sja1000_interrupt periodly. It works fine on my board. On Saturday 24 October 2009 00:17:50 miaofng wrote: > From 1f6aaba856fbf484c442eb33cf220774d57fba8d Mon Sep 17 00:00:00 2001 > From: miaofng <miaofng(a)gmail.com> > Date: Fri, 23 Oct 2009 17:06:50 +0800 > Subject: [PATCH] [can] add u-boot sja1000/can support this should be split into two patches -- one for the core CAN code and one for the sja1000-specific implementation. it's also lacking documentation updates to the top level README or perhaps a standalone doc/README.can file unconditionally calling can_init() is broken (in lib_arm/board.c). can is like any other driver and can be enabled/disabled. it needs a dedicated CONFIG_CAN option which would be leveraged in drviers/can/Makefile to add can_core.c to the build. > --- /dev/null > +++ b/drivers/can/can_core.c > +#define can_debug printf > +#define can_error printf uhh, what ? we already have debug() macros. dont go creating your own brand new stuff. > +#ifdef CONFIG_CMD_CAN CONFIG_CMD_xxx is reserved for actual commands as in U_BOOT_CMD. you arent implementing that, so this is wrong. besides, it isnt needed once you use a proper CONFIG_CAN and add it to the top level Makefile. > +void canif_rx(struct can_frame *cf, struct can_device *dev) > +{ > + int len; > + > + //error frame? C++ style comments are not allowed. use normal C /* comments */. > + if(cf->can_id&CAN_ERR_FLAG) > + { you need to read the style documentation. u-boot code follows the linux kernel. that means this should have been: if (cf->can_id & CAN_ERR_FLAG) { all of your code is horribly broken in these regards > +int can_init(void) > +{ > +#ifdef CONFIG_CMD_CAN > + int index; > + for(index = 0; index < CONFIG_CAN_DEV_MAX; index ++) can_devs[index] = 0; use memset() like god intended. then again, can_devs is declared static and in the .bss, so this init step is unnecessary. > + board_can_init(); > +#endif > + return 0; > +} these need to be weak's like all the other subsystems do it. look at net/eth.c and how it does it: - can_initialize() - weak board_can_init() - weak cpu_can_init() > +int register_candev(struct can_device *dev) use "can" or "candev", dont mix the two > --- /dev/null > +++ b/drivers/can/sja1000.c > +//MODULE_AUTHOR("Oliver Hartkopp <oliver.hartkopp(a)volkswagen.de>"); > +//MODULE_LICENSE("Dual BSD/GPL"); > +//MODULE_DESCRIPTION(DRV_NAME "CAN netdevice driver"); dont leave crap behind -- delete it > +int sja1000_interrupt(struct can_device *dev) u-boot is a polled architecture, not an interrupt based one. i guess this driver needs rewriting to do that. > +int register_sja1000dev(struct can_device *dev) can drivers should have a standard naming convention. perhaps something like: can_<driver>_register() > +void unregister_sja1000dev(struct can_device *dev) > +{ > + set_reset_mode(dev); > + unregister_candev(dev); > +} do we really need an unregister framework ? none of the other subsystems do and it hasnt been a problem. > --- /dev/null > +++ b/include/candev.h > @@ -0,0 +1,46 @@ > +/* > + * (C) Copyright 2009 miaofng<miaofng(a)gmail.com> > + * > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +/* > + * netdev.h - definitions an prototypes for network devices > + */ > + > +#ifndef _CANDEV_H_ > +#define _CANDEV_H_ clearly you've been copying & pasting code from the Linux kernel, yet you've been stripping out people's copyrights. that wont fly. -mike

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[U-Boot] [u-boot] [PATCH] [2/2] [v1.2] mxc_fec: avoid free() calls to already freed pointers.
by javier Martin 25 Oct '09

25 Oct '09

Sometimes, inside NetLoop, eth_halt() is called before eth_init() has been called. This is harmless except for free() calls to pointers which have not been allocated yet. This patch adds two states to distinguish when it is necessary to call free() and when it is not. This has been tested in i.MX27 Litekit board and eldk-4.2 toolchains. Signed-off-by: Javier Martin <javier.martin(a)vista-silicon.com> -- drivers/net/fec_mxc.c | 9 +++++++-- drivers/net/fec_mxc.h | 10 ++++++++++ 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index bd83a24..9e9ef99 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -55,6 +55,7 @@ struct fec_priv gfec = { .tbd_base = NULL, .tbd_index = 0, .bd = NULL, + .status = FEC_HALT_STATUS, }; /* @@ -453,6 +454,7 @@ static int fec_init(struct eth_device *dev, bd_t* bd) miiphy_restart_aneg(dev); fec_open(dev); + fec->status = FEC_INIT_STATUS; return 0; } @@ -491,8 +493,11 @@ static void fec_halt(struct eth_device *dev) writel(0, &fec->eth->ecntrl); fec->rbd_index = 0; fec->tbd_index = 0; - free(fec->rdb_ptr); - free(fec->base_ptr); + if (fec->status == FEC_INIT_STATUS) { + free(fec->rdb_ptr); + free(fec->base_ptr); + } + fec->status = FEC_HALT_STATUS; debug("eth_halt: done\n"); } diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index 6cb1bfc..266b5d3 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -245,9 +245,19 @@ struct fec_priv { bd_t *bd; void *rdb_ptr; void *base_ptr; + int status; /* whether fec is halted or not* */ }; /** + * @brief Possible values for status + * + * fec_halt() changes the status to FEC_HALT_STATUS and fec_init() + * changes the status to FEC_INIT_STATUS + */ +#define FEC_HALT_STATUS 0 +#define FEC_INIT_STATUS 1 + +/** * @brief Numbers of buffer descriptors for receiving * * The number defines the stocked memory buffers for the receiving task. -- Javier Martin Vista Silicon S.L. CDTUC - FASE C - Oficina S-345 Avda de los Castros s/n 39005- Santander. Cantabria. Spain +34 942 25 32 60 www.vista-silicon.com

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[U-Boot] [u-boot] [PATCH] [1/2] mxc_fec: fix some erroneous PHY accesses.
by javier Martin 25 Oct '09

25 Oct '09

This patch fixes erroneous access to the ethernet PHY which broke the driver. 1. Selector field in the auto-negotiation register must be 0x00001 for using 802.3, not 0x00000 which is reseved. 2. Access to the PHY address specified by CONFIG_FEC_MXC_PHYADDR, not 0x0 fixed address. This has been tested in i.MX27 Litekit board and eldk-2.0 toolchains. Signed-off-by: Javier Martin <javier.martin(a)vista-silicon.com> -- diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index bd83a24..18f0bba 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -157,7 +157,7 @@ static int miiphy_restart_aneg(struct eth_device *dev) /* * Set the auto-negotiation advertisement register bits */ - miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, PHY_ANAR, 0x1e0); + miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, PHY_ANAR, 0x1e1); miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); @@ -341,8 +341,8 @@ static int fec_open(struct eth_device *edev) writel(FEC_ECNTRL_ETHER_EN, &fec->eth->ecntrl); miiphy_wait_aneg(edev); - miiphy_speed(edev->name, 0); - miiphy_duplex(edev->name, 0); + miiphy_speed(edev->name, CONFIG_FEC_MXC_PHYADDR); + miiphy_duplex(edev->name, CONFIG_FEC_MXC_PHYADDR); /* * Enable SmartDMA receive task -- Javier Martin Vista Silicon S.L. CDTUC - FASE C - Oficina S-345 Avda de los Castros s/n 39005- Santander. Cantabria. Spain +34 942 25 32 60 www.vista-silicon.com

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[U-Boot] [PATCH 1/5] Check for NULL prompt in readline_into_buffer()
by Peter Tyser 25 Oct '09

25 Oct '09

Previously, passing readline() or readline_into_buffer() a NULL 'prompt' parameter would result in puts() printing garbage when CONFIG_CMDLINE_EDITING was enabled. Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> --- common/main.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/common/main.c b/common/main.c index 026edd1..298982a 100644 --- a/common/main.c +++ b/common/main.c @@ -964,7 +964,8 @@ int readline_into_buffer (const char *const prompt, char * buffer) initted = 1; } - puts (prompt); + if (prompt) + puts (prompt); rc = cread_line(prompt, p, &len); return rc < 0 ? rc : len; -- 1.6.2.1

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[U-Boot] Requesting an update to ARM mach types
by Paulraj, Sandeep 25 Oct '09

25 Oct '09

Tom, The ARM mach-types.h in /include/asm-arm needs to be updated with what is present at http://www.arm.linux.org.uk/developer/machines/ Thanks, Sandeep

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[U-Boot] [PATCH v2 3/4] add TI DA8xx support: Add new directory for da830evm board
by Nick Thompson 25 Oct '09

25 Oct '09

Add new directory for da830evm board Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum Digital EVM board. See http://www.spectrumdigital.com/ Provides: Initial boot and configuration. Support for i2c. UART support (console). Signed-off-by: Nick Thompson <nick.thompson(a)gefanuc.com> --- Applies to u-boot-ti board/davinci/da830evm/Makefile | 52 ++++++++++++ board/davinci/da830evm/board_init.S | 29 +++++++ board/davinci/da830evm/config.mk | 45 ++++++++++ board/davinci/da830evm/dv_board.c | 156 +++++++++++++++++++++++++++++++++++ 4 files changed, 282 insertions(+), 0 deletions(-) diff --git a/board/davinci/da830evm/Makefile b/board/davinci/da830evm/Makefile new file mode 100644 index 0000000..fa00138 --- /dev/null +++ b/board/davinci/da830evm/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := dv_board.o +SOBJS := board_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak *~ .depend + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/davinci/da830evm/board_init.S b/board/davinci/da830evm/board_init.S new file mode 100644 index 0000000..22d8adc --- /dev/null +++ b/board/davinci/da830evm/board_init.S @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Board-specific low level initialization code. Called at the very end + * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * initialization required. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> + +.globl dv_board_init +dv_board_init: + + mov pc, lr diff --git a/board/davinci/da830evm/config.mk b/board/davinci/da830evm/config.mk new file mode 100644 index 0000000..f05e36a --- /dev/null +++ b/board/davinci/da830evm/config.mk @@ -0,0 +1,45 @@ +# +# (C) Copyright 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar(a)ti.com> +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# (C) Copyright 2003 Swaminathan, Texas Instruments, <swami.iyer(a)ti.com> +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> +# David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# Texas Instruments DA8xx EVM board (ARM925EJS) cpu +# see http://www.ti.com/ for more information on Texas Instruments +# +# DA8xx EVM has 1 bank of 64 MB SDRAM (2 16Meg x16 chips). +# Physical Address: +# C000'0000 to C400'0000 +# +# Linux-Kernel is expected to be at C000'8000, entry C000'8000 +# (mem base + reserved) +# +# we load ourself to C108 '0000 + + +#Provide at least 16MB spacing between us and the Linux Kernel image +TEXT_BASE = 0xC1080000 diff --git a/board/davinci/da830evm/dv_board.c b/board/davinci/da830evm/dv_board.c new file mode 100644 index 0000000..a5e507c --- /dev/null +++ b/board/davinci/da830evm/dv_board.c @@ -0,0 +1,156 @@ +/* + * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson(a)gefanuc.com> + * + * Use the board_eth_init hook to initialise the ethernet in the + * correct order. (Has to wait until after call to miiphy_init().) + * + * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar(a)ti.com> + * + * Modified for DA8xx EVM. + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <i2c.h> +#include <net.h> +#include <netdev.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emac_defs.h> +#include <asm/io.h> +#include "../common/misc.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* Works on Always On power domain only (no PD argument) */ +void lpsc_on(unsigned int id) +{ + unsigned int mdstat, mdctl, ptstat, ptcmd; + + if (id >= 64) + return; + + if (id < 32) { + mdstat = PSC0_MDSTAT + (id * 4); + mdctl = PSC0_MDCTL + (id * 4); + ptstat = PSC0_PTSTAT; + ptcmd = PSC0_PTCMD; + } else { + id -= 32; + mdstat = PSC1_MDSTAT + (id * 4); + mdctl = PSC1_MDCTL + (id * 4); + ptstat = PSC1_PTSTAT; + ptcmd = PSC1_PTCMD; + } + + while (readl(ptstat) & 0x01) + ; /* wait */ + + if ((readl(mdstat) & 0x1f) == 0x03) + return; /* Already on and enabled */ + + writel(readl(mdctl) | 0x03, mdctl); + + writel(0x01, ptcmd); + + while (readl(ptstat) & 0x01) + ; /* wait */ + while ((readl(mdstat) & 0x1f) != 0x03) + ; /* wait */ +} + +/* Read, Modify, Write macro for pin multiplxer modifications */ +#define PINMUX(n, val, mask) writel((val & mask) | (readl(n) & (~mask)), n) + +int board_init(void) +{ + +#ifndef CONFIG_USE_IRQ + /* + * Mask all IRQs by clearing the global enable and setting + * the enable clear for all the 90 interrupts. This code is + * also included in low level init. Including it here in case + * low level init is skipped. Not removing it from low level + * init in case some of the low level init code generates + * interrupts... Not expected... but you never know... + */ + + writel(0, INTC_GLB_EN); + + writel(0, INTC_HINT_EN + 0x0); + writel(0, INTC_HINT_EN + 0x4); + writel(0, INTC_HINT_EN + 0x8); + + writel(0xffffffff, INTC_EN_CLR0 + 0x0); + writel(0xffffffff, INTC_EN_CLR0 + 0x4); + writel(0xffffffff, INTC_EN_CLR0 + 0x8); +#endif + + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* + * Power on required peripherals + * ARM does not have access by default to PSC0 and PSC1 + * assuming here that the DSP bootloader has set the IOPU + * such that PSC access is available to ARM + */ + lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */ + lpsc_on(DAVINCI_LPSC_SPI0); /* Serial Flash */ + lpsc_on(DAVINCI_LPSC_EMAC); /* image download */ + lpsc_on(DAVINCI_LPSC_UART2); /* console */ + lpsc_on(DAVINCI_LPSC_GPIO); + + /* Pin Muxing support */ + + /* setup the SUSPSRC for ARM to control emulation suspend */ + writel(readl(SUSPSRC) & ~(SUSPSRC_EMAC | SUSPSRC_I2C | SUSPSRC_SPI0 | + SUSPSRC_TIMER0 | SUSPSRC_UART2), SUSPSRC); + +#ifdef CONFIG_USE_PINMUX + +#ifdef CONFIG_SPI_FLASH + /* SPI0 pin enable*/ + PINMUX(PINMUX7, 0x11111000, 0xFFFFF000) +#endif + + /* UART pin enable */ + PINMUX(PINMUX8, 0x20000000, 0xF0000000); + PINMUX(PINMUX9, 0x00000002, 0x0000000F); + + /* I2C pin enable */ + PINMUX(PINMUX9, 0x00022000, 0x000FF000); + +#endif /* CONFIG_USE_PIN_MUX */ + + /* enable the console UART */ + writel(PWREMU_MGMT_FREE | PWREMU_MGMT_URRST | PWREMU_MGMT_UTRST, + DAVINCI_UART2_BASE + PWREMU_MGMT_BASE); + + return(0); +}

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[U-Boot] [PATCH v2 2/4] add TI DA8xx support: Add new directory for da8xx architecture includes
by Nick Thompson 25 Oct '09

25 Oct '09

Add new directory for da8xx architecture includes. Provides initial support for TI OMAP-L1x/DA8xx SoC devices. See http://www.ti.com The DA8xx devices are similar to DaVinci devices but have a differing memory map and updated peripheral versions. Signed-off-by: Nick Thompson <nick.thompson(a)gefanuc.com> --- Applies to u-boot-ti include/asm-arm/arch-da8xx/clock.h | 25 ++++ include/asm-arm/arch-da8xx/emif_defs.h | 71 ++++++++++ include/asm-arm/arch-da8xx/hardware.h | 221 ++++++++++++++++++++++++++++++++ include/asm-arm/arch-da8xx/i2c_defs.h | 93 +++++++++++++ 4 files changed, 410 insertions(+), 0 deletions(-) diff --git a/include/asm-arm/arch-da8xx/clock.h b/include/asm-arm/arch-da8xx/clock.h new file mode 100644 index 0000000..8cb4f51 --- /dev/null +++ b/include/asm-arm/arch-da8xx/clock.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson(a)gefanuc.com> + * + * DA8xx clock include header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +/* Included from hardware.h so protect from assembler inclusion */ +#ifndef __ASSEMBLY__ +int clk_get(unsigned int id); +#endif diff --git a/include/asm-arm/arch-da8xx/emif_defs.h b/include/asm-arm/arch-da8xx/emif_defs.h new file mode 100644 index 0000000..c91e30c --- /dev/null +++ b/include/asm-arm/arch-da8xx/emif_defs.h @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _EMIF_DEFS_H_ +#define _EMIF_DEFS_H_ + +#include <asm/arch/hardware.h> + +typedef struct { + dv_reg ERCSR; + dv_reg AWCCR; + dv_reg SDBCR; + dv_reg SDRCR; + dv_reg AB1CR; + dv_reg AB2CR; + dv_reg AB3CR; + dv_reg AB4CR; + dv_reg SDTIMR; + dv_reg DDRSR; + dv_reg DDRPHYCR; + dv_reg DDRPHYSR; + dv_reg TOTAR; + dv_reg TOTACTR; + dv_reg DDRPHYID_REV; + dv_reg SDSRETR; + dv_reg EIRR; + dv_reg EIMR; + dv_reg EIMSR; + dv_reg EIMCR; + dv_reg IOCTRLR; + dv_reg IOSTATR; + u_int8_t RSVD0[8]; + dv_reg NANDFCR; + dv_reg NANDFSR; + u_int8_t RSVD1[8]; + dv_reg NANDF1ECC; + dv_reg NANDF2ECC; + dv_reg NANDF3ECC; + dv_reg NANDF4ECC; + u_int8_t RSVD2[60]; + dv_reg NAND4BITECCLOAD; + dv_reg NAND4BITECC1; + dv_reg NAND4BITECC2; + dv_reg NAND4BITECC3; + dv_reg NAND4BITECC4; + dv_reg NANDERRADD1; + dv_reg NANDERRADD2; + dv_reg NANDERRVAL1; + dv_reg NANDERRVAL2; +} emif_registers; + +typedef emif_registers *emifregs; +#endif diff --git a/include/asm-arm/arch-da8xx/hardware.h b/include/asm-arm/arch-da8xx/hardware.h new file mode 100644 index 0000000..7cfe8d2 --- /dev/null +++ b/include/asm-arm/arch-da8xx/hardware.h @@ -0,0 +1,221 @@ +/* + * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc + * + * Based on hardware.h for DaVinci. Original Copyrights follow. + * + * Sergey Kubushyn <ksi(a)koi8.net> + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Based on: + * + * ------------------------------------------------------------------------- + * + * linux/include/asm-arm/arch-davinci/hardware.h + * + * Copyright (C) 2006 Texas Instruments. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#ifndef __DA8XX_HARDWARE_H +#define __DA8XX_HARDWARE_H + +#include <config.h> + +#ifndef __ASSEMBLY__ + +#include <asm/sizes.h> + +/* required by davinci drivers */ +#define REG(addr) (*(volatile unsigned int *)(addr)) + +/* required by davinci drivers */ +typedef volatile unsigned int dv_reg; +typedef volatile unsigned int *dv_reg_p; + +#endif + +/* + * Base register addresses + */ +#define DAVINCI_UART0_BASE 0x01c42000 +#define DAVINCI_UART1_BASE 0x01d0c000 +#define DAVINCI_UART2_BASE 0x01d0d000 +#define DAVINCI_I2C0_BASE 0x01c22000 +#define DAVINCI_I2C1_BASE 0x01e28000 +#define DAVINCI_TIMER0_BASE 0x01c20000 +#define DAVINCI_TIMER1_BASE 0x01c21000 +#define DAVINCI_WDOG_BASE 0x01c21000 +#define DAVINCI_PLL_CNTRL0_BASE 0x01c11000 +#define DAVINCI_PSC0_BASE 0x01c10000 +#define DAVINCI_PSC1_BASE 0x01e27000 +#define DAVINCI_SPI0_BASE 0x01c41000 +#define DAVINCI_USB_OTG_BASE 0x01e00000 +#define DAVINCI_SPI1_BASE 0x01e12000 +#define DAVINCI_GPIO_BASE 0x01e26000 +#define DAVINCI_EMAC_CNTRL_REGS_BASE 0x01e23000 +#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0x01e22000 +#define DAVINCI_EMAC_WRAPPER_RAM_BASE 0x01e20000 +#define DAVINCI_MDIO_CNTRL_REGS_BASE 0x01e24000 +#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x68000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x40000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x60000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x62000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE4_BASE 0x64000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE5_BASE 0x66000000 +#define DAVINCI_DDR_EMIF_CTRL_BASE 0xb0000000 +#define DAVINCI_DDR_EMIF_DATA_BASE 0xc0000000 +#define DAVINCI_INTC_BASE 0xfffee000 +#define DAVINCI_BOOTCFG_BASE 0x01c14000 + +/* Clock IDs */ +#define DAVINCI_PLLM_CLKID (0xFF + 0) +#define DAVINCI_PLLC_CLKID (0xFF + 1) +#define DAVINCI_AUXCLK_CLKID (0xFF + 2) +#define DAVINCI_MDIO_CLKID 4 +#define DAVINCI_SPI0_CLKID 2 +#define DAVINCI_UART2_CLKID 2 +#define DAVINCI_ARM_CLKID 6 + +/* Power and Sleep Controller (PSC) Domains */ +#define DAVINCI_GPSC_ARMDOMAIN 0 +#define DAVINCI_GPSC_DSPDOMAIN 1 + +/* LPSCs in PSC0 */ +#define DAVINCI_LPSC_TPCC 0 +#define DAVINCI_LPSC_TPTC0 1 +#define DAVINCI_LPSC_TPTC1 2 +#define DAVINCI_LPSC_AEMIF 3 +#define DAVINCI_LPSC_SPI0 4 +#define DAVINCI_LPSC_MMC_SD 5 +#define DAVINCI_LPSC_AINTC 6 +#define DAVINCI_LPSC_ARM_RAM_ROM 7 +#define DAVINCI_LPSC_SECCTL_KEYMGR 8 +#define DAVINCI_LPSC_UART0 9 +#define DAVINCI_LPSC_SCR0 10 +#define DAVINCI_LPSC_SCR1 11 +#define DAVINCI_LPSC_SCR2 12 +#define DAVINCI_LPSC_DMAX 13 +#define DAVINCI_LPSC_ARM 14 +#define DAVINCI_LPSC_GEM 15 + +/* for LPSCs in PSC1, 32 + actual id is being used for differentiation */ +#define DAVINCI_LPSC_BASE 32 +#define DAVINCI_LPSC_USB11 (DAVINCI_LPSC_BASE + 1) +#define DAVINCI_LPSC_USB20 (DAVINCI_LPSC_BASE + 2) +#define DAVINCI_LPSC_GPIO (DAVINCI_LPSC_BASE + 3) +#define DAVINCI_LPSC_UHPI (DAVINCI_LPSC_BASE + 4) +#define DAVINCI_LPSC_EMAC (DAVINCI_LPSC_BASE + 5) +#define DAVINCI_LPSC_DDR_EMIF (DAVINCI_LPSC_BASE + 6) +#define DAVINCI_LPSC_McASP0 (DAVINCI_LPSC_BASE + 7) +#define DAVINCI_LPSC_McASP1 (DAVINCI_LPSC_BASE + 8) +#define DAVINCI_LPSC_McASP2 (DAVINCI_LPSC_BASE + 9) +#define DAVINCI_LPSC_SPI1 (DAVINCI_LPSC_BASE + 10) +#define DAVINCI_LPSC_I2C1 (DAVINCI_LPSC_BASE + 11) +#define DAVINCI_LPSC_UART1 (DAVINCI_LPSC_BASE + 12) +#define DAVINCI_LPSC_UART2 (DAVINCI_LPSC_BASE + 13) +#define DAVINCI_LPSC_LCDC (DAVINCI_LPSC_BASE + 16) +#define DAVINCI_LPSC_ePWM (DAVINCI_LPSC_BASE + 17) +#define DAVINCI_LPSC_eCAP (DAVINCI_LPSC_BASE + 20) +#define DAVINCI_LPSC_eQEP (DAVINCI_LPSC_BASE + 21) +#define DAVINCI_LPSC_SCR_P0 (DAVINCI_LPSC_BASE + 22) +#define DAVINCI_LPSC_SCR_P1 (DAVINCI_LPSC_BASE + 23) +#define DAVINCI_LPSC_CR_P3 (DAVINCI_LPSC_BASE + 26) +#define DAVINCI_LPSC_L3_CBA_RAM (DAVINCI_LPSC_BASE + 31) + +/* Some PSC defines */ + +#define PSC0_MDCTL (DAVINCI_PSC0_BASE + 0xa00) +#define PSC0_MDSTAT (DAVINCI_PSC0_BASE + 0x800) +#define PSC0_PTCMD (DAVINCI_PSC0_BASE + 0x120) +#define PSC0_PTSTAT (DAVINCI_PSC0_BASE + 0x128) + +#define PSC1_MDCTL (DAVINCI_PSC1_BASE + 0xa00) +#define PSC1_MDSTAT (DAVINCI_PSC1_BASE + 0x800) +#define PSC1_PTCMD (DAVINCI_PSC1_BASE + 0x120) +#define PSC1_PTSTAT (DAVINCI_PSC1_BASE + 0x128) + +/* Some PLL defines */ +#define PLL0_PLLCTL (DAVINCI_PLL_CNTRL0_BASE + 0x100) +#define PLL0_PLLM (DAVINCI_PLL_CNTRL0_BASE + 0x110) +#define PLL0_PREDIV (DAVINCI_PLL_CNTRL0_BASE + 0x114) +#define PLL0_POSTDIV (DAVINCI_PLL_CNTRL0_BASE + 0x128) +#define PLL0_DIV1 (DAVINCI_PLL_CNTRL0_BASE + 0x118) +#define PLL0_DIV2 (DAVINCI_PLL_CNTRL0_BASE + 0x11c) +#define PLL0_DIV3 (DAVINCI_PLL_CNTRL0_BASE + 0x120) +#define PLL0_DIV4 (DAVINCI_PLL_CNTRL0_BASE + 0x160) +#define PLL0_DIV5 (DAVINCI_PLL_CNTRL0_BASE + 0x164) +#define PLL0_DIV6 (DAVINCI_PLL_CNTRL0_BASE + 0x168) +#define PLL0_DIV7 (DAVINCI_PLL_CNTRL0_BASE + 0x16c) +#define PLL0_DIV8 (DAVINCI_PLL_CNTRL0_BASE + 0x170) +#define PLL0_DIV9 (DAVINCI_PLL_CNTRL0_BASE + 0x114) + +/* Boot config */ +#define PINMUX0 (DAVINCI_BOOTCFG_BASE + 0x120) +#define PINMUX1 (DAVINCI_BOOTCFG_BASE + 0x124) +#define PINMUX2 (DAVINCI_BOOTCFG_BASE + 0x128) +#define PINMUX3 (DAVINCI_BOOTCFG_BASE + 0x12c) +#define PINMUX4 (DAVINCI_BOOTCFG_BASE + 0x130) +#define PINMUX5 (DAVINCI_BOOTCFG_BASE + 0x134) +#define PINMUX6 (DAVINCI_BOOTCFG_BASE + 0x138) +#define PINMUX7 (DAVINCI_BOOTCFG_BASE + 0x13c) +#define PINMUX8 (DAVINCI_BOOTCFG_BASE + 0x140) +#define PINMUX9 (DAVINCI_BOOTCFG_BASE + 0x144) +#define PINMUX10 (DAVINCI_BOOTCFG_BASE + 0x148) +#define PINMUX11 (DAVINCI_BOOTCFG_BASE + 0x14c) +#define PINMUX12 (DAVINCI_BOOTCFG_BASE + 0x150) +#define PINMUX13 (DAVINCI_BOOTCFG_BASE + 0x154) +#define PINMUX14 (DAVINCI_BOOTCFG_BASE + 0x158) +#define PINMUX15 (DAVINCI_BOOTCFG_BASE + 0x15C) +#define PINMUX16 (DAVINCI_BOOTCFG_BASE + 0x160) +#define PINMUX17 (DAVINCI_BOOTCFG_BASE + 0x164) +#define PINMUX18 (DAVINCI_BOOTCFG_BASE + 0x168) +#define PINMUX19 (DAVINCI_BOOTCFG_BASE + 0x16c) +#define SUSPSRC (DAVINCI_BOOTCFG_BASE + 0x170) +#define CFGCHIP0 (DAVINCI_BOOTCFG_BASE + 0x17c) +#define CFGCHIP2 (DAVINCI_BOOTCFG_BASE + 0x184) + +/* Interrupt controller */ +#define INTC_GLB_EN (DAVINCI_INTC_BASE + 0x10) +#define INTC_HINT_EN (DAVINCI_INTC_BASE + 0x1500) +#define INTC_EN_CLR0 (DAVINCI_INTC_BASE + 0x380) + +/* GPIO */ +#define GPIO_BANK4_ADDR 0x01E26000 +#define GPIO_BANK4_REG_DIR_ADDR (GPIO_BANK4_ADDR + 0x60) +#define GPIO_BANK4_REG_OPDATA_ADDR (GPIO_BANK4_ADDR + 0x64) +#define GPIO_BANK4_REG_SET_ADDR (GPIO_BANK4_ADDR + 0x68) +#define GPIO_BANK4_REG_CLR_ADDR (GPIO_BANK4_ADDR + 0x6C) + +/* Emulation suspend bits */ +#define SUSPSRC_EMAC (1 << 5) +#define SUSPSRC_I2C (1 << 16) +#define SUSPSRC_SPI0 (1 << 21) +#define SUSPSRC_UART2 (1 << 20) +#define SUSPSRC_TIMER0 (1 << 27) + +/* UART PWREMU_MGMT definitions */ +#define PWREMU_MGMT_BASE (0x30) +#define PWREMU_MGMT_FREE (1 << 0) +#define PWREMU_MGMT_URRST (1 << 13) +#define PWREMU_MGMT_UTRST (1 << 14) + +#endif /* __DA8XX_HARDWARE_H */ diff --git a/include/asm-arm/arch-da8xx/i2c_defs.h b/include/asm-arm/arch-da8xx/i2c_defs.h new file mode 100644 index 0000000..df4676a --- /dev/null +++ b/include/asm-arm/arch-da8xx/i2c_defs.h @@ -0,0 +1,93 @@ +/* + * (C) Copyright 2004 + * Texas Instruments, <www.ti.com> + * + * Some changes copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _DAVINCI_I2C_H_ +#define _DAVINCI_I2C_H_ + +#define I2C_WRITE 0 +#define I2C_READ 1 + +#define I2C_BASE 0x01c22000 + +#define I2C_OA (I2C_BASE + 0x00) +#define I2C_IE (I2C_BASE + 0x04) +#define I2C_STAT (I2C_BASE + 0x08) +#define I2C_SCLL (I2C_BASE + 0x0c) +#define I2C_SCLH (I2C_BASE + 0x10) +#define I2C_CNT (I2C_BASE + 0x14) +#define I2C_DRR (I2C_BASE + 0x18) +#define I2C_SA (I2C_BASE + 0x1c) +#define I2C_DXR (I2C_BASE + 0x20) +#define I2C_CON (I2C_BASE + 0x24) +#define I2C_IV (I2C_BASE + 0x28) +#define I2C_PSC (I2C_BASE + 0x30) + +/* I2C masks */ + +/* I2C Interrupt Enable Register (I2C_IE): */ +#define I2C_IE_SCD_IE (1 << 5) /* Stop condition detect interrupt enable */ +#define I2C_IE_XRDY_IE (1 << 4) /* Transmit data ready interrupt enable */ +#define I2C_IE_RRDY_IE (1 << 3) /* Receive data ready interrupt enable */ +#define I2C_IE_ARDY_IE (1 << 2) /* Register access ready interrupt enable */ +#define I2C_IE_NACK_IE (1 << 1) /* No acknowledgment interrupt enable */ +#define I2C_IE_AL_IE (1 << 0) /* Arbitration lost interrupt enable */ + +/* I2C Status Register (I2C_STAT): */ + +#define I2C_STAT_BB (1 << 12) /* Bus busy */ +#define I2C_STAT_ROVR (1 << 11) /* Receive overrun */ +#define I2C_STAT_XUDF (1 << 10) /* Transmit underflow */ +#define I2C_STAT_AAS (1 << 9) /* Address as slave */ +#define I2C_STAT_SCD (1 << 5) /* Stop condition detect */ +#define I2C_STAT_XRDY (1 << 4) /* Transmit data ready */ +#define I2C_STAT_RRDY (1 << 3) /* Receive data ready */ +#define I2C_STAT_ARDY (1 << 2) /* Register access ready */ +#define I2C_STAT_NACK (1 << 1) /* No acknowledgment interrupt enable */ +#define I2C_STAT_AL (1 << 0) /* Arbitration lost interrupt enable */ + +/* I2C Interrupt Code Register (I2C_INTCODE): */ + +#define I2C_INTCODE_MASK 7 +#define I2C_INTCODE_NONE 0 +#define I2C_INTCODE_AL 1 /* Arbitration lost */ +#define I2C_INTCODE_NAK 2 /* No acknowledgement/general call */ +#define I2C_INTCODE_ARDY 3 /* Register access ready */ +#define I2C_INTCODE_RRDY 4 /* Rcv data ready */ +#define I2C_INTCODE_XRDY 5 /* Xmit data ready */ +#define I2C_INTCODE_SCD 6 /* Stop condition detect */ + +/* I2C Configuration Register (I2C_CON): */ + +#define I2C_CON_EN (1 << 5) /* I2C module enable */ +#define I2C_CON_STB (1 << 4) /* Start byte mode (master only) */ +#define I2C_CON_MST (1 << 10) /* Master/slave mode */ +#define I2C_CON_TRX (1 << 9) /* Transmitter/receiver mode (master only) */ +#define I2C_CON_XA (1 << 8) /* Expand address */ +#define I2C_CON_STP (1 << 11) /* Stop condition (master only) */ +#define I2C_CON_STT (1 << 13) /* Start condition (master only) */ +#define I2C_CON_FREE (1 << 14) /* Free run on emulation */ + +#define I2C_TIMEOUT 0xffff0000 /* Timeout mask for poll_i2c_irq() */ + +#endif

2 1

[U-Boot] NFS boot problems !
by Cristian Axenie 24 Oct '09

24 Oct '09

On Sat, Oct 24, 2009 at 5:09 PM, Jerry Van Baren <gvb.uboot(a)gmail.com>wrote: > Cristian Axenie wrote: > >> Hi all ! >> >> I try to boot the kernel and rootfs using NFS! >> Next is my u-boot env: >> > > [snip] > > > bootfile=/home/haustiq/development/uImage >> > > Likely wrong (see below). > > > My problem is that when I >> >> run bootcmd >> >> I get : >> >> >> Speed: 100, full duplex >> Using eTSEC0 device >> TFTP from server 192.168.1.103; our IP address is 192.168.1.100 >> Filename '/home/haustiq/development/uImage'. >> > > This does *NOT* look like a valid path. TFTP servers typically serve out > of a dedicated directory (often /tftpboot) and the paths to the files are > usually relative to the root folder. > But if I changed the directory to the one mentioned before in the /etc/inetd.conf and didn't used /tftpboot ? > > You probably want to copy your uImage to /tftpboot/uImage and use the file > name either uImage or /uImage or /tftboot/uImage. > Yes indeed I copy my kernel image to the specified folder (home/haustiq/development/) ! > > Do a "tftp get" from a computer, preferably not your tftp server computer, > to figure out your TFTP server path and file names before trying to TFTP > from u-boot. > > If you run stuck, use wireshark on your server to see what is going on on > the wire. > > > Load address: 0x1000000 >> Loading: * >> TFTP error: 'Access violation' (2) >> Starting again >> >> Any ideas ? >> > > Wrong path/file. > > I've also tried the way you mentioned , selected /tftpboot the dedicated folder, made the appropriate modifications and moved the uImage there... and the problem persists ! > Good luck, > gvb > > Thanks for the response ! If further ideas, please post them ! Best ! > [snip] >

3 3

[U-Boot] [PATCH] License cleanup: Fix license header for some esd display configurations
by Matthias Fuchs 24 Oct '09

24 Oct '09

These files were autogenerated by EPSON configuration tools. This patch replaces the autogenerated file headers by the GPL license notice. This change is done with the explicit permission of Epson Research & Development / IC Software Development. Signed-off-by: Matthias Fuchs <matthias.fuchs(a)esd.eu> --- board/esd/common/s1d13704_320_240_4bpp.h | 27 +++++++++++++++++---------- board/esd/common/s1d13705_320_240_8bpp.h | 27 +++++++++++++++++---------- board/esd/common/s1d13806_1024_768_8bpp.h | 23 +++++++++++++++++------ board/esd/common/s1d13806_320_240_4bpp.h | 23 +++++++++++++++++------ board/esd/common/s1d13806_640_480_16bpp.h | 23 +++++++++++++++++------ board/esd/common/s1d13806_640_480_8bpp.h | 23 +++++++++++++++++------ 6 files changed, 102 insertions(+), 44 deletions(-) diff --git a/board/esd/common/s1d13704_320_240_4bpp.h b/board/esd/common/s1d13704_320_240_4bpp.h index 77c8a46..57cf5f7 100644 --- a/board/esd/common/s1d13704_320_240_4bpp.h +++ b/board/esd/common/s1d13704_320_240_4bpp.h @@ -1,19 +1,26 @@ /* + * Copyright (c) 2000,2001 Epson Research and Development, Inc. * - * Generic Header information generated by 13704CFG.EXE (Build 10) + * See file CREDITS for list of people who contributed to this + * project. * - * Copyright (c) 2000,2001 Epson Research and Development, Inc. - * All rights reserved. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. * - * Panel: 320x240x4bpp 78Hz Mono 4-Bit STN, Disabled (PCLK=6.666MHz) + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * - * This file defines the configuration environment and registers, - * which can be used by any software, such as display drivers. - * - * PLEASE NOTE: If you FTP this file to a non-Windows platform, make - * sure you transfer this file using ASCII, not BINARY - * mode. + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA * + * Generic Header information generated by 13704CFG.EXE (Build 10) + * Panel: 320x240x4bpp 78Hz Mono 4-Bit STN, Disabled (PCLK=6.666MHz) */ static S1D_REGS regs_13704_320_240_4bpp[] = diff --git a/board/esd/common/s1d13705_320_240_8bpp.h b/board/esd/common/s1d13705_320_240_8bpp.h index 60843ac..634889a 100644 --- a/board/esd/common/s1d13705_320_240_8bpp.h +++ b/board/esd/common/s1d13705_320_240_8bpp.h @@ -1,19 +1,26 @@ /* + * Copyright (c) 2000,2001 Epson Research and Development, Inc. * - * Generic Header information generated by 13704CFG.EXE (Build 10) + * See file CREDITS for list of people who contributed to this + * project. * - * Copyright (c) 2000,2001 Epson Research and Development, Inc. - * All rights reserved. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. * - * Panel: 320x240x8bpp 78Hz Mono 8-Bit STN, Disabled (PCLK=6.666MHz) + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * - * This file defines the configuration environment and registers, - * which can be used by any software, such as display drivers. - * - * PLEASE NOTE: If you FTP this file to a non-Windows platform, make - * sure you transfer this file using ASCII, not BINARY - * mode. + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA * + * Generic Header information generated by 13704CFG.EXE (Build 10) + * Panel: 320x240x8bpp 78Hz Mono 8-Bit STN, Disabled (PCLK=6.666MHz) */ static S1D_REGS regs_13705_320_240_8bpp[] = diff --git a/board/esd/common/s1d13806_1024_768_8bpp.h b/board/esd/common/s1d13806_1024_768_8bpp.h index 68801bf..0b420b2 100644 --- a/board/esd/common/s1d13806_1024_768_8bpp.h +++ b/board/esd/common/s1d13806_1024_768_8bpp.h @@ -1,16 +1,27 @@ /* + * Copyright (c) 2000,2001 Epson Research and Development, Inc. * - * File generated by S1D13806CFG.EXE + * See file CREDITS for list of people who contributed to this + * project. * - * Copyright (c) 2000,2001 Epson Research and Development, Inc. - * All rights reserved. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. * - * PLEASE NOTE: If you FTP this file to a non-Windows platform, make - * sure you transfer this file using ASCII, not BINARY mode. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * File generated by S1D13806CFG.EXE * Panel: (active) 1024x768 34Hz TFT Single 12-bit (PCLK=BUSCLK=33.333MHz) * Memory: Embedded SDRAM (MCLK=CLKI=49.100MHz) (BUSCLK=33.333MHz) - * */ static S1D_REGS regs_13806_1024_768_8bpp[] = diff --git a/board/esd/common/s1d13806_320_240_4bpp.h b/board/esd/common/s1d13806_320_240_4bpp.h index 24d7350..5aab2c1 100644 --- a/board/esd/common/s1d13806_320_240_4bpp.h +++ b/board/esd/common/s1d13806_320_240_4bpp.h @@ -1,16 +1,27 @@ /* + * Copyright (c) 2000,2001 Epson Research and Development, Inc. * - * File generated by S1D13806CFG.EXE + * See file CREDITS for list of people who contributed to this + * project. * - * Copyright (c) 2000,2001 Epson Research and Development, Inc. - * All rights reserved. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. * - * PLEASE NOTE: If you FTP this file to a non-Windows platform, make - * sure you transfer this file using ASCII, not BINARY mode. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * File generated by S1D13806CFG.EXE * Panel: (active) 320x240 62Hz STN Single 4-bit (PCLK=CLKI2/4=6.250MHz) * Memory: Embedded SDRAM (MCLK=CLKI=49.500MHz) (BUSCLK=33.333MHz) - * */ static S1D_REGS regs_13806_320_240_4bpp[] = diff --git a/board/esd/common/s1d13806_640_480_16bpp.h b/board/esd/common/s1d13806_640_480_16bpp.h index 178f1a9..f851278 100644 --- a/board/esd/common/s1d13806_640_480_16bpp.h +++ b/board/esd/common/s1d13806_640_480_16bpp.h @@ -1,16 +1,27 @@ /* + * Copyright (c) 2000,2001 Epson Research and Development, Inc. * - * File generated by S1D13806CFG.EXE + * See file CREDITS for list of people who contributed to this + * project. * - * Copyright (c) 2000,2001 Epson Research and Development, Inc. - * All rights reserved. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. * - * PLEASE NOTE: If you FTP this file to a non-Windows platform, make - * sure you transfer this file using ASCII, not BINARY mode. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * File generated by S1D13806CFG.EXE * Panel: (active) 640x480 59Hz TFT Single 18-bit (PCLK=CLKI2=25.000MHz) * Memory: Embedded SDRAM (MCLK=CLKI=49.152MHz) (BUSCLK=33.333MHz) - * */ static S1D_REGS regs_13806_640_480_16bpp[] = diff --git a/board/esd/common/s1d13806_640_480_8bpp.h b/board/esd/common/s1d13806_640_480_8bpp.h index c1f5b2b..17fa1d3 100644 --- a/board/esd/common/s1d13806_640_480_8bpp.h +++ b/board/esd/common/s1d13806_640_480_8bpp.h @@ -1,16 +1,27 @@ /* + * Copyright (c) 2000,2001 Epson Research and Development, Inc. * - * File generated by S1D13806CFG.EXE + * See file CREDITS for list of people who contributed to this + * project. * - * Copyright (c) 2000,2001 Epson Research and Development, Inc. - * All rights reserved. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. * - * PLEASE NOTE: If you FTP this file to a non-Windows platform, make - * sure you transfer this file using ASCII, not BINARY mode. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * File generated by S1D13806CFG.EXE * Panel: (active) 640x480 59Hz TFT Single 18-bit (PCLK=CLKI2=25.000MHz) * Memory: Embedded SDRAM (MCLK=CLKI=49.152MHz) (BUSCLK=33.333MHz) - * */ static S1D_REGS regs_13806_640_320_16bpp[] = -- 1.6.1

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