August 2008 - U-Boot

[U-Boot-Users] Resubmit : [PATCH] Correct ARM Versatile Timer Initialization
by Gururaja Hebbar K R 15 Aug '08

15 Aug '08

- According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271), -- Timer Value Register @ TIMER Base + 4 is Read-only. -- Prescale Value (Bits 3-2 of TIMER Control register) can only be one of 00,01,10. 11 is undefined. Signed-off-by: Gururaja Hebbar <gururajakr(a)sanyo.co.in> --- cpu/arm926ejs/versatile/timer.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/cpu/arm926ejs/versatile/timer.c b/cpu/arm926ejs/versatile/timer.c index 32872d2..9659b67 100644 --- a/cpu/arm926ejs/versatile/timer.c +++ b/cpu/arm926ejs/versatile/timer.c @@ -50,8 +50,7 @@ static ulong lastdec; int timer_init (void) { *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /* TimerLoad */ - *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD; /* TimerValue */ - *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C; + *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x80; /* init the timestamp and lastdec value */ reset_timer_masked(); -- 1.5.6.4

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Re: [U-Boot] [U-boot-Users][GIT PULL] Please pull coldfire tree
by Wolfgang Denk 14 Aug '08

14 Aug '08

Dear John Rigby, In message <48A47C31.4010104(a)freescale.com> you wrote: > > The following changes since commit 855efd04e440754297769849f4d7fb52c7dc6bf4: > Wolfgang Denk (1): > Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash > > are available in the git repository at: > > git://git.denx.de/u-boot-coldfire.git master > > TsiChung Liew (13): > ColdFire: Fix M5253EVB dram bring up issue > ColdFire: Raise M5253EVBE uart baudrate to 115200 bps > ColdFire: Add M5253DEMO platform support for MCF5253 > ColdFire: Use CFI Flash driver for M54455EVB > ColdFire: Add SSPI feature for MCF5445x > ColdFire: Implement SBF feature for M5445EVB > ColdFire: Add Serial Flash support for M54455EVB > ColdFire: Add M54451EVB platform support for MCF5445x > ColdFire: Move m5271evb from board to board/freescale > ColdFire: Move m5272c3 from board to board/freescale > ColdFire: Move m5282evb from board to board/freescale > ColdFire: Multiple fixes for M5282EVB > Change CFG_ENV_SIZE to CFG_ENV_SECT_SIZE for SPI sector erase > > MAINTAINERS | 1 + > MAKEALL | 2 + > Makefile | 49 +- > board/{m5271evb => freescale/m5253demo}/Makefile | 2 +- > board/{m5282evb => freescale/m5253demo}/config.mk | 2 +- > board/freescale/m5253demo/flash.c | 467 +++++++ > board/freescale/m5253demo/m5253demo.c | 140 +++ > board/{m5272c3 => freescale/m5253demo}/u-boot.lds | 29 +- > board/freescale/m5253evbe/m5253evbe.c | 13 +- > board/{ => freescale}/m5271evb/Makefile | 0 > board/{ => freescale}/m5271evb/config.mk | 0 > board/{ => freescale}/m5271evb/m5271evb.c | 0 > board/{ => freescale}/m5271evb/mii.c | 0 > board/{ => freescale}/m5271evb/u-boot.lds | 0 > board/{ => freescale}/m5272c3/Makefile | 0 > board/{ => freescale}/m5272c3/config.mk | 0 > board/{ => freescale}/m5272c3/flash.c | 0 > board/{ => freescale}/m5272c3/m5272c3.c | 0 > board/{ => freescale}/m5272c3/mii.c | 0 > board/{ => freescale}/m5272c3/u-boot.lds | 0 > board/{ => freescale}/m5282evb/Makefile | 0 > board/{ => freescale}/m5282evb/config.mk | 0 > board/{ => freescale}/m5282evb/m5282evb.c | 7 + > board/{ => freescale}/m5282evb/mii.c | 0 > board/{ => freescale}/m5282evb/u-boot.lds | 3 +- > board/{m5271evb => freescale/m54451evb}/Makefile | 2 +- > board/{m5282evb => freescale/m54451evb}/config.mk | 4 +- > board/freescale/m54451evb/m54451evb.c | 108 ++ > board/{m5271evb => freescale/m54451evb}/mii.c | 82 +- > .../u-boot.lds => freescale/m54451evb/u-boot.spa} | 6 +- > .../u-boot.lds => freescale/m54451evb/u-boot.stm} | 28 +- > board/freescale/m54455evb/Makefile | 4 +- > board/freescale/m54455evb/flash.c | 1287 -------------------- > board/freescale/m54455evb/m54455evb.c | 64 +- > .../u-boot.lds => freescale/m54455evb/u-boot.stm} | 19 +- > common/env_sf.c | 10 +- > cpu/mcf52x2/cpu_init.c | 2 +- > cpu/mcf52x2/start.S | 2 +- > cpu/mcf5445x/cpu_init.c | 2 + > cpu/mcf5445x/dspi.c | 178 +++- > cpu/mcf5445x/speed.c | 67 +- > cpu/mcf5445x/start.S | 256 ++++- > include/asm-m68k/immap.h | 6 +- > include/configs/M5253DEMO.h | 252 ++++ > include/configs/M5253EVBE.h | 2 +- > include/configs/M5282EVB.h | 4 +- > include/configs/M54451EVB.h | 350 ++++++ > include/configs/M54455EVB.h | 157 ++- > lib_m68k/board.c | 17 + > 49 files changed, 2141 insertions(+), 1483 deletions(-) > copy board/{m5271evb => freescale/m5253demo}/Makefile (98%) > copy board/{m5282evb => freescale/m5253demo}/config.mk (97%) > create mode 100644 board/freescale/m5253demo/flash.c > create mode 100644 board/freescale/m5253demo/m5253demo.c > copy board/{m5272c3 => freescale/m5253demo}/u-boot.lds (85%) > copy board/{ => freescale}/m5271evb/Makefile (100%) > rename board/{ => freescale}/m5271evb/config.mk (100%) > rename board/{ => freescale}/m5271evb/m5271evb.c (100%) > copy board/{ => freescale}/m5271evb/mii.c (100%) > rename board/{ => freescale}/m5271evb/u-boot.lds (100%) > rename board/{ => freescale}/m5272c3/Makefile (100%) > rename board/{ => freescale}/m5272c3/config.mk (100%) > rename board/{ => freescale}/m5272c3/flash.c (100%) > rename board/{ => freescale}/m5272c3/m5272c3.c (100%) > rename board/{ => freescale}/m5272c3/mii.c (100%) > copy board/{ => freescale}/m5272c3/u-boot.lds (100%) > rename board/{ => freescale}/m5282evb/Makefile (100%) > copy board/{ => freescale}/m5282evb/config.mk (100%) > rename board/{ => freescale}/m5282evb/m5282evb.c (96%) > rename board/{ => freescale}/m5282evb/mii.c (100%) > rename board/{ => freescale}/m5282evb/u-boot.lds (98%) > rename board/{m5271evb => freescale/m54451evb}/Makefile (98%) > rename board/{m5282evb => freescale/m54451evb}/config.mk (90%) > create mode 100644 board/freescale/m54451evb/m54451evb.c > rename board/{m5271evb => freescale/m54451evb}/mii.c (82%) > copy board/{m5272c3/u-boot.lds => freescale/m54451evb/u-boot.spa} (97%) > copy board/{m5272c3/u-boot.lds => freescale/m54451evb/u-boot.stm} (84%) > delete mode 100644 board/freescale/m54455evb/flash.c > rename board/{m5272c3/u-boot.lds => freescale/m54455evb/u-boot.stm} (88%) > create mode 100644 include/configs/M5253DEMO.h > create mode 100644 include/configs/M54451EVB.h Done, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de The evolution of the human race will not be accomplished in the ten thousand years of tame animals, but in the million years of wild animals, because man is and will always be a wild animal. - Charles Galton Darwin

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[U-Boot] [PATCH] ColdFire: Fix FEC transmit issue for MCF5282
by Tsi-Chung Liew 14 Aug '08

14 Aug '08

From: TsiChung Liew <Tsi-Chung.Liew(a)freescale.com> Signed-off-by: TsiChung Liew <Tsi-Chung.Liew(a)freescale.com> --- drivers/net/mcffec.c | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index 58ed5e3..5218ab6 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -168,10 +168,11 @@ int fec_send(struct eth_device *dev, volatile void *packet, int length) /* Activate transmit Buffer Descriptor polling */ fecp->tdar = 0x01000000; /* Descriptor polling active */ - /* FEC fix for MCF5275, FEC unable to initial transmit data packet. + /* + * FEC fix for MCF5275, FEC unable to initial transmit data packet. * A nop will ensure the descriptor polling active completed. */ -#ifdef CONFIG_M5275 +#if defined(CONFIG_M5275) || defined(CONFIG_M5282) __asm__ ("nop"); #endif -- 1.5.6.4

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[U-Boot] Please ignore - U-Boot mailing list accessibility/delivery test
by Ken.Fuchs＠bench.com 14 Aug '08

14 Aug '08

I'm trying to diagnose a mailing list delivery problem that is probably caused by servers receiving list message traffic for me. This test includes a BCC to my own address. When I did this with the old SF server, I would only see my BCC copy and never see the mailing list server sent copy. I need to confirm that this still happens with the new mailing list server. The BCC list should not be transmitted to the mailing list server, though RFC 822 has three different ways of handling this: 1) No BCC header is sent (preferred interpretation in my opinion). 2) A BCC header is added containing only the recipient's address. 3) A BCC header with no addresses is transmitted. In any case, the mailing list server should ignore any BCC header it receives. Even if it doesn't ignore the BBC header, I'm configured receive a copy of the message even if my address appears in a TO or CC header (Not sure that Mailman would handle a BCC header the same way though, assuming the BCC header is even transmitted to the list server). Ken Fuchs

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[U-Boot] CFI repos status?
by Jean-Christophe PLAGNIOL-VILLARD 14 Aug '08

14 Aug '08

Hi, I'd like to known if you're planning to send a pull request for the cfi repos. Because There a patch - in your repos - that came from the SMDK600 patchset. Best Regards, J.

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[U-Boot] [cfi-flash] Please pull git://www.denx.de/git/u-boot-cfi-flash.git
by Stefan Roese 14 Aug '08

14 Aug '08

The following changes since commit 81091f58f0c58ecd26c5b05de2ae20ca6cdb521c: Jean-Christophe PLAGNIOL-VILLARD (1): drivers/serial: Move conditional compilation to Makefile for CONFIG_* macros are available in the git repository at: git://www.denx.de/git/u-boot-cfi-flash.git master Guennadi Liakhovetski (1): cfi-flash: Add definition for the AM29LV800BB AMD NOR-flash Rafael Campos (1): cfi-flash: Added support to flash_real_protect for Atmel flash devices drivers/mtd/cfi_flash.c | 49 +++++++++++++++++++++++++++++++++++++++----- drivers/mtd/jedec_flash.c | 17 +++++++++++++++ 2 files changed, 60 insertions(+), 6 deletions(-)

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[U-Boot] Pull request: nand-flash
by Scott Wood 14 Aug '08

14 Aug '08

The following changes since commit 8641ff266ae6638da201747c239fd39ba34c4958: Wolfgang Denk (1): Merge branch 'master' of git://www.denx.de/git/u-boot-at91 are available in the git repository at: git://www.denx.de/git/u-boot-nand-flash.git master Kyungmin Park (1): Fix OneNAND build break Scott Wood (5): at91: Update board NAND drivers to current API. s3c24x0: Update NAND driver to new API. m5373evb: Update NAND driver to new API. quad100hd: Update NAND driver to new API. socrates: Update NAND driver to new API. board/atmel/at91cap9adk/nand.c | 37 +++++----- board/atmel/at91sam9260ek/nand.c | 37 +++++----- board/atmel/at91sam9261ek/nand.c | 37 +++++----- board/atmel/at91sam9263ek/nand.c | 37 +++++----- board/atmel/at91sam9rlek/nand.c | 37 +++++----- board/freescale/m5373evb/nand.c | 64 +++++------------- board/quad100hd/nand.c | 36 ++++------ board/socrates/nand.c | 84 +++++++++-------------- common/env_onenand.c | 10 ++-- cpu/arm920t/s3c24x0/nand.c | 64 +++++++++--------- drivers/mtd/onenand/onenand_base.c | 131 ++++++++++++++++++++++++++---------- drivers/mtd/onenand/onenand_bbt.c | 4 +- include/linux/mtd/mtd.h | 16 +++++ include/linux/mtd/nand.h | 16 +---- include/linux/mtd/nand_legacy.h | 12 --- include/linux/mtd/onenand.h | 19 +---- 16 files changed, 307 insertions(+), 334 deletions(-)

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[U-Boot] nand_spl/nand_boot.c: why can't we do anything on ECC error?
by Jens Gehrlein 14 Aug '08

14 Aug '08

Hi, in nand_spl/nand_boot.c in function nand_read_page() one can read the comment in the case of ECC errors: "No chance to do something with the possible error message from correct_data(). We just hope that all possible errors are corrected by this routine." Why can't we do anything? If an uncorrectable error has been recognized, we could at least execute an endless loop or issue a reset. Depending on the bit errors and their location in the U-Boot image, U-Boot may though boot and a runtime error could probably appear never or later or only under special circumtances. Because this is a risk (the image is corrupted), what do you think of inserting some blocking functionality? Or did I missed something in interpreting this code? Kind regards, Jens

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[U-Boot] [PATCH] s3c24x0: Update NAND driver to new API.
by Scott Wood 14 Aug '08

14 Aug '08

Signed-off-by: Scott Wood <scottwood(a)freescale.com> --- I don't have hardware to test (and I don't see any in-tree board that currently uses this), so any help in that regard is appreciated. cpu/arm920t/s3c24x0/nand.c | 64 ++++++++++++++++++++++---------------------- 1 files changed, 32 insertions(+), 32 deletions(-) diff --git a/cpu/arm920t/s3c24x0/nand.c b/cpu/arm920t/s3c24x0/nand.c index e1bf128..9d63243 100644 --- a/cpu/arm920t/s3c24x0/nand.c +++ b/cpu/arm920t/s3c24x0/nand.c @@ -31,6 +31,7 @@ #include <nand.h> #include <s3c2410.h> +#include <asm/io.h> #define __REGb(x) (*(volatile unsigned char *)(x)) #define __REGi(x) (*(volatile unsigned int *)(x)) @@ -54,34 +55,33 @@ #define S3C2410_NFCONF_TWRPH0(x) ((x)<<4) #define S3C2410_NFCONF_TWRPH1(x) ((x)<<0) -static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd) +#define S3C2410_ADDR_NALE 4 +#define S3C2410_ADDR_NCLE 8 + +static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *chip = mtd->priv; - DEBUGN("hwcontrol(): 0x%02x: ", cmd); - - switch (cmd) { - case NAND_CTL_SETNCE: - NFCONF &= ~S3C2410_NFCONF_nFCE; - DEBUGN("NFCONF=0x%08x\n", NFCONF); - break; - case NAND_CTL_CLRNCE: - NFCONF |= S3C2410_NFCONF_nFCE; - DEBUGN("NFCONF=0x%08x\n", NFCONF); - break; - case NAND_CTL_SETALE: - chip->IO_ADDR_W = NF_BASE + 0x8; - DEBUGN("SETALE\n"); - break; - case NAND_CTL_SETCLE: - chip->IO_ADDR_W = NF_BASE + 0x4; - DEBUGN("SETCLE\n"); - break; - default: - chip->IO_ADDR_W = NF_BASE + 0xc; - break; + DEBUGN("hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl); + + if (ctrl & NAND_CTRL_CHANGE) { + ulong IO_ADDR_W = NF_BASE; + + if (!(ctrl & NAND_CLE)) + IO_ADDR_W |= S3C2410_ADDR_NCLE; + if (!(ctrl & NAND_ALE)) + IO_ADDR_W |= S3C2410_ADDR_NALE; + + chip->IO_ADDR_W = (void *)IO_ADDR_W; + + if (ctrl & NAND_NCE) + NFCONF &= ~S3C2410_NFCONF_nFCE; + else + NFCONF |= S3C2410_NFCONF_nFCE; } - return; + + if (cmd != NAND_CMD_NONE) + writeb(cmd, chip->IO_ADDR_W); } static int s3c2410_dev_ready(struct mtd_info *mtd) @@ -93,7 +93,7 @@ static int s3c2410_dev_ready(struct mtd_info *mtd) #ifdef CONFIG_S3C2410_NAND_HWECC void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) { - DEBUGN("s3c2410_nand_enable_hwecc(%p, %d)\n", mtd ,mode); + DEBUGN("s3c2410_nand_enable_hwecc(%p, %d)\n", mtd, mode); NFCONF |= S3C2410_NFCONF_INITECC; } @@ -143,23 +143,23 @@ int board_nand_init(struct nand_chip *nand) NFCONF = cfg; /* initialize nand_chip data structure */ - nand->IO_ADDR_R = nand->IO_ADDR_W = 0x4e00000c; + nand->IO_ADDR_R = nand->IO_ADDR_W = (void *)0x4e00000c; /* read_buf and write_buf are default */ /* read_byte and write_byte are default */ /* hwcontrol always must be implemented */ - nand->hwcontrol = s3c2410_hwcontrol; + nand->cmd_ctrl = s3c2410_hwcontrol; nand->dev_ready = s3c2410_dev_ready; #ifdef CONFIG_S3C2410_NAND_HWECC - nand->enable_hwecc = s3c2410_nand_enable_hwecc; - nand->calculate_ecc = s3c2410_nand_calculate_ecc; - nand->correct_data = s3c2410_nand_correct_data; - nand->eccmode = NAND_ECC_HW3_512; + nand->ecc.hwctl = s3c2410_nand_enable_hwecc; + nand->ecc.calculate = s3c2410_nand_calculate_ecc; + nand->ecc.correct = s3c2410_nand_correct_data; + nand->ecc.mode = NAND_ECC_HW3_512; #else - nand->eccmode = NAND_ECC_SOFT; + nand->ecc.mode = NAND_ECC_SOFT; #endif #ifdef CONFIG_S3C2410_NAND_BBT -- 1.5.6.rc1.6.gc53ad

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[U-Boot] [PATCH] quad100hd: Update NAND driver to new API.
by Scott Wood 14 Aug '08

14 Aug '08

Signed-off-by: Scott Wood <scottwood(a)freescale.com> --- I don't have hardware to test, so any help in that regard is appreciated. Applied to u-boot-nand-flash. board/quad100hd/nand.c | 36 +++++++++++++----------------------- 1 files changed, 13 insertions(+), 23 deletions(-) diff --git a/board/quad100hd/nand.c b/board/quad100hd/nand.c index a36b89d..766ee95 100644 --- a/board/quad100hd/nand.c +++ b/board/quad100hd/nand.c @@ -25,35 +25,25 @@ #include <config.h> #if defined(CONFIG_CMD_NAND) #include <asm/gpio.h> +#include <asm/io.h> #include <nand.h> /* * hardware specific access to control-lines */ -static void quad100hd_hwcontrol(struct mtd_info *mtd, int cmd) +static void quad100hd_hwcontrol(struct mtd_info *mtd, + int cmd, unsigned int ctrl) { - switch(cmd) { - case NAND_CTL_SETCLE: - gpio_write_bit(CFG_NAND_CLE, 1); - break; - case NAND_CTL_CLRCLE: - gpio_write_bit(CFG_NAND_CLE, 0); - break; + struct nand_chip *this = mtd->priv; - case NAND_CTL_SETALE: - gpio_write_bit(CFG_NAND_ALE, 1); - break; - case NAND_CTL_CLRALE: - gpio_write_bit(CFG_NAND_ALE, 0); - break; - - case NAND_CTL_SETNCE: - gpio_write_bit(CFG_NAND_CE, 0); - break; - case NAND_CTL_CLRNCE: - gpio_write_bit(CFG_NAND_CE, 1); - break; + if (ctrl & NAND_CTRL_CHANGE) { + gpio_write_bit(CFG_NAND_CLE, !!(ctrl & NAND_CLE)); + gpio_write_bit(CFG_NAND_ALE, !!(ctrl & NAND_ALE)); + gpio_write_bit(CFG_NAND_CE, !(ctrl & NAND_NCE)); } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); } static int quad100hd_nand_ready(struct mtd_info *mtd) @@ -67,9 +57,9 @@ static int quad100hd_nand_ready(struct mtd_info *mtd) int board_nand_init(struct nand_chip *nand) { /* Set address of hardware control function */ - nand->hwcontrol = quad100hd_hwcontrol; + nand->cmd_ctrl = quad100hd_hwcontrol; nand->dev_ready = quad100hd_nand_ready; - nand->eccmode = NAND_ECC_SOFT; + nand->ecc.mode = NAND_ECC_SOFT; /* 15 us command delay time */ nand->chip_delay = 20; -- 1.5.6.rc1.6.gc53ad

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