July 2008 - U-Boot

[U-Boot-Users] Palestinian tries tto sneak lion and monkey into Gaza
by Stockinger Critton 28 Jul '08

28 Jul '08

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[U-Boot-Users] USB Uboot on OSK5912
by Shivdas Gujare 28 Jul '08

28 Jul '08

Hi all, I am working on getting USB-uboot working on OSK5912. from linux USB gadget "device controller drivers" (i.e. kernel/drivers/usb/gadget/) it looks like USB core for omap1510 and OSK5912 is same..But not sure, please confirm I done following steps. 1)make mrproper 2)make omap5912osk_config 3)go to include/configs/omap5912osk.h and edit this file with following macros. . #define CONFIG_DOS_PARTITION 1 #define CONFIG_USB_OHCI 1 #define CONFIG_USB_OHCI_NEW 1 #define CFG_USB_OHCI_MAX_ROOT_PORTS 1 #define CFG_USB_OHCI_SLOT_NAME "osk5912" #define CFG_USB_OHCI_REGS_BASE 0xfffba000 #define CONFIG_USB_STORAGE 1 #define CFG_USB_OHCI_BOARD_INIT 1 #define CFG_USB_OHCI_CPU_INIT 1 #define CONFIG_CMD_USB 1 4)after this, I am able to see USB command enabled on Uboot console. but I am not able to see Mass-storage detected after inserting pendrive and doing "usb start" 5) from docs/README.generic_usb_ohci, It looks like usb_board_init/stop and usb_cpu_init/stop functions are missing and needs to be implemented. for above all, I am using omap1510 code. but I am not sure will this code work or not? also I am not sure, why "usb_board_init/stop and usb_cpu_init/stop" code is not included in git for enabling USB uboot on omap1510 or is I am missing any thing? Please, needs help/confirmation that I can make USB-Uboot work on OSK5912. Thanks for any help.. Thanks and Regards, Shivdas Gujare

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[U-Boot-Users] How to pass MAC address to linux kernel?
by 이승열 28 Jul '08

28 Jul '08

Hi all, I'm writing SMC9210 linux device driver. I cannot determine MAC address because there is no information. I want to get MAC address from U-boot. How to pass MAC address to linux kernel? Please let me know how to exchange MAC address between U-boot and linux kernel. Thank you in advance. Best Regards, Seung Youl.

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[U-Boot-Users] [PATCH] Add MIMC200 board
by Mark Jackson 28 Jul '08

28 Jul '08

The MIMC200 board is based on Atmel's NGW100 dev kit, but with an extra 8MByte FLASH and 128KByte FRAM. --- CREDITS | 4 ++ MAINTAINERS | 4 ++ MAKEALL | 1 + Makefile | 3 + board/atmel/mimc200/Makefile | 40 +++++++++ board/atmel/mimc200/config.mk | 3 + board/atmel/mimc200/eth.c | 36 ++++++++ board/atmel/mimc200/mimc200.c | 147 ++++++++++++++++++++++++++++++++ board/atmel/mimc200/u-boot.lds | 73 ++++++++++++++++ cpu/at32ap/at32ap700x/clk.c | 8 ++++ cpu/at32ap/at32ap700x/gpio.c | 4 ++ cpu/at32ap/cpu.c | 14 +++++++ drivers/serial/atmel_usart.c | 43 +++++++++++++++++++++ include/configs/mimc200.h | 179 ++++++++++++++++++++++++++++++++++++++++ net/eth.c | 4 ++ 15 files changed, 563 insertions(+), 0 deletions(-) diff --git a/CREDITS b/CREDITS index 2b0dab7..5010c78 100644 --- a/CREDITS +++ b/CREDITS @@ -217,6 +217,10 @@ H: Rich Ireland E: r.ireland(a)computer.org D: FPGA device configuration driver +H: Mark Jackson +E: mpfj(a)mimc.co.uk +D: Port to MIMC200 board + N: Gary Jennejohn E: garyj(a)jennejohn.org, gj(a)denx.de D: Support for Samsung ARM920T S3C2400X, ARM920T "TRAB" diff --git a/MAINTAINERS b/MAINTAINERS index cbe5c47..d4f6639 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -709,6 +709,10 @@ Haavard Skinnemoen <hskinnemoen(a)atmel.com> ATSTK1006 AT32AP7000 ATNGW100 AT32AP7000 +Mark Jackson <mpfj(a)mimc.co.uk> + + MIMC200 AT32AP7000 + ######################################################################### # SuperH Systems: # # # diff --git a/MAKEALL b/MAKEALL index c1a9c60..cfd376c 100755 --- a/MAKEALL +++ b/MAKEALL @@ -715,6 +715,7 @@ LIST_avr32=" \ atstk1004 \ atstk1006 \ atngw100 \ + mimc200 \ " ######################################################################### diff --git a/Makefile b/Makefile index 369bbd7..d85867c 100644 --- a/Makefile +++ b/Makefile @@ -2914,6 +2914,9 @@ atstk1004_config : unconfig atstk1006_config : unconfig @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x +mimc200_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32ap mimc200 atmel at32ap700x + #======================================================================== # SH3 (SuperH) #======================================================================== diff --git a/board/atmel/mimc200/config.mk b/board/atmel/mimc200/config.mk new file mode 100644 index 0000000..9a794e5 --- /dev/null +++ b/board/atmel/mimc200/config.mk @@ -0,0 +1,3 @@ +TEXT_BASE = 0x00000000 +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections +PLATFORM_LDFLAGS += --gc-sections diff --git a/board/atmel/mimc200/eth.c b/board/atmel/mimc200/eth.c new file mode 100644 index 0000000..4e13399 --- /dev/null +++ b/board/atmel/mimc200/eth.c @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2006 Atmel Corporation + * + * Ethernet initialization for the AVR32 Network Gateway + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/arch/memory-map.h> + +extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); + +#ifdef CONFIG_CMD_NET +void mimc200_eth_initialize(bd_t *bi) +{ + macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]); + macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]); +} +#endif diff --git a/board/atmel/mimc200/Makefile b/board/atmel/mimc200/Makefile new file mode 100644 index 0000000..1b5c635 --- /dev/null +++ b/board/atmel/mimc200/Makefile @@ -0,0 +1,40 @@ +# +# Copyright (C) 2005-2006 Atmel Corporation +# +# See file CREDITS for list of people who contributed to this project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o eth.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/atmel/mimc200/mimc200.c b/board/atmel/mimc200/mimc200.c new file mode 100644 index 0000000..1b12639 --- /dev/null +++ b/board/atmel/mimc200/mimc200.c @@ -0,0 +1,147 @@ +/* + * Copyright (C) 2006 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/io.h> +#include <asm/sdram.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hmatrix.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct sdram_config sdram_config = { + .data_bits = SDRAM_DATA_16BIT, + .row_bits = 13, + .col_bits = 9, + .bank_bits = 2, + .cas = 3, + .twr = 2, + .trc = 6, + .trp = 2, + .trcd = 2, + .tras = 6, + .txsr = 6, + /* 15.6 us */ + .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, +}; + +int board_early_init_f(void) +{ + /* Enable SDRAM in the EBI mux */ + hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); + + gpio_enable_ebi(); + gpio_enable_usart1(); + + // enable higher address lines for larger flash devices + gpio_select_periph_A(GPIO_PIN_PE16, 0); /* ADDR23 */ + gpio_select_periph_A(GPIO_PIN_PE17, 0); /* ADDR24 */ + gpio_select_periph_A(GPIO_PIN_PE18, 0); /* ADDR25 */ + + // enable data flash chip select + gpio_select_periph_A(GPIO_PIN_PE25, 0); /* NCS2 */ + + // de-assert "force sys reset" pin + gpio_set_value(GPIO_PIN_PD15, 1); /* FORCE RESET */ + gpio_select_pio(GPIO_PIN_PD15, GPIOF_OUTPUT); + + // init custom i/o + // cpu type inputs + gpio_select_pio(GPIO_PIN_PE19, 0); + gpio_select_pio(GPIO_PIN_PE20, 0); + gpio_select_pio(GPIO_PIN_PE23, 0); + // main board type inputs + gpio_select_pio(GPIO_PIN_PB19, 0); + gpio_select_pio(GPIO_PIN_PB29, 0); + // DEBUG input (use weak pullup) + gpio_select_pio(GPIO_PIN_PE21, GPIOF_PULLUP); + + // reset phys + gpio_select_pio(GPIO_PIN_PE24, 0); + gpio_set_value(GPIO_PIN_PC18, 1); /* PHY RESET */ + gpio_select_pio(GPIO_PIN_PC18, GPIOF_OUTPUT); + + // GCLK0 - 10MHz clock + gpio_select_periph_A(GPIO_PIN_PA30, 0); + // GCLK1 - 25MHz clock + //gpio_select_periph_A(GPIO_PIN_PA31, 0); + + udelay(5000); + + // release phys reset + gpio_set_value(GPIO_PIN_PC18, 0); /* PHY RESET (Release) */ + +#if defined(CONFIG_MACB) + gpio_enable_macb0(); + gpio_enable_macb1(); +#endif +#if defined(CONFIG_MMC) + gpio_enable_mmci(); +#endif + + return 0; +} + +phys_size_t initdram(int board_type) +{ + unsigned long expected_size; + unsigned long actual_size; + void *sdram_base; + + sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE); + + expected_size = sdram_init(sdram_base, &sdram_config); + actual_size = get_ram_size(sdram_base, expected_size); + + unmap_physmem(sdram_base, EBI_SDRAM_SIZE); + + if (expected_size != actual_size) + printf("Warning: Only %lu of %lu MiB SDRAM is working\n", + actual_size >> 20, expected_size >> 20); + + return actual_size; +} + +void board_init_info(void) +{ + gd->bd->bi_phy_id[0] = 0x01; + gd->bd->bi_phy_id[1] = 0x03; +} + +/* SPI chip select control */ +#ifdef CONFIG_ATMEL_SPI +#include <spi.h> + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(struct spi_slave *slave) +{ +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ +} +#endif /* CONFIG_ATMEL_SPI */ diff --git a/board/atmel/mimc200/u-boot.lds b/board/atmel/mimc200/u-boot.lds new file mode 100644 index 0000000..e736adf --- /dev/null +++ b/board/atmel/mimc200/u-boot.lds @@ -0,0 +1,73 @@ +/* -*- Fundamental -*- + * + * Copyright (C) 2005-2006 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") +OUTPUT_ARCH(avr32) +ENTRY(_start) + +SECTIONS +{ + . = 0; + _text = .; + .text : { + *(.exception.text) + *(.text) + *(.text.*) + } + _etext = .; + + .rodata : { + *(.rodata) + *(.rodata.*) + } + + . = ALIGN(8); + _data = .; + .data : { + *(.data) + *(.data.*) + } + + . = ALIGN(4); + __u_boot_cmd_start = .; + .u_boot_cmd : { + KEEP(*(.u_boot_cmd)) + } + __u_boot_cmd_end = .; + + . = ALIGN(4); + _got = .; + .got : { + *(.got) + } + _egot = .; + + . = ALIGN(8); + _edata = .; + + .bss : { + *(.bss) + *(.bss.*) + } + . = ALIGN(8); + _end = .; +} diff --git a/cpu/at32ap/at32ap700x/clk.c b/cpu/at32ap/at32ap700x/clk.c index b3aa034..73b859e 100644 --- a/cpu/at32ap/at32ap700x/clk.c +++ b/cpu/at32ap/at32ap700x/clk.c @@ -65,4 +65,12 @@ void clk_init(void) /* Use PLL0 as main clock */ sm_writel(PM_MCCTRL, SM_BIT(PLLSEL)); #endif + +#ifdef CONFIG_MIMC200 + // enable gclk outputs + //AVR32_PM.gcctrl[0] = 0x0004; /* LVDS at 10MHz */ + sm_writel(PM_GCCTRL, 0x00000004); + //AVR32_PM.gcctrl[1] = 0x0216; /* Ethernet at 25MHz if PLL running */ + //sm_writel(PM_GCCTRL + 4, 0x00000216); +#endif } diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c index 56ba2f9..7c6679d 100644 --- a/cpu/at32ap/at32ap700x/gpio.c +++ b/cpu/at32ap/at32ap700x/gpio.c @@ -104,8 +104,10 @@ void gpio_enable_macb0(void) gpio_select_periph_A(GPIO_PIN_PC11, 0); /* RXD2 */ gpio_select_periph_A(GPIO_PIN_PC12, 0); /* RXD3 */ gpio_select_periph_A(GPIO_PIN_PC14, 0); /* RXCK */ +#ifndef CONFIG_MIMC200 gpio_select_periph_A(GPIO_PIN_PC18, 0); /* SPD */ #endif +#endif } void gpio_enable_macb1(void) @@ -129,8 +131,10 @@ void gpio_enable_macb1(void) gpio_select_periph_B(GPIO_PIN_PC29, 0); /* RXD2 */ gpio_select_periph_B(GPIO_PIN_PC30, 0); /* RXD3 */ gpio_select_periph_B(GPIO_PIN_PC24, 0); /* RXCK */ +#ifndef CONFIG_MIMC200 gpio_select_periph_B(GPIO_PIN_PD15, 0); /* SPD */ #endif +#endif } #endif diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c index 0ba8361..8985b68 100644 --- a/cpu/at32ap/cpu.c +++ b/cpu/at32ap/cpu.c @@ -56,6 +56,20 @@ int cpu_init(void) hsmc3_writel(PULSE0, 0x0b0a0906); hsmc3_writel(SETUP0, 0x00010002); +#ifdef CONFIG_MIMC200 + // setup Data Flash chip select (NCS2) + hsmc3_writel(MODE2, 0x20121003); + hsmc3_writel(CYCLE2, 0x000a0009); + hsmc3_writel(PULSE2, 0x0a060806); + hsmc3_writel(SETUP2, 0x00030102); + + // setup FRAM chip select (NCS3) + hsmc3_writel(MODE3, 0x10120001); + hsmc3_writel(CYCLE3, 0x001e001d); + hsmc3_writel(PULSE3, 0x08040704); + hsmc3_writel(SETUP3, 0x02050204); +#endif + clk_init(); /* Update the CPU speed according to the PLL configuration */ diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c index f35b997..9e131c0 100644 --- a/drivers/serial/atmel_usart.c +++ b/drivers/serial/atmel_usart.c @@ -21,6 +21,9 @@ #include <asm/io.h> #include <asm/arch/clk.h> #include <asm/arch/memory-map.h> +#if defined(CONFIG_MIMC200_DBGLINK) +#include <asm/arch/gpio.h> +#endif #if defined(CONFIG_USART0) # define USART_ID 0 @@ -73,27 +76,67 @@ int serial_init(void) void serial_putc(char c) { +#if defined(CONFIG_MIMC200_DBGLINK) + // only output serial data if DEBUG link connected + // this is connected to PIOE_21 + if (gpio_get_value(GPIO_PIN_PE21) == 0) + { +#endif + if (c == '\n') serial_putc('\r'); while (!(usart3_readl(CSR) & USART3_BIT(TXRDY))) ; usart3_writel(THR, c); + +#if defined(CONFIG_MIMC200_DBGLINK) + } +#endif } void serial_puts(const char *s) { +#if defined(CONFIG_MIMC200_DBGLINK) + // only output serial data if DEBUG link connected + // this is connected to PIOE_21 + if (gpio_get_value(GPIO_PIN_PE21) == 0) + { +#endif + while (*s) serial_putc(*s++); + +#if defined(CONFIG_MIMC200_DBGLINK) + } +#endif } int serial_getc(void) { +#if defined(CONFIG_MIMC200_DBGLINK) + // only get serial data if DEBUG link connected + // this is connected to PIOE_21 + if (gpio_get_value(GPIO_PIN_PE21) == 1) + { + return 0; + } +#endif + while (!(usart3_readl(CSR) & USART3_BIT(RXRDY))) ; return usart3_readl(RHR); } int serial_tstc(void) { +#if defined(CONFIG_MIMC200_DBGLINK) + // only get serial data if DEBUG link connected + // this is connected to PIOE_21 + if (gpio_get_value(GPIO_PIN_PE21) == 1) + { + return (1 == 0); + } +#endif + return (usart3_readl(CSR) & USART3_BIT(RXRDY)) != 0; } diff --git a/net/eth.c b/net/eth.c index 38979aa..409756d 100644 --- a/net/eth.c +++ b/net/eth.c @@ -75,6 +75,7 @@ extern int atngw100_eth_initialize(bd_t *); extern int mcffec_initialize(bd_t*); extern int mcdmafec_initialize(bd_t*); extern int at91sam9_eth_initialize(bd_t *); +extern int mimc200_eth_initialize(bd_t *); #ifdef CONFIG_API extern void (*push_packet)(volatile void *, int); @@ -290,6 +291,9 @@ int eth_initialize(bd_t *bis) defined(CONFIG_AT91SAM9263) at91sam9_eth_initialize(bis); #endif +#if defined(CONFIG_MIMC200) + mimc200_eth_initialize(bis); +#endif if (!eth_devices) { puts ("No ethernet found.\n"); diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h new file mode 100644 index 0000000..1afc741 --- /dev/null +++ b/include/configs/mimc200.h @@ -0,0 +1,179 @@ +/* + * Copyright (C) 2006 Atmel Corporation + * + * Configuration settings for the AVR32 Network Gateway + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/memory-map.h> + +#define CONFIG_AVR32 1 +#define CONFIG_AT32AP 1 +#define CONFIG_AT32AP7000 1 +#define CONFIG_MIMC200 1 + +#define CONFIG_MIMC200_EXT_FLASH 1 + +#define CFG_HZ 1000 + +/* + * Set up the PLL to run at 140 MHz, the CPU to run at the PLL + * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency + * and the PBA bus to run at 1/4 the PLL frequency. + */ +#define CONFIG_PLL 1 +#define CFG_POWER_MANAGER 1 +#define CFG_OSC0_HZ 10000000 +#define CFG_PLL0_DIV 1 +#define CFG_PLL0_MUL 15 +#define CFG_PLL0_SUPPRESS_CYCLES 16 +#define CFG_CLKDIV_CPU 0 +#define CFG_CLKDIV_HSB 1 +#define CFG_CLKDIV_PBA 2 +#define CFG_CLKDIV_PBB 1 + +/* + * The PLLOPT register controls the PLL like this: + * icp = PLLOPT<2> + * ivco = PLLOPT<1:0> + * + * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). + */ +#define CFG_PLL0_OPT 0x04 + +#define CONFIG_USART1 1 +#define CONFIG_MIMC200_DBGLINK 1 + +/* User serviceable stuff */ +#define CONFIG_DOS_PARTITION 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_STACKSIZE (2048) + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTARGS \ + "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND \ + "fsload; bootm" + +/* + * Only interrupt autoboot if <space> is pressed. Otherwise, garbage + * data on the serial line may interrupt the boot sequence. + */ +#define CONFIG_BOOTDELAY 0 +#define CONFIG_ZERO_BOOTDELAY_CHECK 1 +#define CONFIG_AUTOBOOT 1 +//#define CONFIG_AUTOBOOT_KEYED 1 +//#define CONFIG_AUTOBOOT_PROMPT \ +// "Press SPACE to abort autoboot in %d seconds\n" +//#define CONFIG_AUTOBOOT_DELAY_STR "d" +//#define CONFIG_AUTOBOOT_STOP_STR " " + +/* + * After booting the board for the first time, new ethernet addresses + * should be generated and assigned to the environment variables + * "ethaddr" and "eth1addr". This is normally done during production. + */ +#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 +#define CONFIG_NET_MULTI 1 + +/* + * BOOTP/DHCP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY + +#define CONFIG_DOS_PARTITION 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MMC +#define CONFIG_CMD_NET + +#define CONFIG_ATMEL_USART 1 +#define CONFIG_MACB 1 +#define CONFIG_PIO2 1 +#define CFG_NR_PIOS 5 +#define CFG_HSDRAMC 1 +#define CONFIG_MMC 1 +#define CONFIG_ATMEL_MCI 1 +#define CONFIG_ATMEL_SPI 1 + +#define CFG_DCACHE_LINESZ 32 +#define CFG_ICACHE_LINESZ 32 + +#define CONFIG_NR_DRAM_BANKS 1 + +#define CFG_FLASH_CFI 1 +#define CFG_FLASH_CFI_DRIVER 1 + +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x800000 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 135 + +#define CFG_MONITOR_BASE CFG_FLASH_BASE + +#define CFG_INTRAM_BASE INTERNAL_SRAM_BASE +#define CFG_INTRAM_SIZE INTERNAL_SRAM_SIZE +#define CFG_SDRAM_BASE EBI_SDRAM_BASE + +#define CFG_FRAM_BASE 0x08000000 +#define CFG_FRAM_SIZE 0x20000 + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 65536 +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE) + +#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE) + +#define CFG_MALLOC_LEN (256*1024) +#define CFG_DMA_ALLOC_LEN (16384) + +/* Allow 4MB for the kernel run-time image */ +#define CFG_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) +#define CFG_BOOTPARAMS_LEN (16 * 1024) + +/* Other configuration settings that shouldn't have to change all that often */ +#define CFG_PROMPT "U-Boot> " +#define CFG_CBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_LONGHELP 1 + +#define CFG_MEMTEST_START EBI_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x1f00000) + +#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } + +#endif /* __CONFIG_H */

2 1

[U-Boot-Users] [PATCH 1/1] Add support for ATMEL AT91SAM9G20EK board
by Hong Xu 28 Jul '08

28 Jul '08

>From 81230b02610c06fdc8a175e635851346488e3bdb Mon Sep 17 00:00:00 2001 From: Hong Xu <hong.xu(a)atmel.com> Date: Thu, 24 Jul 2008 14:25:05 +0800 Subject: [PATCH 1/1] Add support for ATMEL AT91SAM9G20EK board This patch adds support for ATMEL AT91SAM9G20EK board. User manual for AT91SAM9G20EK board, see http://www.atmel.com/dyn/resources/prod_documents/doc6413.pdf AT91 SAM9G20 datasheet, see http://www.atmel.com/dyn/resources/prod_documents/doc6384.pdf Signed-off-by: Hong Xu <hong.xu(a)atmel.com> --- Makefile | 3 + board/atmel/at91sam9g20ek/Makefile | 57 +++++++ board/atmel/at91sam9g20ek/at91sam9g20ek.c | 250 +++++++++++++++++++++++++++++ board/atmel/at91sam9g20ek/config.mk | 1 + board/atmel/at91sam9g20ek/led.c | 64 ++++++++ board/atmel/at91sam9g20ek/nand.c | 79 +++++++++ board/atmel/at91sam9g20ek/partition.c | 40 +++++ drivers/net/macb.c | 4 +- include/asm-arm/arch-at91sam9/hardware.h | 2 +- include/configs/at91sam9g20ek.h | 202 +++++++++++++++++++++++ net/eth.c | 2 +- 11 files changed, 700 insertions(+), 4 deletions(-) create mode 100644 board/atmel/at91sam9g20ek/Makefile create mode 100644 board/atmel/at91sam9g20ek/at91sam9g20ek.c create mode 100644 board/atmel/at91sam9g20ek/config.mk create mode 100644 board/atmel/at91sam9g20ek/led.c create mode 100644 board/atmel/at91sam9g20ek/nand.c create mode 100644 board/atmel/at91sam9g20ek/partition.c create mode 100644 include/configs/at91sam9g20ek.h diff --git a/Makefile b/Makefile index 369bbd7..c7ed34d 100644 --- a/Makefile +++ b/Makefile @@ -2388,6 +2388,9 @@ at91cap9adk_config : unconfig at91sam9260ek_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9260ek atmel at91sam9 +at91sam9g20ek_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9g20ek atmel at91sam9 + ######################################################################## ## ARM Integrator boards - see doc/README-integrator for more info. integratorap_config \ diff --git a/board/atmel/at91sam9g20ek/Makefile b/board/atmel/at91sam9g20ek/Makefile new file mode 100644 index 0000000..cdf5d34 --- /dev/null +++ b/board/atmel/at91sam9g20ek/Makefile @@ -0,0 +1,57 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# (C) Copyright 2008 +# Stelian Pop <stelian.pop(a)leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += at91sam9g20ek.o +COBJS-y += led.o +COBJS-y += partition.o +COBJS-$(CONFIG_CMD_NAND) += nand.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/atmel/at91sam9g20ek/at91sam9g20ek.c b/board/atmel/at91sam9g20ek/at91sam9g20ek.c new file mode 100644 index 0000000..f47b7bb --- /dev/null +++ b/board/atmel/at91sam9g20ek/at91sam9g20ek.c @@ -0,0 +1,250 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9260.h> +#include <asm/arch/at91sam9260_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) +#include <net.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +static void at91sam9g20ek_serial_hw_init(void) +{ +#ifdef CONFIG_USART0 + at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); +#endif + +#ifdef CONFIG_USART1 + at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); +#endif + +#ifdef CONFIG_USART2 + at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); +#endif + +#ifdef CONFIG_USART3 /* DBGU */ + at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); +#endif +} + +#ifdef CONFIG_CMD_NAND +static void at91sam9g20ek_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBICSA); + at91_sys_write(AT91_MATRIX_EBICSA, + csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | +#ifdef CFG_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CFG_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(3)); + + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC); + + /* Configure RDY/BSY */ + at91_set_gpio_input(AT91_PIN_PC13, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(AT91_PIN_PC14, 1); +} +#endif + +#ifdef CONFIG_HAS_DATAFLASH +static void at91sam9g20ek_spi_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */ + at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */ + + at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0); +} +#endif + +#ifdef CONFIG_MACB +static void at91sam9g20ek_macb_hw_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC); + + /* + * Disable pull-up on: + * RXDV (PA17) => PHY normal mode (not Test mode) + * ERX0 (PA14) => PHY ADDR0 + * ERX1 (PA15) => PHY ADDR1 + * ERX2 (PA25) => PHY ADDR2 + * ERX3 (PA26) => PHY ADDR3 + * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 + * + * PHY has internal pull-down + */ + writel(pin_to_mask(AT91_PIN_PA14) | + pin_to_mask(AT91_PIN_PA15) | + pin_to_mask(AT91_PIN_PA17) | + pin_to_mask(AT91_PIN_PA25) | + pin_to_mask(AT91_PIN_PA26) | + pin_to_mask(AT91_PIN_PA28), + pin_to_controller(AT91_PIN_PA0) + PIO_PUDR); + + /* Need to reset PHY -> 500ms reset */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0D << 8)) | + AT91_RSTC_URSTEN); + + at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); + + /* Wait for end hardware reset */ + while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); + + /* Restore NRST value */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0 << 8)) | + AT91_RSTC_URSTEN); + + /* Re-enable pull-up */ + writel(pin_to_mask(AT91_PIN_PA14) | + pin_to_mask(AT91_PIN_PA15) | + pin_to_mask(AT91_PIN_PA17) | + pin_to_mask(AT91_PIN_PA25) | + pin_to_mask(AT91_PIN_PA26) | + pin_to_mask(AT91_PIN_PA28), + pin_to_controller(AT91_PIN_PA0) + PIO_PUER); + + at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */ + at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ + at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */ + at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */ + at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */ + at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */ + at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */ + at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */ + at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */ + at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */ + +#ifndef CONFIG_RMII + at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */ + at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */ + at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */ + at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */ + at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */ +#if defined(CONFIG_AT91SAM9G20EK) + /* + * use PA10, PA11 for ETX2, ETX3. + * PA23 and PA24 are for TWI EEPROM + */ + at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */ + at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */ +#else + at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */ + at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */ +#endif + at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */ +#endif + +} +#endif + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + + /* arch number of AT91SAM9G20EK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + at91sam9g20ek_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + at91sam9g20ek_nand_hw_init(); +#endif +#ifdef CONFIG_HAS_DATAFLASH + at91sam9g20ek_spi_hw_init(); +#endif +#ifdef CONFIG_MACB + at91sam9g20ek_macb_hw_init(); +#endif + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void reset_phy(void) +{ +#ifdef CONFIG_MACB + /* + * Initialize ethernet HW addr prior to starting Linux, + * needed for nfsroot + */ + eth_init(gd->bd); +#endif +} +#endif diff --git a/board/atmel/at91sam9g20ek/config.mk b/board/atmel/at91sam9g20ek/config.mk new file mode 100644 index 0000000..ff2cfd1 --- /dev/null +++ b/board/atmel/at91sam9g20ek/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/atmel/at91sam9g20ek/led.c b/board/atmel/at91sam9g20ek/led.c new file mode 100644 index 0000000..ddc375f --- /dev/null +++ b/board/atmel/at91sam9g20ek/led.c @@ -0,0 +1,64 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9260.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +#define RED_LED AT91_PIN_PA9 /* this is the power led */ +#define GREEN_LED AT91_PIN_PA6 /* this is the user led */ + +void red_LED_on(void) +{ + at91_set_gpio_value(RED_LED, 1); +} + +void red_LED_off(void) +{ + at91_set_gpio_value(RED_LED, 0); +} + +void green_LED_on(void) +{ + at91_set_gpio_value(GREEN_LED, 0); +} + +void green_LED_off(void) +{ + at91_set_gpio_value(GREEN_LED, 1); +} + +void coloured_LED_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA); + + at91_set_gpio_output(RED_LED, 1); + at91_set_gpio_output(GREEN_LED, 1); + + at91_set_gpio_value(RED_LED, 0); + at91_set_gpio_value(GREEN_LED, 1); +} diff --git a/board/atmel/at91sam9g20ek/nand.c b/board/atmel/at91sam9g20ek/nand.c new file mode 100644 index 0000000..25d3277 --- /dev/null +++ b/board/atmel/at91sam9g20ek/nand.c @@ -0,0 +1,79 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9260.h> +#include <asm/arch/gpio.h> +#include <asm/arch/at91_pio.h> + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +#define MASK_ALE (1 << 21) /* our ALE is AD21 */ +#define MASK_CLE (1 << 22) /* our CLE is AD22 */ + +static void at91sam9g20ek_nand_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); + switch (cmd) { + case NAND_CTL_SETCLE: + IO_ADDR_W |= MASK_CLE; + break; + case NAND_CTL_SETALE: + IO_ADDR_W |= MASK_ALE; + break; + case NAND_CTL_CLRNCE: + at91_set_gpio_value(AT91_PIN_PC14, 1); + break; + case NAND_CTL_SETNCE: + at91_set_gpio_value(AT91_PIN_PC14, 0); + break; + } + this->IO_ADDR_W = (void *) IO_ADDR_W; +} + +static int at91sam9g20ek_nand_ready(struct mtd_info *mtd) +{ + return at91_get_gpio_value(AT91_PIN_PC13); +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->eccmode = NAND_ECC_SOFT; +#ifdef CFG_NAND_DBW_16 + nand->options = NAND_BUSWIDTH_16; +#endif + nand->hwcontrol = at91sam9g20ek_nand_hwcontrol; + nand->dev_ready = at91sam9g20ek_nand_ready; + nand->chip_delay = 20; + + return 0; +} diff --git a/board/atmel/at91sam9g20ek/partition.c b/board/atmel/at91sam9g20ek/partition.c new file mode 100644 index 0000000..557d695 --- /dev/null +++ b/board/atmel/at91sam9g20ek/partition.c @@ -0,0 +1,40 @@ +/* + * (C) Copyright 2008 + * Ulf Samuelsson <ulf(a)atmel.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { + {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ + {CFG_DATAFLASH_LOGIC_ADDR_CS1, 1} +}; + +/*define the area offsets*/ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, + {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, + {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, +}; diff --git a/drivers/net/macb.c b/drivers/net/macb.c index aa39284..c3dcce6 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -415,14 +415,14 @@ static int macb_init(struct eth_device *netdev, bd_t *bd) /* choose RMII or MII mode. This depends on the board */ #ifdef CONFIG_RMII #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ - defined(CONFIG_AT91SAM9263) + defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN)); #else macb_writel(macb, USRIO, 0); #endif #else #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ - defined(CONFIG_AT91SAM9263) + defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) macb_writel(macb, USRIO, MACB_BIT(CLKEN)); #else macb_writel(macb, USRIO, MACB_BIT(MII)); diff --git a/include/asm-arm/arch-at91sam9/hardware.h b/include/asm-arm/arch-at91sam9/hardware.h index f312419..76b4f0e 100644 --- a/include/asm-arm/arch-at91sam9/hardware.h +++ b/include/asm-arm/arch-at91sam9/hardware.h @@ -18,7 +18,7 @@ #if defined(CONFIG_AT91RM9200) #include <asm/arch/at91rm9200.h> -#elif defined(CONFIG_AT91SAM9260) +#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) #include <asm/arch/at91sam9260.h> #define AT91_BASE_EMAC AT91SAM9260_BASE_EMAC #define AT91_BASE_SPI AT91SAM9260_BASE_SPI0 diff --git a/include/configs/at91sam9g20ek.h b/include/configs/at91sam9g20ek.h new file mode 100644 index 0000000..ed64895 --- /dev/null +++ b/include/configs/at91sam9g20ek.h @@ -0,0 +1,202 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * Configuation settings for the AT91SAM9G20EK board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* ARM asynchronous clock */ +#define AT91_MAIN_CLOCK 396288000 /* from 18.432 MHz crystal */ +#define AT91_MASTER_CLOCK 132096000 /* peripheral = main / 3 */ +#define CFG_HZ 1000000 /* 1us resolution */ + +#define AT91_SLOW_CLOCK 32768 /* slow clock */ + +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/ +#define CONFIG_AT91SAM9G20EK 1 /* on an AT91SAM9G20EK Board */ +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT + +/* + * Hardware drivers + */ +#define CONFIG_ATMEL_USART 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 +#undef CONFIG_USART2 +#define CONFIG_USART3 1 /* USART 3 is DBGU */ + +#define CONFIG_BOOTDELAY 3 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMLS + +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_NAND 1 +#define CONFIG_CMD_USB 1 + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ + +/* DataFlash */ +#define CONFIG_HAS_DATAFLASH 1 +#define CFG_SPI_WRITE_TOUT (5*CFG_HZ) +#define CFG_MAX_DATAFLASH_BANKS 2 +#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ +#define CFG_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ +#define AT91_SPI_CLK 15000000 +#define DATAFLASH_TCSS (0x22 << 16) +#define DATAFLASH_TCHS (0x1 << 24) + +/* NAND flash */ +#define NAND_MAX_CHIPS 1 +#define CFG_MAX_NAND_DEVICE 1 +#define CFG_NAND_BASE 0x40000000 +#define CFG_NAND_DBW_8 1 + +/* NOR flash - no real flash on this board */ +#define CFG_NO_FLASH 1 + +/* Ethernet */ +#define CONFIG_MACB 1 +#define CONFIG_RMII 1 +#define CONFIG_NET_MULTI 1 +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_RESET_PHY_R 1 + +/* USB */ +#define CONFIG_USB_OHCI_NEW 1 +#define LITTLEENDIAN 1 +#define CONFIG_DOS_PARTITION 1 +#define CFG_USB_OHCI_CPU_INIT 1 +#define CFG_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9G20_UHP_BASE */ +#define CFG_USB_OHCI_SLOT_NAME "at91sam9g20" +#define CFG_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE 1 + +#define CFG_LOAD_ADDR 0x22000000 /* load address */ + +#define CFG_MEMTEST_START PHYS_SDRAM +#define CFG_MEMTEST_END 0x23e00000 + +#undef CFG_USE_DATAFLASH_CS0 +#define CFG_USE_DATAFLASH_CS1 1 +#undef CFG_USE_NANDFLASH + +#ifdef CFG_USE_DATAFLASH_CS0 + +/* bootstrap + u-boot + env + linux in dataflash on CS0 */ +#define CFG_ENV_IS_IN_DATAFLASH 1 +#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) +#define CFG_ENV_OFFSET 0x4200 +#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) +#define CFG_ENV_SIZE 0x4200 +#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock0 " \ + "mtdparts=at91_nand:-(root) " \ + "rw rootfstype=jffs2" + +#elif CFG_USE_DATAFLASH_CS1 + +/* bootstrap + u-boot + env + linux in dataflash on CS1 */ +#define CFG_ENV_IS_IN_DATAFLASH 1 +#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) +#define CFG_ENV_OFFSET 0x4200 +#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS1 + CFG_ENV_OFFSET) +#define CFG_ENV_SIZE 0x4200 +#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock0 " \ + "mtdparts=at91_nand:-(root) " \ + "rw rootfstype=jffs2" + +#else /* CFG_USE_NANDFLASH */ + +/* bootstrap + u-boot + env + linux in nandflash */ +#define CFG_ENV_IS_IN_NAND 1 +#define CFG_ENV_OFFSET 0x60000 +#define CFG_ENV_OFFSET_REDUND 0x80000 +#define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock5 " \ + "mtdparts=at91_nand:128k(bootstrap)ro," \ + "256k(uboot)ro,128k(env1)ro," \ + "128k(env2)ro,2M(linux),-(root) " \ + "rw rootfstype=jffs2" + +#endif + +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +#define CFG_PROMPT "U-Boot> " +#define CFG_CBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 + +#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000) +#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ + +#define CONFIG_STACKSIZE (32*1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif diff --git a/net/eth.c b/net/eth.c index 38979aa..3f50e2b 100644 --- a/net/eth.c +++ b/net/eth.c @@ -287,7 +287,7 @@ int eth_initialize(bd_t *bis) mcdmafec_initialize(bis); #endif #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ - defined(CONFIG_AT91SAM9263) + defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) at91sam9_eth_initialize(bis); #endif -- 1.5.0.6

6 17

[U-Boot-Users] [PATCH] [resent] Add MIMC200 board
by Mark Jackson 28 Jul '08

28 Jul '08

The MIMC200 board is based on Atmel's NGW100 dev kit, but with an extra 8MByte FLASH and 128KByte FRAM. RESENT to fix stupid line wrapping !! Sorry. --- CREDITS | 4 ++ MAINTAINERS | 4 ++ MAKEALL | 1 + Makefile | 3 + board/atmel/mimc200/Makefile | 40 +++++++++ board/atmel/mimc200/config.mk | 3 + board/atmel/mimc200/eth.c | 36 ++++++++ board/atmel/mimc200/mimc200.c | 147 ++++++++++++++++++++++++++++++++ board/atmel/mimc200/u-boot.lds | 73 ++++++++++++++++ cpu/at32ap/at32ap700x/clk.c | 8 ++++ cpu/at32ap/at32ap700x/gpio.c | 4 ++ cpu/at32ap/cpu.c | 14 +++++++ drivers/serial/atmel_usart.c | 43 +++++++++++++++++++++ include/configs/mimc200.h | 179 ++++++++++++++++++++++++++++++++++++++++ net/eth.c | 4 ++ 15 files changed, 563 insertions(+), 0 deletions(-) diff --git a/CREDITS b/CREDITS index 2b0dab7..5010c78 100644 --- a/CREDITS +++ b/CREDITS @@ -217,6 +217,10 @@ H: Rich Ireland E: r.ireland(a)computer.org D: FPGA device configuration driver +H: Mark Jackson +E: mpfj(a)mimc.co.uk +D: Port to MIMC200 board + N: Gary Jennejohn E: garyj(a)jennejohn.org, gj(a)denx.de D: Support for Samsung ARM920T S3C2400X, ARM920T "TRAB" diff --git a/MAINTAINERS b/MAINTAINERS index cbe5c47..d4f6639 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -709,6 +709,10 @@ Haavard Skinnemoen <hskinnemoen(a)atmel.com> ATSTK1006 AT32AP7000 ATNGW100 AT32AP7000 +Mark Jackson <mpfj(a)mimc.co.uk> + + MIMC200 AT32AP7000 + ######################################################################### # SuperH Systems: # # # diff --git a/MAKEALL b/MAKEALL index c1a9c60..cfd376c 100755 --- a/MAKEALL +++ b/MAKEALL @@ -715,6 +715,7 @@ LIST_avr32=" \ atstk1004 \ atstk1006 \ atngw100 \ + mimc200 \ " ######################################################################### diff --git a/Makefile b/Makefile index 369bbd7..d85867c 100644 --- a/Makefile +++ b/Makefile @@ -2914,6 +2914,9 @@ atstk1004_config : unconfig atstk1006_config : unconfig @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x +mimc200_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32ap mimc200 atmel at32ap700x + #======================================================================== # SH3 (SuperH) #======================================================================== diff --git a/board/atmel/mimc200/config.mk b/board/atmel/mimc200/config.mk new file mode 100644 index 0000000..9a794e5 --- /dev/null +++ b/board/atmel/mimc200/config.mk @@ -0,0 +1,3 @@ +TEXT_BASE = 0x00000000 +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections +PLATFORM_LDFLAGS += --gc-sections diff --git a/board/atmel/mimc200/eth.c b/board/atmel/mimc200/eth.c new file mode 100644 index 0000000..4e13399 --- /dev/null +++ b/board/atmel/mimc200/eth.c @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2006 Atmel Corporation + * + * Ethernet initialization for the AVR32 Network Gateway + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/arch/memory-map.h> + +extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); + +#ifdef CONFIG_CMD_NET +void mimc200_eth_initialize(bd_t *bi) +{ + macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]); + macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]); +} +#endif diff --git a/board/atmel/mimc200/Makefile b/board/atmel/mimc200/Makefile new file mode 100644 index 0000000..1b5c635 --- /dev/null +++ b/board/atmel/mimc200/Makefile @@ -0,0 +1,40 @@ +# +# Copyright (C) 2005-2006 Atmel Corporation +# +# See file CREDITS for list of people who contributed to this project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o eth.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/atmel/mimc200/mimc200.c b/board/atmel/mimc200/mimc200.c new file mode 100644 index 0000000..1b12639 --- /dev/null +++ b/board/atmel/mimc200/mimc200.c @@ -0,0 +1,147 @@ +/* + * Copyright (C) 2006 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/io.h> +#include <asm/sdram.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hmatrix.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct sdram_config sdram_config = { + .data_bits = SDRAM_DATA_16BIT, + .row_bits = 13, + .col_bits = 9, + .bank_bits = 2, + .cas = 3, + .twr = 2, + .trc = 6, + .trp = 2, + .trcd = 2, + .tras = 6, + .txsr = 6, + /* 15.6 us */ + .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, +}; + +int board_early_init_f(void) +{ + /* Enable SDRAM in the EBI mux */ + hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); + + gpio_enable_ebi(); + gpio_enable_usart1(); + + // enable higher address lines for larger flash devices + gpio_select_periph_A(GPIO_PIN_PE16, 0); /* ADDR23 */ + gpio_select_periph_A(GPIO_PIN_PE17, 0); /* ADDR24 */ + gpio_select_periph_A(GPIO_PIN_PE18, 0); /* ADDR25 */ + + // enable data flash chip select + gpio_select_periph_A(GPIO_PIN_PE25, 0); /* NCS2 */ + + // de-assert "force sys reset" pin + gpio_set_value(GPIO_PIN_PD15, 1); /* FORCE RESET */ + gpio_select_pio(GPIO_PIN_PD15, GPIOF_OUTPUT); + + // init custom i/o + // cpu type inputs + gpio_select_pio(GPIO_PIN_PE19, 0); + gpio_select_pio(GPIO_PIN_PE20, 0); + gpio_select_pio(GPIO_PIN_PE23, 0); + // main board type inputs + gpio_select_pio(GPIO_PIN_PB19, 0); + gpio_select_pio(GPIO_PIN_PB29, 0); + // DEBUG input (use weak pullup) + gpio_select_pio(GPIO_PIN_PE21, GPIOF_PULLUP); + + // reset phys + gpio_select_pio(GPIO_PIN_PE24, 0); + gpio_set_value(GPIO_PIN_PC18, 1); /* PHY RESET */ + gpio_select_pio(GPIO_PIN_PC18, GPIOF_OUTPUT); + + // GCLK0 - 10MHz clock + gpio_select_periph_A(GPIO_PIN_PA30, 0); + // GCLK1 - 25MHz clock + //gpio_select_periph_A(GPIO_PIN_PA31, 0); + + udelay(5000); + + // release phys reset + gpio_set_value(GPIO_PIN_PC18, 0); /* PHY RESET (Release) */ + +#if defined(CONFIG_MACB) + gpio_enable_macb0(); + gpio_enable_macb1(); +#endif +#if defined(CONFIG_MMC) + gpio_enable_mmci(); +#endif + + return 0; +} + +phys_size_t initdram(int board_type) +{ + unsigned long expected_size; + unsigned long actual_size; + void *sdram_base; + + sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE); + + expected_size = sdram_init(sdram_base, &sdram_config); + actual_size = get_ram_size(sdram_base, expected_size); + + unmap_physmem(sdram_base, EBI_SDRAM_SIZE); + + if (expected_size != actual_size) + printf("Warning: Only %lu of %lu MiB SDRAM is working\n", + actual_size >> 20, expected_size >> 20); + + return actual_size; +} + +void board_init_info(void) +{ + gd->bd->bi_phy_id[0] = 0x01; + gd->bd->bi_phy_id[1] = 0x03; +} + +/* SPI chip select control */ +#ifdef CONFIG_ATMEL_SPI +#include <spi.h> + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(struct spi_slave *slave) +{ +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ +} +#endif /* CONFIG_ATMEL_SPI */ diff --git a/board/atmel/mimc200/u-boot.lds b/board/atmel/mimc200/u-boot.lds new file mode 100644 index 0000000..e736adf --- /dev/null +++ b/board/atmel/mimc200/u-boot.lds @@ -0,0 +1,73 @@ +/* -*- Fundamental -*- + * + * Copyright (C) 2005-2006 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") +OUTPUT_ARCH(avr32) +ENTRY(_start) + +SECTIONS +{ + . = 0; + _text = .; + .text : { + *(.exception.text) + *(.text) + *(.text.*) + } + _etext = .; + + .rodata : { + *(.rodata) + *(.rodata.*) + } + + . = ALIGN(8); + _data = .; + .data : { + *(.data) + *(.data.*) + } + + . = ALIGN(4); + __u_boot_cmd_start = .; + .u_boot_cmd : { + KEEP(*(.u_boot_cmd)) + } + __u_boot_cmd_end = .; + + . = ALIGN(4); + _got = .; + .got : { + *(.got) + } + _egot = .; + + . = ALIGN(8); + _edata = .; + + .bss : { + *(.bss) + *(.bss.*) + } + . = ALIGN(8); + _end = .; +} diff --git a/cpu/at32ap/at32ap700x/clk.c b/cpu/at32ap/at32ap700x/clk.c index b3aa034..73b859e 100644 --- a/cpu/at32ap/at32ap700x/clk.c +++ b/cpu/at32ap/at32ap700x/clk.c @@ -65,4 +65,12 @@ void clk_init(void) /* Use PLL0 as main clock */ sm_writel(PM_MCCTRL, SM_BIT(PLLSEL)); #endif + +#ifdef CONFIG_MIMC200 + // enable gclk outputs + //AVR32_PM.gcctrl[0] = 0x0004; /* LVDS at 10MHz */ + sm_writel(PM_GCCTRL, 0x00000004); + //AVR32_PM.gcctrl[1] = 0x0216; /* Ethernet at 25MHz if PLL running */ + //sm_writel(PM_GCCTRL + 4, 0x00000216); +#endif } diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c index 56ba2f9..7c6679d 100644 --- a/cpu/at32ap/at32ap700x/gpio.c +++ b/cpu/at32ap/at32ap700x/gpio.c @@ -104,8 +104,10 @@ void gpio_enable_macb0(void) gpio_select_periph_A(GPIO_PIN_PC11, 0); /* RXD2 */ gpio_select_periph_A(GPIO_PIN_PC12, 0); /* RXD3 */ gpio_select_periph_A(GPIO_PIN_PC14, 0); /* RXCK */ +#ifndef CONFIG_MIMC200 gpio_select_periph_A(GPIO_PIN_PC18, 0); /* SPD */ #endif +#endif } void gpio_enable_macb1(void) @@ -129,8 +131,10 @@ void gpio_enable_macb1(void) gpio_select_periph_B(GPIO_PIN_PC29, 0); /* RXD2 */ gpio_select_periph_B(GPIO_PIN_PC30, 0); /* RXD3 */ gpio_select_periph_B(GPIO_PIN_PC24, 0); /* RXCK */ +#ifndef CONFIG_MIMC200 gpio_select_periph_B(GPIO_PIN_PD15, 0); /* SPD */ #endif +#endif } #endif diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c index 0ba8361..8985b68 100644 --- a/cpu/at32ap/cpu.c +++ b/cpu/at32ap/cpu.c @@ -56,6 +56,20 @@ int cpu_init(void) hsmc3_writel(PULSE0, 0x0b0a0906); hsmc3_writel(SETUP0, 0x00010002); +#ifdef CONFIG_MIMC200 + // setup Data Flash chip select (NCS2) + hsmc3_writel(MODE2, 0x20121003); + hsmc3_writel(CYCLE2, 0x000a0009); + hsmc3_writel(PULSE2, 0x0a060806); + hsmc3_writel(SETUP2, 0x00030102); + + // setup FRAM chip select (NCS3) + hsmc3_writel(MODE3, 0x10120001); + hsmc3_writel(CYCLE3, 0x001e001d); + hsmc3_writel(PULSE3, 0x08040704); + hsmc3_writel(SETUP3, 0x02050204); +#endif + clk_init(); /* Update the CPU speed according to the PLL configuration */ diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c index f35b997..9e131c0 100644 --- a/drivers/serial/atmel_usart.c +++ b/drivers/serial/atmel_usart.c @@ -21,6 +21,9 @@ #include <asm/io.h> #include <asm/arch/clk.h> #include <asm/arch/memory-map.h> +#if defined(CONFIG_MIMC200_DBGLINK) +#include <asm/arch/gpio.h> +#endif #if defined(CONFIG_USART0) # define USART_ID 0 @@ -73,27 +76,67 @@ int serial_init(void) void serial_putc(char c) { +#if defined(CONFIG_MIMC200_DBGLINK) + // only output serial data if DEBUG link connected + // this is connected to PIOE_21 + if (gpio_get_value(GPIO_PIN_PE21) == 0) + { +#endif + if (c == '\n') serial_putc('\r'); while (!(usart3_readl(CSR) & USART3_BIT(TXRDY))) ; usart3_writel(THR, c); + +#if defined(CONFIG_MIMC200_DBGLINK) + } +#endif } void serial_puts(const char *s) { +#if defined(CONFIG_MIMC200_DBGLINK) + // only output serial data if DEBUG link connected + // this is connected to PIOE_21 + if (gpio_get_value(GPIO_PIN_PE21) == 0) + { +#endif + while (*s) serial_putc(*s++); + +#if defined(CONFIG_MIMC200_DBGLINK) + } +#endif } int serial_getc(void) { +#if defined(CONFIG_MIMC200_DBGLINK) + // only get serial data if DEBUG link connected + // this is connected to PIOE_21 + if (gpio_get_value(GPIO_PIN_PE21) == 1) + { + return 0; + } +#endif + while (!(usart3_readl(CSR) & USART3_BIT(RXRDY))) ; return usart3_readl(RHR); } int serial_tstc(void) { +#if defined(CONFIG_MIMC200_DBGLINK) + // only get serial data if DEBUG link connected + // this is connected to PIOE_21 + if (gpio_get_value(GPIO_PIN_PE21) == 1) + { + return (1 == 0); + } +#endif + return (usart3_readl(CSR) & USART3_BIT(RXRDY)) != 0; } diff --git a/net/eth.c b/net/eth.c index 38979aa..409756d 100644 --- a/net/eth.c +++ b/net/eth.c @@ -75,6 +75,7 @@ extern int atngw100_eth_initialize(bd_t *); extern int mcffec_initialize(bd_t*); extern int mcdmafec_initialize(bd_t*); extern int at91sam9_eth_initialize(bd_t *); +extern int mimc200_eth_initialize(bd_t *); #ifdef CONFIG_API extern void (*push_packet)(volatile void *, int); @@ -290,6 +291,9 @@ int eth_initialize(bd_t *bis) defined(CONFIG_AT91SAM9263) at91sam9_eth_initialize(bis); #endif +#if defined(CONFIG_MIMC200) + mimc200_eth_initialize(bis); +#endif if (!eth_devices) { puts ("No ethernet found.\n"); diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h new file mode 100644 index 0000000..1afc741 --- /dev/null +++ b/include/configs/mimc200.h @@ -0,0 +1,179 @@ +/* + * Copyright (C) 2006 Atmel Corporation + * + * Configuration settings for the AVR32 Network Gateway + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/memory-map.h> + +#define CONFIG_AVR32 1 +#define CONFIG_AT32AP 1 +#define CONFIG_AT32AP7000 1 +#define CONFIG_MIMC200 1 + +#define CONFIG_MIMC200_EXT_FLASH 1 + +#define CFG_HZ 1000 + +/* + * Set up the PLL to run at 140 MHz, the CPU to run at the PLL + * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency + * and the PBA bus to run at 1/4 the PLL frequency. + */ +#define CONFIG_PLL 1 +#define CFG_POWER_MANAGER 1 +#define CFG_OSC0_HZ 10000000 +#define CFG_PLL0_DIV 1 +#define CFG_PLL0_MUL 15 +#define CFG_PLL0_SUPPRESS_CYCLES 16 +#define CFG_CLKDIV_CPU 0 +#define CFG_CLKDIV_HSB 1 +#define CFG_CLKDIV_PBA 2 +#define CFG_CLKDIV_PBB 1 + +/* + * The PLLOPT register controls the PLL like this: + * icp = PLLOPT<2> + * ivco = PLLOPT<1:0> + * + * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). + */ +#define CFG_PLL0_OPT 0x04 + +#define CONFIG_USART1 1 +#define CONFIG_MIMC200_DBGLINK 1 + +/* User serviceable stuff */ +#define CONFIG_DOS_PARTITION 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_STACKSIZE (2048) + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTARGS \ + "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND \ + "fsload; bootm" + +/* + * Only interrupt autoboot if <space> is pressed. Otherwise, garbage + * data on the serial line may interrupt the boot sequence. + */ +#define CONFIG_BOOTDELAY 0 +#define CONFIG_ZERO_BOOTDELAY_CHECK 1 +#define CONFIG_AUTOBOOT 1 +//#define CONFIG_AUTOBOOT_KEYED 1 +//#define CONFIG_AUTOBOOT_PROMPT \ +// "Press SPACE to abort autoboot in %d seconds\n" +//#define CONFIG_AUTOBOOT_DELAY_STR "d" +//#define CONFIG_AUTOBOOT_STOP_STR " " + +/* + * After booting the board for the first time, new ethernet addresses + * should be generated and assigned to the environment variables + * "ethaddr" and "eth1addr". This is normally done during production. + */ +#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 +#define CONFIG_NET_MULTI 1 + +/* + * BOOTP/DHCP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY + +#define CONFIG_DOS_PARTITION 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MMC +#define CONFIG_CMD_NET + +#define CONFIG_ATMEL_USART 1 +#define CONFIG_MACB 1 +#define CONFIG_PIO2 1 +#define CFG_NR_PIOS 5 +#define CFG_HSDRAMC 1 +#define CONFIG_MMC 1 +#define CONFIG_ATMEL_MCI 1 +#define CONFIG_ATMEL_SPI 1 + +#define CFG_DCACHE_LINESZ 32 +#define CFG_ICACHE_LINESZ 32 + +#define CONFIG_NR_DRAM_BANKS 1 + +#define CFG_FLASH_CFI 1 +#define CFG_FLASH_CFI_DRIVER 1 + +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x800000 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 135 + +#define CFG_MONITOR_BASE CFG_FLASH_BASE + +#define CFG_INTRAM_BASE INTERNAL_SRAM_BASE +#define CFG_INTRAM_SIZE INTERNAL_SRAM_SIZE +#define CFG_SDRAM_BASE EBI_SDRAM_BASE + +#define CFG_FRAM_BASE 0x08000000 +#define CFG_FRAM_SIZE 0x20000 + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 65536 +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE) + +#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE) + +#define CFG_MALLOC_LEN (256*1024) +#define CFG_DMA_ALLOC_LEN (16384) + +/* Allow 4MB for the kernel run-time image */ +#define CFG_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) +#define CFG_BOOTPARAMS_LEN (16 * 1024) + +/* Other configuration settings that shouldn't have to change all that often */ +#define CFG_PROMPT "U-Boot> " +#define CFG_CBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_LONGHELP 1 + +#define CFG_MEMTEST_START EBI_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x1f00000) + +#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } + +#endif /* __CONFIG_H */

1 0

[U-Boot-Users] "weak" reference seems not working on git://git.denx.de/u-boot-at91.git
by os user 28 Jul '08

28 Jul '08

Hi folks, I use Atmel AT91SAM9260-EK boards, arm-linux-gcc (GCC) 4.2.4. After I pulled the latest code from git://git.denx.de/u-boot-at91.git, I found that the "weak" function seems not working. In lib_arm/board.c, we can see, void inline __coloured_LED_init (void) {} void inline coloured_LED_init (void) __attribute__((weak, alias("__coloured_LED_init"))); And then I defined my own version in board/atmel/at91sam9260ek/led.c, void coloured_LED_init(void) { //.. do someting... } After 1)make at91sam9260ek_config and 2) make 3) download the u-boot.bin to dataflash 4) reseting the board, I found that my version of coloured_LED_init never gets called. Could anyone please explain the trick behind? BTW, If I comment out the declaration in lib_arm/board.c, my version of coloured_LED_init can get called. Thanks.

1 0

[U-Boot-Users] Intel makes a bid for AMD
by Miyuki 28 Jul '08

28 Jul '08

Candidates face off on key Iraq issues http://www.sapacontenedores.com/fresh.html -- Using Opera's revolutionary e-mail client: http://www.opera.com/mail/

1 0

[U-Boot-Users] [yes, i tried rtfming docs]u-boot on x86, how to?
by Geraldo Netto 27 Jul '08

27 Jul '08

Hi guys, how are you doing? guys, i'm trying to make u-boot for x86 i tried the steps at http://www.denx.de/wiki/DULG/Manual but i was not able to make it work on x86 does anyone have any tip/doc(s) on how to make u-boot work on x86? i'd really appreciate that help :P Kind Regards and Best Wishes, Geraldo São Paulo, Brasil, -3gmt site: http://exdev.sf.net/ msn: geraldo_boca_at_hotmail.com skype: geraldo-netto icq: 145-061-456

5 6

[U-Boot-Users] [PATCH] common: Move conditional compilation to Makefile
by Jean-Christophe PLAGNIOL-VILLARD 27 Jul '08

27 Jul '08

From: Jean-Christophe PLAGNIOL-VILLARD <jcplagniol(a)wyplay.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <jcplagniol(a)wyplay.com> --- common/ACEX1K.c | 4 ---- common/Makefile | 42 +++++++++++++++++++++++------------------- common/altera.c | 4 ---- common/bedbug.c | 4 ---- common/cmd_onenand.c | 4 ---- common/cyclon2.c | 4 ---- common/docecc.c | 4 ---- common/fpga.c | 4 ---- common/lcd.c | 4 ---- common/lynxkdi.c | 3 --- common/miiphybb.c | 5 ----- common/soft_i2c.c | 5 ----- common/soft_spi.c | 4 ---- common/spartan2.c | 4 ---- common/spartan3.c | 4 ---- common/stratixII.c | 4 ---- common/usb.c | 4 ---- common/usb_kbd.c | 5 ----- common/usb_storage.c | 7 ------- common/virtex2.c | 3 --- common/xilinx.c | 4 ---- 21 files changed, 23 insertions(+), 103 deletions(-) diff --git a/common/ACEX1K.c b/common/ACEX1K.c index 76dc166..53677b8 100644 --- a/common/ACEX1K.c +++ b/common/ACEX1K.c @@ -28,8 +28,6 @@ #include <common.h> /* core U-Boot definitions */ #include <ACEX1K.h> /* ACEX device family */ -#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_ACEX1K) - /* Define FPGA_DEBUG to get debug printf's */ #ifdef FPGA_DEBUG #define PRINTF(fmt,args...) printf (fmt ,##args) @@ -362,5 +360,3 @@ static int ACEX1K_ps_reloc (Altera_desc * desc, ulong reloc_offset) return ret_val; } - -#endif /* CONFIG_FPGA && CONFIG_FPGA_ALTERA && CONFIG_FPGA_ACEX1K */ diff --git a/common/Makefile b/common/Makefile index 4287108..454e844 100644 --- a/common/Makefile +++ b/common/Makefile @@ -28,9 +28,7 @@ LIB = $(obj)libcommon.a AOBJS = COBJS-y += main.o -COBJS-y += ACEX1K.o -COBJS-y += altera.o -COBJS-y += bedbug.o +COBJS-$(CONFIG_CMD_BEDBUG) += bedbug.o COBJS-y += circbuf.o COBJS-$(CONFIG_CMD_AMBAPP) += cmd_ambapp.o COBJS-y += cmd_autoscript.o @@ -64,7 +62,18 @@ COBJS-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o COBJS-$(CONFIG_CMD_FDOS) += cmd_fdos.o COBJS-$(CONFIG_CMD_FLASH) += cmd_flash.o ifdef CONFIG_FPGA +COBJS-y += fpga.o COBJS-$(CONFIG_CMD_FPGA) += cmd_fpga.o +COBJS-$(CONFIG_FPGA_SPARTAN2) += spartan2.o +COBJS-$(CONFIG_FPGA_SPARTAN3) += spartan3.o +COBJS-$(CONFIG_FPGA_VIRTEX2) += virtex2.o +COBJS-$(CONFIG_FPGA_XILINX) += xilinx.o +ifdef CONFIG_FPGA_ALTERA +COBJS-y += altera.o +COBJS-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o +COBJS-$(CONFIG_FPGA_CYCLON2) += cyclon2.o +COBJS-$(CONFIG_FPGA_STRATIX_II) += stratixII.o +endif endif COBJS-$(CONFIG_CMD_I2C) += cmd_i2c.o COBJS-$(CONFIG_CMD_IDE) += cmd_ide.o @@ -80,7 +89,7 @@ COBJS-$(CONFIG_CMD_MMC) += cmd_mmc.o COBJS-y += cmd_nand.o COBJS-$(CONFIG_CMD_NET) += cmd_net.o COBJS-y += cmd_nvedit.o -COBJS-y += cmd_onenand.o +COBJS-$(CONFIG_CMD_ONENAND) += cmd_onenand.o COBJS-$(CONFIG_CMD_OTP) += cmd_otp.o ifdef CONFIG_PCI COBJS-$(CONFIG_CMD_PCI) += cmd_pci.o @@ -101,11 +110,9 @@ COBJS-$(CONFIG_CMD_XIMG) += cmd_ximg.o COBJS-y += cmd_vfd.o COBJS-y += command.o COBJS-y += console.o -COBJS-y += cyclon2.o -COBJS-y += stratixII.o COBJS-y += devices.o COBJS-y += dlmalloc.o -COBJS-y += docecc.o +COBJS-$(CONFIG_CMD_DOC) += docecc.o COBJS-y += environment.o COBJS-y += env_common.o COBJS-y += env_nand.o @@ -118,26 +125,23 @@ COBJS-y += env_nvram.o COBJS-y += env_nowhere.o COBJS-y += exports.o COBJS-y += flash.o -COBJS-y += fpga.o COBJS-y += hush.o COBJS-y += kgdb.o -COBJS-y += lcd.o +COBJS-$(CONFIG_LCD) += lcd.o COBJS-y += lists.o -COBJS-y += lynxkdi.o +COBJS-$(CONFIG_LYNXKDI) += lynxkdi.o COBJS-y += memsize.o -COBJS-y += miiphybb.o +COBJS-$(CONFIG_BITBANGMII) += miiphybb.o COBJS-y += miiphyutil.o COBJS-y += s_record.o COBJS-y += serial.o -COBJS-y += soft_i2c.o -COBJS-y += soft_spi.o -COBJS-y += spartan2.o -COBJS-y += spartan3.o +COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o +COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o +ifdef CONFIG_CMD_USB COBJS-y += usb.o -COBJS-y += usb_kbd.o -COBJS-y += usb_storage.o -COBJS-y += virtex2.o -COBJS-y += xilinx.o +COBJS-$(CONFIG_USB_STORAGE) += usb_storage.o +endif +COBJS-$(CONFIG_USB_KEYBOARD) += usb_kbd.o COBJS-y += crc16.o COBJS-y += xyzModem.o COBJS-y += cmd_mac.o diff --git a/common/altera.c b/common/altera.c index a2b5967..09dc0b2 100644 --- a/common/altera.c +++ b/common/altera.c @@ -41,8 +41,6 @@ #define PRINTF(fmt,args...) #endif -#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) - /* Local Static Functions */ static int altera_validate (Altera_desc * desc, const char *fn); @@ -283,5 +281,3 @@ static int altera_validate (Altera_desc * desc, const char *fn) } /* ------------------------------------------------------------------------- */ - -#endif /* CONFIG_FPGA & CONFIG_FPGA_ALTERA */ diff --git a/common/bedbug.c b/common/bedbug.c index 3bf1fc3..60109cf 100644 --- a/common/bedbug.c +++ b/common/bedbug.c @@ -2,8 +2,6 @@ #include <common.h> -#if defined(CONFIG_CMD_BEDBUG) - #include <linux/ctype.h> #include <bedbug/bedbug.h> #include <bedbug/ppc.h> @@ -1252,5 +1250,3 @@ int find_next_address (unsigned char *nextaddr, int step_over, * warranties of merchantability and fitness for a particular * purpose. */ - -#endif diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c index ce99a38..1db2277 100644 --- a/common/cmd_onenand.c +++ b/common/cmd_onenand.c @@ -12,8 +12,6 @@ #include <common.h> #include <command.h> -#ifdef CONFIG_CMD_ONENAND - #include <linux/mtd/compat.h> #include <linux/mtd/mtd.h> #include <linux/mtd/onenand.h> @@ -165,5 +163,3 @@ U_BOOT_CMD( "onenand block[.oob] addr block [page] [len] - " "read data with (block [, page]) to addr" ); - -#endif /* CONFIG_CMD_ONENAND */ diff --git a/common/cyclon2.c b/common/cyclon2.c index 06f5e8a..479bebb 100644 --- a/common/cyclon2.c +++ b/common/cyclon2.c @@ -27,8 +27,6 @@ #include <altera.h> #include <ACEX1K.h> /* ACEX device family */ -#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_CYCLON2) - /* Define FPGA_DEBUG to get debug printf's */ #ifdef FPGA_DEBUG #define PRINTF(fmt,args...) printf (fmt ,##args) @@ -301,5 +299,3 @@ static int CYC2_ps_reloc (Altera_desc * desc, ulong reloc_offset) return ret_val; } - -#endif /* CONFIG_FPGA && CONFIG_FPGA_ALTERA && CONFIG_FPGA_CYCLON2 */ diff --git a/common/docecc.c b/common/docecc.c index 5daa6fc..3412aff 100644 --- a/common/docecc.c +++ b/common/docecc.c @@ -31,8 +31,6 @@ #undef ECC_DEBUG #undef PSYCHO_DEBUG -#if defined(CONFIG_CMD_DOC) - #include <linux/mtd/doc2000.h> /* need to undef it (from asm/termbits.h) */ @@ -513,5 +511,3 @@ int doc_decode_ecc(unsigned char sector[SECTOR_SIZE], unsigned char ecc1[6]) free(Index_of); return nb_errors; } - -#endif diff --git a/common/fpga.c b/common/fpga.c index d16a92d..67a6c30 100644 --- a/common/fpga.c +++ b/common/fpga.c @@ -29,8 +29,6 @@ #include <xilinx.h> /* xilinx specific definitions */ #include <altera.h> /* altera specific definitions */ -#if defined(CONFIG_FPGA) - #if 0 #define FPGA_DEBUG /* define FPGA_DEBUG to get debug messages */ #endif @@ -335,5 +333,3 @@ int fpga_info( int devnum ) } /* ------------------------------------------------------------------------- */ - -#endif /* CONFIG_FPGA */ diff --git a/common/lcd.c b/common/lcd.c index eec1f53..9705e31 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -55,8 +55,6 @@ #include <nand.h> #endif -#ifdef CONFIG_LCD - /************************************************************************/ /* ** FONT DATA */ /************************************************************************/ @@ -850,5 +848,3 @@ static void *lcd_logo (void) /************************************************************************/ /************************************************************************/ - -#endif /* CONFIG_LCD */ diff --git a/common/lynxkdi.c b/common/lynxkdi.c index a5dc887..5f12b0d 100644 --- a/common/lynxkdi.c +++ b/common/lynxkdi.c @@ -17,7 +17,6 @@ #include <asm/processor.h> #include <image.h> -#if defined(CONFIG_LYNXKDI) #include <lynxkdi.h> DECLARE_GLOBAL_DATA_PTR; @@ -66,5 +65,3 @@ void lynxkdi_boot (image_header_t *hdr) #else #error "Lynx KDI support not implemented for configured CPU" #endif - -#endif /* CONFIG_LYNXKDI */ diff --git a/common/miiphybb.c b/common/miiphybb.c index 537c15d..6446012 100644 --- a/common/miiphybb.c +++ b/common/miiphybb.c @@ -30,9 +30,6 @@ #include <ioports.h> #include <ppc_asm.tmpl> -#ifdef CONFIG_BITBANGMII - - /***************************************************************************** * * Utility to send the preamble, address, and register (common to read @@ -236,5 +233,3 @@ int bb_miiphy_write (char *devname, unsigned char addr, return 0; } - -#endif /* CONFIG_BITBANGMII */ diff --git a/common/soft_i2c.c b/common/soft_i2c.c index 5ef7f30..23db2ee 100644 --- a/common/soft_i2c.c +++ b/common/soft_i2c.c @@ -41,8 +41,6 @@ #endif #include <i2c.h> -#if defined(CONFIG_SOFT_I2C) - /* #define DEBUG_I2C */ #ifdef DEBUG_I2C @@ -423,6 +421,3 @@ void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) { i2c_write(i2c_addr, reg, 1, &val, 1); } - - -#endif /* CONFIG_SOFT_I2C */ diff --git a/common/soft_spi.c b/common/soft_spi.c index c131650..25b589a 100644 --- a/common/soft_spi.c +++ b/common/soft_spi.c @@ -27,8 +27,6 @@ #include <common.h> #include <spi.h> -#if defined(CONFIG_SOFT_SPI) - #include <malloc.h> /*----------------------------------------------------------------------- @@ -193,5 +191,3 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, return(0); } - -#endif /* CONFIG_SOFT_SPI */ diff --git a/common/spartan2.c b/common/spartan2.c index 2f1ea2c..ebac388 100644 --- a/common/spartan2.c +++ b/common/spartan2.c @@ -25,8 +25,6 @@ #include <common.h> /* core U-Boot definitions */ #include <spartan2.h> /* Spartan-II device family */ -#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_SPARTAN2) - /* Define FPGA_DEBUG to get debug printf's */ #ifdef FPGA_DEBUG #define PRINTF(fmt,args...) printf (fmt ,##args) @@ -663,5 +661,3 @@ static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset) return ret_val; } - -#endif diff --git a/common/spartan3.c b/common/spartan3.c index d329e70..8f1ab80 100644 --- a/common/spartan3.c +++ b/common/spartan3.c @@ -30,8 +30,6 @@ #include <common.h> /* core U-Boot definitions */ #include <spartan3.h> /* Spartan-II device family */ -#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_SPARTAN3) - /* Define FPGA_DEBUG to get debug printf's */ #ifdef FPGA_DEBUG #define PRINTF(fmt,args...) printf (fmt ,##args) @@ -668,5 +666,3 @@ static int Spartan3_ss_reloc (Xilinx_desc * desc, ulong reloc_offset) return ret_val; } - -#endif diff --git a/common/stratixII.c b/common/stratixII.c index 85c461c..7556dbf 100644 --- a/common/stratixII.c +++ b/common/stratixII.c @@ -25,8 +25,6 @@ #include <common.h> /* core U-Boot definitions */ #include <altera.h> -#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_STRATIX_II) - int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize, int isSerial, int isSecure); int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize); @@ -231,5 +229,3 @@ int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize, return FPGA_SUCCESS; } - -#endif /* defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_STRATIX_II) */ diff --git a/common/usb.c b/common/usb.c index a45d113..9502f39 100644 --- a/common/usb.c +++ b/common/usb.c @@ -50,8 +50,6 @@ #include <linux/ctype.h> #include <asm/byteorder.h> -#if defined(CONFIG_CMD_USB) - #include <usb.h> #ifdef CONFIG_4xx #include <asm/4xx_pci.h> @@ -1247,6 +1245,4 @@ int usb_hub_probe(struct usb_device *dev, int ifnum) return ret; } -#endif - /* EOF */ diff --git a/common/usb_kbd.c b/common/usb_kbd.c index c876495..04d9730 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c @@ -28,8 +28,6 @@ #include <devices.h> #include <asm/byteorder.h> -#ifdef CONFIG_USB_KEYBOARD - #include <usb.h> #undef USB_KBD_DEBUG @@ -746,7 +744,4 @@ static int usb_kbd_get_hid_desc(struct usb_device *dev) } - #endif - -#endif /* CONFIG_USB_KEYBOARD */ diff --git a/common/usb_storage.c b/common/usb_storage.c index d8fbb69..94f659f 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c @@ -55,13 +55,9 @@ #include <asm/byteorder.h> #include <asm/processor.h> - -#if defined(CONFIG_CMD_USB) #include <part.h> #include <usb.h> -#ifdef CONFIG_USB_STORAGE - #undef USB_STOR_DEBUG #undef BBB_COMDAT_TRACE #undef BBB_XPORT_TRACE @@ -1242,6 +1238,3 @@ int usb_stor_get_info(struct usb_device *dev,struct us_data *ss,block_dev_desc_t USB_STOR_PRINTF("partype: %d\n",dev_desc->part_type); return 1; } - -#endif /* CONFIG_USB_STORAGE */ -#endif diff --git a/common/virtex2.c b/common/virtex2.c index 665a503..52da1b2 100644 --- a/common/virtex2.c +++ b/common/virtex2.c @@ -31,8 +31,6 @@ #include <common.h> #include <virtex2.h> -#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_VIRTEX2) - #if 0 #define FPGA_DEBUG #endif @@ -552,6 +550,5 @@ static int Virtex2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset) } return ret_val; } -#endif /* vim: set ts=4 tw=78: */ diff --git a/common/xilinx.c b/common/xilinx.c index c898238..7b5e8c5 100644 --- a/common/xilinx.c +++ b/common/xilinx.c @@ -32,8 +32,6 @@ #include <spartan2.h> #include <spartan3.h> -#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX) - #if 0 #define FPGA_DEBUG #endif @@ -307,5 +305,3 @@ static int xilinx_validate (Xilinx_desc * desc, char *fn) return ret_val; } - -#endif /* CONFIG_FPGA && CONFIG_FPGA_XILINX */ -- 1.5.6

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