June 2008 - U-Boot

[U-Boot-Users] (no subject)
by 钟文辉 07 Jun '08

07 Jun '08

各位老总：您们好！诚祝：您们在2008年里；有鼠不尽的快乐！鼠不尽的收获！鼠不尽的钞票！　鼠不尽的幸福！鼠不尽的美满生活！愿：您们阖家欢乐！幸福安康！我公司可以长期提供：出口报关单，核销单，等等一系列手续；代理：出口报关，商检，境内外运输......等等；还可以代办：出口欧盟许可证，欧盟产地证；并且还有（广州国际贸易交易会）的摊位可以转让；价格特别优惠；有意者请来邮件或来电联系。谢谢合作！　电话：0755-81153047。　传真：0755-81172940。　手机：15817477278。　联系人：钟文辉。　电子邮箱:shanhu.dao@163.com 此致：敬礼！

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[U-Boot-Users] [PATCH] libfdt: Several cleanups to parameter checking
by Jerry Van Baren 07 Jun '08

07 Jun '08

This patch makes a couple of small cleanups to parameter checking of libfdt functions. - In several functions which take a node offset, we use an idiom involving fdt_next_tag() first to check that we have indeed been given a node offset. This patch adds a helper function _fdt_check_node_offset() to encapsulate this usage of fdt_next_tag(). - In fdt_rw.c in several places we have the expanded version of the RW_CHECK_HEADER() macro for no particular reason. This patch replaces those instances with an invocation of the macro; that's what it's for. - In fdt_sw.c we rename the check_header_sw() function to sw_check_header() to match the analgous function in fdt_rw.c, and we provide an SW_CHECK_HEADER() wrapper macro as RW_CHECK_HEADER() functions in fdt_rw.c Signed-off-by: David Gibson <david(a)gibson.dropbear.id.au> --- These are improvements pulled in from the DTC/libfdt project. The original patch was published: Date: Tue, 20 May 2008 17:19:11 +1000 Best regards, gvb libfdt/fdt.c | 17 ++++++++++++----- libfdt/fdt_ro.c | 26 ++++++++------------------ libfdt/fdt_rw.c | 24 ++++++++---------------- libfdt/fdt_sw.c | 31 +++++++++++++++---------------- libfdt/libfdt_internal.h | 1 + 5 files changed, 44 insertions(+), 55 deletions(-) diff --git a/libfdt/fdt.c b/libfdt/fdt.c index bd91712..0d16427 100644 --- a/libfdt/fdt.c +++ b/libfdt/fdt.c @@ -129,16 +129,23 @@ uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset) return tag; } +int _fdt_check_node_offset(const void *fdt, int offset) +{ + if ((offset < 0) || (offset % FDT_TAGSIZE) + || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE)) + return -FDT_ERR_BADOFFSET; + + return offset; +} + int fdt_next_node(const void *fdt, int offset, int *depth) { int nextoffset = 0; uint32_t tag; - if (offset >= 0) { - tag = fdt_next_tag(fdt, offset, &nextoffset); - if (tag != FDT_BEGIN_NODE) - return -FDT_ERR_BADOFFSET; - } + if (offset >= 0) + if ((nextoffset = _fdt_check_node_offset(fdt, offset)) < 0) + return nextoffset; do { offset = nextoffset; diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c index 63fa129..e55872f 100644 --- a/libfdt/fdt_ro.c +++ b/libfdt/fdt_ro.c @@ -157,16 +157,12 @@ int fdt_path_offset(const void *fdt, const char *path) const char *fdt_get_name(const void *fdt, int nodeoffset, int *len) { - const struct fdt_node_header *nh; + const struct fdt_node_header *nh = _fdt_offset_ptr(fdt, nodeoffset); int err; - if ((err = fdt_check_header(fdt)) != 0) - goto fail; - - err = -FDT_ERR_BADOFFSET; - nh = fdt_offset_ptr(fdt, nodeoffset, sizeof(*nh)); - if (!nh || (fdt32_to_cpu(nh->tag) != FDT_BEGIN_NODE)) - goto fail; + if (((err = fdt_check_header(fdt)) != 0) + || ((err = _fdt_check_node_offset(fdt, nodeoffset)) < 0)) + goto fail; if (len) *len = strlen(nh->name); @@ -189,17 +185,11 @@ const struct fdt_property *fdt_get_property(const void *fdt, int offset, nextoffset; int err; - if ((err = fdt_check_header(fdt)) != 0) - goto fail; - - err = -FDT_ERR_BADOFFSET; - if (nodeoffset % FDT_TAGSIZE) - goto fail; - - tag = fdt_next_tag(fdt, nodeoffset, &nextoffset); - if (tag != FDT_BEGIN_NODE) - goto fail; + if (((err = fdt_check_header(fdt)) != 0) + || ((err = _fdt_check_node_offset(fdt, nodeoffset)) < 0)) + goto fail; + nextoffset = err; do { offset = nextoffset; diff --git a/libfdt/fdt_rw.c b/libfdt/fdt_rw.c index 0df472b..ec0738c 100644 --- a/libfdt/fdt_rw.c +++ b/libfdt/fdt_rw.c @@ -172,8 +172,7 @@ int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size) struct fdt_reserve_entry *re; int err; - if ((err = rw_check_header(fdt))) - return err; + RW_CHECK_HEADER(fdt); re = _fdt_mem_rsv_w(fdt, fdt_num_mem_rsv(fdt)); err = _blob_splice_mem_rsv(fdt, re, 0, 1); @@ -190,8 +189,8 @@ int fdt_del_mem_rsv(void *fdt, int n) struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n); int err; - if ((err = rw_check_header(fdt))) - return err; + RW_CHECK_HEADER(fdt); + if (n >= fdt_num_mem_rsv(fdt)) return -FDT_ERR_NOTFOUND; @@ -223,15 +222,13 @@ static int _resize_property(void *fdt, int nodeoffset, const char *name, int len static int _add_property(void *fdt, int nodeoffset, const char *name, int len, struct fdt_property **prop) { - uint32_t tag; int proplen; int nextoffset; int namestroff; int err; - tag = fdt_next_tag(fdt, nodeoffset, &nextoffset); - if (tag != FDT_BEGIN_NODE) - return -FDT_ERR_BADOFFSET; + if ((nextoffset = _fdt_check_node_offset(fdt, nodeoffset)) < 0) + return nextoffset; namestroff = _find_add_string(fdt, name); if (namestroff < 0) @@ -256,8 +253,7 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name) int oldlen, newlen; int err; - if ((err = rw_check_header(fdt))) - return err; + RW_CHECK_HEADER(fdt); namep = (char *)fdt_get_name(fdt, nodeoffset, &oldlen); if (!namep) @@ -280,8 +276,7 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name, struct fdt_property *prop; int err; - if ((err = rw_check_header(fdt))) - return err; + RW_CHECK_HEADER(fdt); err = _resize_property(fdt, nodeoffset, name, len, &prop); if (err == -FDT_ERR_NOTFOUND) @@ -452,11 +447,8 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize) int fdt_pack(void *fdt) { int mem_rsv_size; - int err; - err = rw_check_header(fdt); - if (err) - return err; + RW_CHECK_HEADER(fdt); mem_rsv_size = (fdt_num_mem_rsv(fdt)+1) * sizeof(struct fdt_reserve_entry); diff --git a/libfdt/fdt_sw.c b/libfdt/fdt_sw.c index dda2de3..df09876 100644 --- a/libfdt/fdt_sw.c +++ b/libfdt/fdt_sw.c @@ -55,13 +55,21 @@ #include "libfdt_internal.h" -static int check_header_sw(void *fdt) +static int sw_check_header(void *fdt) { if (fdt_magic(fdt) != SW_MAGIC) return -FDT_ERR_BADMAGIC; + /* FIXME: should check more details about the header state */ return 0; } +#define SW_CHECK_HEADER(fdt) \ + { \ + int err; \ + if ((err = sw_check_header(fdt)) != 0) \ + return err; \ + } + static void *grab_space(void *fdt, int len) { int offset = fdt_size_dt_struct(fdt); @@ -102,11 +110,10 @@ int fdt_create(void *buf, int bufsize) int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size) { struct fdt_reserve_entry *re; - int err = check_header_sw(fdt); int offset; - if (err) - return err; + SW_CHECK_HEADER(fdt); + if (fdt_size_dt_struct(fdt)) return -FDT_ERR_BADSTATE; @@ -131,11 +138,9 @@ int fdt_finish_reservemap(void *fdt) int fdt_begin_node(void *fdt, const char *name) { struct fdt_node_header *nh; - int err = check_header_sw(fdt); int namelen = strlen(name) + 1; - if (err) - return err; + SW_CHECK_HEADER(fdt); nh = grab_space(fdt, sizeof(*nh) + ALIGN(namelen, FDT_TAGSIZE)); if (! nh) @@ -149,10 +154,8 @@ int fdt_begin_node(void *fdt, const char *name) int fdt_end_node(void *fdt) { uint32_t *en; - int err = check_header_sw(fdt); - if (err) - return err; + SW_CHECK_HEADER(fdt); en = grab_space(fdt, FDT_TAGSIZE); if (! en) @@ -188,11 +191,9 @@ static int find_add_string(void *fdt, const char *s) int fdt_property(void *fdt, const char *name, const void *val, int len) { struct fdt_property *prop; - int err = check_header_sw(fdt); int nameoff; - if (err) - return err; + SW_CHECK_HEADER(fdt); nameoff = find_add_string(fdt, name); if (nameoff == 0) @@ -211,15 +212,13 @@ int fdt_property(void *fdt, const char *name, const void *val, int len) int fdt_finish(void *fdt) { - int err = check_header_sw(fdt); char *p = (char *)fdt; uint32_t *end; int oldstroffset, newstroffset; uint32_t tag; int offset, nextoffset; - if (err) - return err; + SW_CHECK_HEADER(fdt); /* Add terminator */ end = grab_space(fdt, sizeof(*end)); diff --git a/libfdt/libfdt_internal.h b/libfdt/libfdt_internal.h index 52e1b8d..f72e70d 100644 --- a/libfdt/libfdt_internal.h +++ b/libfdt/libfdt_internal.h @@ -66,6 +66,7 @@ } uint32_t _fdt_next_tag(const void *fdt, int startoffset, int *nextoffset); +int _fdt_check_node_offset(const void *fdt, int offset); const char *_fdt_find_string(const char *strtab, int tabsize, const char *s); int _fdt_node_end_offset(void *fdt, int nodeoffset); -- 1.5.5.1

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[U-Boot-Users] 一口饭
by 陈辉 07 Jun '08

07 Jun '08

--------------感谢您在百忙之中查阅我公司信息。(谢谢!) 首先祝您：身体健康、心想事成、生意兴隆。我公司现有部份多余发/票，以优惠点数向外代开服务！欢迎您来电咨询与合作！至于双方合作绝对保密！李先生：13824404409 也可通过QQ咨询：527496042

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[U-Boot-Users] [PATCH] sh: Renesas Solutions SH7763RDP board support
by Nobuhiro Iwamatsu 07 Jun '08

07 Jun '08

SH7763RDP has SCIF, NOR Flash, Ethernet, USB host, LCDC and MMC. In this patch, support SCIF, NOR Flash, and Ethernet. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com> --- MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 5 + board/sh7763rdp/Makefile | 47 +++++ board/sh7763rdp/config.mk | 11 ++ board/sh7763rdp/lowlevel_init.S | 351 +++++++++++++++++++++++++++++++++++++++ board/sh7763rdp/sh7763rdp.c | 76 +++++++++ board/sh7763rdp/u-boot.lds | 106 ++++++++++++ include/configs/sh7763rdp.h | 129 ++++++++++++++ 9 files changed, 727 insertions(+), 0 deletions(-) create mode 100644 board/sh7763rdp/Makefile create mode 100644 board/sh7763rdp/config.mk create mode 100644 board/sh7763rdp/lowlevel_init.S create mode 100644 board/sh7763rdp/sh7763rdp.c create mode 100644 board/sh7763rdp/u-boot.lds create mode 100644 include/configs/sh7763rdp.h diff --git a/MAINTAINERS b/MAINTAINERS index d3dfd48..b3daaeb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -718,6 +718,7 @@ Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> MS7722SE SH7722 R7780MP SH7780 R2DPlus SH7751R + SH7763RDP SH7763 Mark Jonas <mark.jonas(a)de.bosch.com> diff --git a/MAKEALL b/MAKEALL index 3cb1d24..45ef33e 100755 --- a/MAKEALL +++ b/MAKEALL @@ -749,6 +749,7 @@ LIST_sh4=" \ Migo-R \ r7780mp \ r2dplus \ + sh7763rdp \ " LIST_sh=" \ diff --git a/Makefile b/Makefile index cc988e1..cb63223 100644 --- a/Makefile +++ b/Makefile @@ -2941,6 +2941,11 @@ r2dplus_config : unconfig @echo "#define CONFIG_R2DPLUS 1" >> include/config.h @./mkconfig -a $(@:_config=) sh sh4 r2dplus +sh7763rdp_config : unconfig + @ >include/config.h + @echo "#define CONFIG_SH7763RDP 1" >> include/config.h + @./mkconfig -a $(@:_config=) sh sh4 sh7763rdp + #======================================================================== # SPARC #======================================================================== diff --git a/board/sh7763rdp/Makefile b/board/sh7763rdp/Makefile new file mode 100644 index 0000000..9e63ea7 --- /dev/null +++ b/board/sh7763rdp/Makefile @@ -0,0 +1,47 @@ +# +# Copyright (C) 2008 Renesas Solutions Corp. +# Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com> +# Copyright (C) 2007 Kenati Technologies, Inc. +# +# board/sh7763rdp/Makefile +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := sh7763rdp.o +SOBJS := lowlevel_init.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/sh7763rdp/config.mk b/board/sh7763rdp/config.mk new file mode 100644 index 0000000..c52dbfd --- /dev/null +++ b/board/sh7763rdp/config.mk @@ -0,0 +1,11 @@ +# +# board/sh7763rdp/config.mk +# +# TEXT_BASE refers to image _after_ relocation. +# +# NOTE: Must match value used in u-boot.lds (in this directory). +# + +TEXT_BASE = 0x8FFC0000 + +# PLATFORM_CPPFLAGS += -DCONFIG_MULTIBOOT diff --git a/board/sh7763rdp/lowlevel_init.S b/board/sh7763rdp/lowlevel_init.S new file mode 100644 index 0000000..1942892 --- /dev/null +++ b/board/sh7763rdp/lowlevel_init.S @@ -0,0 +1,351 @@ +/* + * Copyright (C) 2008 Renesas Solutions Corp. + * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com> + * Copyright (C) 2007 Kenati Technologies, Inc. + * + * board/sh7763rdp/lowlevel_init.S + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <version.h> + +#include <asm/processor.h> + + .global lowlevel_init + + .text + .align 2 + +lowlevel_init: + + mov.l WDTCSR_A, r1 /* Watchdog Control / Status Register */ + mov.l WDTCSR_D, r0 + mov.l r0, @r1 + + mov.l WDTST_A, r1 /* Watchdog Stop Time Register */ + mov.l WDTST_D, r0 + mov.l r0, @r1 + + mov.l WDTBST_A, r1 /* 0xFFCC0008 (Watchdog Base Stop Time Register */ + mov.l WDTBST_D, r0 + mov.l r0, @r1 + + mov.l CCR_A, r1 /* Address of Cache Control Register */ + mov.l CCR_CACHE_ICI_D, r0 /* Instruction Cache Invalidate */ + mov.l r0, @r1 + + mov.l MMUCR_A, r1 /* Address of MMU Control Register */ + mov.l MMU_CONTROL_TI_D, r0 /* TI == TLB Invalidate bit */ + mov.l r0, @r1 + + mov.l MSTPCR0_A, r1 /* Address of Power Control Register 0 */ + mov.l MSTPCR0_D, r0 + mov.l r0, @r1 + + mov.l MSTPCR1_A, r1 /*i Address of Power Control Register 1 */ + mov.l MSTPCR1_D, r0 + mov.l r0, @r1 + + mov.l RAMCR_A,r1 + mov.l RAMCR_D,r0 + mov.l r0, @r1 + + mov.l MMSELR_A,r1 + mov.l MMSELR_D,r0 + synco + mov.l r0, @r1 + + mov.l @r1,r2 /* execute two reads after setting MMSELR*/ + mov.l @r1,r2 + synco + + /* issue memory read */ + mov.l DDRSD_START_A,r1 /* memory address to read*/ + mov.l @r1,r0 + synco + + mov.l MIM8_A,r1 + mov.l MIM8_D,r0 + mov.l r0,@r1 + + mov.l MIMC_A,r1 + mov.l MIMC_D1,r0 + mov.l r0,@r1 + + mov.l STRC_A,r1 + mov.l STRC_D,r0 + mov.l r0,@r1 + + mov.l SDR4_A,r1 + mov.l SDR4_D,r0 + mov.l r0,@r1 + + mov.l MIMC_A,r1 + mov.l MIMC_D2,r0 + mov.l r0,@r1 + + nop + nop + nop + + mov.l SCR4_A,r1 + mov.l SCR4_D3,r0 + mov.l r0,@r1 + + mov.l SCR4_A,r1 + mov.l SCR4_D2,r0 + mov.l r0,@r1 + + mov.l SDMR02000_A,r1 + mov.l SDMR02000_D,r0 + mov.l r0,@r1 + + mov.l SDMR00B08_A,r1 + mov.l SDMR00B08_D,r0 + mov.l r0,@r1 + + mov.l SCR4_A,r1 + mov.l SCR4_D2,r0 + mov.l r0,@r1 + + mov.l SCR4_A,r1 + mov.l SCR4_D4,r0 + mov.l r0,@r1 + + nop + nop + nop + nop + + mov.l SCR4_A,r1 + mov.l SCR4_D4,r0 + mov.l r0,@r1 + + nop + nop + nop + nop + + mov.l SDMR00308_A,r1 + mov.l SDMR00308_D,r0 + mov.l r0,@r1 + + mov.l MIMC_A,r1 + mov.l MIMC_D3,r0 + mov.l r0,@r1 + + mov.l SCR4_A,r1 + mov.l SCR4_D1,r0 + mov.l DELAY60_D,r3 + +delay_loop_60: + mov.l r0,@r1 + dt r3 + bf delay_loop_60 + nop + + mov.l CCR_A, r1 /* Address of Cache Control Register */ + mov.l CCR_CACHE_D_2, r0 + mov.l r0, @r1 + +bsc_init: + mov.l BCR_A, r1 + mov.l BCR_D, r0 + mov.l r0, @r1 + + mov.l CS0BCR_A, r1 + mov.l CS0BCR_D, r0 + mov.l r0, @r1 + + mov.l CS1BCR_A,r1 + mov.l CS1BCR_D,r0 + mov.l r0,@r1 + + mov.l CS2BCR_A, r1 + mov.l CS2BCR_D, r0 + mov.l r0, @r1 + + mov.l CS4BCR_A, r1 + mov.l CS4BCR_D, r0 + mov.l r0, @r1 + + mov.l CS5BCR_A, r1 + mov.l CS5BCR_D, r0 + mov.l r0, @r1 + + mov.l CS6BCR_A, r1 + mov.l CS6BCR_D, r0 + mov.l r0, @r1 + + mov.l CS0WCR_A, r1 + mov.l CS0WCR_D, r0 + mov.l r0, @r1 + + mov.l CS1WCR_A, r1 + mov.l CS1WCR_D, r0 + mov.l r0, @r1 + + mov.l CS2WCR_A, r1 + mov.l CS2WCR_D, r0 + mov.l r0, @r1 + + mov.l CS4WCR_A, r1 + mov.l CS4WCR_D, r0 + mov.l r0, @r1 + + mov.l CS5WCR_A, r1 + mov.l CS5WCR_D, r0 + mov.l r0, @r1 + + mov.l CS6WCR_A, r1 + mov.l CS6WCR_D, r0 + mov.l r0, @r1 + + mov.l CS5PCR_A, r1 + mov.l CS5PCR_D, r0 + mov.l r0, @r1 + + mov.l CS6PCR_A, r1 + mov.l CS6PCR_D, r0 + mov.l r0, @r1 + + mov.l DELAY200_D,r3 + +delay_loop_200: + dt r3 + bf delay_loop_200 + nop + + mov.l PSEL0_A,r1 + mov.l PSEL0_D,r0 + mov.w r0,@r1 + + mov.l PSEL1_A,r1 + mov.l PSEL1_D,r0 + mov.w r0,@r1 + + mov.l ICR0_A,r1 + mov.l ICR0_D,r0 + mov.l r0,@r1 + + stc sr, r0 /* BL bit off(init=ON) */ + mov.l SR_MASK_D, r1 + and r1, r0 + ldc r0, sr + + rts + nop + + .align 2 + +DELAY60_D: .long 60 +DELAY200_D: .long 17800 + +CCR_A: .long 0xFF00001C +MMUCR_A: .long 0xFF000010 +RAMCR_A: .long 0xFF000074 + +/* Low power mode control */ +MSTPCR0_A: .long 0xFFC80030 +MSTPCR1_A: .long 0xFFC80038 + +/* RWBT */ +WDTST_A: .long 0xFFCC0000 +WDTCSR_A: .long 0xFFCC0004 +WDTBST_A: .long 0xFFCC0008 + +/* BSC */ +MMSELR_A: .long 0xFE600020 +BCR_A: .long 0xFF801000 +CS0BCR_A: .long 0xFF802000 +CS1BCR_A: .long 0xFF802010 +CS2BCR_A: .long 0xFF802020 +CS4BCR_A: .long 0xFF802040 +CS5BCR_A: .long 0xFF802050 +CS6BCR_A: .long 0xFF802060 +CS0WCR_A: .long 0xFF802008 +CS1WCR_A: .long 0xFF802018 +CS2WCR_A: .long 0xFF802028 +CS4WCR_A: .long 0xFF802048 +CS5WCR_A: .long 0xFF802058 +CS6WCR_A: .long 0xFF802068 +CS5PCR_A: .long 0xFF802070 +CS6PCR_A: .long 0xFF802080 +DDRSD_START_A: .long 0xAC000000 + +/* INTC */ +ICR0_A: .long 0xFFD00000 + +/* DDR I/F */ +MIM8_A: .long 0xFE800008 +MIMC_A: .long 0xFE80000C +SCR4_A: .long 0xFE800014 +STRC_A: .long 0xFE80001C +SDR4_A: .long 0xFE800034 +SDMR00308_A: .long 0xFE900308 +SDMR00B08_A: .long 0xFE900B08 +SDMR02000_A: .long 0xFE902000 + +/* GPIO */ +PSEL0_A: .long 0xFFEF0070 +PSEL1_A: .long 0xFFEF0072 + +CCR_CACHE_ICI_D:.long 0x00000800 +CCR_CACHE_D_2: .long 0x00000103 +MMU_CONTROL_TI_D:.long 0x00000004 +RAMCR_D: .long 0x00000200 +MSTPCR0_D: .long 0x00000000 +MSTPCR1_D: .long 0x00000000 + +MMSELR_D: .long 0xa5a50000 +BCR_D: .long 0x00000000 +CS0BCR_D: .long 0x77777770 +CS1BCR_D: .long 0x77777670 +CS2BCR_D: .long 0x77777670 +CS4BCR_D: .long 0x77777670 +CS5BCR_D: .long 0x77777670 +CS6BCR_D: .long 0x77777670 +CS0WCR_D: .long 0x7777770F +CS1WCR_D: .long 0x22000002 +CS2WCR_D: .long 0x7777770F +CS4WCR_D: .long 0x7777770F +CS5WCR_D: .long 0x7777770F +CS6WCR_D: .long 0x7777770F +CS5PCR_D: .long 0x77000000 +CS6PCR_D: .long 0x77000000 +ICR0_D: .long 0x00E00000 +MIM8_D: .long 0x00000000 +MIMC_D1: .long 0x01d10008 +MIMC_D2: .long 0x01d10009 +MIMC_D3: .long 0x01d10209 +SCR4_D1: .long 0x00000001 +SCR4_D2: .long 0x00000002 +SCR4_D3: .long 0x00000003 +SCR4_D4: .long 0x00000004 +STRC_D: .long 0x000f3980 +SDR4_D: .long 0x00000300 +SDMR00308_D: .long 0x00000000 +SDMR00B08_D: .long 0x00000000 +SDMR02000_D: .long 0x00000000 +PSEL0_D: .long 0x00000001 +PSEL1_D: .long 0x00000244 +SR_MASK_D: .long 0xEFFFFF0F +WDTST_D: .long 0x5A000FFF +WDTCSR_D: .long 0xA5000000 +WDTBST_D: .long 0x55000000 + diff --git a/board/sh7763rdp/sh7763rdp.c b/board/sh7763rdp/sh7763rdp.c new file mode 100644 index 0000000..6f9501b --- /dev/null +++ b/board/sh7763rdp/sh7763rdp.c @@ -0,0 +1,76 @@ +/* + * Copyright (C) 2008 Renesas Solutions Corp. + * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com> + * Copyright (C) 2007 Kenati Technologies, Inc. + * + * board/sh7763rdp/sh7763rdp.c + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/processor.h> + +#define CPU_CMDREG 0xB1000006 +#define PDCR 0xffef0006 +#define PECR 0xffef0008 +#define PFCR 0xffef000a +#define PGCR 0xffef000c +#define PHCR 0xffef000e +#define PJCR 0xffef0012 +#define PKCR 0xffef0014 +#define PLCR 0xffef0016 +#define PMCR 0xffef0018 +#define PSEL1 0xffef0072 +#define PSEL2 0xffef0074 +#define PSEL3 0xffef0076 + +int checkboard(void) +{ + puts("BOARD: Renesas SH7763 RDP\n"); + return 0; +} + +int board_init(void) +{ + vu_short dat; + + *(vu_short *)(CPU_CMDREG) |= 0x0001; + + /* GPIO Setting (eth1) */ + dat = *(vu_short *)(PSEL1); + *(vu_short *)PSEL1 = ((dat & ~0xff00) | 0x2400); + *(vu_short *)PFCR = 0; + *(vu_short *)PGCR = 0; + *(vu_short *)PHCR = 0; + + return 0; +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_memstart = CFG_SDRAM_BASE; + gd->bd->bi_memsize = CFG_SDRAM_SIZE; + printf("DRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024)); + return 0; +} + +void led_set_state (unsigned short value) +{ +} diff --git a/board/sh7763rdp/u-boot.lds b/board/sh7763rdp/u-boot.lds new file mode 100644 index 0000000..8f8229b --- /dev/null +++ b/board/sh7763rdp/u-boot.lds @@ -0,0 +1,106 @@ +/* + * Copyrigth (c) 2007,2008 + * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +OUTPUT_ARCH(sh) +ENTRY(_start) + +SECTIONS +{ + /* + Base address of internal SDRAM is 0x0C000000. + Although size of SDRAM can be either 16 or 32 MBytes, + we assume 16 MBytes (ie ignore upper half if the full + 32 MBytes is present). + + NOTE: This address must match with the definition of + TEXT_BASE in config.mk (in this directory). + + */ + . = 0x8C000000 + (64*1024*1024) - (256*1024); + + PROVIDE (reloc_dst = .); + + PROVIDE (_ftext = .); + PROVIDE (_fcode = .); + PROVIDE (_start = .); + + .text : + { + cpu/sh4/start.o (.text) + . = ALIGN(8192); + common/environment.o (.ppcenv) + . = ALIGN(8192); + common/environment.o (.ppcenvr) + . = ALIGN(8192); + *(.text) + . = ALIGN(4); + } =0xFF + PROVIDE (_ecode = .); + .rodata : + { + *(.rodata) + . = ALIGN(4); + } + PROVIDE (_etext = .); + + + PROVIDE (_fdata = .); + .data : + { + *(.data) + . = ALIGN(4); + } + PROVIDE (_edata = .); + + PROVIDE (_fgot = .); + .got : + { + *(.got) + . = ALIGN(4); + } + PROVIDE (_egot = .); + + PROVIDE (__u_boot_cmd_start = .); + .u_boot_cmd : + { + *(.u_boot_cmd) + . = ALIGN(4); + } + PROVIDE (__u_boot_cmd_end = .); + + PROVIDE (reloc_dst_end = .); + /* _reloc_dst_end = .; */ + + PROVIDE (bss_start = .); + PROVIDE (__bss_start = .); + .bss : + { + *(.bss) + . = ALIGN(4); + } + PROVIDE (bss_end = .); + + PROVIDE (_end = .); +} + diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h new file mode 100644 index 0000000..d8a760c --- /dev/null +++ b/include/configs/sh7763rdp.h @@ -0,0 +1,129 @@ +/* + * Configuation settings for the Renesas SH7763RDP board + * + * Copyright (C) 2008 Renesas Solutions Corp. + * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __SH7763RDP_H +#define __SH7763RDP_H + +#define CONFIG_SH 1 +#define CONFIG_SH4 1 +#define CONFIG_CPU_SH7763 1 +#define CONFIG_SH7763RDP 1 +#define __LITTLE_ENDIAN 1 + +/* + * Command line configuration. + */ +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_ENV +#define CONFIG_CMD_NFS +#define CONFIG_CMD_JFFS2 + +#define CONFIG_BOOTDELAY -1 +#define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01" +#define CONFIG_ENV_OVERWRITE 1 + +#define CONFIG_VERSION_VARIABLE +#undef CONFIG_SHOW_BOOT_PROGRESS + +/* SCIF */ +#define CFG_SCIF_CONSOLE 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_CONS_SCIF2 1 + +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#define CFG_CBSIZE 256 /* Buffer size for input from the Console */ +#define CFG_PBSIZE 256 /* Buffer size for Console output */ +#define CFG_MAXARGS 16 /* max args accepted for monitor commands */ +#define CFG_BARGSIZE 512 /* Buffer size for Boot Arguments + passed to kernel */ +#define CFG_BAUDRATE_TABLE { 115200 } /* List of legal baudrate + settings for this board */ + +/* Ethernet */ +#define CONFIG_SH_ETHER 1 +#define CONFIG_SH_ETHER_USE_PORT (1) +#define CONFIG_SH_ETHER_PHY_ADDR (0x01) +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.0.63 +#define CONFIG_SERVERIP 192.168.0.1 +#define CFG_RX_ETH_BUFFER (8) + +/* SDRAM */ +#define CFG_SDRAM_BASE (0x8C000000) +#define CFG_SDRAM_SIZE (64 * 1024 * 1024) +#define CFG_MEMTEST_START (CFG_SDRAM_BASE) +#define CFG_MEMTEST_END (CFG_MEMTEST_START + (60 * 1024 * 1024)) + +/* Flash(NOR) */ +#define CFG_FLASH_BASE (0xA0000000) +#define CFG_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) +#define CFG_MAX_FLASH_BANKS (1) +#define CFG_MAX_FLASH_SECT (520) + +/* U-boot setting */ +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 4 * 1024 * 1024) +#define CFG_MONITOR_BASE (CFG_FLASH_BASE) +#define CFG_MONITOR_LEN (128 * 1024) +/* Size of DRAM reserved for malloc() use */ +#define CFG_MALLOC_LEN (1024 * 1024) +/* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_SIZE (256) +#define CFG_BOOTMAPSZ (8 * 1024 * 1024) + +#define CFG_FLASH_CFI +#define CFG_FLASH_CFI_DRIVER +#undef CFG_FLASH_QUIET_TEST +#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ +/* Timeout for Flash erase operations (in ms) */ +#define CFG_FLASH_ERASE_TOUT (3 * 1000) +/* Timeout for Flash write operations (in ms) */ +#define CFG_FLASH_WRITE_TOUT (3 * 1000) +/* Timeout for Flash set sector lock bit operations (in ms) */ +#define CFG_FLASH_LOCK_TOUT (3 * 1000) +/* Timeout for Flash clear lock bit operations (in ms) */ +#define CFG_FLASH_UNLOCK_TOUT (3 * 1000) +/* Use hardware flash sectors protection instead of U-Boot software protection */ +#undef CFG_FLASH_PROTECTION +#undef CFG_DIRECT_FLASH_TFTP +#define CFG_ENV_IS_IN_FLASH +#define CFG_ENV_SECT_SIZE (128 * 1024) +#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE) +#define CFG_ENV_ADDR (CFG_FLASH_BASE + (1 * CFG_ENV_SECT_SIZE)) +/* Offset of env Flash sector relative to CFG_FLASH_BASE */ +#define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE) +#define CFG_ENV_SIZE_REDUND (CFG_ENV_SECT_SIZE) +#define CFG_ENV_ADDR_REDUND (CFG_FLASH_BASE + (2 * CFG_ENV_SECT_SIZE)) + +/* Clock */ +#define CONFIG_SYS_CLK_FREQ 66666666 +#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ +#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) + +#endif /* __SH7763RDP_H */ -- 1.5.5.1

3 2

[U-Boot-Users] [PATCH V7] ARM: Add support for Lyrtech SFF-SDR board (ARM926EJS)
by Hugo Villeneuve 06 Jun '08

06 Jun '08

ARM: This patch adds support for the Lyrtech SFF-SDR board, based on the TI DaVinci architecture (ARM926EJS). Signed-off-by: Hugo Villeneuve <hugo.villeneuve(a)lyrtech.com> Signed-off-by: Philip Balister, OpenSDR <philip(a)opensdr.com> --- CREDITS | 5 + MAKEALL | 1 + Makefile | 3 + board/davinci/sffsdr/Makefile | 51 +++++++ board/davinci/sffsdr/board_init.S | 32 ++++ board/davinci/sffsdr/config.mk | 42 ++++++ board/davinci/sffsdr/sffsdr.c | 288 +++++++++++++++++++++++++++++++++++++ board/davinci/sffsdr/u-boot.lds | 52 +++++++ include/asm-arm/mach-types.h | 13 ++ include/configs/davinci_sffsdr.h | 148 +++++++++++++++++++ 10 files changed, 635 insertions(+), 0 deletions(-) diff --git a/CREDITS b/CREDITS index e84ef38..b855904 100644 --- a/CREDITS +++ b/CREDITS @@ -533,3 +533,8 @@ N: Timo Tuunainen E: timo.tuunainen(a)sysart.fi D: Support for Artila M-501 starter kit W: http://www.sysart.fi/ + +N: Philip Balister +E: philip(a)opensdr.com +D: Port to Lyrtech SFFSDR development board. +W: www.opensdr.com diff --git a/MAKEALL b/MAKEALL index 37b4334..f53ceec 100755 --- a/MAKEALL +++ b/MAKEALL @@ -496,6 +496,7 @@ LIST_ARM9=" \ voiceblue \ davinci_dvevm \ davinci_schmoogie \ + davinci_sffsdr \ davinci_sonata \ " diff --git a/Makefile b/Makefile index 6548f8e..05d90aa 100644 --- a/Makefile +++ b/Makefile @@ -2408,6 +2408,9 @@ davinci_dvevm_config : unconfig davinci_schmoogie_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci +davinci_sffsdr_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci + davinci_sonata_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci diff --git a/board/davinci/sffsdr/Makefile b/board/davinci/sffsdr/Makefile new file mode 100644 index 0000000..4413b33 --- /dev/null +++ b/board/davinci/sffsdr/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o +SOBJS := board_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak *~ .depend + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/davinci/sffsdr/board_init.S b/board/davinci/sffsdr/board_init.S new file mode 100644 index 0000000..84ecd96 --- /dev/null +++ b/board/davinci/sffsdr/board_init.S @@ -0,0 +1,32 @@ +/* + * Board-specific low level initialization code. Called at the very end + * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * initialization required. + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> + +.globl dv_board_init +dv_board_init: + + mov pc, lr diff --git a/board/davinci/sffsdr/config.mk b/board/davinci/sffsdr/config.mk new file mode 100644 index 0000000..b1c4ead --- /dev/null +++ b/board/davinci/sffsdr/config.mk @@ -0,0 +1,42 @@ +# +# Lyrtech SFF SDR board (ARM926EJS) cpu +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> +# David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> +# +# Copyright (C) 2008 Lyrtech <www.lyrtech.com> +# Copyright (C) 2008 Philip Balister, OpenSDR <philip(a)opensdr.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +# +# SFF SDR board has 1 bank of 128 MB DDR RAM +# Physical Address: +# 8000'0000 to 87FF'FFFF +# +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) +# +# Integrity kernel is expected to be at 8000'0000, entry 8000'00D0, +# up to 81FF'FFFF (uses up to 32 MB of memory for text, heap, etc). +# +# we load ourself to 8400'0000 to provide at least 32MB spacing +# between us and the Integrity kernel image +TEXT_BASE = 0x84000000 diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c new file mode 100644 index 0000000..b84cec4 --- /dev/null +++ b/board/davinci/sffsdr/sffsdr.c @@ -0,0 +1,288 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * Copyright (C) 2008 Philip Balister, OpenSDR <philip(a)opensdr.com> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * + * Copyright (C) 2004 Texas Instruments. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emac_defs.h> + +#define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */ +#define DAVINCI_A3CR_VAL (0x3FFFFFFD) /* EMIF-A CS3 value for FPGA. */ + +#define INTEGRITY_SYSCFG_OFFSET 0x7E8 +#define INTEGRITY_CHECKWORD_OFFSET 0x7F8 +#define INTEGRITY_CHECKWORD_VALUE 0x10ADBEEF + +DECLARE_GLOBAL_DATA_PTR; + +extern void timer_init(void); +extern int eth_hw_init(void); +extern phy_t phy; + + +/* Works on Always On power domain only (no PD argument) */ +void lpsc_on(unsigned int id) +{ + dv_reg_p mdstat, mdctl; + + if (id >= DAVINCI_LPSC_GEM) + return; /* Don't work on DSP Power Domain */ + + mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); + mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); + + while (REG(PSC_PTSTAT) & 0x01); + + if ((*mdstat & 0x1f) == 0x03) + return; /* Already on and enabled */ + + *mdctl |= 0x03; + + /* Special treatment for some modules as for sprue14 p.7.4.2 */ + switch (id) { + case DAVINCI_LPSC_VPSSSLV: + case DAVINCI_LPSC_EMAC: + case DAVINCI_LPSC_EMAC_WRAPPER: + case DAVINCI_LPSC_MDIO: + case DAVINCI_LPSC_USB: + case DAVINCI_LPSC_ATA: + case DAVINCI_LPSC_VLYNQ: + case DAVINCI_LPSC_UHPI: + case DAVINCI_LPSC_DDR_EMIF: + case DAVINCI_LPSC_AEMIF: + case DAVINCI_LPSC_MMC_SD: + case DAVINCI_LPSC_MEMSTICK: + case DAVINCI_LPSC_McBSP: + case DAVINCI_LPSC_GPIO: + *mdctl |= 0x200; + break; + } + + REG(PSC_PTCMD) = 0x01; + + while (REG(PSC_PTSTAT) & 0x03); + while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */ +} + +void dsp_on(void) +{ + int i; + + if (REG(PSC_PDSTAT1) & 0x1f) + return; /* Already on */ + + REG(PSC_GBLCTL) |= 0x01; + REG(PSC_PDCTL1) |= 0x01; + REG(PSC_PDCTL1) &= ~0x100; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; + REG(PSC_PTCMD) = 0x02; + + for (i = 0; i < 100; i++) { + if (REG(PSC_EPCPR) & 0x02) + break; + } + + REG(PSC_CHP_SHRTSW) = 0x01; + REG(PSC_PDCTL1) |= 0x100; + REG(PSC_EPCCR) = 0x02; + + for (i = 0; i < 100; i++) { + if (!(REG(PSC_PTSTAT) & 0x02)) + break; + } + + REG(PSC_GBLCTL) &= ~0x1f; +} + +int board_init(void) +{ + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_SFFSDR; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* Workaround for TMS320DM6446 errata 1.3.22 */ + REG(PSC_SILVER_BULLET) = 0; + + /* Power on required peripherals */ + lpsc_on(DAVINCI_LPSC_EMAC); + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); + lpsc_on(DAVINCI_LPSC_MDIO); + lpsc_on(DAVINCI_LPSC_I2C); + lpsc_on(DAVINCI_LPSC_UART0); + lpsc_on(DAVINCI_LPSC_TIMER1); + lpsc_on(DAVINCI_LPSC_GPIO); + + /* Powerup the DSP */ + dsp_on(); + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x0000e003; + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0; + + /* Enable UART0 MUX lines */ + REG(PINMUX1) |= 1; + + /* Enable EMAC and AEMIF pins */ + REG(PINMUX0) = 0x80000c1f; + + /* Enable I2C pin Mux */ + REG(PINMUX1) |= (1 << 7); + + /* Set the Bus Priority Register to appropriate value */ + REG(VBPR) = 0x20; + + timer_init(); + + return(0); +} + +/* Read ethernet MAC address from Integrity data structure inside EEPROM. */ +int read_mac_address(uint8_t *buf) +{ + u_int32_t value, mac[2], address; + + /* Read Integrity data structure checkword. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_CHECKWORD_OFFSET, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) { + printf("Read from EEPROM @ 0x%02x failed\n", + CFG_I2C_EEPROM_ADDR); + return 1; + } + if (value != INTEGRITY_CHECKWORD_VALUE) + return 1; + + /* Read SYSCFG structure offset. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) { + printf("Read from EEPROM @ 0x%02x failed\n", + CFG_I2C_EEPROM_ADDR); + return 1; + } + address = 0x800 + (int) value; /* Address where SYSCFG structure + * is located. */ + + /* Read NET CONFIG structure offset. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, address, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) { + printf("Read from EEPROM @ 0x%02x failed\n", + CFG_I2C_EEPROM_ADDR); + return 1; + } + address = 0x800 + (int) value; /* Address where NET CONFIG structure + * is located. */ + address += 12; /* Address where NET INTERFACE CONFIG structure + * is located. */ + + /* Read NET INTERFACE CONFIG 2 structure offset. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, address, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) { + printf("Read from EEPROM @ 0x%02x failed\n", + CFG_I2C_EEPROM_ADDR); + return 1; + } + address = 0x800 + 16 + (int) value;/* Address where NET INTERFACE + * CONFIG 2 structure is located. */ + + /* Read MAC address. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, address, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &mac[0], 8)) { + printf("Read from EEPROM @ 0x%02x failed\n", + CFG_I2C_EEPROM_ADDR); + return 1; + } + + buf[0] = mac[0] >> 24; + buf[1] = mac[0] >> 16; + buf[2] = mac[0] >> 8; + buf[3] = mac[0]; + buf[4] = mac[1] >> 24; + buf[5] = mac[1] >> 16; + + return 0; +} + +/* Platform dependent initialisation. */ +int misc_init_r(void) +{ + u_int8_t tmp[20], buf[10]; + int clk = 0; + + /* EMIF-A CS3 configuration for FPGA. */ + REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL; + + clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); + + printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2); + printf("DDR Clock: %dMHz\n", (clk / 2)); + + /* Configure I2C switch (PCA9543) to enable channel 0. */ + tmp[0] = CFG_I2C_PCA9543_ENABLE_CH0; + if (i2c_write(CFG_I2C_PCA9543_ADDR, 0, + CFG_I2C_PCA9543_ADDR_LEN, tmp, 1)) + printf("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR); + + /* Set Ethernet MAC address from EEPROM if available. */ + if (read_mac_address(buf) == 0) { + if ((buf[0] != 0xff) && (getenv("ethaddr") == NULL)) { + sprintf((char *)&tmp[0], + "%02x:%02x:%02x:%02x:%02x:%02x", + buf[0], buf[1], buf[2], buf[3], + buf[4], buf[5]); + setenv("ethaddr", (char *)&tmp[0]); + } + } + + if (!eth_hw_init()) { + printf("Ethernet init failed\n"); + } else { + printf("ETH PHY: %s\n", phy.name); + } + + /* For most DaVinci boards, U-Boot is copied in RAM by the UBL, + * so we are always in the relocated state. This is + * necessary for command history to work. */ + gd->flags |= GD_FLG_RELOC; + + return(0); +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return(0); +} diff --git a/board/davinci/sffsdr/u-boot.lds b/board/davinci/sffsdr/u-boot.lds new file mode 100644 index 0000000..a4fcd1a --- /dev/null +++ b/board/davinci/sffsdr/u-boot.lds @@ -0,0 +1,52 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + . = ALIGN(4); + .rodata : { *(.rodata) } + . = ALIGN(4); + .data : { *(.data) } + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss (NOLOAD) : { *(.bss) } + _end = .; +} diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h index aaf2ea2..b347857 100644 --- a/include/asm-arm/mach-types.h +++ b/include/asm-arm/mach-types.h @@ -1595,6 +1595,7 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_P300 1602 #define MACH_TYPE_XDACOMET 1603 #define MACH_TYPE_DEXFLEX2 1604 +#define MACH_TYPE_SFFSDR 1657 #ifdef CONFIG_ARCH_EBSA110 # ifdef machine_arch_type @@ -16500,6 +16501,18 @@ extern unsigned int __machine_arch_type; # define machine_is_schmoogie() (0) #endif +#ifdef CONFIG_MACH_SFFSDR +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SFFSDR +# endif +# define machine_is_sffsdr() (machine_arch_type == MACH_TYPE_SFFSDR) +#else +# define machine_is_sffsdr() (0) +#endif + #ifdef CONFIG_MACH_AZTOOL # ifdef machine_arch_type # undef machine_arch_type diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h new file mode 100644 index 0000000..897e9e5 --- /dev/null +++ b/include/configs/davinci_sffsdr.h @@ -0,0 +1,148 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * Copyright (C) 2008 Philip Balister, OpenSDR <philip(a)opensdr.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/* Board */ +#define SFFSDR +#define CFG_NAND_LARGEPAGE +#define CFG_USE_NAND +/* SoC Configuration */ +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */ +#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */ +#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */ +#define CFG_HZ 1000 +/* EEPROM definitions for Atmel 24LC64 EEPROM chip */ +#define CFG_I2C_EEPROM_ADDR_LEN 2 +#define CFG_I2C_EEPROM_ADDR 0x50 +#define CFG_EEPROM_PAGE_WRITE_BITS 5 +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 +/* Memory Info */ +#define CFG_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */ +#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */ +#define CFG_MEMTEST_START 0x80000000 /* memtest start address */ +#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ +#define PHYS_SDRAM_1 0x80000000 /* DDR Start */ +#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ +#define DDR_4BANKS /* 4-bank DDR2 (128MB) */ +/* Serial Driver info */ +#define CFG_NS16550 +#define CFG_NS16550_SERIAL +#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */ +#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */ +#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */ +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +/* I2C Configuration */ +#define CONFIG_HARD_I2C +#define CONFIG_DRIVER_DAVINCI_I2C +#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ +#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ +/* Network & Ethernet Configuration */ +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_OVERWRITE_ETHADDR_ONCE +/* Flash & Environment */ +#undef CFG_ENV_IS_IN_FLASH +#define CFG_NO_FLASH +#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ +#define CFG_ENV_SECT_SIZE 2048 /* Env sector Size */ +#define CFG_ENV_SIZE SZ_128K +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ +#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ +#define CFG_NAND_BASE 0x02000000 +#define CFG_NAND_HW_ECC +#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define NAND_MAX_CHIPS 1 +#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ +/* I2C switch definitions for PCA9543 chip */ +#define CFG_I2C_PCA9543_ADDR 0x70 +#define CFG_I2C_PCA9543_ADDR_LEN 0 /* Single register. */ +#define CFG_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */ +/* U-Boot general configuration */ +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#define CONFIG_MISC_INIT_R +#define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds. */ +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */ +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CFG_PBSIZE \ + (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* Print buffer size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_LOAD_ADDR 0x80700000 /* Default Linux kernel + * load address. */ +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, + * may be later */ +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CFG_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC +/* Linux Information */ +#define LINUX_BOOT_PARAM_ADDR 0x80000100 +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS \ + "mem=56M " \ + "console=ttyS0,115200n8 " \ + "root=/dev/nfs rw noinitrd ip=dhcp " \ + "nfsroot=${serverip}:/nfsroot/sffsdr " \ + "nwhwconf=device:eth0,hwaddr:${ethaddr}" +#define CONFIG_BOOTCOMMAND \ + "nand read 87A00000 100000 300000;" \ + "bootelf 87A00000" +/* U-Boot commands */ +#include <config_cmd_default.h> +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_NAND +#define CONFIG_CMD_EEPROM +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +/* KGDB support (if any) */ +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ +#endif +#endif /* __CONFIG_H */

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[U-Boot-Users] How to debug u-boot
by Brian S. Park 06 Jun '08

06 Jun '08

Hi every one. I need help with debugging u-boot. If I comple u-Boot without -Os optimization, I get bunch of errors about missing functions. They are inline functions (in_be32, out_be32, out_8, etc) and I'm not sure how to make sure they are included when building the code without optimization. I'm using ELDK4.1 for windows and u-Boot-1.3.3 Any help or pointers will be appreciated. Thanks Brian =============================================================== Brian S. Park brian.park(a)corelis.com (562) 926-6727 x132 --------------------------------------------------------------- Everything we do helps our customers get to market FASTER with HIGHER quality and LOWER cost ===============================================================

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[U-Boot-Users] [patch] DM9000 fix status check fail 0x6d error for trizeps board
by Remy Bohmer 06 Jun '08

06 Jun '08

According to the Application Notes of the DM9000, only the 2 bits 0:1 of the status byte need to be checked to identify a valid packet in the fifo But, The several different Application Notes do not all speak the same language on these bits. They do not disagree, but only 1 Application Note noted explicitly that only these 2 bits need to be checked. Even the datasheets do not mention anything about these 2 bits. Because the old code, and the kernel check the whole byte, I left this piece untouched. However, I tested all board/DM9000[A|E|EP] devices with this 2 bit check, so it should work. Notice, that the 2nd iteration through this receive loop (when a 2nd packet is in the fifo) is much shorter now, compared to the older U-boot driver code, so that we can maybe run into a hardware condition now that was never seen before, or maybe was seen very unfrequently. Additionaly added a cleanup of a stack variable. Signed-off-by: Remy Bohmer <linux(a)bohmer.net> --- drivers/net/dm9000x.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) Index: u-boot-net-git-05062008/drivers/net/dm9000x.c =================================================================== --- u-boot-net-git-05062008.orig/drivers/net/dm9000x.c 2008-06-05 12:07:40.000000000 +0200 +++ u-boot-net-git-05062008/drivers/net/dm9000x.c 2008-06-05 12:45:15.000000000 +0200 @@ -113,7 +113,7 @@ typedef struct board_info { u8 device_wait_reset; /* device state */ u8 nic_type; /* NIC type */ unsigned char srom[128]; - void (*outblk)(void *data_ptr, int count); + void (*outblk)(volatile void *data_ptr, int count); void (*inblk)(void *data_ptr, int count); void (*rx_status)(u16 *RxStatus, u16 *RxLen); } board_info_t; @@ -161,14 +161,14 @@ dump_regs(void) } #endif -static void dm9000_outblk_8bit(void *data_ptr, int count) +static void dm9000_outblk_8bit(volatile void *data_ptr, int count) { int i; for (i = 0; i < count; i++) DM9000_outb((((u8 *) data_ptr)[i] & 0xff), DM9000_DATA); } -static void dm9000_outblk_16bit(void *data_ptr, int count) +static void dm9000_outblk_16bit(volatile void *data_ptr, int count) { int i; u32 tmplen = (count + 1) / 2; @@ -176,7 +176,7 @@ static void dm9000_outblk_16bit(void *da for (i = 0; i < tmplen; i++) DM9000_outw(((u16 *) data_ptr)[i], DM9000_DATA); } -static void dm9000_outblk_32bit(void *data_ptr, int count) +static void dm9000_outblk_32bit(volatile void *data_ptr, int count) { int i; u32 tmplen = (count + 3) / 4; @@ -551,7 +551,6 @@ eth_init(bd_t * bd) int eth_send(volatile void *packet, int length) { - char *data_ptr; int tmo; struct board_info *db = &dm9000_info; @@ -560,11 +559,10 @@ eth_send(volatile void *packet, int leng DM9000_iow(DM9000_ISR, IMR_PTM); /* Clear Tx bit in ISR */ /* Move data to DM9000 TX RAM */ - data_ptr = (char *) packet; DM9000_outb(DM9000_MWCMD, DM9000_IO); /* Prepare for TX-data */ /* push the data to the TX-fifo */ - (db->outblk)(data_ptr, length); + (db->outblk)(packet, length); /* Set TX length to DM9000 */ DM9000_iow(DM9000_TXPLL, length & 0xff); @@ -625,8 +623,9 @@ eth_rx(void) for (;;) { DM9000_ior(DM9000_MRCMDX); /* Dummy read */ - /* Get most updated data */ - rxbyte = DM9000_inb(DM9000_DATA); + /* Get most updated data, + only look at bits 0:1, See application notes DM9000 */ + rxbyte = DM9000_inb(DM9000_DATA) & 0x03; /* Status check: this byte must be 0 or 1 */ if (rxbyte > DM9000_PKT_RDY) { --

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[U-Boot-Users] build failure in tools - missing CFG_ENV_SIZE ?
by Andre Schwarz 06 Jun '08

06 Jun '08

All, after getting a clean u-boot clone (1.3.3 today) I get a compile error in "tools" subdir. I've tried 2 different boards making a "TQM5200_config" and "MPC8349ITX_config" - just to make sure ... "make CROSS_COMPILE=ppc_6xx- " cross-compiler is gcc 4.0 as shipped with ELDK 4.1. Am I missing something ? Since environment.c includes config.h which pulls in board config everything should be fine. Can someome help me out please ? ---- make[1]: Entering directory `/home/u-boot.git/tools' gcc -g -idirafter /home/u-boot.git/include -idirafter /home/u-boot.git/include2 -idirafter /home/u-boot.git/include -DTEXT_BASE=0xFC000000 -DUSE_HOSTCC -c -o environment.o environment.c In file included from environment.c:30: /home/u-boot.git/include/environment.h:107: error: 'CFG_ENV_SIZE' undeclared here (not in a function) make[1]: *** [environment.o] Error 1 make[1]: Leaving directory `/home/u-boot.git/tools' make: *** [tools] Error 2 regards, Andre Schwarz MATRIX VISION GmbH, Talstraße 16, DE-71570 Oppenweiler - Registergericht: Amtsgericht Stuttgart, HRB 271090 Geschäftsführer: Gerhard Thullner, Werner Armingeon, Uwe Furtner

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[U-Boot-Users] [PATCH] ppc4xx: Fix misspelled CONFIG_440SPE/440EPX/GRX config options
by Stefan Roese 06 Jun '08

06 Jun '08

We use upper case letters for the AMCC processor defines (like CONFIG_440SPE) in U-Boot. So the 440SPe is labeled CONFIG_440SPE and not CONFIG_440SPe. This patch fixes the last misspelled config options. Signed-off-by: Stefan Roese <sr(a)denx.de> --- cpu/ppc4xx/4xx_uart.c | 10 +++++----- post/cpu/ppc4xx/uart.c | 10 +++++----- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/cpu/ppc4xx/4xx_uart.c b/cpu/ppc4xx/4xx_uart.c index ffbc222..a7587d4 100644 --- a/cpu/ppc4xx/4xx_uart.c +++ b/cpu/ppc4xx/4xx_uart.c @@ -98,14 +98,14 @@ DECLARE_GLOBAL_DATA_PTR; #define UDIV_SUBTRACT 0 #define UART0_SDR sdr_uart0 #define UART1_SDR sdr_uart1 -#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \ - defined(CONFIG_440GR) || defined(CONFIG_440GRx) || \ - defined(CONFIG_440SP) || defined(CONFIG_440SPe) || \ +#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) #define UART2_SDR sdr_uart2 #endif -#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \ - defined(CONFIG_440GR) || defined(CONFIG_440GRx) || \ +#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) #define UART3_SDR sdr_uart3 #endif diff --git a/post/cpu/ppc4xx/uart.c b/post/cpu/ppc4xx/uart.c index 27cfb91..1a57c3d 100644 --- a/post/cpu/ppc4xx/uart.c +++ b/post/cpu/ppc4xx/uart.c @@ -79,13 +79,13 @@ #define UDIV_SUBTRACT 0 #define UART0_SDR sdr_uart0 #define UART1_SDR sdr_uart1 -#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \ - defined(CONFIG_440GR) || defined(CONFIG_440GRx) || \ - defined(CONFIG_440SP) || defined(CONFIG_440SPe) +#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) #define UART2_SDR sdr_uart2 #endif -#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \ - defined(CONFIG_440GR) || defined(CONFIG_440GRx) +#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GR) || defined(CONFIG_440GRX) #define UART3_SDR sdr_uart3 #endif #define MFREG(a, d) mfsdr(a, d) -- 1.5.5.3

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[U-Boot-Users] (no subject)
by 钟文辉 06 Jun '08

06 Jun '08

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