June 2008 - U-Boot

[U-Boot-Users] [PATCH][resubmit] QE IO: Add initial data to pin configuration + read/write functions
by David Saada 16 Jul '08

16 Jul '08

On the MPC83xx & MPC85xx architectures that have QE, add initial data to the pin configuration table (qe_iop_conf_tab). This is relevant for GPIO pins defined as output. One can setup a value of -1 to leave the value unchanged. QE initialization tables in all relevant boards were also replaced. In addition, add IO pin read & write functions. This patch also includes commands for reading and writing parallel I/O ports (pario command). Signed-off-by: David Saada <david.saada(a)ecitele.com> b/common/cmd_pario.c | 85 +++++++++ board/freescale/mpc8323erdb/mpc8323erdb.c | 74 +++---- board/freescale/mpc832xemds/mpc832xemds.c | 74 +++---- board/freescale/mpc8360emds/mpc8360emds.c | 110 +++++------ board/freescale/mpc8360erdk/mpc8360erdk.c | 280 +++++++++++++++--------------- board/freescale/mpc8568mds/mpc8568mds.c | 106 +++++------ common/Makefile | 1 cpu/mpc83xx/cpu_init.c | 7 cpu/mpc83xx/qe_io.c | 59 +++++- cpu/mpc85xx/cpu_init.c | 7 cpu/mpc85xx/qe_io.c | 58 +++++- include/ioports.h | 8 12 files changed, 526 insertions(+), 343 deletions(-) --- a/include/ioports.h 2008-03-28 01:49:12.000000000 +0200 +++ b/include/ioports.h 2008-03-30 16:11:09.514274000 +0300 @@ -60,6 +60,14 @@ typedef struct { int dir; int open_drain; int assign; + int data; } qe_iop_conf_t; #define QE_IOP_TAB_END (-1) + +void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign, + int data); +void qe_read_iopin(u8 port, u8 pin, int *data); +void qe_write_iopin(u8 port, u8 pin, int data); + + --- a/cpu/mpc85xx/cpu_init.c 2008-03-28 01:49:12.000000000 +0200 +++ b/cpu/mpc85xx/cpu_init.c 2008-03-30 15:42:32.913152000 +0300 @@ -39,15 +39,13 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_QE extern qe_iop_conf_t qe_iop_conf_tab[]; -extern void qe_config_iopin(u8 port, u8 pin, int dir, - int open_drain, int assign); extern void qe_init(uint qe_base); extern void qe_reset(void); static void config_qe_ioports(void) { u8 port, pin; - int dir, open_drain, assign; + int dir, open_drain, assign, data; int i; for (i = 0; qe_iop_conf_tab[i].assign != QE_IOP_TAB_END; i++) { @@ -56,7 +54,8 @@ static void config_qe_ioports(void) dir = qe_iop_conf_tab[i].dir; open_drain = qe_iop_conf_tab[i].open_drain; assign = qe_iop_conf_tab[i].assign; - qe_config_iopin(port, pin, dir, open_drain, assign); + data = qe_iop_conf_tab[i].data; + qe_config_iopin(port, pin, dir, open_drain, assign, data); } } #endif --- a/cpu/mpc85xx/qe_io.c 2008-03-28 01:49:12.000000000 +0200 +++ b/cpu/mpc85xx/qe_io.c 2008-03-30 15:44:56.961332000 +0300 @@ -27,16 +27,30 @@ #if defined(CONFIG_QE) #define NUM_OF_PINS 32 -void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign) +void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign, + int data) { u32 pin_2bit_mask; u32 pin_2bit_dir; u32 pin_2bit_assign; u32 pin_1bit_mask; u32 tmp_val; - volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); - volatile par_io_t *par_io = (volatile par_io_t *) - &(gur->qe_par_io); + ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + par_io_t *par_io = (par_io_t *) &(gur->qe_par_io); + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Setup the data */ + if ((data != -1) && /* Don't leave unchanged */ + (assign == 0) && /* GPIO */ + (dir & 1)) { /* Has output */ + tmp_val = in_be32(&par_io[port].cpdat); + if (data) + out_be32(&par_io[port].cpdat, pin_1bit_mask | tmp_val); + else + out_be32(&par_io[port].cpdat, ~pin_1bit_mask & tmp_val); + } /* Caculate pin location and 2bit mask and dir */ pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); @@ -55,9 +69,6 @@ void qe_config_iopin(u8 port, u8 pin, in out_be32(&par_io[port].cpdir1, pin_2bit_dir | tmp_val); } - /* Calculate pin location for 1bit mask */ - pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); - /* Setup the open drain */ tmp_val = in_be32(&par_io[port].cpodr); if (open_drain) @@ -82,4 +93,37 @@ void qe_config_iopin(u8 port, u8 pin, in } } +void qe_read_iopin(u8 port, u8 pin, int *data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + par_io_t *par_io = (par_io_t *) &(gur->qe_par_io); + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Read the data */ + tmp_val = in_be32(&par_io[port].cpdat); + *data = (tmp_val >> (NUM_OF_PINS - (pin+1))) & 0x1; +} + +void qe_write_iopin(u8 port, u8 pin, int data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + par_io_t *par_io = (par_io_t *) &(gur->qe_par_io); + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Write the data */ + tmp_val = in_be32(&par_io[port].cpdat); + if (data) + out_be32(&par_io[port].cpdat, pin_1bit_mask | tmp_val); + else + out_be32(&par_io[port].cpdat, ~pin_1bit_mask & tmp_val); +} + #endif /* CONFIG_QE */ --- a/cpu/mpc83xx/cpu_init.c 2008-03-28 01:49:12.000000000 +0200 +++ b/cpu/mpc83xx/cpu_init.c 2008-03-30 15:45:53.227362000 +0300 @@ -28,15 +28,13 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_QE extern qe_iop_conf_t qe_iop_conf_tab[]; -extern void qe_config_iopin(u8 port, u8 pin, int dir, - int open_drain, int assign); extern void qe_init(uint qe_base); extern void qe_reset(void); static void config_qe_ioports(void) { u8 port, pin; - int dir, open_drain, assign; + int dir, open_drain, assign, data; int i; for (i = 0; qe_iop_conf_tab[i].assign != QE_IOP_TAB_END; i++) { @@ -45,7 +43,8 @@ static void config_qe_ioports(void) dir = qe_iop_conf_tab[i].dir; open_drain = qe_iop_conf_tab[i].open_drain; assign = qe_iop_conf_tab[i].assign; - qe_config_iopin(port, pin, dir, open_drain, assign); + data = qe_iop_conf_tab[i].data; + qe_config_iopin(port, pin, dir, open_drain, assign, data); } } #endif --- a/cpu/mpc83xx/qe_io.c 2008-03-28 01:49:12.000000000 +0200 +++ b/cpu/mpc83xx/qe_io.c 2008-03-30 15:53:43.620970000 +0300 @@ -26,15 +26,30 @@ #include "asm/immap_83xx.h" #define NUM_OF_PINS 32 -void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign) +void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign, + int data) { u32 pin_2bit_mask; u32 pin_2bit_dir; u32 pin_2bit_assign; u32 pin_1bit_mask; u32 tmp_val; - volatile immap_t *im = (volatile immap_t *)CFG_IMMR; - volatile qepio83xx_t *par_io = (volatile qepio83xx_t *)&im->qepio; + immap_t *im = (immap_t *)CFG_IMMR; + qepio83xx_t *par_io = (qepio83xx_t *)&im->qepio; + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Setup the data */ + if ((data != -1) && /* Don't leave unchanged */ + (assign == 0) && /* GPIO */ + (dir & 1)) { /* Has output */ + tmp_val = in_be32(&par_io->ioport[port].pdat); + if (data) + out_be32(&par_io->ioport[port].pdat, pin_1bit_mask | tmp_val); + else + out_be32(&par_io->ioport[port].pdat, ~pin_1bit_mask & tmp_val); + } /* Caculate pin location and 2bit mask and dir */ pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); @@ -53,9 +68,6 @@ void qe_config_iopin(u8 port, u8 pin, in out_be32(&par_io->ioport[port].dir1, pin_2bit_dir | tmp_val); } - /* Calculate pin location for 1bit mask */ - pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); - /* Setup the open drain */ tmp_val = in_be32(&par_io->ioport[port].podr); if (open_drain) { @@ -80,3 +92,38 @@ void qe_config_iopin(u8 port, u8 pin, in out_be32(&par_io->ioport[port].ppar1, pin_2bit_assign | tmp_val); } } + +void qe_read_iopin(u8 port, u8 pin, int *data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + immap_t *im = (immap_t *)CFG_IMMR; + qepio83xx_t *par_io = (qepio83xx_t *)&im->qepio; + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Read the data */ + tmp_val = in_be32(&par_io->ioport[port].pdat); + *data = (tmp_val >> (NUM_OF_PINS - (pin+1))) & 0x1; +} + +void qe_write_iopin(u8 port, u8 pin, int data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + immap_t *im = (immap_t *)CFG_IMMR; + qepio83xx_t *par_io = (qepio83xx_t *)&im->qepio; + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Setup the data */ + tmp_val = in_be32(&par_io->ioport[port].pdat); + if (data) { + out_be32(&par_io->ioport[port].pdat, pin_1bit_mask | tmp_val); + } else { + out_be32(&par_io->ioport[port].pdat, ~pin_1bit_mask & tmp_val); + } +} + --- a/board/freescale/mpc8323erdb/mpc8323erdb.c 2008-03-28 01:49:12.000000000 +0200 +++ b/board/freescale/mpc8323erdb/mpc8323erdb.c 2008-03-30 15:54:25.959133000 +0300 @@ -23,47 +23,47 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { /* UCC3 */ - {1, 0, 1, 0, 1}, /* TxD0 */ - {1, 1, 1, 0, 1}, /* TxD1 */ - {1, 2, 1, 0, 1}, /* TxD2 */ - {1, 3, 1, 0, 1}, /* TxD3 */ - {1, 9, 1, 0, 1}, /* TxER */ - {1, 12, 1, 0, 1}, /* TxEN */ - {3, 24, 2, 0, 1}, /* TxCLK->CLK10 */ - - {1, 4, 2, 0, 1}, /* RxD0 */ - {1, 5, 2, 0, 1}, /* RxD1 */ - {1, 6, 2, 0, 1}, /* RxD2 */ - {1, 7, 2, 0, 1}, /* RxD3 */ - {1, 8, 2, 0, 1}, /* RxER */ - {1, 10, 2, 0, 1}, /* RxDV */ - {0, 13, 2, 0, 1}, /* RxCLK->CLK9 */ - {1, 11, 2, 0, 1}, /* COL */ - {1, 13, 2, 0, 1}, /* CRS */ + {1, 0, 1, 0, 1, -1}, /* TxD0 */ + {1, 1, 1, 0, 1, -1}, /* TxD1 */ + {1, 2, 1, 0, 1, -1}, /* TxD2 */ + {1, 3, 1, 0, 1, -1}, /* TxD3 */ + {1, 9, 1, 0, 1, -1}, /* TxER */ + {1, 12, 1, 0, 1, -1}, /* TxEN */ + {3, 24, 2, 0, 1, -1}, /* TxCLK->CLK10 */ + + {1, 4, 2, 0, 1, -1}, /* RxD0 */ + {1, 5, 2, 0, 1, -1}, /* RxD1 */ + {1, 6, 2, 0, 1, -1}, /* RxD2 */ + {1, 7, 2, 0, 1, -1}, /* RxD3 */ + {1, 8, 2, 0, 1, -1}, /* RxER */ + {1, 10, 2, 0, 1, -1}, /* RxDV */ + {0, 13, 2, 0, 1, -1}, /* RxCLK->CLK9 */ + {1, 11, 2, 0, 1, -1}, /* COL */ + {1, 13, 2, 0, 1, -1}, /* CRS */ /* UCC2 */ - {0, 18, 1, 0, 1}, /* TxD0 */ - {0, 19, 1, 0, 1}, /* TxD1 */ - {0, 20, 1, 0, 1}, /* TxD2 */ - {0, 21, 1, 0, 1}, /* TxD3 */ - {0, 27, 1, 0, 1}, /* TxER */ - {0, 30, 1, 0, 1}, /* TxEN */ - {3, 23, 2, 0, 1}, /* TxCLK->CLK3 */ - - {0, 22, 2, 0, 1}, /* RxD0 */ - {0, 23, 2, 0, 1}, /* RxD1 */ - {0, 24, 2, 0, 1}, /* RxD2 */ - {0, 25, 2, 0, 1}, /* RxD3 */ - {0, 26, 1, 0, 1}, /* RxER */ - {0, 28, 2, 0, 1}, /* Rx_DV */ - {3, 21, 2, 0, 1}, /* RxCLK->CLK16 */ - {0, 29, 2, 0, 1}, /* COL */ - {0, 31, 2, 0, 1}, /* CRS */ + {0, 18, 1, 0, 1, -1}, /* TxD0 */ + {0, 19, 1, 0, 1, -1}, /* TxD1 */ + {0, 20, 1, 0, 1, -1}, /* TxD2 */ + {0, 21, 1, 0, 1, -1}, /* TxD3 */ + {0, 27, 1, 0, 1, -1}, /* TxER */ + {0, 30, 1, 0, 1, -1}, /* TxEN */ + {3, 23, 2, 0, 1, -1}, /* TxCLK->CLK3 */ + + {0, 22, 2, 0, 1, -1}, /* RxD0 */ + {0, 23, 2, 0, 1, -1}, /* RxD1 */ + {0, 24, 2, 0, 1, -1}, /* RxD2 */ + {0, 25, 2, 0, 1, -1}, /* RxD3 */ + {0, 26, 1, 0, 1, -1}, /* RxER */ + {0, 28, 2, 0, 1, -1}, /* Rx_DV */ + {3, 21, 2, 0, 1, -1}, /* RxCLK->CLK16 */ + {0, 29, 2, 0, 1, -1}, /* COL */ + {0, 31, 2, 0, 1, -1}, /* CRS */ - {3, 4, 3, 0, 2}, /* MDIO */ - {3, 5, 1, 0, 2}, /* MDC */ + {3, 4, 3, 0, 2, -1}, /* MDIO */ + {3, 5, 1, 0, 2, -1}, /* MDC */ - {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ + {0, 0, 0, 0, QE_IOP_TAB_END, -1}, /* END of table */ }; int board_early_init_f(void) --- a/board/freescale/mpc832xemds/mpc832xemds.c 2008-03-28 01:49:12.000000000 +0200 +++ b/board/freescale/mpc832xemds/mpc832xemds.c 2008-03-30 15:57:01.040395000 +0300 @@ -31,47 +31,47 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { /* ETH3 */ - {1, 0, 1, 0, 1}, /* TxD0 */ - {1, 1, 1, 0, 1}, /* TxD1 */ - {1, 2, 1, 0, 1}, /* TxD2 */ - {1, 3, 1, 0, 1}, /* TxD3 */ - {1, 9, 1, 0, 1}, /* TxER */ - {1, 12, 1, 0, 1}, /* TxEN */ - {3, 24, 2, 0, 1}, /* TxCLK->CLK10 */ - - {1, 4, 2, 0, 1}, /* RxD0 */ - {1, 5, 2, 0, 1}, /* RxD1 */ - {1, 6, 2, 0, 1}, /* RxD2 */ - {1, 7, 2, 0, 1}, /* RxD3 */ - {1, 8, 2, 0, 1}, /* RxER */ - {1, 10, 2, 0, 1}, /* RxDV */ - {0, 13, 2, 0, 1}, /* RxCLK->CLK9 */ - {1, 11, 2, 0, 1}, /* COL */ - {1, 13, 2, 0, 1}, /* CRS */ + {1, 0, 1, 0, 1, -1}, /* TxD0 */ + {1, 1, 1, 0, 1, -1}, /* TxD1 */ + {1, 2, 1, 0, 1, -1}, /* TxD2 */ + {1, 3, 1, 0, 1, -1}, /* TxD3 */ + {1, 9, 1, 0, 1, -1}, /* TxER */ + {1, 12, 1, 0, 1, -1}, /* TxEN */ + {3, 24, 2, 0, 1, -1}, /* TxCLK->CLK10 */ + + {1, 4, 2, 0, 1, -1}, /* RxD0 */ + {1, 5, 2, 0, 1, -1}, /* RxD1 */ + {1, 6, 2, 0, 1, -1}, /* RxD2 */ + {1, 7, 2, 0, 1, -1}, /* RxD3 */ + {1, 8, 2, 0, 1, -1}, /* RxER */ + {1, 10, 2, 0, 1, -1}, /* RxDV */ + {0, 13, 2, 0, 1, -1}, /* RxCLK->CLK9 */ + {1, 11, 2, 0, 1, -1}, /* COL */ + {1, 13, 2, 0, 1, -1}, /* CRS */ /* ETH4 */ - {1, 18, 1, 0, 1}, /* TxD0 */ - {1, 19, 1, 0, 1}, /* TxD1 */ - {1, 20, 1, 0, 1}, /* TxD2 */ - {1, 21, 1, 0, 1}, /* TxD3 */ - {1, 27, 1, 0, 1}, /* TxER */ - {1, 30, 1, 0, 1}, /* TxEN */ - {3, 6, 2, 0, 1}, /* TxCLK->CLK8 */ - - {1, 22, 2, 0, 1}, /* RxD0 */ - {1, 23, 2, 0, 1}, /* RxD1 */ - {1, 24, 2, 0, 1}, /* RxD2 */ - {1, 25, 2, 0, 1}, /* RxD3 */ - {1, 26, 1, 0, 1}, /* RxER */ - {1, 28, 2, 0, 1}, /* Rx_DV */ - {3, 31, 2, 0, 1}, /* RxCLK->CLK7 */ - {1, 29, 2, 0, 1}, /* COL */ - {1, 31, 2, 0, 1}, /* CRS */ + {1, 18, 1, 0, 1, -1}, /* TxD0 */ + {1, 19, 1, 0, 1, -1}, /* TxD1 */ + {1, 20, 1, 0, 1, -1}, /* TxD2 */ + {1, 21, 1, 0, 1, -1}, /* TxD3 */ + {1, 27, 1, 0, 1, -1}, /* TxER */ + {1, 30, 1, 0, 1, -1}, /* TxEN */ + {3, 6, 2, 0, 1, -1}, /* TxCLK->CLK8 */ + + {1, 22, 2, 0, 1, -1}, /* RxD0 */ + {1, 23, 2, 0, 1, -1}, /* RxD1 */ + {1, 24, 2, 0, 1, -1}, /* RxD2 */ + {1, 25, 2, 0, 1, -1}, /* RxD3 */ + {1, 26, 1, 0, 1, -1}, /* RxER */ + {1, 28, 2, 0, 1, -1}, /* Rx_DV */ + {3, 31, 2, 0, 1, -1}, /* RxCLK->CLK7 */ + {1, 29, 2, 0, 1, -1}, /* COL */ + {1, 31, 2, 0, 1, -1}, /* CRS */ - {3, 4, 3, 0, 2}, /* MDIO */ - {3, 5, 1, 0, 2}, /* MDC */ + {3, 4, 3, 0, 2, -1}, /* MDIO */ + {3, 5, 1, 0, 2, -1}, /* MDC */ - {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ + {0, 0, 0, 0, QE_IOP_TAB_END, -1}, /* END of table */ }; int board_early_init_f(void) --- a/board/freescale/mpc8360emds/mpc8360emds.c 2008-03-28 01:49:12.000000000 +0200 +++ b/board/freescale/mpc8360emds/mpc8360emds.c 2008-03-30 15:57:20.682650000 +0300 @@ -30,63 +30,63 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { /* GETH1 */ - {0, 3, 1, 0, 1}, /* TxD0 */ - {0, 4, 1, 0, 1}, /* TxD1 */ - {0, 5, 1, 0, 1}, /* TxD2 */ - {0, 6, 1, 0, 1}, /* TxD3 */ - {1, 6, 1, 0, 3}, /* TxD4 */ - {1, 7, 1, 0, 1}, /* TxD5 */ - {1, 9, 1, 0, 2}, /* TxD6 */ - {1, 10, 1, 0, 2}, /* TxD7 */ - {0, 9, 2, 0, 1}, /* RxD0 */ - {0, 10, 2, 0, 1}, /* RxD1 */ - {0, 11, 2, 0, 1}, /* RxD2 */ - {0, 12, 2, 0, 1}, /* RxD3 */ - {0, 13, 2, 0, 1}, /* RxD4 */ - {1, 1, 2, 0, 2}, /* RxD5 */ - {1, 0, 2, 0, 2}, /* RxD6 */ - {1, 4, 2, 0, 2}, /* RxD7 */ - {0, 7, 1, 0, 1}, /* TX_EN */ - {0, 8, 1, 0, 1}, /* TX_ER */ - {0, 15, 2, 0, 1}, /* RX_DV */ - {0, 16, 2, 0, 1}, /* RX_ER */ - {0, 0, 2, 0, 1}, /* RX_CLK */ - {2, 9, 1, 0, 3}, /* GTX_CLK - CLK10 */ - {2, 8, 2, 0, 1}, /* GTX125 - CLK9 */ + {0, 3, 1, 0, 1, -1}, /* TxD0 */ + {0, 4, 1, 0, 1, -1}, /* TxD1 */ + {0, 5, 1, 0, 1, -1}, /* TxD2 */ + {0, 6, 1, 0, 1, -1}, /* TxD3 */ + {1, 6, 1, 0, 3, -1}, /* TxD4 */ + {1, 7, 1, 0, 1, -1}, /* TxD5 */ + {1, 9, 1, 0, 2, -1}, /* TxD6 */ + {1, 10, 1, 0, 2, -1}, /* TxD7 */ + {0, 9, 2, 0, 1, -1}, /* RxD0 */ + {0, 10, 2, 0, 1, -1}, /* RxD1 */ + {0, 11, 2, 0, 1, -1}, /* RxD2 */ + {0, 12, 2, 0, 1, -1}, /* RxD3 */ + {0, 13, 2, 0, 1, -1}, /* RxD4 */ + {1, 1, 2, 0, 2, -1}, /* RxD5 */ + {1, 0, 2, 0, 2, -1}, /* RxD6 */ + {1, 4, 2, 0, 2, -1}, /* RxD7 */ + {0, 7, 1, 0, 1, -1}, /* TX_EN */ + {0, 8, 1, 0, 1, -1}, /* TX_ER */ + {0, 15, 2, 0, 1, -1}, /* RX_DV */ + {0, 16, 2, 0, 1, -1}, /* RX_ER */ + {0, 0, 2, 0, 1, -1}, /* RX_CLK */ + {2, 9, 1, 0, 3, -1}, /* GTX_CLK - CLK10 */ + {2, 8, 2, 0, 1, -1}, /* GTX125 - CLK9 */ /* GETH2 */ - {0, 17, 1, 0, 1}, /* TxD0 */ - {0, 18, 1, 0, 1}, /* TxD1 */ - {0, 19, 1, 0, 1}, /* TxD2 */ - {0, 20, 1, 0, 1}, /* TxD3 */ - {1, 2, 1, 0, 1}, /* TxD4 */ - {1, 3, 1, 0, 2}, /* TxD5 */ - {1, 5, 1, 0, 3}, /* TxD6 */ - {1, 8, 1, 0, 3}, /* TxD7 */ - {0, 23, 2, 0, 1}, /* RxD0 */ - {0, 24, 2, 0, 1}, /* RxD1 */ - {0, 25, 2, 0, 1}, /* RxD2 */ - {0, 26, 2, 0, 1}, /* RxD3 */ - {0, 27, 2, 0, 1}, /* RxD4 */ - {1, 12, 2, 0, 2}, /* RxD5 */ - {1, 13, 2, 0, 3}, /* RxD6 */ - {1, 11, 2, 0, 2}, /* RxD7 */ - {0, 21, 1, 0, 1}, /* TX_EN */ - {0, 22, 1, 0, 1}, /* TX_ER */ - {0, 29, 2, 0, 1}, /* RX_DV */ - {0, 30, 2, 0, 1}, /* RX_ER */ - {0, 31, 2, 0, 1}, /* RX_CLK */ - {2, 2, 1, 0, 2}, /* GTX_CLK = CLK10 */ - {2, 3, 2, 0, 1}, /* GTX125 - CLK4 */ - - {0, 1, 3, 0, 2}, /* MDIO */ - {0, 2, 1, 0, 1}, /* MDC */ - - {5, 0, 1, 0, 2}, /* UART2_SOUT */ - {5, 1, 2, 0, 3}, /* UART2_CTS */ - {5, 2, 1, 0, 1}, /* UART2_RTS */ - {5, 3, 2, 0, 2}, /* UART2_SIN */ + {0, 17, 1, 0, 1, -1}, /* TxD0 */ + {0, 18, 1, 0, 1, -1}, /* TxD1 */ + {0, 19, 1, 0, 1, -1}, /* TxD2 */ + {0, 20, 1, 0, 1, -1}, /* TxD3 */ + {1, 2, 1, 0, 1, -1}, /* TxD4 */ + {1, 3, 1, 0, 2, -1}, /* TxD5 */ + {1, 5, 1, 0, 3, -1}, /* TxD6 */ + {1, 8, 1, 0, 3, -1}, /* TxD7 */ + {0, 23, 2, 0, 1, -1}, /* RxD0 */ + {0, 24, 2, 0, 1, -1}, /* RxD1 */ + {0, 25, 2, 0, 1, -1}, /* RxD2 */ + {0, 26, 2, 0, 1, -1}, /* RxD3 */ + {0, 27, 2, 0, 1, -1}, /* RxD4 */ + {1, 12, 2, 0, 2, -1}, /* RxD5 */ + {1, 13, 2, 0, 3, -1}, /* RxD6 */ + {1, 11, 2, 0, 2, -1}, /* RxD7 */ + {0, 21, 1, 0, 1, -1}, /* TX_EN */ + {0, 22, 1, 0, 1, -1}, /* TX_ER */ + {0, 29, 2, 0, 1, -1}, /* RX_DV */ + {0, 30, 2, 0, 1, -1}, /* RX_ER */ + {0, 31, 2, 0, 1, -1}, /* RX_CLK */ + {2, 2, 1, 0, 2, -1}, /* GTX_CLK = CLK10 */ + {2, 3, 2, 0, 1, -1}, /* GTX125 - CLK4 */ + + {0, 1, 3, 0, 2, -1}, /* MDIO */ + {0, 2, 1, 0, 1, -1}, /* MDC */ + + {5, 0, 1, 0, 2, -1}, /* UART2_SOUT */ + {5, 1, 2, 0, 3, -1}, /* UART2_CTS */ + {5, 2, 1, 0, 1, -1}, /* UART2_RTS */ + {5, 3, 2, 0, 2, -1}, /* UART2_SIN */ - {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ + {0, 0, 0, 0, QE_IOP_TAB_END, -1}, /* END of table */ }; int board_early_init_f(void) --- a/board/freescale/mpc8360erdk/mpc8360erdk.c 2008-03-28 01:49:12.000000000 +0200 +++ b/board/freescale/mpc8360erdk/mpc8360erdk.c 2008-03-30 15:57:40.425878000 +0300 @@ -26,165 +26,165 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { /* MDIO */ - {0, 1, 3, 0, 2}, /* MDIO */ - {0, 2, 1, 0, 1}, /* MDC */ + {0, 1, 3, 0, 2, -1}, /* MDIO */ + {0, 2, 1, 0, 1, -1}, /* MDC */ /* UCC1 - UEC (Gigabit) */ - {0, 3, 1, 0, 1}, /* TxD0 */ - {0, 4, 1, 0, 1}, /* TxD1 */ - {0, 5, 1, 0, 1}, /* TxD2 */ - {0, 6, 1, 0, 1}, /* TxD3 */ - {0, 9, 2, 0, 1}, /* RxD0 */ - {0, 10, 2, 0, 1}, /* RxD1 */ - {0, 11, 2, 0, 1}, /* RxD2 */ - {0, 12, 2, 0, 1}, /* RxD3 */ - {0, 7, 1, 0, 1}, /* TX_EN */ - {0, 8, 1, 0, 1}, /* TX_ER */ - {0, 15, 2, 0, 1}, /* RX_DV */ - {0, 0, 2, 0, 1}, /* RX_CLK */ - {2, 9, 1, 0, 3}, /* GTX_CLK - CLK10 */ - {2, 8, 2, 0, 1}, /* GTX125 - CLK9 */ + {0, 3, 1, 0, 1, -1}, /* TxD0 */ + {0, 4, 1, 0, 1, -1}, /* TxD1 */ + {0, 5, 1, 0, 1, -1}, /* TxD2 */ + {0, 6, 1, 0, 1, -1}, /* TxD3 */ + {0, 9, 2, 0, 1, -1}, /* RxD0 */ + {0, 10, 2, 0, 1, -1}, /* RxD1 */ + {0, 11, 2, 0, 1, -1}, /* RxD2 */ + {0, 12, 2, 0, 1, -1}, /* RxD3 */ + {0, 7, 1, 0, 1, -1}, /* TX_EN */ + {0, 8, 1, 0, 1, -1}, /* TX_ER */ + {0, 15, 2, 0, 1, -1}, /* RX_DV */ + {0, 0, 2, 0, 1, -1}, /* RX_CLK */ + {2, 9, 1, 0, 3, -1}, /* GTX_CLK - CLK10 */ + {2, 8, 2, 0, 1, -1}, /* GTX125 - CLK9 */ /* UCC2 - UEC (Gigabit) */ - {0, 17, 1, 0, 1}, /* TxD0 */ - {0, 18, 1, 0, 1}, /* TxD1 */ - {0, 19, 1, 0, 1}, /* TxD2 */ - {0, 20, 1, 0, 1}, /* TxD3 */ - {0, 23, 2, 0, 1}, /* RxD0 */ - {0, 24, 2, 0, 1}, /* RxD1 */ - {0, 25, 2, 0, 1}, /* RxD2 */ - {0, 26, 2, 0, 1}, /* RxD3 */ - {0, 21, 1, 0, 1}, /* TX_EN */ - {0, 22, 1, 0, 1}, /* TX_ER */ - {0, 29, 2, 0, 1}, /* RX_DV */ - {0, 31, 2, 0, 1}, /* RX_CLK */ - {2, 2, 1, 0, 2}, /* GTX_CLK - CLK10 */ - {2, 3, 2, 0, 1}, /* GTX125 - CLK4 */ + {0, 17, 1, 0, 1, -1}, /* TxD0 */ + {0, 18, 1, 0, 1, -1}, /* TxD1 */ + {0, 19, 1, 0, 1, -1}, /* TxD2 */ + {0, 20, 1, 0, 1, -1}, /* TxD3 */ + {0, 23, 2, 0, 1, -1}, /* RxD0 */ + {0, 24, 2, 0, 1, -1}, /* RxD1 */ + {0, 25, 2, 0, 1, -1}, /* RxD2 */ + {0, 26, 2, 0, 1, -1}, /* RxD3 */ + {0, 21, 1, 0, 1, -1}, /* TX_EN */ + {0, 22, 1, 0, 1, -1}, /* TX_ER */ + {0, 29, 2, 0, 1, -1}, /* RX_DV */ + {0, 31, 2, 0, 1, -1}, /* RX_CLK */ + {2, 2, 1, 0, 2, -1}, /* GTX_CLK - CLK10 */ + {2, 3, 2, 0, 1, -1}, /* GTX125 - CLK4 */ /* UCC7 - UEC */ - {4, 0, 1, 0, 1}, /* TxD0 */ - {4, 1, 1, 0, 1}, /* TxD1 */ - {4, 2, 1, 0, 1}, /* TxD2 */ - {4, 3, 1, 0, 1}, /* TxD3 */ - {4, 6, 2, 0, 1}, /* RxD0 */ - {4, 7, 2, 0, 1}, /* RxD1 */ - {4, 8, 2, 0, 1}, /* RxD2 */ - {4, 9, 2, 0, 1}, /* RxD3 */ - {4, 4, 1, 0, 1}, /* TX_EN */ - {4, 5, 1, 0, 1}, /* TX_ER */ - {4, 12, 2, 0, 1}, /* RX_DV */ - {4, 13, 2, 0, 1}, /* RX_ER */ - {4, 10, 2, 0, 1}, /* COL */ - {4, 11, 2, 0, 1}, /* CRS */ - {2, 18, 2, 0, 1}, /* TX_CLK - CLK19 */ - {2, 19, 2, 0, 1}, /* RX_CLK - CLK20 */ + {4, 0, 1, 0, 1, -1}, /* TxD0 */ + {4, 1, 1, 0, 1, -1}, /* TxD1 */ + {4, 2, 1, 0, 1, -1}, /* TxD2 */ + {4, 3, 1, 0, 1, -1}, /* TxD3 */ + {4, 6, 2, 0, 1, -1}, /* RxD0 */ + {4, 7, 2, 0, 1, -1}, /* RxD1 */ + {4, 8, 2, 0, 1, -1}, /* RxD2 */ + {4, 9, 2, 0, 1, -1}, /* RxD3 */ + {4, 4, 1, 0, 1, -1}, /* TX_EN */ + {4, 5, 1, 0, 1, -1}, /* TX_ER */ + {4, 12, 2, 0, 1, -1}, /* RX_DV */ + {4, 13, 2, 0, 1, -1}, /* RX_ER */ + {4, 10, 2, 0, 1, -1}, /* COL */ + {4, 11, 2, 0, 1, -1}, /* CRS */ + {2, 18, 2, 0, 1, -1}, /* TX_CLK - CLK19 */ + {2, 19, 2, 0, 1, -1}, /* RX_CLK - CLK20 */ /* UCC4 - UEC */ - {1, 14, 1, 0, 1}, /* TxD0 */ - {1, 15, 1, 0, 1}, /* TxD1 */ - {1, 16, 1, 0, 1}, /* TxD2 */ - {1, 17, 1, 0, 1}, /* TxD3 */ - {1, 20, 2, 0, 1}, /* RxD0 */ - {1, 21, 2, 0, 1}, /* RxD1 */ - {1, 22, 2, 0, 1}, /* RxD2 */ - {1, 23, 2, 0, 1}, /* RxD3 */ - {1, 18, 1, 0, 1}, /* TX_EN */ - {1, 19, 1, 0, 2}, /* TX_ER */ - {1, 26, 2, 0, 1}, /* RX_DV */ - {1, 27, 2, 0, 1}, /* RX_ER */ - {1, 24, 2, 0, 1}, /* COL */ - {1, 25, 2, 0, 1}, /* CRS */ - {2, 6, 2, 0, 1}, /* TX_CLK - CLK7 */ - {2, 7, 2, 0, 1}, /* RX_CLK - CLK8 */ + {1, 14, 1, 0, 1, -1}, /* TxD0 */ + {1, 15, 1, 0, 1, -1}, /* TxD1 */ + {1, 16, 1, 0, 1, -1}, /* TxD2 */ + {1, 17, 1, 0, 1, -1}, /* TxD3 */ + {1, 20, 2, 0, 1, -1}, /* RxD0 */ + {1, 21, 2, 0, 1, -1}, /* RxD1 */ + {1, 22, 2, 0, 1, -1}, /* RxD2 */ + {1, 23, 2, 0, 1, -1}, /* RxD3 */ + {1, 18, 1, 0, 1, -1}, /* TX_EN */ + {1, 19, 1, 0, 2, -1}, /* TX_ER */ + {1, 26, 2, 0, 1, -1}, /* RX_DV */ + {1, 27, 2, 0, 1, -1}, /* RX_ER */ + {1, 24, 2, 0, 1, -1}, /* COL */ + {1, 25, 2, 0, 1, -1}, /* CRS */ + {2, 6, 2, 0, 1, -1}, /* TX_CLK - CLK7 */ + {2, 7, 2, 0, 1, -1}, /* RX_CLK - CLK8 */ /* PCI1 */ - {5, 4, 2, 0, 3}, /* PCI_M66EN */ - {5, 5, 1, 0, 3}, /* PCI_INTA */ - {5, 6, 1, 0, 3}, /* PCI_RSTO */ - {5, 7, 3, 0, 3}, /* PCI_C_BE0 */ - {5, 8, 3, 0, 3}, /* PCI_C_BE1 */ - {5, 9, 3, 0, 3}, /* PCI_C_BE2 */ - {5, 10, 3, 0, 3}, /* PCI_C_BE3 */ - {5, 11, 3, 0, 3}, /* PCI_PAR */ - {5, 12, 3, 0, 3}, /* PCI_FRAME */ - {5, 13, 3, 0, 3}, /* PCI_TRDY */ - {5, 14, 3, 0, 3}, /* PCI_IRDY */ - {5, 15, 3, 0, 3}, /* PCI_STOP */ - {5, 16, 3, 0, 3}, /* PCI_DEVSEL */ - {5, 17, 0, 0, 0}, /* PCI_IDSEL */ - {5, 18, 3, 0, 3}, /* PCI_SERR */ - {5, 19, 3, 0, 3}, /* PCI_PERR */ - {5, 20, 3, 0, 3}, /* PCI_REQ0 */ - {5, 21, 2, 0, 3}, /* PCI_REQ1 */ - {5, 22, 2, 0, 3}, /* PCI_GNT2 */ - {5, 23, 3, 0, 3}, /* PCI_GNT0 */ - {5, 24, 1, 0, 3}, /* PCI_GNT1 */ - {5, 25, 1, 0, 3}, /* PCI_GNT2 */ - {5, 26, 0, 0, 0}, /* PCI_CLK0 */ - {5, 27, 0, 0, 0}, /* PCI_CLK1 */ - {5, 28, 0, 0, 0}, /* PCI_CLK2 */ - {5, 29, 0, 0, 3}, /* PCI_SYNC_OUT */ - {6, 0, 3, 0, 3}, /* PCI_AD0 */ - {6, 1, 3, 0, 3}, /* PCI_AD1 */ - {6, 2, 3, 0, 3}, /* PCI_AD2 */ - {6, 3, 3, 0, 3}, /* PCI_AD3 */ - {6, 4, 3, 0, 3}, /* PCI_AD4 */ - {6, 5, 3, 0, 3}, /* PCI_AD5 */ - {6, 6, 3, 0, 3}, /* PCI_AD6 */ - {6, 7, 3, 0, 3}, /* PCI_AD7 */ - {6, 8, 3, 0, 3}, /* PCI_AD8 */ - {6, 9, 3, 0, 3}, /* PCI_AD9 */ - {6, 10, 3, 0, 3}, /* PCI_AD10 */ - {6, 11, 3, 0, 3}, /* PCI_AD11 */ - {6, 12, 3, 0, 3}, /* PCI_AD12 */ - {6, 13, 3, 0, 3}, /* PCI_AD13 */ - {6, 14, 3, 0, 3}, /* PCI_AD14 */ - {6, 15, 3, 0, 3}, /* PCI_AD15 */ - {6, 16, 3, 0, 3}, /* PCI_AD16 */ - {6, 17, 3, 0, 3}, /* PCI_AD17 */ - {6, 18, 3, 0, 3}, /* PCI_AD18 */ - {6, 19, 3, 0, 3}, /* PCI_AD19 */ - {6, 20, 3, 0, 3}, /* PCI_AD20 */ - {6, 21, 3, 0, 3}, /* PCI_AD21 */ - {6, 22, 3, 0, 3}, /* PCI_AD22 */ - {6, 23, 3, 0, 3}, /* PCI_AD23 */ - {6, 24, 3, 0, 3}, /* PCI_AD24 */ - {6, 25, 3, 0, 3}, /* PCI_AD25 */ - {6, 26, 3, 0, 3}, /* PCI_AD26 */ - {6, 27, 3, 0, 3}, /* PCI_AD27 */ - {6, 28, 3, 0, 3}, /* PCI_AD28 */ - {6, 29, 3, 0, 3}, /* PCI_AD29 */ - {6, 30, 3, 0, 3}, /* PCI_AD30 */ - {6, 31, 3, 0, 3}, /* PCI_AD31 */ + {5, 4, 2, 0, 3, -1}, /* PCI_M66EN */ + {5, 5, 1, 0, 3, -1}, /* PCI_INTA */ + {5, 6, 1, 0, 3, -1}, /* PCI_RSTO */ + {5, 7, 3, 0, 3, -1}, /* PCI_C_BE0 */ + {5, 8, 3, 0, 3, -1}, /* PCI_C_BE1 */ + {5, 9, 3, 0, 3, -1}, /* PCI_C_BE2 */ + {5, 10, 3, 0, 3, -1}, /* PCI_C_BE3 */ + {5, 11, 3, 0, 3, -1}, /* PCI_PAR */ + {5, 12, 3, 0, 3, -1}, /* PCI_FRAME */ + {5, 13, 3, 0, 3, -1}, /* PCI_TRDY */ + {5, 14, 3, 0, 3, -1}, /* PCI_IRDY */ + {5, 15, 3, 0, 3, -1}, /* PCI_STOP */ + {5, 16, 3, 0, 3, -1}, /* PCI_DEVSEL */ + {5, 17, 0, 0, 0, -1}, /* PCI_IDSEL */ + {5, 18, 3, 0, 3, -1}, /* PCI_SERR */ + {5, 19, 3, 0, 3, -1}, /* PCI_PERR */ + {5, 20, 3, 0, 3, -1}, /* PCI_REQ0 */ + {5, 21, 2, 0, 3, -1}, /* PCI_REQ1 */ + {5, 22, 2, 0, 3, -1}, /* PCI_GNT2 */ + {5, 23, 3, 0, 3, -1}, /* PCI_GNT0 */ + {5, 24, 1, 0, 3, -1}, /* PCI_GNT1 */ + {5, 25, 1, 0, 3, -1}, /* PCI_GNT2 */ + {5, 26, 0, 0, 0, -1}, /* PCI_CLK0 */ + {5, 27, 0, 0, 0, -1}, /* PCI_CLK1 */ + {5, 28, 0, 0, 0, -1}, /* PCI_CLK2 */ + {5, 29, 0, 0, 3, -1}, /* PCI_SYNC_OUT */ + {6, 0, 3, 0, 3, -1}, /* PCI_AD0 */ + {6, 1, 3, 0, 3, -1}, /* PCI_AD1 */ + {6, 2, 3, 0, 3, -1}, /* PCI_AD2 */ + {6, 3, 3, 0, 3, -1}, /* PCI_AD3 */ + {6, 4, 3, 0, 3, -1}, /* PCI_AD4 */ + {6, 5, 3, 0, 3, -1}, /* PCI_AD5 */ + {6, 6, 3, 0, 3, -1}, /* PCI_AD6 */ + {6, 7, 3, 0, 3, -1}, /* PCI_AD7 */ + {6, 8, 3, 0, 3, -1}, /* PCI_AD8 */ + {6, 9, 3, 0, 3, -1}, /* PCI_AD9 */ + {6, 10, 3, 0, 3, -1}, /* PCI_AD10 */ + {6, 11, 3, 0, 3, -1}, /* PCI_AD11 */ + {6, 12, 3, 0, 3, -1}, /* PCI_AD12 */ + {6, 13, 3, 0, 3, -1}, /* PCI_AD13 */ + {6, 14, 3, 0, 3, -1}, /* PCI_AD14 */ + {6, 15, 3, 0, 3, -1}, /* PCI_AD15 */ + {6, 16, 3, 0, 3, -1}, /* PCI_AD16 */ + {6, 17, 3, 0, 3, -1}, /* PCI_AD17 */ + {6, 18, 3, 0, 3, -1}, /* PCI_AD18 */ + {6, 19, 3, 0, 3, -1}, /* PCI_AD19 */ + {6, 20, 3, 0, 3, -1}, /* PCI_AD20 */ + {6, 21, 3, 0, 3, -1}, /* PCI_AD21 */ + {6, 22, 3, 0, 3, -1}, /* PCI_AD22 */ + {6, 23, 3, 0, 3, -1}, /* PCI_AD23 */ + {6, 24, 3, 0, 3, -1}, /* PCI_AD24 */ + {6, 25, 3, 0, 3, -1}, /* PCI_AD25 */ + {6, 26, 3, 0, 3, -1}, /* PCI_AD26 */ + {6, 27, 3, 0, 3, -1}, /* PCI_AD27 */ + {6, 28, 3, 0, 3, -1}, /* PCI_AD28 */ + {6, 29, 3, 0, 3, -1}, /* PCI_AD29 */ + {6, 30, 3, 0, 3, -1}, /* PCI_AD30 */ + {6, 31, 3, 0, 3, -1}, /* PCI_AD31 */ /* NAND */ - {4, 18, 2, 0, 0}, /* NAND_RYnBY */ + {4, 18, 2, 0, 0, -1}, /* NAND_RYnBY */ /* DUART - UART2 */ - {5, 0, 1, 0, 2}, /* UART2_SOUT */ - {5, 2, 1, 0, 1}, /* UART2_RTS */ - {5, 3, 2, 0, 2}, /* UART2_SIN */ - {5, 1, 2, 0, 3}, /* UART2_CTS */ + {5, 0, 1, 0, 2, -1}, /* UART2_SOUT */ + {5, 2, 1, 0, 1, -1}, /* UART2_RTS */ + {5, 3, 2, 0, 2, -1}, /* UART2_SIN */ + {5, 1, 2, 0, 3, -1}, /* UART2_CTS */ /* UCC5 - UART3 */ - {3, 0, 1, 0, 1}, /* UART3_TX */ - {3, 4, 1, 0, 1}, /* UART3_RTS */ - {3, 6, 2, 0, 1}, /* UART3_RX */ - {3, 12, 2, 0, 0}, /* UART3_CTS */ - {3, 13, 2, 0, 0}, /* UCC5_CD */ + {3, 0, 1, 0, 1, -1}, /* UART3_TX */ + {3, 4, 1, 0, 1, -1}, /* UART3_RTS */ + {3, 6, 2, 0, 1, -1}, /* UART3_RX */ + {3, 12, 2, 0, 0, -1}, /* UART3_CTS */ + {3, 13, 2, 0, 0, -1}, /* UCC5_CD */ /* UCC6 - UART4 */ - {3, 14, 1, 0, 1}, /* UART4_TX */ - {3, 18, 1, 0, 1}, /* UART4_RTS */ - {3, 20, 2, 0, 1}, /* UART4_RX */ - {3, 26, 2, 0, 0}, /* UART4_CTS */ - {3, 27, 2, 0, 0}, /* UCC6_CD */ + {3, 14, 1, 0, 1, -1}, /* UART4_TX */ + {3, 18, 1, 0, 1, -1}, /* UART4_RTS */ + {3, 20, 2, 0, 1, -1}, /* UART4_RX */ + {3, 26, 2, 0, 0, -1}, /* UART4_CTS */ + {3, 27, 2, 0, 0, -1}, /* UCC6_CD */ /* Fujitsu MB86277 (MINT) graphics controller */ - {0, 30, 1, 0, 0}, /* nSRESET_GRAPHICS */ - {1, 5, 1, 0, 0}, /* nXRST_GRAPHICS */ - {1, 7, 1, 0, 0}, /* LVDS_BKLT_CTR */ - {2, 16, 1, 0, 0}, /* LVDS_BKLT_EN */ + {0, 30, 1, 0, 0, -1}, /* nSRESET_GRAPHICS */ + {1, 5, 1, 0, 0, -1}, /* nXRST_GRAPHICS */ + {1, 7, 1, 0, 0, -1}, /* LVDS_BKLT_CTR */ + {2, 16, 1, 0, 0, -1}, /* LVDS_BKLT_EN */ /* AD7843 ADC/Touchscreen controller */ {4, 14, 1, 0, 0}, /* SPI_nCS0 */ @@ -204,7 +204,7 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {4, 21, 1, 0, 0}, /* SUSPND */ /* END of table */ - {0, 0, 0, 0, QE_IOP_TAB_END}, + {0, 0, 0, 0, QE_IOP_TAB_END, -1}, }; int board_early_init_f(void) --- a/board/freescale/mpc8568mds/mpc8568mds.c 2008-03-28 01:49:12.000000000 +0200 +++ b/board/freescale/mpc8568mds/mpc8568mds.c 2008-03-30 15:57:57.592361000 +0300 @@ -37,64 +37,64 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { /* GETH1 */ - {4, 10, 1, 0, 2}, /* TxD0 */ - {4, 9, 1, 0, 2}, /* TxD1 */ - {4, 8, 1, 0, 2}, /* TxD2 */ - {4, 7, 1, 0, 2}, /* TxD3 */ - {4, 23, 1, 0, 2}, /* TxD4 */ - {4, 22, 1, 0, 2}, /* TxD5 */ - {4, 21, 1, 0, 2}, /* TxD6 */ - {4, 20, 1, 0, 2}, /* TxD7 */ - {4, 15, 2, 0, 2}, /* RxD0 */ - {4, 14, 2, 0, 2}, /* RxD1 */ - {4, 13, 2, 0, 2}, /* RxD2 */ - {4, 12, 2, 0, 2}, /* RxD3 */ - {4, 29, 2, 0, 2}, /* RxD4 */ - {4, 28, 2, 0, 2}, /* RxD5 */ - {4, 27, 2, 0, 2}, /* RxD6 */ - {4, 26, 2, 0, 2}, /* RxD7 */ - {4, 11, 1, 0, 2}, /* TX_EN */ - {4, 24, 1, 0, 2}, /* TX_ER */ - {4, 16, 2, 0, 2}, /* RX_DV */ - {4, 30, 2, 0, 2}, /* RX_ER */ - {4, 17, 2, 0, 2}, /* RX_CLK */ - {4, 19, 1, 0, 2}, /* GTX_CLK */ - {1, 31, 2, 0, 3}, /* GTX125 */ + {4, 10, 1, 0, 2, -1}, /* TxD0 */ + {4, 9, 1, 0, 2, -1}, /* TxD1 */ + {4, 8, 1, 0, 2, -1}, /* TxD2 */ + {4, 7, 1, 0, 2, -1}, /* TxD3 */ + {4, 23, 1, 0, 2, -1}, /* TxD4 */ + {4, 22, 1, 0, 2, -1}, /* TxD5 */ + {4, 21, 1, 0, 2, -1}, /* TxD6 */ + {4, 20, 1, 0, 2, -1}, /* TxD7 */ + {4, 15, 2, 0, 2, -1}, /* RxD0 */ + {4, 14, 2, 0, 2, -1}, /* RxD1 */ + {4, 13, 2, 0, 2, -1}, /* RxD2 */ + {4, 12, 2, 0, 2, -1}, /* RxD3 */ + {4, 29, 2, 0, 2, -1}, /* RxD4 */ + {4, 28, 2, 0, 2, -1}, /* RxD5 */ + {4, 27, 2, 0, 2, -1}, /* RxD6 */ + {4, 26, 2, 0, 2, -1}, /* RxD7 */ + {4, 11, 1, 0, 2, -1}, /* TX_EN */ + {4, 24, 1, 0, 2, -1}, /* TX_ER */ + {4, 16, 2, 0, 2, -1}, /* RX_DV */ + {4, 30, 2, 0, 2, -1}, /* RX_ER */ + {4, 17, 2, 0, 2, -1}, /* RX_CLK */ + {4, 19, 1, 0, 2, -1}, /* GTX_CLK */ + {1, 31, 2, 0, 3, -1}, /* GTX125 */ /* GETH2 */ - {5, 10, 1, 0, 2}, /* TxD0 */ - {5, 9, 1, 0, 2}, /* TxD1 */ - {5, 8, 1, 0, 2}, /* TxD2 */ - {5, 7, 1, 0, 2}, /* TxD3 */ - {5, 23, 1, 0, 2}, /* TxD4 */ - {5, 22, 1, 0, 2}, /* TxD5 */ - {5, 21, 1, 0, 2}, /* TxD6 */ - {5, 20, 1, 0, 2}, /* TxD7 */ - {5, 15, 2, 0, 2}, /* RxD0 */ - {5, 14, 2, 0, 2}, /* RxD1 */ - {5, 13, 2, 0, 2}, /* RxD2 */ - {5, 12, 2, 0, 2}, /* RxD3 */ - {5, 29, 2, 0, 2}, /* RxD4 */ - {5, 28, 2, 0, 2}, /* RxD5 */ - {5, 27, 2, 0, 3}, /* RxD6 */ - {5, 26, 2, 0, 2}, /* RxD7 */ - {5, 11, 1, 0, 2}, /* TX_EN */ - {5, 24, 1, 0, 2}, /* TX_ER */ - {5, 16, 2, 0, 2}, /* RX_DV */ - {5, 30, 2, 0, 2}, /* RX_ER */ - {5, 17, 2, 0, 2}, /* RX_CLK */ - {5, 19, 1, 0, 2}, /* GTX_CLK */ - {1, 31, 2, 0, 3}, /* GTX125 */ - {4, 6, 3, 0, 2}, /* MDIO */ - {4, 5, 1, 0, 2}, /* MDC */ + {5, 10, 1, 0, 2, -1}, /* TxD0 */ + {5, 9, 1, 0, 2, -1}, /* TxD1 */ + {5, 8, 1, 0, 2, -1}, /* TxD2 */ + {5, 7, 1, 0, 2, -1}, /* TxD3 */ + {5, 23, 1, 0, 2, -1}, /* TxD4 */ + {5, 22, 1, 0, 2, -1}, /* TxD5 */ + {5, 21, 1, 0, 2, -1}, /* TxD6 */ + {5, 20, 1, 0, 2, -1}, /* TxD7 */ + {5, 15, 2, 0, 2, -1}, /* RxD0 */ + {5, 14, 2, 0, 2, -1}, /* RxD1 */ + {5, 13, 2, 0, 2, -1}, /* RxD2 */ + {5, 12, 2, 0, 2, -1}, /* RxD3 */ + {5, 29, 2, 0, 2, -1}, /* RxD4 */ + {5, 28, 2, 0, 2, -1}, /* RxD5 */ + {5, 27, 2, 0, 3, -1}, /* RxD6 */ + {5, 26, 2, 0, 2, -1}, /* RxD7 */ + {5, 11, 1, 0, 2, -1}, /* TX_EN */ + {5, 24, 1, 0, 2, -1}, /* TX_ER */ + {5, 16, 2, 0, 2, -1}, /* RX_DV */ + {5, 30, 2, 0, 2, -1}, /* RX_ER */ + {5, 17, 2, 0, 2, -1}, /* RX_CLK */ + {5, 19, 1, 0, 2, -1}, /* GTX_CLK */ + {1, 31, 2, 0, 3, -1}, /* GTX125 */ + {4, 6, 3, 0, 2, -1}, /* MDIO */ + {4, 5, 1, 0, 2, -1}, /* MDC */ /* UART1 */ - {2, 0, 1, 0, 2}, /* UART_SOUT1 */ - {2, 1, 1, 0, 2}, /* UART_RTS1 */ - {2, 2, 2, 0, 2}, /* UART_CTS1 */ - {2, 3, 2, 0, 2}, /* UART_SIN1 */ + {2, 0, 1, 0, 2, -1}, /* UART_SOUT1 */ + {2, 1, 1, 0, 2, -1}, /* UART_RTS1 */ + {2, 2, 2, 0, 2, -1}, /* UART_CTS1 */ + {2, 3, 2, 0, 2, -1}, /* UART_SIN1 */ - {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ + {0, 0, 0, 0, QE_IOP_TAB_END, -1}, /* END of table */ }; --- a/common/Makefile 2008-03-28 01:49:12.000000000 +0200 +++ b/common/Makefile 2008-03-30 15:59:57.944754000 +0300 @@ -81,6 +81,7 @@ COBJS-$(CONFIG_CMD_NET) += cmd_net.o COBJS-y += cmd_nvedit.o COBJS-y += cmd_onenand.o COBJS-$(CONFIG_CMD_OTP) += cmd_otp.o +COBJS-$(CONFIG_CMD_PARIO) += cmd_pario.o ifdef CONFIG_PCI COBJS-$(CONFIG_CMD_PCI) += cmd_pci.o endif 0a1,85 --- /dev/null 2008-03-30 10:13:32.378222985 +0300 +++ b/common/cmd_pario.c 2008-03-30 16:00:43.124433000 +0300 @@ -0,0 +1,85 @@ +/* + * Copyright 2008 ECI Telecommunication. + * + * (C) Copyright 2008 David Saada <david.saada(a)ecitele.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <ioports.h> + +int do_pario (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +{ + char op; + int port, pin, data; + static char last_op; + static int last_port, last_pin, last_data; + + /* + * We use the last specified parameters, unless new ones are + * entered. + */ + op = last_op; + port = last_port; + pin = last_pin; + data = last_data; + + if ((flag & CMD_FLAG_REPEAT) == 0) { + op = argv[1][0]; + + if (argc >= 3) + port = simple_strtoul (argv[2], NULL, 10); + if (argc >= 4) + pin = simple_strtoul (argv[3], NULL, 10); + if (argc >= 5) + data = simple_strtoul (argv[4], NULL, 10); + } + + if (op == 'r') { + qe_read_iopin(port ,pin ,&data); + printf("%d\n", data); + } else if (op == 'w') { + qe_write_iopin(port ,pin ,data); + } else { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + /* + * Save the parameters for repeats. + */ + last_op = op; + last_port = port; + last_pin = pin; + last_data = data; + + return 0; +} + +/***************************************************/ + +U_BOOT_CMD( + pario, 5, 1, do_pario, + "pario - Parallel I/O utility commands\n", + "read <port> <pin> - read from port <port> (0-5) pin <pin> (0-31)\n" + "pario write <port> <pin> <data> - write to port <port> (0-5) pin <pin> (0-31)\n" +); + -- View this message in context: http://www.nabble.com/-PATCH--resubmit--QE-IO%3A-Add-initial-data-to-pin-co… Sent from the Uboot - Users mailing list archive at Nabble.com.

4 5

[U-Boot-Users] [PATCH 1/2] mpc85xx: use IS_E_PROCESSOR macro
by Kim Phillips 15 Jul '08

15 Jul '08

Signed-off-by: Kim Phillips <kim.phillips(a)freescale.com> --- as requested by galak. cpu/mpc85xx/cpu.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 2b7e753..a2b11cc 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -97,7 +97,7 @@ int checkcpu (void) if (cpu) { puts(cpu->name); - if (svr & 0x80000) + if (IS_E_PROCESSOR(svr)) puts("E"); } else { puts("Unknown"); -- 1.5.6.rc2.26.g8c37

2 1

[U-Boot-Users] [PATCH v2] Update Freescale sys_eeprom.c to handle CCID formats
by Timur Tabi 14 Jul '08

14 Jul '08

Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats. The NXID format replaces the older CCID format, but it's important to support both since most boards out there still use the CCID format. This change is in preparation for using one file to handle both formats. This will also unify EEPROM support for all Freescale 85xx and 86xx boards. Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR instead of ID_EEPROM_ADDR. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- This patch is the first in a series to clean up the MAC address determination in some of Freescale's board. The ultimate goal is to get rid of CONFIG_ETHADDR and related macros in the board header files. board/freescale/common/sys_eeprom.c | 754 ++++++++++++++++++++++------------- include/configs/MPC8610HPCD.h | 8 +- include/configs/MPC8641HPCN.h | 8 +- 3 files changed, 478 insertions(+), 292 deletions(-) rewrite board/freescale/common/sys_eeprom.c (78%) diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c dissimilarity index 78% index 8b13d06..d8631eb 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -1,284 +1,470 @@ -/* - * Copyright 2006 Freescale Semiconductor - * York Sun (yorksun(a)freescale.com) - * Haiying Wang (haiying.wang(a)freescale.com) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <command.h> -#include <i2c.h> -#include <linux/ctype.h> - -typedef struct { - u8 id[4]; /* 0x0000 - 0x0003 EEPROM Tag */ - u8 sn[12]; /* 0x0004 - 0x000F Serial Number */ - u8 errata[5]; /* 0x0010 - 0x0014 Errata Level */ - u8 date[6]; /* 0x0015 - 0x001a Build Date */ - u8 res_0; /* 0x001b Reserved */ - u8 version[4]; /* 0x001c - 0x001f Version */ - u8 tempcal[8]; /* 0x0020 - 0x0027 Temperature Calibration Factors*/ - u8 tempcalsys[2]; /* 0x0028 - 0x0029 System Temperature Calibration Factors*/ - u8 res_1[22]; /* 0x0020 - 0x003f Reserved */ - u8 mac_size; /* 0x0040 Mac table size */ - u8 mac_flag; /* 0x0041 Mac table flags */ - u8 mac[8][6]; /* 0x0042 - 0x0071 Mac addresses */ - u32 crc; /* 0x0072 crc32 checksum */ -} EEPROM_data; - -static EEPROM_data mac_data; - -int mac_show(void) -{ - int i; - u8 mac_size; - unsigned char ethaddr[8][18]; - unsigned char enetvar[32]; - - /* Show EEPROM tagID, - * always the four characters 'NXID'. - */ - printf("ID "); - for (i = 0; i < 4; i++) - printf("%c", mac_data.id[i]); - printf("\n"); - - /* Show Serial number, - * 0 to 11 charaters of errata information. - */ - printf("SN "); - for (i = 0; i < 12; i++) - printf("%c", mac_data.sn[i]); - printf("\n"); - - /* Show Errata Level, - * 0 to 4 characters of errata information. - */ - printf("Errata "); - for (i = 0; i < 5; i++) - printf("%c", mac_data.errata[i]); - printf("\n"); - - /* Show Build Date, - * BCD date values, as YYMMDDhhmmss. - */ - printf("Date 20%02x/%02x/%02x %02x:%02x:%02x\n", - mac_data.date[0], - mac_data.date[1], - mac_data.date[2], - mac_data.date[3], - mac_data.date[4], - mac_data.date[5]); - - /* Show MAC table size, - * Value from 0 to 7 indicating how many MAC - * addresses are stored in the system EEPROM. - */ - if((mac_data.mac_size > 0) && (mac_data.mac_size <= 8)) - mac_size = mac_data.mac_size; - else - mac_size = 8; /* Set the max size */ - printf("MACSIZE %x\n", mac_size); - - /* Show Mac addresses */ - for (i = 0; i < mac_size; i++) { - sprintf((char *)ethaddr[i], - "%02x:%02x:%02x:%02x:%02x:%02x", - mac_data.mac[i][0], - mac_data.mac[i][1], - mac_data.mac[i][2], - mac_data.mac[i][3], - mac_data.mac[i][4], - mac_data.mac[i][5]); - printf("MAC %d %s\n", i, ethaddr[i]); - - sprintf((char *)enetvar, - i ? "eth%daddr" : "ethaddr", i); - setenv((char *)enetvar, (char *)ethaddr[i]); - - } - - return 0; -} - -int mac_read(void) -{ - int ret, length; - unsigned int crc = 0; - unsigned char dev = ID_EEPROM_ADDR, *data; - - length = sizeof(EEPROM_data); - ret = i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length); - if (ret) { - printf("Read failed.\n"); - return -1; - } - - data = (unsigned char *)(&mac_data); - printf("Check CRC on reading ..."); - crc = crc32(crc, data, length - 4); - if (crc != mac_data.crc) { - printf("CRC checksum is invalid, in EEPROM CRC is %x, calculated CRC is %x\n", - mac_data.crc, crc); - return -1; - } else { - printf("CRC OK\n"); - mac_show(); - } - return 0; -} - -int mac_prog(void) -{ - int ret, i, length; - unsigned int crc = 0; - unsigned char dev = ID_EEPROM_ADDR, *ptr; - unsigned char *eeprom_data = (unsigned char *)(&mac_data); - - mac_data.res_0 = 0; - memset((void *)mac_data.res_1, 0, sizeof(mac_data.res_1)); - - length = sizeof(EEPROM_data); - crc = crc32(crc, eeprom_data, length - 4); - mac_data.crc = crc; - for (i = 0, ptr = eeprom_data; i < length; i += 8, ptr += 8) { - ret = i2c_write(dev, i, 1, ptr, min((length - i),8)); - udelay(5000); /* 5ms write cycle timing */ - if (ret) - break; - } - if (ret) { - printf("Programming failed.\n"); - return -1; - } else { - printf("Programming %d bytes. Reading back ...\n", length); - mac_read(); - } - return 0; -} - -int do_mac(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -{ - int i; - char cmd = 's'; - unsigned long long mac_val; - - if (i2c_probe(ID_EEPROM_ADDR) != 0) - return -1; - - if (argc > 1) { - cmd = argv[1][0]; - switch (cmd) { - case 'r': /* display */ - mac_read(); - break; - case 's': /* save */ - mac_prog(); - break; - case 'i': /* id */ - for (i = 0; i < 4; i++) { - mac_data.id[i] = argv[2][i]; - } - break; - case 'n': /* serial number */ - for (i = 0; i < 12; i++) { - mac_data.sn[i] = argv[2][i]; - } - break; - case 'e': /* errata */ - for (i = 0; i < 5; i++) { - mac_data.errata[i] = argv[2][i]; - } - break; - case 'd': /* date */ - mac_val = simple_strtoull(argv[2], NULL, 16); - for (i = 0; i < 6; i++) { - mac_data.date[i] = (mac_val >> (40 - 8 * i)); - } - break; - case 'p': /* mac table size */ - mac_data.mac_size = - (unsigned char)simple_strtoul(argv[2], NULL, 16); - break; - case '0': /* mac 0 */ - case '1': /* mac 1 */ - case '2': /* mac 2 */ - case '3': /* mac 3 */ - case '4': /* mac 4 */ - case '5': /* mac 5 */ - case '6': /* mac 6 */ - case '7': /* mac 7 */ - mac_val = simple_strtoull(argv[2], NULL, 16); - for (i = 0; i < 6; i++) { - mac_data.mac[cmd - '0'][i] = - *((unsigned char *) - (((unsigned int)(&mac_val)) + i + 2)); - } - break; - case 'h': /* help */ - default: - printf("Usage:\n%s\n", cmdtp->usage); - break; - } - } else { - mac_show(); - } - return 0; -} - -int mac_read_from_eeprom(void) -{ - int length, i; - unsigned char dev = ID_EEPROM_ADDR; - unsigned char *data; - unsigned char ethaddr[4][18]; - unsigned char enetvar[32]; - unsigned int crc = 0; - - length = sizeof(EEPROM_data); - if (i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length)) { - printf("Read failed.\n"); - return -1; - } - - data = (unsigned char *)(&mac_data); - crc = crc32(crc, data, length - 4); - if (crc != mac_data.crc) { - return -1; - } else { - for (i = 0; i < 4; i++) { - if (memcmp(&mac_data.mac[i], "\0\0\0\0\0\0", 6)) { - sprintf((char *)ethaddr[i], - "%02x:%02x:%02x:%02x:%02x:%02x", - mac_data.mac[i][0], - mac_data.mac[i][1], - mac_data.mac[i][2], - mac_data.mac[i][3], - mac_data.mac[i][4], - mac_data.mac[i][5]); - sprintf((char *)enetvar, - i ? "eth%daddr" : "ethaddr", - i); - setenv((char *)enetvar, (char *)ethaddr[i]); - } - } - } - return 0; -} +/* + * Copyright 2006, 2008 Freescale Semiconductor + * York Sun (yorksun(a)freescale.com) + * Haiying Wang (haiying.wang(a)freescale.com) + * Timur Tabi (timur(a)freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <i2c.h> +#include <linux/ctype.h> + +#include "../common/eeprom.h" + +#if !defined(CFG_I2C_EEPROM_CCID) && !defined(CFG_I2C_EEPROM_NXID) +#error "Please define either CFG_I2C_EEPROM_CCID or CFG_I2C_EEPROM_NXID" +#endif + +/** + * static eeprom: EEPROM layout for CCID or NXID formats + * + * See application note AN3638 for details. + */ +static struct __attribute__ ((__packed__)) eeprom { +#ifdef CFG_I2C_EEPROM_CCID + u8 id[4]; /* 0x00 - 0x03 EEPROM Tag 'CCID' */ + u8 major; /* 0x04 Board revision, major */ + u8 minor; /* 0x05 Board revision, minor */ + u8 sn[10]; /* 0x06 - 0x0F Serial Number*/ + u8 errata[2]; /* 0x10 - 0x11 Errata Level */ + u8 date[6]; /* 0x12 - 0x17 Build Date */ + u8 res_0[40]; /* 0x18 - 0x3f Reserved */ + u8 mac_count; /* 0x40 Number of MAC addresses */ + u8 mac_flag; /* 0x41 MAC table flags */ + u8 mac[8][6]; /* 0x42 - 0x71 MAC addresses */ + u32 crc; /* 0x72 CRC32 checksum */ +#endif +#ifdef CFG_I2C_EEPROM_NXID + u8 id[4]; /* 0x00 - 0x03 EEPROM Tag 'NXID' */ + u8 sn[12]; /* 0x04 - 0x0F Serial Number */ + u8 errata[5]; /* 0x10 - 0x14 Errata Level */ + u8 date[6]; /* 0x15 - 0x1a Build Date */ + u8 res_0; /* 0x1b Reserved */ + u32 version; /* 0x1c - 0x1f NXID Version */ + u8 tempcal[8]; /* 0x20 - 0x27 Temperature Calibration Factors */ + u8 tempcalsys[2]; /* 0x28 - 0x29 System Temperature Calibration Factors */ + u8 tempcalflags; /* 0x2a Temperature Calibration Flags */ + u8 res_1[21]; /* 0x2b - 0x3f Reserved */ + u8 mac_count; /* 0x40 Number of MAC addresses */ + u8 mac_flag; /* 0x41 MAC table flags */ + u8 mac[8][6]; /* 0x42 - 0x71 MAC addresses */ + u32 crc; /* 0x72 CRC32 checksum */ +#endif +} e; + +/* Set to 1 if we've read EEPROM into memory */ +static int has_been_read = 0; + +#ifdef CFG_I2C_EEPROM_NXID +/* Is this a valid NXID EEPROM? */ +#define is_valid (*((u32 *)e.id) == (('N' << 24) | ('X' << 16) | ('I' << 8) | 'D')) +#endif + +#ifdef CFG_I2C_EEPROM_CCID +/* Is this a valid CCID EEPROM? */ +#define is_valid (*((u32 *)e.id) == (('C' << 24) | ('C' << 16) | ('I' << 8) | 'D')) +#endif + +/** + * show_eeprom - display the contents of the EEPROM + */ +static void show_eeprom(void) +{ + int i; + unsigned int crc; + + /* EEPROM tag ID, either CCID or NXID */ +#ifdef CFG_I2C_EEPROM_NXID + printf("ID: %c%c%c%c v%u\n", e.id[0], e.id[1], e.id[2], e.id[3], + be32_to_cpu(e.version)); +#else + printf("ID: %c%c%c%c\n", e.id[0], e.id[1], e.id[2], e.id[3]); +#endif + + /* Serial number */ + printf("SN: %s\n", e.sn); + + /* Errata level. */ +#ifdef CFG_I2C_EEPROM_NXID + printf("Errata: %s\n", e.errata); +#else + printf("Errata: %c%c\n", + e.errata[0] ? e.errata[0] : '.', + e.errata[1] ? e.errata[1] : '.'); +#endif + + /* Build date, BCD date values, as YYMMDDhhmmss */ + printf("Build date: 20%02x/%02x/%02x %02x:%02x:%02x %s\n", + e.date[0], e.date[1], e.date[2], + e.date[3] & 0x7F, e.date[4], e.date[5], + e.date[3] & 0x80 ? "PM" : ""); + + /* Show MAC addresses */ + for (i = 0; i < min(e.mac_count, 8); i++) { + u8 *p = e.mac[i]; + + printf("Eth%u: %02x:%02x:%02x:%02x:%02x:%02x\n", i, + p[0], p[1], p[2], p[3], p[4], p[5]); + } + + crc = crc32(0, (void *)&e, sizeof(e) - 4); + + if (crc == be32_to_cpu(e.crc)) + printf("CRC: %08x\n", be32_to_cpu(e.crc)); + else + printf("CRC: %08x (should be %08x)\n", + be32_to_cpu(e.crc), crc); + +#ifdef DEBUG + printf("EEPROM dump: (0x%x bytes)\n", sizeof(e)); + for (i = 0; i < sizeof(e); i++) { + if ((i % 16) == 0) + printf("%02X: ", i); + printf("%02X ", ((u8 *)&e)[i]); + if (((i % 16) == 15) || (i == sizeof(e) - 1)) + printf("\n"); + } +#endif +} + +/** + * read_eeprom - read the EEPROM into memory + */ +static int read_eeprom(void) +{ + int ret; +#ifdef CFG_EEPROM_BUS_NUM + unsigned int bus; +#endif + + if (has_been_read) + return 0; + +#ifdef CFG_EEPROM_BUS_NUM + bus = i2c_get_bus_num(); + i2c_set_bus_num(CFG_EEPROM_BUS_NUM); +#endif + + ret = i2c_read(CFG_I2C_EEPROM_ADDR, 0, CFG_I2C_EEPROM_ADDR_LEN, + (void *)&e, sizeof(e)); + +#ifdef CFG_EEPROM_BUS_NUM + i2c_set_bus_num(bus); +#endif + +#ifdef DEBUG + show_eeprom(); +#endif + + has_been_read = (ret == 0) ? 1 : 0; + + return ret; +} + +/** + * prog_eeprom - write the EEPROM from memory + */ +static int prog_eeprom(void) +{ + int ret, i, length; + unsigned int crc; + void *p; +#ifdef CFG_EEPROM_BUS_NUM + unsigned int bus; +#endif + + /* Set the reserved values to 0xFF */ +#ifdef CFG_I2C_EEPROM_NXID + e.res_0 = 0xFF; + memset(e.res_1, 0xFF, sizeof(e.res_1)); +#else + memset(e.res_0, 0xFF, sizeof(e.res_0)); +#endif + + length = sizeof(e); + crc = crc32(0, (void *)&e, length - 4); + e.crc = cpu_to_be32(crc); + +#ifdef CFG_EEPROM_BUS_NUM + bus = i2c_get_bus_num(); + i2c_set_bus_num(CFG_EEPROM_BUS_NUM); +#endif + + for (i = 0, p = &e; i < length; i += 8, p += 8) { + ret = i2c_write(CFG_I2C_EEPROM_ADDR, i, CFG_I2C_EEPROM_ADDR_LEN, + p, min((length - i), 8)); + if (ret) + break; + udelay(5000); /* 5ms write cycle timing */ + } + +#ifdef CFG_EEPROM_BUS_NUM + i2c_set_bus_num(bus); +#endif + + if (ret) { + printf("Programming failed.\n"); + return -1; + } + + printf("Programming passed.\n"); + return 0; +} + +/** + * h2i - converts hex character into a number + * + * This function takes a hexadecimal character (e.g. '7' or 'C') and returns + * the integer equivalent. + */ +static inline u8 h2i(char p) +{ + if ((p >= '0') && (p <= '9')) + return p - '0'; + + if ((p >= 'A') && (p <= 'F')) + return (p - 'A') + 10; + + if ((p >= 'a') && (p <= 'f')) + return (p - 'a') + 10; + + return 0; +} + +/** + * set_date - stores the build date into the EEPROM + * + * This function takes a pointer to a string in the format "YYMMDDhhmmss" + * (2-digit year, 2-digit month, etc), converts it to a 6-byte BCD string, + * and stores it in the build date field of the EEPROM local copy. + */ +static void set_date(const char *string) +{ + unsigned int i; + + if (strlen(string) != 12) { + printf("Usage: mac date YYMMDDhhmmss\n"); + return; + } + + for (i = 0; i < 6; i++) + e.date[i] = h2i(string[2 * i]) << 4 | h2i(string[2 * i + 1]); +} + +/** + * set_mac_address - stores a MAC address into the EEPROM + * + * This function takes a pointer to MAC address string + * (i.e."XX:XX:XX:XX:XX:XX", where "XX" is a two-digit hex number) and + * stores it in one of the MAC address fields of the EEPROM local copy. + */ +static void set_mac_address(unsigned int index, const char *string) +{ + char *p = (char *) string; + unsigned int i; + + if (!string) { + printf("Usage: mac <n> XX:XX:XX:XX:XX:XX\n"); + return; + } + + for (i = 0; *p && (i < 6); i++) { + e.mac[index][i] = simple_strtoul(p, &p, 16); + if (*p == ':') + p++; + } +} + +int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + char cmd; + + if (argc == 1) { + show_eeprom(); + return 0; + } + + cmd = argv[1][0]; + + if (cmd == 'r') { + read_eeprom(); + return 0; + } + + if ((cmd == 'i') && (argc > 2)) { + for (i = 0; i < 4; i++) + e.id[i] = argv[2][i]; + return 0; + } + + if (!is_valid) { + printf("Please read the EEPROM ('r') and/or set the ID ('i') first.\n"); + return 0; + } + + if (argc == 2) { + switch (cmd) { + case 's': /* save */ + prog_eeprom(); + break; + default: + printf("Usage:\n%s\n", cmdtp->usage); + break; + } + + return 0; + } + + /* We know we have at least one parameter */ + + switch (cmd) { + case 'n': /* serial number */ + memset(e.sn, 0, sizeof(e.sn)); + strncpy((char *)e.sn, argv[2], sizeof(e.sn) - 1); + break; + case 'e': /* errata */ +#ifdef CFG_I2C_EEPROM_NXID + memset(e.errata, 0, 5); + strncpy((char *)e.errata, argv[2], 4); +#else + e.errata[0] = argv[2][0]; + e.errata[1] = argv[2][1]; +#endif + break; + case 'd': /* date BCD format YYMMDDhhmmss */ + set_date(argv[2]); + break; + case 'p': /* MAC table size */ + e.mac_count = simple_strtoul(argv[2], NULL, 16); + break; + case '0' ... '7': /* "mac 0" through "mac 7" */ + set_mac_address(cmd - '0', argv[2]); + break; + case 'h': /* help */ + default: + printf("Usage:\n%s\n", cmdtp->usage); + break; + } + + return 0; +} + +/** + * mac_read_from_eeprom - read the MAC addresses from EEPROM + * + * This function reads the MAC addresses from EEPROM and sets the + * appropriate environment variables for each one read. + * + * The environment variables are only set if they haven't been set already. + * This ensures that any user-saved variables are never overwritten. + * + * This function must be called after relocation. + */ +int mac_read_from_eeprom(void) +{ + unsigned int i; + + if (read_eeprom()) { + printf("Read failed.\n"); + return -1; + } + + if (!is_valid) { + printf("Invalid ID (%02x %02x %02x %02x)\n", e.id[0], e.id[1], e.id[2], e.id[3]); + return -1; + } + + if (be32_to_cpu(e.crc) != 0xFFFFFFFF) { + u32 crc = crc32(0, (void *)&e, sizeof(e) - 4); + + if (crc != be32_to_cpu(e.crc)) { + printf("CRC mismatch (%08x != %08x).\n", crc, + be32_to_cpu(e.crc)); + return -1; + } + } + + for (i = 0; i < min(4, e.mac_count); i++) { + if (memcmp(&e.mac[i], "\0\0\0\0\0\0", 6) && + memcmp(&e.mac[i], "\xFF\xFF\xFF\xFF\xFF\xFF", 6)) { + char ethaddr[18]; + char enetvar[9]; + + sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X", + e.mac[i][0], + e.mac[i][1], + e.mac[i][2], + e.mac[i][3], + e.mac[i][4], + e.mac[i][5]); + sprintf(enetvar, i ? "eth%daddr" : "ethaddr", i); + /* Only initialize environment variables that are blank + * (i.e. have not yet been set) + */ + if (!getenv(enetvar)) + setenv(enetvar, ethaddr); + } + } + + return 0; +} + +#ifdef CFG_I2C_EEPROM_CCID + +/** + * get_cpu_board_revision - get the CPU board revision on 85xx boards + * + * Read the EEPROM to determine the board revision. + * + * This function is called before relocation, so we need to read a private + * copy of the EEPROM into a local variable on the stack. + * + * Also, we assume that CFG_EEPROM_BUS_NUM == CFG_SPD_BUS_NUM. The global + * variable i2c_bus_num must be compile-time initialized to CFG_SPD_BUS_NUM, + * so that the SPD code will work. This means that all pre-relocation I2C + * operations can only occur on the CFG_SPD_BUS_NUM bus. So if + * CFG_EEPROM_BUS_NUM != CFG_SPD_BUS_NUM, then we can't read the EEPROM when + * this function is called. Oh well. + */ +unsigned int get_cpu_board_revision(void) +{ + struct board_eeprom { + u32 id; /* 0x00 - 0x03 EEPROM Tag 'CCID' */ + u8 major; /* 0x04 Board revision, major */ + u8 minor; /* 0x05 Board revision, minor */ + } be; + + i2c_read(CFG_I2C_EEPROM_ADDR, 0, CFG_I2C_EEPROM_ADDR_LEN, + (void *)&be, sizeof(be)); + + if (be.id != (('C' << 24) | ('C' << 16) | ('I' << 8) | 'D')) + return MPC85XX_CPU_BOARD_REV(0, 0); + + if ((be.major == 0xff) && (be.minor == 0xff)) + return MPC85XX_CPU_BOARD_REV(0, 0); + + return MPC85XX_CPU_BOARD_REV(e.major, e.minor); +} + +#endif + diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 15ff0ea..0f2f3da 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -141,11 +141,11 @@ #endif #endif -#define CFG_ID_EEPROM -#ifdef CFG_ID_EEPROM #define CONFIG_ID_EEPROM -#endif -#define ID_EEPROM_ADDR 0x57 +#define CFG_I2C_EEPROM_NXID +#define CFG_ID_EEPROM +#define CFG_I2C_EEPROM_ADDR 0x57 +#define CFG_I2C_EEPROM_ADDR_LEN 1 #define CFG_FLASH_BASE 0xf0000000 /* start of FLASH 128M */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 9acc3da..1302e3e 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -152,11 +152,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_DDR_CS5_BNDS 0x00000FFF /* Not done */ #endif -#define CFG_ID_EEPROM 1 -#ifdef CFG_ID_EEPROM #define CONFIG_ID_EEPROM -#endif -#define ID_EEPROM_ADDR 0x57 +#define CFG_I2C_EEPROM_NXID +#define CFG_ID_EEPROM +#define CFG_I2C_EEPROM_ADDR 0x57 +#define CFG_I2C_EEPROM_ADDR_LEN 1 /* * In MPC8641HPCN, allocate 16MB flash spaces at fe000000 and ff000000. -- 1.5.5

3 8

[U-Boot-Users] [PATCH] MMC: Consolidate MMC/SD command definitions
by Haavard Skinnemoen 13 Jul '08

13 Jul '08

This moves the MMC and SD Card command definitions from include/asm/arch/mmc.h into include/mmc.h. These definitions are given by the MMC and SD Card standards, not by any particular architecture. There's a lot more room for consolidation in the MMC drivers which I'm hoping to get done eventually, but this patch is a start. Compile-tested for all avr32 boards as well as lpc2292sodimm and lubbock. This should cover all three mmc drivers in the tree. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen(a)atmel.com> --- cpu/at32ap/atmel_mci.c | 4 ++-- cpu/pxa/mmc.c | 8 ++++---- include/asm-arm/arch-pxa/mmc.h | 17 ----------------- include/asm-avr32/arch-at32ap700x/mmc.h | 19 ------------------- include/mmc.h | 24 ++++++++++++++++++++++++ 5 files changed, 30 insertions(+), 42 deletions(-) diff --git a/cpu/at32ap/atmel_mci.c b/cpu/at32ap/atmel_mci.c index f59dfb5..92f5a28 100644 --- a/cpu/at32ap/atmel_mci.c +++ b/cpu/at32ap/atmel_mci.c @@ -350,7 +350,7 @@ static int sd_init_card(struct mmc_cid *cid, int verbose) mmc_idle_cards(); for (i = 0; i < 1000; i++) { - ret = mmc_acmd(MMC_ACMD_SD_SEND_OP_COND, CFG_MMC_OP_COND, + ret = mmc_acmd(SD_CMD_APP_SEND_OP_COND, CFG_MMC_OP_COND, resp, R3 | NID); if (ret || (resp[0] & 0x80000000)) break; @@ -368,7 +368,7 @@ static int sd_init_card(struct mmc_cid *cid, int verbose) mmc_dump_cid(cid); /* Get RCA of the card that responded */ - ret = mmc_cmd(MMC_CMD_SD_SEND_RELATIVE_ADDR, 0, resp, R6 | NCR); + ret = mmc_cmd(SD_CMD_SEND_RELATIVE_ADDR, 0, resp, R6 | NCR); if (ret) return ret; diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index 039ce0f..bf48954 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -119,7 +119,7 @@ mmc_block_read(uchar * dst, ulong src, ulong len) MMC_RDTO = 0xffff; MMC_NOB = 1; MMC_BLKLEN = len; - mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl, + mmc_cmd(MMC_CMD_READ_SINGLE_BLOCK, argh, argl, MMC_CMDAT_R1 | MMC_CMDAT_READ | MMC_CMDAT_BLOCK | MMC_CMDAT_DATA_EN); @@ -568,7 +568,7 @@ mmc_init(int verbose) MMC_SPI = MMC_SPI_DISABLE; /* reset */ - mmc_cmd(MMC_CMD_RESET, 0, 0, MMC_CMDAT_INIT | MMC_CMDAT_R0); + mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, 0, MMC_CMDAT_INIT | MMC_CMDAT_R0); udelay(200000); retries = 3; while (retries--) { @@ -578,7 +578,7 @@ mmc_init(int verbose) break; } - resp = mmc_cmd(SD_CMD_APP_OP_COND, 0x0020, 0, MMC_CMDAT_R3 | (retries < 2 ? 0 : MMC_CMDAT_INIT)); /* Select 3.2-3.3 and 3.3-3.4V */ + resp = mmc_cmd(SD_CMD_APP_SEND_OP_COND, 0x0020, 0, MMC_CMDAT_R3 | (retries < 2 ? 0 : MMC_CMDAT_INIT)); /* Select 3.2-3.3 and 3.3-3.4V */ if (resp[0] & 0x80000000) { mmc_dev.if_type = IF_TYPE_SD; debug("Detected SD card\n"); @@ -616,7 +616,7 @@ mmc_init(int verbose) memcpy(cid_resp, resp, sizeof(cid_resp)); /* MMC exists, get CSD too */ - resp = mmc_cmd(MMC_CMD_SET_RCA, 0, 0, MMC_CMDAT_R1); + resp = mmc_cmd(MMC_CMD_SET_RELATIVE_ADDR, 0, 0, MMC_CMDAT_R1); if (IF_TYPE_SD == mmc_dev.if_type) rca = ((resp[0] & 0xffff0000) >> 16); resp = mmc_cmd(MMC_CMD_SEND_CSD, rca, 0, MMC_CMDAT_R2); diff --git a/include/asm-arm/arch-pxa/mmc.h b/include/asm-arm/arch-pxa/mmc.h index b9304b1..9954680 100644 --- a/include/asm-arm/arch-pxa/mmc.h +++ b/include/asm-arm/arch-pxa/mmc.h @@ -110,23 +110,6 @@ #define MMC_DEFAULT_RCA 1 #define MMC_BLOCK_SIZE 512 -#define MMC_CMD_RESET 0 -#define MMC_CMD_SEND_OP_COND 1 -#define MMC_CMD_ALL_SEND_CID 2 -#define MMC_CMD_SET_RCA 3 -#define MMC_CMD_SELECT_CARD 7 -#define MMC_CMD_SEND_CSD 9 -#define MMC_CMD_SEND_CID 10 -#define MMC_CMD_SEND_STATUS 13 -#define MMC_CMD_SET_BLOCKLEN 16 -#define MMC_CMD_READ_BLOCK 17 -#define MMC_CMD_RD_BLK_MULTI 18 -#define MMC_CMD_WRITE_BLOCK 24 -#define MMC_CMD_APP_CMD 55 - -#define SD_CMD_APP_SET_BUS_WIDTH 6 -#define SD_CMD_APP_OP_COND 41 - #define MMC_MAX_BLOCK_SIZE 512 #define MMC_R1_IDLE_STATE 0x01 diff --git a/include/asm-avr32/arch-at32ap700x/mmc.h b/include/asm-avr32/arch-at32ap700x/mmc.h index fcfbbb3..9caba91 100644 --- a/include/asm-avr32/arch-at32ap700x/mmc.h +++ b/include/asm-avr32/arch-at32ap700x/mmc.h @@ -71,25 +71,6 @@ struct mmc_csd u8 one:1; }; -/* MMC Command numbers */ -#define MMC_CMD_GO_IDLE_STATE 0 -#define MMC_CMD_SEND_OP_COND 1 -#define MMC_CMD_ALL_SEND_CID 2 -#define MMC_CMD_SET_RELATIVE_ADDR 3 -#define MMC_CMD_SD_SEND_RELATIVE_ADDR 3 -#define MMC_CMD_SET_DSR 4 -#define MMC_CMD_SELECT_CARD 7 -#define MMC_CMD_SEND_CSD 9 -#define MMC_CMD_SEND_CID 10 -#define MMC_CMD_SEND_STATUS 13 -#define MMC_CMD_SET_BLOCKLEN 16 -#define MMC_CMD_READ_SINGLE_BLOCK 17 -#define MMC_CMD_READ_MULTIPLE_BLOCK 18 -#define MMC_CMD_WRITE_BLOCK 24 -#define MMC_CMD_APP_CMD 55 - -#define MMC_ACMD_SD_SEND_OP_COND 41 - #define R1_ILLEGAL_COMMAND (1 << 22) #define R1_APP_CMD (1 << 5) diff --git a/include/mmc.h b/include/mmc.h index a271695..268f27e 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -25,6 +25,30 @@ #define _MMC_H_ #include <asm/arch/mmc.h> +/* MMC command numbers */ +#define MMC_CMD_GO_IDLE_STATE 0 +#define MMC_CMD_SEND_OP_COND 1 +#define MMC_CMD_ALL_SEND_CID 2 +#define MMC_CMD_SET_RELATIVE_ADDR 3 +#define MMC_CMD_SET_DSR 4 +#define MMC_CMD_SELECT_CARD 7 +#define MMC_CMD_SEND_CSD 9 +#define MMC_CMD_SEND_CID 10 +#define MMC_CMD_SEND_STATUS 13 +#define MMC_CMD_SET_BLOCKLEN 16 +#define MMC_CMD_READ_SINGLE_BLOCK 17 +#define MMC_CMD_READ_MULTIPLE_BLOCK 18 +#define MMC_CMD_WRITE_BLOCK 24 +#define MMC_CMD_APP_CMD 55 + +/* SD Card command numbers */ +#define SD_CMD_SEND_RELATIVE_ADDR 3 +#define SD_CMD_SWITCH 6 +#define SD_CMD_SEND_IF_COND 8 + +#define SD_CMD_APP_SET_BUS_WIDTH 6 +#define SD_CMD_APP_SEND_OP_COND 41 + int mmc_init(int verbose); int mmc_read(ulong src, uchar *dst, int size); int mmc_write(uchar *src, ulong dst, int size); -- 1.5.5.1

5 14

[U-Boot-Users] Teridian Phy Support tr78q21x3
by Manuel Sahm 13 Jul '08

13 Jul '08

Hello, I?m using a at91sam9260 Microcontroller. I added a Teridian Phy Driver (tr78q21x3) to the Uboot version 1.3.0 It works. (even in linux when I use the linux generic macb driver) If I try to use the latest u-boot-version (1.3.3) with the macb driver - ethernet doesn?t work (in u-boot and linux). I don?t know how to add my phy driver to the latest u-boot version ! Is anybody out there who would be able to insert the phy driver in the latest u-boot version (tree) - I would offer my driver for anybody... Please reply Thank you

4 9

[U-Boot-Users] [PATCH v2] fdt: add crypto node handling for MPC8{3, 5}xxE processors
by Kim Phillips 11 Jul '08

11 Jul '08

crypto node if not on an E-processor. If on 8360 or 834x family, check rev and up-rev crypto node (to SEC rev. 2.4 property values) if on an 'EA' processor, e.g. MPC8349EA. Signed-off-by: Kim Phillips <kim.phillips(a)freescale.com> --- change since v1: mpc85xx IS_E_PROCESSOR(svr) definition changed to (svr & 0x80000). (I'm not sure, but I think this goes through WD directly) common/fdt_support.c | 87 +++++++++++++++++++++++++++++++++++++++++++ cpu/mpc83xx/fdt.c | 18 +++++++++ cpu/mpc85xx/fdt.c | 6 +++ include/asm-ppc/processor.h | 9 ++++ include/fdt_support.h | 6 +++ include/mpc83xx.h | 7 +++- 6 files changed, 132 insertions(+), 1 deletions(-) diff --git a/common/fdt_support.c b/common/fdt_support.c index 7507744..c5b4650 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -447,3 +447,90 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) prop, compat, fdt_strerror(err)); } #endif /* CONFIG_HAS_FSL_DR_USB */ + +#if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) +/* + * update crypto node properties to a specified revision of the SEC + * called with sec_rev == 0 if not on an mpc8xxxE processor + */ +void fdt_fixup_crypto_node(void *blob, int sec_rev) +{ + const struct sec_rev_prop { + u32 sec_rev; + u32 num_channels; + u32 channel_fifo_len; + u32 exec_units_mask; + u32 descriptor_types_mask; + } sec_rev_prop_list [] = { + { 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */ + { 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */ + { 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */ + { 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */ + { 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */ + { 0x0303, 4, 24, 0x97c, 0x03ab0abf }, /* SEC 3.3 */ + }; + char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) * + sizeof("fsl,secX.Y")]; + int crypto_node, sec_idx, err; + char *p; + u32 val; + + /* locate crypto node based on lowest common compatible */ + crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0"); + if (crypto_node == -FDT_ERR_NOTFOUND) + return; + + /* delete it if not on an E-processor */ + if (crypto_node > 0 && !sec_rev) { + fdt_del_node(blob, crypto_node); + return; + } + + /* else we got called for possible uprev */ + for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++) + if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev) + break; + + if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) { + puts("warning: unknown SEC revision number\n"); + return; + } + + val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels); + err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4); + if (err < 0) + printf("WARNING: could not set crypto property: %s\n", + fdt_strerror(err)); + + val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask); + err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", &val, 4); + if (err < 0) + printf("WARNING: could not set crypto property: %s\n", + fdt_strerror(err)); + + val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask); + err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4); + if (err < 0) + printf("WARNING: could not set crypto property: %s\n", + fdt_strerror(err)); + + val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len); + err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4); + if (err < 0) + printf("WARNING: could not set crypto property: %s\n", + fdt_strerror(err)); + + val = 0; + while (sec_idx >= 0) { + p = compat_strlist + val; + val += sprintf(p, "fsl,sec%d.%d", + (sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8, + sec_rev_prop_list[sec_idx].sec_rev & 0x00ff); + sec_idx--; + } + err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist, val); + if (err < 0) + printf("WARNING: could not set crypto property: %s\n", + fdt_strerror(err)); +} +#endif /* defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) */ diff --git a/cpu/mpc83xx/fdt.c b/cpu/mpc83xx/fdt.c index 02c4d05..267ae6a 100644 --- a/cpu/mpc83xx/fdt.c +++ b/cpu/mpc83xx/fdt.c @@ -26,6 +26,7 @@ #include <common.h> #include <libfdt.h> #include <fdt_support.h> +#include <asm/processor.h> extern void ft_qe_setup(void *blob); @@ -33,6 +34,23 @@ DECLARE_GLOBAL_DATA_PTR; void ft_cpu_setup(void *blob, bd_t *bd) { + immap_t *immr = (immap_t *)CFG_IMMR; + int spridr = immr->sysconf.spridr; + + /* + * delete crypto node if not on an E-processor + * initial revisions of the MPC834xE/6xE have the original SEC 2.0. + * EA revisions got the SEC uprevved to 2.4 but since the default device + * tree contains SEC 2.0 properties we uprev them here. + */ + if (!IS_E_PROCESSOR(spridr)) + fdt_fixup_crypto_node(blob, 0); + else if (IS_E_PROCESSOR(spridr) && + (SPR_FAMILY(spridr) == SPR_834X_FAMILY || + SPR_FAMILY(spridr) == SPR_836X_FAMILY) && + REVID_MAJOR(spridr) >= 2) + fdt_fixup_crypto_node(blob, 0x0204); + #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) fdt_fixup_ethernet(blob, bd); diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c index bb87740..aac74ac 100644 --- a/cpu/mpc85xx/fdt.c +++ b/cpu/mpc85xx/fdt.c @@ -26,8 +26,10 @@ #include <common.h> #include <libfdt.h> #include <fdt_support.h> +#include <asm/processor.h> extern void ft_qe_setup(void *blob); + #ifdef CONFIG_MP #include "mp.h" DECLARE_GLOBAL_DATA_PTR; @@ -79,6 +81,10 @@ void ft_fixup_cpu(void *blob, u64 memory_limit) void ft_cpu_setup(void *blob, bd_t *bd) { + /* delete crypto node if not on an E-processor */ + if (!IS_E_PROCESSOR(get_svr())) + fdt_fixup_crypto_node(blob, 0); + #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) fdt_fixup_ethernet(blob, bd); diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 8bdfb9d..4580f3a 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -883,6 +883,15 @@ /* Some parts define SVR[0:23] as the SOC version */ #define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFF) /* SOC Version fields */ +/* whether MPC8xxxE (i.e. has SEC) */ +#if defined(CONFIG_MPC85xx) +#define IS_E_PROCESSOR(svr) (svr & 0x80000) +#else +#if defined(CONFIG_MPC83XX) +#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000)) +#endif +#endif + /* * SVR_SOC_VER() Version Values */ diff --git a/include/fdt_support.h b/include/fdt_support.h index 890993f..a7c6326 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -56,6 +56,12 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd); static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {} #endif /* CONFIG_HAS_FSL_DR_USB */ +#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83XX) +void fdt_fixup_crypto_node(void *blob, int sec_rev); +#else +static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {} +#endif + #ifdef CONFIG_OF_BOARD_SETUP void ft_board_setup(void *blob, bd_t *bd); void ft_cpu_setup(void *blob, bd_t *bd); diff --git a/include/mpc83xx.h b/include/mpc83xx.h index d2e1e2b..1e8a641 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -60,21 +60,26 @@ #endif #define PARTID_NO_E(spridr) ((spridr & 0xFFFE0000) >> 16) -#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000)) /* has SEC */ +#define SPR_FAMILY(spridr) ((spridr & 0xFFF00000) >> 20) +#define SPR_831X_FAMILY 0x80B #define SPR_8311 0x80B2 #define SPR_8313 0x80B0 #define SPR_8314 0x80B6 #define SPR_8315 0x80B4 +#define SPR_832X_FAMILY 0x806 #define SPR_8321 0x8066 #define SPR_8323 0x8062 +#define SPR_834X_FAMILY 0x803 #define SPR_8343 0x8036 #define SPR_8347_TBGA_ 0x8032 #define SPR_8347_PBGA_ 0x8034 #define SPR_8349 0x8030 +#define SPR_836X_FAMILY 0x804 #define SPR_8358_TBGA_ 0x804A #define SPR_8358_PBGA_ 0x804E #define SPR_8360 0x8048 +#define SPR_837X_FAMILY 0x80C #define SPR_8377 0x80C6 #define SPR_8378 0x80C4 #define SPR_8379 0x80C2 -- 1.5.6.rc0.84.g06f60

4 7

[U-Boot-Users] [PATCH][AT91][Re-submit] DataFlash AT45DB021 support
by Sergey Lapin 10 Jul '08

10 Jul '08

Some boards based on AT91SAM926X-EK use smaller DF chips to keep bootstrap, u-boot and its environment, using NAND or other external storage for kernel and rootfs. This patch adds support for small 1024x263 chip. Signed-off-by: Sergey Lapin <slapin(a)ossfans.org> --- drivers/mtd/dataflash.c | 14 ++++++++++++++- include/dataflash.h | 1 + 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/dataflash.c b/drivers/mtd/dataflash.c index 8247aa0..92accc0 100644 --- a/drivers/mtd/dataflash.c +++ b/drivers/mtd/dataflash.c @@ -52,8 +52,19 @@ int AT91F_DataflashInit (void) dataflash_info[i].Device.pages_number = 0; dfcode = AT91F_DataflashProbe (cs[i].cs, &dataflash_info[i].Desc); switch (dfcode) { + case AT45DB021: + dataflash_info[i].Device.pages_number = 1024; + dataflash_info[i].Device.pages_size = 263; + dataflash_info[i].Device.page_offset = 9; + dataflash_info[i].Device.byte_mask = 0x300; + dataflash_info[i].Device.cs = cs[i].cs; + dataflash_info[i].Desc.DataFlash_state = IDLE; + dataflash_info[i].logical_address = cs[i].addr; + dataflash_info[i].id = dfcode; + found[i] += dfcode;; + break; case AT45DB161: dataflash_info[i].Device.pages_number = 4096; dataflash_info[i].Device.pages_size = 528; @@ -178,6 +188,9 @@ void dataflash_print_info (void) if (dataflash_info[i].id != 0) { printf("DataFlash:"); switch (dataflash_info[i].id) { + case AT45DB021: + printf("AT45DB021\n"); + break; case AT45DB161: printf("AT45DB161\n"); break; diff --git a/include/dataflash.h b/include/dataflash.h index f20c738..11e5188 100644 --- a/include/dataflash.h +++ b/include/dataflash.h @@ -137,6 +137,7 @@ struct dataflash_addr { /*-------------------------------------------------------------------------------------------------*/ #define AT45DB161 0x2c +#define AT45DB021 0x14 #define AT45DB321 0x34 #define AT45DB642 0x3c #define AT45DB128 0x10 -- 1.5.4.1

3 5

[U-Boot-Users] [PATCH] [PATCH] Fix "usb part" command
by Christian Eggers 10 Jul '08

10 Jul '08

From: Christian Eggers <christian(a)p2400.wgnetz.xx> Only print partition for selected device if user supplied the <dev> arg with the "usb part [dev]" command. Signed-off-by: Christian Eggers <ceggers(a)gmx.de> --- common/cmd_usb.c | 19 +++++++++++++++---- 1 files changed, 15 insertions(+), 4 deletions(-) diff --git a/common/cmd_usb.c b/common/cmd_usb.c index 9be86b8..ed51087 100644 --- a/common/cmd_usb.c +++ b/common/cmd_usb.c @@ -553,13 +553,24 @@ int do_usb (cmd_tbl_t *cmdtp, int flag, } if (strncmp(argv[1],"part",4) == 0) { - int devno, ok; - for (ok=0, devno=0; devno<USB_MAX_STOR_DEV; ++devno) { + int devno, ok = 0; + if (argc==2) { + for (devno=0; devno<USB_MAX_STOR_DEV; ++devno) { + stor_dev=usb_stor_get_dev(devno); + if (stor_dev->type!=DEV_TYPE_UNKNOWN) { + ok++; + if (devno) + printf("\n"); + printf("print_part of %x\n",devno); + print_part(stor_dev); + } + } + } + else { + devno=simple_strtoul(argv[2], NULL, 16); stor_dev=usb_stor_get_dev(devno); if (stor_dev->type!=DEV_TYPE_UNKNOWN) { ok++; - if (devno) - printf("\n"); printf("print_part of %x\n",devno); print_part(stor_dev); } -- 1.4.3.4

3 6

[U-Boot-Users] [PATCH 1/6] AT572D940HF-EB Support v2 (board folder)
by Antonio R. Costa 10 Jul '08

10 Jul '08

Signed-off-by: Antonio R. Costa <antonio.costa(a)atmel.com> diff --git a/board/atmel/at572d940hfeb/Makefile b/board/atmel/at572d940hfeb/Makefile new file mode 100644 index 0000000..c91bea6 --- /dev/null +++ b/board/atmel/at572d940hfeb/Makefile @@ -0,0 +1,55 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd <at> denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += at572d940hfeb.o +COBJS-y += partition.o +COBJS-y += flash.o +COBJS-$(CONFIG_CMD_NAND) += nand.o +COBJS-$(CONFIG_CMD_MMC) += atmel_mci.o +COBJS-$(CONFIG_USE_IRQ) += interrupts.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/atmel/at572d940hfeb/at572d940hfeb.c b/board/atmel/at572d940hfeb/at572d940hfeb.c new file mode 100644 index 0000000..95cedc2 --- /dev/null +++ b/board/atmel/at572d940hfeb/at572d940hfeb.c @@ -0,0 +1,251 @@ +/* (C) 2008 Copyright Atmel Corporation + * + * Antonio R. Costa <antonio.costa <at> atmel.com> + * <costa.antonior <at> gmail.com> + * + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop <at> leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at572d940hf.h> +#include <asm/arch/at572d940hf_matrix.h> +#include <asm/arch/at572d940hf_mc.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> +#include <asm/arch/at91_aic.h> +#include <asm/arch/interrupts.h> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) +#include <net.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +/* ----------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +static void AT572D940HFEB_serial_hw_init(void) +{ +#ifdef CONFIG_USART0 + at91_set_A_periph(AT91_PIN_PA8, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); +#endif + +#ifdef CONFIG_USART1 + at91_set_A_periph(AT91_PIN_PC10, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); +#endif + +#ifdef CONFIG_USART2 + at91_set_A_periph(AT91_PIN_PC15, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PC14, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); +#endif + +#ifdef CONFIG_USART3 /* DBGU */ + at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); +#endif +} + +#ifdef CONFIG_CMD_NAND +static void AT572D940HFEB_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBICSA); + at91_sys_write(AT91_MATRIX_EBICSA, + csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | + AT91_SMC_DBW_8 | AT91_SMC_TDF_(2)); + + at91_sys_write(AT91_PMC_PCER, 1 << AT572D940HF_ID_PIOC); + + /* Configure RDY/BSY */ + at91_set_gpio_input(AT91_PIN_PC16, 1); + + /* Enable NandFlash */ + /* By DIP switch on AT572D940HFEB */ + at91_set_gpio_output(AT91_PIN_PC14, 1); +} +#endif + +#ifdef CONFIG_HAS_DATAFLASH +static void AT572D940HFEB_spi_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */ + at91_set_A_periph(AT91_PIN_PA4, 0); /* SPI0_NPCS1 */ + + at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT572D940HF_ID_SPI0); +} +#endif + +#ifdef CONFIG_MACB +static void AT572D940HFEB_macb_hw_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT572D940HF_ID_EMAC); + + at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXCK_EREFCK */ + at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ + at91_set_A_periph(AT91_PIN_PA18, 0); /* ERX0 */ + at91_set_A_periph(AT91_PIN_PA19, 0); /* ERX1 */ + at91_set_A_periph(AT91_PIN_PA20, 0); /* ERXER */ + at91_set_A_periph(AT91_PIN_PA23, 0); /* ETXEN */ + at91_set_A_periph(AT91_PIN_PA21, 0); /* ETX0 */ + at91_set_A_periph(AT91_PIN_PA22, 0); /* ETX1 */ + at91_set_A_periph(AT91_PIN_PA13, 0); /* EMDIO */ + at91_set_A_periph(AT91_PIN_PA14, 0); /* EMDC */ + at91_set_A_periph(AT91_PIN_PA15, 0); /* EFCE100 */ +} +#endif + +#ifdef CONFIG_MMC +static void AT572D940HFEB_mci_hw_init(void) +{ + at91_sys_write(AT91_PMC_PCER, (1 << AT572D940HF_ID_MCI)); + + at91_set_A_periph(AT91_PIN_PC22,0); + at91_set_A_periph(AT91_PIN_PC23,0); + at91_set_A_periph(AT91_PIN_PC24,0); + at91_set_A_periph(AT91_PIN_PC25,0); + at91_set_A_periph(AT91_PIN_PC26,0); + at91_set_A_periph(AT91_PIN_PC27,0); +} +#endif + +#ifdef CONFIG_USBH +static void AT572D940HFEB_usbh_hw_init(void) +{ + at91_sys_write(AT91_PMC_PCER, (1 << AT572D940HF_ID_UHP)); + at91_sys_write(AT91_PMC_SCER, AT572D940HF_PMC_UHP); +} + +int rstc_init(void) +{ + /* Reads the SR to clean from + * previous resets + */ + at91_sys_read(AT91_RSTC_SR); + + /* Disble the USR_RST line, + * enable USR_RST_INT and + * sets the EXT_RST length to 2^14 + * (500ms needed by the phy) + */ + at91_sys_write(AT91_RSTC_MR, + (0xa5<<24) | (13<<8) | AT91_RSTC_URSTIEN); + return 0; +} + +int board_init(void) +{ + + /* Init the reset controller */ + rstc_init(); + + /* Init interrupts */ + interrupts_init(); + + /* Enable Ctrlc */ + console_init_f(); + + /* arch number of AT572D940HFEB-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT572D940HFEB; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + AT572D940HFEB_serial_hw_init(); + +#ifdef CONFIG_CMD_NAND + AT572D940HFEB_nand_hw_init(); +#endif + +#ifdef CONFIG_HAS_DATAFLASH + AT572D940HFEB_spi_hw_init(); +#endif + +#ifdef CONFIG_MACB + AT572D940HFEB_macb_hw_init(); +#endif + +#ifdef CONFIG_MMC + AT572D940HFEB_mci_hw_init(); +#endif + +#ifdef CONFIG_USBH + AT572D940HFEB_usbh_hw_init(); +#endif + +#endif + gd->flags |= GD_FLG_RELOC; + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +#ifdef CONFIG_CMD_NET +#ifdef CONFIG_RESET_PHY_R +void reset_phy(void) +{ +#ifdef CONFIG_MACB + /* + * Initialize ethernet HW addr prior to starting Linux, + * needed for nfsroot + */ + eth_init(gd->bd); +#endif /* CONFIG_MACB */ +} +#endif /* CONFIG_RESET_PHY_R */ + +#endif /* CONFIG_CMD_NET */ diff --git a/board/atmel/at572d940hfeb/config.mk b/board/atmel/at572d940hfeb/config.mk new file mode 100644 index 0000000..ff2cfd1 --- /dev/null +++ b/board/atmel/at572d940hfeb/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/atmel/at572d940hfeb/flash.c b/board/atmel/at572d940hfeb/flash.c new file mode 100644 index 0000000..652a29b --- /dev/null +++ b/board/atmel/at572d940hfeb/flash.c @@ -0,0 +1,524 @@ +/* + * (C) Copyright 2002 + * Lineo, Inc. <www.lineo.com> + * Bernhard Kuhn <bkuhn(a)lineo.com> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke <azu(a)sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +ulong myflush(void); + + +/* Flash Organization Structure */ +typedef struct OrgDef +{ + unsigned int sector_number; + unsigned int sector_size; +} OrgDef; + + +/* Flash Organizations */ + +OrgDef OrgAT49BV642D[] = +{ + { 8, 4*1024 }, + { 58, 32*1024 }, +}; + +OrgDef OrgAT49BV16x4[] = +{ + { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ + { 2, 32*1024 }, /* 2 * 32 kBytes sectors */ + { 30, 64*1024 }, /* 30 * 64 kBytes sectors */ +}; + +OrgDef OrgAT49BV16x4A[] = +{ + { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ + { 31, 64*1024 }, /* 31 * 64 kBytes sectors */ +}; + +OrgDef OrgAT49BV6416[] = +{ + { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ + { 127, 64*1024 }, /* 127 * 64 kBytes sectors */ +}; + +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; + +/* AT49BV1614A Codes */ +#define FLASH_CODE1 0xAA +#define FLASH_CODE2 0x55 +#define ID_IN_CODE 0x90 +#define ID_OUT_CODE 0xF0 + + +#define CMD_READ_ARRAY 0x00F0 +#define CMD_UNLOCK1 0x00AA +#define CMD_UNLOCK2 0x0055 +#define CMD_ERASE_SETUP 0x0080 +#define CMD_ERASE_CONFIRM 0x0030 +#define CMD_PROGRAM 0x00A0 +#define CMD_UNLOCK_BYPASS 0x0020 +#define CMD_SECTOR_UNLOCK 0x0070 + +#define MEM_FLASH_ADDR1 (*(volatile u16 *) \ + (CFG_FLASH_BASE + (0x00005555<<1))) +#define MEM_FLASH_ADDR2 (*(volatile u16 *) \ + (CFG_FLASH_BASE + (0x00002AAA<<1))) + +#define BIT_ERASE_DONE 0x0080 +#define BIT_RDY_MASK 0x0080 +#define BIT_PROGRAM_ERROR 0x0020 +#define BIT_TIMEOUT 0x80000000 /* our flag */ + +#define READY 1 +#define ERR 2 +#define TMO 4 + +/*----------------------------------------------------------------------- + */ +void flash_identification (flash_info_t * info) +{ + volatile u16 manuf_code, device_code, add_device_code; + + MEM_FLASH_ADDR1 = FLASH_CODE1; + MEM_FLASH_ADDR2 = FLASH_CODE2; + MEM_FLASH_ADDR1 = ID_IN_CODE; + + manuf_code = *(volatile u16 *) CFG_FLASH_BASE; + device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2); + add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1)); + + MEM_FLASH_ADDR1 = FLASH_CODE1; + MEM_FLASH_ADDR2 = FLASH_CODE2; + MEM_FLASH_ADDR1 = ID_OUT_CODE; + + /* Vendor type */ + info->flash_id = ATM_MANUFACT & FLASH_VENDMASK; + printf ("Atmel: "); + + if ((device_code & FLASH_TYPEMASK) == + (ATM_ID_BV1614 & FLASH_TYPEMASK)) { + + if ((add_device_code & FLASH_TYPEMASK) == + (ATM_ID_BV1614A & FLASH_TYPEMASK)) { + info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK; + printf ("AT49BV1614A (16Mbit)\n"); + } else { /* AT49BV1614 Flash */ + info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK; + printf ("AT49BV1614 (16Mbit)\n"); + } + + } else if ((device_code & FLASH_TYPEMASK) == + (ATM_ID_BV6416 & FLASH_TYPEMASK)) { + info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK; + printf ("AT49BV6416 (64Mbit)\n"); + } +} + +ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks) +{ + int i, nb_sectors = 0; + + for (i=0; i<nb_blocks; i++){ + nb_sectors += pOrgDef[i].sector_number; + } + + return nb_sectors; +} + +void flash_unlock_sector(flash_info_t * info, unsigned int sector) +{ + volatile u16 *addr = (volatile u16 *) (info->start[sector]); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + *addr = CMD_SECTOR_UNLOCK; +} + + +ulong flash_init (void) +{ + int i, j, k; + unsigned int flash_nb_blocks, sector; + unsigned int start_address; + OrgDef *pOrgDef; + + ulong size = 0; + + for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + ulong flashbase = 0; + + flash_identification (&flash_info[i]); + + if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (ATM_ID_BV1614 & FLASH_TYPEMASK)) { + + pOrgDef = OrgAT49BV16x4; + flash_nb_blocks = sizeof (OrgAT49BV16x4) / + sizeof (OrgDef); + } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (ATM_ID_BV1614A & FLASH_TYPEMASK)){ + /* AT49BV1614A Flash */ + + pOrgDef = OrgAT49BV16x4A; + flash_nb_blocks = sizeof (OrgAT49BV16x4A) / + sizeof (OrgDef); + } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (ATM_ID_BV6416 & FLASH_TYPEMASK)){ + /* AT49BV6416 Flash */ + + pOrgDef = OrgAT49BV6416; + flash_nb_blocks = sizeof (OrgAT49BV6416) / + sizeof (OrgDef); + } else { + flash_nb_blocks = 0; + pOrgDef = OrgAT49BV16x4; + } + + flash_info[i].sector_count = + flash_number_sector(pOrgDef, flash_nb_blocks); + memset(flash_info[i].protect, 0, flash_info[i].sector_count); + + if (i == 0) + flashbase = PHYS_FLASH_1; + else + panic ("configured too many flash banks!\n"); + + sector = 0; + start_address = flashbase; + flash_info[i].size = 0; + + for (j = 0; j < flash_nb_blocks; j++) { + for (k = 0; k < pOrgDef[j].sector_number; k++) { + flash_info[i].start[sector++] = + start_address; + start_address += pOrgDef[j].sector_size; + flash_info[i].size += pOrgDef[j].sector_size; + } + } + + size += flash_info[i].size; + + if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (ATM_ID_BV6416 & FLASH_TYPEMASK)){ + /* AT49BV6416 Flash */ + + /* Unlock all sectors at reset */ + for (j=0; j<flash_info[i].sector_count; j++) { + flash_unlock_sector(&flash_info[i], j); + } + } + } + + /* Protect binary boot image */ + flash_protect (FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE + CFG_BOOT_SIZE - 1, &flash_info[0]); + + /* Protect environment variables */ + flash_protect (FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]); + + /* Protect U-Boot gzipped image */ + flash_protect (FLAG_PROTECT_SET, + CFG_U_BOOT_BASE, + CFG_U_BOOT_BASE + CFG_U_BOOT_SIZE - 1, + &flash_info[0]); + + return size; +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t * info) +{ + int i; + + switch (info->flash_id & FLASH_VENDMASK) { + case (ATM_MANUFACT & FLASH_VENDMASK): + printf ("Atmel: "); + break; + default: + printf ("Unknown Vendor "); + break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case (ATM_ID_BV1614 & FLASH_TYPEMASK): + printf ("AT49BV1614 (16Mbit)\n"); + break; + case (ATM_ID_BV1614A & FLASH_TYPEMASK): + printf ("AT49BV1614A (16Mbit)\n"); + break; + case (ATM_ID_BV6416 & FLASH_TYPEMASK): + printf ("AT49BV6416 (64Mbit)\n"); + break; + default: + printf ("Unknown Chip Type\n"); + return; + } + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; i++) { + if ((i % 5) == 0) { + printf ("\n "); + } + printf (" %08lX%s", info->start[i], + info->protect[i] ? " (RO)" : " "); + } + printf ("\n"); +} + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t * info, int s_first, int s_last) +{ + ulong result; + int iflag, cflag, prot, sect; + int rc = ERR_OK; + int chip1; + + /* first look for protection bits */ + + if (info->flash_id == FLASH_UNKNOWN) + return ERR_UNKNOWN_FLASH_TYPE; + + if ((s_first < 0) || (s_first > s_last)) { + return ERR_INVAL; + } + + if ((info->flash_id & FLASH_VENDMASK) != + (ATM_MANUFACT & FLASH_VENDMASK)) { + return ERR_UNKNOWN_FLASH_VENDOR; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + if (prot) + return ERR_PROTECTED; + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + cflag = icache_status (); + icache_disable (); + iflag = disable_interrupts (); + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { + printf ("Erasing sector %2d ... ", sect); + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + if (info->protect[sect] == 0) { /* not protected */ + volatile u16 *addr = + (volatile u16 *) (info->start[sect]); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + MEM_FLASH_ADDR1 = CMD_ERASE_SETUP; + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + *addr = CMD_ERASE_CONFIRM; + + /* wait until flash is ready */ + chip1 = 0; + + do { + result = *addr; + + /* check timeout */ + if(get_timer_masked()>CFG_FLASH_ERASE_TOUT) { + MEM_FLASH_ADDR1 = CMD_READ_ARRAY; + chip1 = TMO; + break; + } + + if(!chip1 && (result & 0xFFFF) & + BIT_ERASE_DONE) + chip1 = READY; + + } while (!chip1); + + MEM_FLASH_ADDR1 = CMD_READ_ARRAY; + + if (chip1 == ERR) { + rc = ERR_PROG_ERROR; + goto outahere; + } + if (chip1 == TMO) { + rc = ERR_TIMOUT; + goto outahere; + } + + printf ("ok.\n"); + } else { /* it was protected */ + printf ("protected!\n"); + } + } + + if (ctrlc ()) + printf ("User Interrupt!\n"); + +outahere: + /* allow flash to settle - wait 10 ms */ + udelay_masked (10000); + + if (iflag) + enable_interrupts (); + + if (cflag) + icache_enable (); + + return rc; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash + */ + +static int write_word (flash_info_t * info, ulong dest, ulong data) +{ + volatile u16 *addr = (volatile u16 *) dest; + ulong result; + int rc = ERR_OK; + int cflag, iflag; + int chip1; + + /* + * Check if Flash is (sufficiently) erased + */ + result = *addr; + if ((result & data) != data) + return ERR_NOT_ERASED; + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + cflag = icache_status (); + icache_disable (); + iflag = disable_interrupts (); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + MEM_FLASH_ADDR1 = CMD_PROGRAM; + *addr = data; + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + /* wait until flash is ready */ + chip1 = 0; + do { + result = *addr; + + /* check timeout */ + if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { + chip1 = ERR | TMO; + break; + } + if (!chip1 && ((result & 0x80) == (data & 0x80))) + chip1 = READY; + + } while (!chip1); + + *addr = CMD_READ_ARRAY; + + if (chip1 == ERR || *addr != data) + rc = ERR_PROG_ERROR; + + if (iflag) + enable_interrupts (); + + if (cflag) + icache_enable (); + + return rc; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash. + */ + +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + ulong wp, data; + int rc; + + if (addr & 1) { + printf ("unaligned destination not supported\n"); + return ERR_ALIGN; + }; + + if ((int) src & 1) { + printf ("unaligned source not supported\n"); + return ERR_ALIGN; + }; + + wp = addr; + + while (cnt >= 2) { + data = *((volatile u16 *) src); + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + src += 2; + wp += 2; + cnt -= 2; + } + + if (cnt == 1) { + data = (*((volatile u8 *) src)) | + (*((volatile u8 *) (wp + 1)) << 8); + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + src += 1; + wp += 1; + cnt -= 1; + }; + + return ERR_OK; +} diff --git a/board/atmel/at572d940hfeb/interrupts.c b/board/atmel/at572d940hfeb/interrupts.c new file mode 100644 index 0000000..1eafa9a --- /dev/null +++ b/board/atmel/at572d940hfeb/interrupts.c @@ -0,0 +1,84 @@ +/* + * board/atmel/at572d940hfeb/interrupts.c + * Copyright 2008 (C) ATMEL + * Antonio R. Costa <antonio.costa <at> atmel.com> + * <costa.antonior <at> gmail.com> + * + * Advanced Interrupt Controller (AIC). + * Based on AT572D940HF datasheet. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <common.h> +#include <asm/arch/at572d940hf.h> +#include <asm/arch/io.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/at91_aic.h> +#include <asm/arch/interrupts.h> + +irq_handler_t handler_reset(void) +{ + unsigned long rstc_sr=0; + + rstc_sr = at91_sys_read(AT91_RSTC_SR); + if(rstc_sr & AT91_RSTC_URSTS) { + while(!(at91_sys_read(AT91_RSTC_SR) & (1<<16))); + reset_cpu(1); + }; +} + +irq_handler_t handler_ext1(void) +{ + puts("--- EXT1 IRQ ---\n"); +} + + +int reset_irqs(void) { + unsigned long ul = 0; + volatile unsigned long * psrc = _armboot_start; + volatile unsigned long * pdest = 0x0; + + /* + * Relocates U-Boot ARM IRQ vectors to 0 + * This is an ugly way to do it. + * More support must be offered by start.S + * on symbols and macros performing partial relocation + */ + + while(ul++ < 16) + *pdest++ = *psrc++; + + + /* Reset IRQ vectors */ + for(ul=0;ul<32;ul++) + RESET_IRQ_HANDLER(ul); + return 0; +} + +int interrupts_init(void) +{ + reset_irqs(); + SET_IRQ_HANDLER(1 ,0x27,handler_reset); + SET_IRQ_HANDLER(30,0x27,handler_ext1); + return 0; +} + + +void do_irq(struct pt_regs* pregs) { + + unsigned long int ivr = AIC_REG(AIC_IVR); + unsigned long int isr = AIC_REG(AIC_ISR); + void (*irq_handler)(unsigned long int) = + (void(*)(unsigned long int)) ivr; + + irq_handler(isr); + + /* Acknowledges irq */ + IRQ_ACKNOWLEDGE(ivr); + + return; +}; diff --git a/board/atmel/at572d940hfeb/nand.c b/board/atmel/at572d940hfeb/nand.c new file mode 100644 index 0000000..0f8dcb9 --- /dev/null +++ b/board/atmel/at572d940hfeb/nand.c @@ -0,0 +1,76 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop <at> leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at572d940hf.h> +#include <asm/arch/gpio.h> +#include <asm/arch/at91_pio.h> + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +#define MASK_ALE (1 << 21) /* our ALE is AD21 */ +#define MASK_CLE (1 << 22) /* our CLE is AD22 */ + +static void at91sam9260ek_nand_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); + switch (cmd) { + case NAND_CTL_SETCLE: + IO_ADDR_W |= MASK_CLE; + break; + case NAND_CTL_SETALE: + IO_ADDR_W |= MASK_ALE; + break; + case NAND_CTL_CLRNCE: + at91_set_gpio_value(AT91_PIN_PC14, 1); + break; + case NAND_CTL_SETNCE: + at91_set_gpio_value(AT91_PIN_PC14, 0); + break; + } + this->IO_ADDR_W = (void *) IO_ADDR_W; +} + +static int at91sam9260ek_nand_ready(struct mtd_info *mtd) +{ + return at91_get_gpio_value(AT91_PIN_PC13); +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->eccmode = NAND_ECC_SOFT; + nand->hwcontrol = at91sam9260ek_nand_hwcontrol; + nand->dev_ready = at91sam9260ek_nand_ready; + nand->chip_delay = 20; + + return 0; +} diff --git a/board/atmel/at572d940hfeb/partition.c b/board/atmel/at572d940hfeb/partition.c new file mode 100644 index 0000000..389fb2c --- /dev/null +++ b/board/atmel/at572d940hfeb/partition.c @@ -0,0 +1,38 @@ +/* + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { + {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ + {CFG_DATAFLASH_LOGIC_ADDR_CS1, 1} +}; + +/*define the area offsets*/ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, + {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, + {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, +}; diff --git a/board/atmel/at572d940hfeb/u-boot.lds b/board/atmel/at572d940hfeb/u-boot.lds new file mode 100644 index 0000000..05a6d83 --- /dev/null +++ b/board/atmel/at572d940hfeb/u-boot.lds @@ -0,0 +1,57 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj <at> denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} -- 1.5.4.3

5 25

[U-Boot-Users] [PATCH] Fix boot from NOR due to incorrect reset delay.
by Stelian Pop 10 Jul '08

10 Jul '08

AT91 RSTC registers are battery-backuped, so their values are not reset across power cycles. One of those registers, the AT91_RSTC_MR register, is being modified by U-Boot, in the ethernet initialisation routine, to generate a 500ms user reset. Unfortunately, this value is not being restored afterwards, causing subsequent resets to also last for 500ms. This long reset sequence causes problems (at least) in the boot sequence from NOR: by the time the CPU tries to load a program from the NOR flash, the latter is still in reset and not yet available. Additionaly, this patch fixes a bug in the original code which caused the reset delay to last for 2s instead of 500ms. Signed-off-by: Stelian Pop <stelian(a)popies.net> --- This patch applies on top of the latest AT91 patches, as integrated in the testing-V2 branch of the u-boot-at91 repository. board/atmel/at91cap9adk/at91cap9adk.c | 7 ++++++- board/atmel/at91sam9260ek/at91sam9260ek.c | 4 ++-- board/atmel/at91sam9263ek/at91sam9263ek.c | 7 ++++++- 3 files changed, 14 insertions(+), 4 deletions(-) diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c index a3eaf19..c5082a0 100644 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ b/board/atmel/at91cap9adk/at91cap9adk.c @@ -196,7 +196,7 @@ static void at91cap9_macb_hw_init(void) /* Need to reset PHY -> 500ms reset */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - AT91_RSTC_ERSTL | (0x0D << 8) | + (AT91_RSTC_ERSTL & (0x0D << 8)) | AT91_RSTC_URSTEN); at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); @@ -204,6 +204,11 @@ static void at91cap9_macb_hw_init(void) /* Wait for end hardware reset */ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); + /* Restore NRST value */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0 << 8)) | + AT91_RSTC_URSTEN); + /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PB22) | pin_to_mask(AT91_PIN_PB25) | diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 4635f0f..3572b16 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -149,7 +149,7 @@ static void at91sam9260ek_macb_hw_init(void) /* Need to reset PHY -> 500ms reset */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - AT91_RSTC_ERSTL | (0x0D << 8) | + (AT91_RSTC_ERSTL & (0x0D << 8)) | AT91_RSTC_URSTEN); at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); @@ -159,7 +159,7 @@ static void at91sam9260ek_macb_hw_init(void) /* Restore NRST value */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - AT91_RSTC_ERSTL | (0x0 << 8) | + (AT91_RSTC_ERSTL & (0x0 << 8)) | AT91_RSTC_URSTEN); /* Re-enable pull-up */ diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index ba7fc71..169ee25 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -147,7 +147,7 @@ static void at91sam9263ek_macb_hw_init(void) /* Need to reset PHY -> 500ms reset */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - AT91_RSTC_ERSTL | (0x0D << 8) | + (AT91_RSTC_ERSTL & (0x0D << 8)) | AT91_RSTC_URSTEN); at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); @@ -155,6 +155,11 @@ static void at91sam9263ek_macb_hw_init(void) /* Wait for end hardware reset */ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); + /* Restore NRST value */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0 << 8)) | + AT91_RSTC_URSTEN); + /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PC25), pin_to_controller(AT91_PIN_PC0) + PIO_PUER); -- 1.5.3.3

3 3