June 2008 - U-Boot

[U-Boot-Users] how to support usbtty
by zhuzhenhua 31 Aug '08

31 Aug '08

becides set CONFIG_USB_TTY, what other modification need to do for the usbtty support? thanks for any hints

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Re: [U-Boot-Users] [PATCH RFC] ARM: Davinci: NAND fix for large page ECC and linux compatibility
by Bernard Blackham 30 Aug '08

30 Aug '08

[offlist thread cc'd back to the list - hope you don't mind Scott!] Hi Scott, Thanks for your feedback. On Fri, Jun 27, 2008 at 12:04:00PM -0500, Scott Wood wrote: >Bernard Blackham wrote: >> What I would like to know though, is are you the right person to >> push this through, and can it make it into U-boot 1.3.4? I'm asking >> because it contains potential compatibility breaks, and I'd like to >> document the specific U-boot versions that will be affected. > > There is a general ARM tree, but I can take it through mine if that's > what is preferred. That was the suggestion on #uboot. I'd say it's more NAND related than ARM related too. >> +/* >> + * Previous versions of u-boot (1.3.3 and prior) and Montavista Linux kernels >> + * generated bogus ECCs on large-page NAND. Both large and small page NAND ECCs >> + * were incompatible with the Linux davinci git tree (since NAND was integrated >> + * in 2.6.24). >> + * Don't turn this on if you want backwards compatibility. >> + * Do turn this on if you want u-boot to be able to read and write NAND >> + * that can be written or read by the Linux davinci git kernel. >> + * >> +#define CFG_LINUX_COMPATIBLE_ECC >> + */ > > It seems odd that backwards compatibility requires turning *off* an > option with "compatible" in the name... I'd invert the sense of the > ifdef, and have it be something like CFG_BROKEN_ECC_COMPATIBILITY. The concern with this is people that use their own custom config files will need to add this #define when they upgrade. How about just changing the name to CFG_NEW_NAND_ECC_FORMAT then? > If the old way of doing small page ECC was valid, should we preserve > that (and change Linux back)? That's a little controversial. Basically, the old OOB layout didn't match any other layout used (except by the MV kernel), the actual ECC layout meant that the method for correction was overly complex (with 170 non-obvious lines of code), and allegedly broken: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/32035 The new code is about 30 lines, really simple, and I can even prove it's correctness (which I couldn't even begin to with the old code). Troy (cc'd) I believe was the original author. It could probably do with some comments though to make it dead obvious to the casual observer what's going on. I'll add them in. > We should probably default to doing it the right way, not the > broken-but-compatible way for large pages, though. It depends if you put backwards compatibility over reliability though. Many davinci users are still running the MontaVista-supplied 2.6.10 kernel which has the same broken ECC code and I've heard no word from MV on fixing it yet (and they're probably struggling to deal with the same backwards compatibility issue). How about this solution: in davinci/nand.c, we add something like this: #if defined(CFG_NAND_LARGEPAGE) && !defined(CFG_LINUX_COMPATIBLE_ECC) /* Comment this #error out only if you really really have to. */ #error "You are using old ECC code that is broken on large page devices. See doc/README.davinci" #endif This forces the user to make a choice - they'll probably curse while they're doing it, but they can't plead ignorance when they find their large page NAND isn't detecting ECC errors. > Perhaps we could use some currently unused OOB byte as a marker > for new/old ECC layout? Could do, but any filesystems which use the OOB bytes might step on these. It also complicates the code even moreso and creates a lot more scenarios to test and that could go wrong. I really do believe it should be a clean switch from one format to the other, for both small and large page NAND, with no run-time backwards compatibility. But that's just my POV. Cheers, Bernard.

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[U-Boot-Users] [PATCH][RFC] pci: Divided pci code of the powerpc
by Nobuhiro Iwamatsu 25 Aug '08

25 Aug '08

A source code of pci is written mainly on powerpc. Macro uses a pci source code of powerpc because other architecture (ex. SuperH) doesn't work. I made asm-ppc/pci.h and moved macro of pci. Other archtecture need to make the following macro in asm-xxx/pci.h #define pci_phys_to_mem(dev, addr) (addr) #define pci_mem_to_phys(dev, addr) (addr) #define pci_phys_to_io(dev, addr) (addr) #define pci_io_to_phys(dev, addr) (addr) Or have to make a function for pci address conversion. However, I want comment because I do not know the other architecture. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com> --- include/asm-ppc/pci.h | 53 +++++++++++++++++++++++++++++++++++++++++++++++++ include/asm-sh/pci.h | 5 ++++ include/pci.h | 22 +------------------- 3 files changed, 59 insertions(+), 21 deletions(-) create mode 100644 include/asm-ppc/pci.h diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h new file mode 100644 index 0000000..d5f8475 --- /dev/null +++ b/include/asm-ppc/pci.h @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Andreas Heppel <aheppel(a)sysgo.de> + * + * (C) Copyright 2002 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * aloong with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ASM_PCI_H +#define _ASM_PCI_H + +extern phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, + unsigned long addr, unsigned long flags); +extern unsigned long pci_hose_phys_to_bus(struct pci_controller* hose, + phys_addr_t addr, unsigned long flags); + +#define pci_phys_to_bus(dev, addr, flags) \ + pci_hose_phys_to_bus(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags)) +#define pci_bus_to_phys(dev, addr, flags) \ + pci_hose_bus_to_phys(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags)) + +#define pci_phys_to_mem(dev, addr) pci_phys_to_bus((dev), (addr), PCI_REGION_MEM) +#define pci_mem_to_phys(dev, addr) pci_bus_to_phys((dev), (addr), PCI_REGION_MEM) +#define pci_phys_to_io(dev, addr) pci_phys_to_bus((dev), (addr), PCI_REGION_IO) +#define pci_io_to_phys(dev, addr) pci_bus_to_phys((dev), (addr), PCI_REGION_IO) + +#ifdef CONFIG_MPC824X +extern void pci_mpc824x_init (struct pci_controller *hose); +#endif + +#ifdef CONFIG_MPC85xx +extern void pci_mpc85xx_init (struct pci_controller *hose); +#endif + +#endif /* _ASM_PCI_H */ diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h index bc59491..1f24fb6 100644 --- a/include/asm-sh/pci.h +++ b/include/asm-sh/pci.h @@ -44,4 +44,9 @@ int pci_sh4_read_config_dword(struct pci_controller *hose, int pci_sh4_write_config_dword(struct pci_controller *hose, pci_dev_t dev, int offset, u32 value); +#define pci_phys_to_mem(dev, addr) (addr) +#define pci_mem_to_phys(dev, addr) (addr) +#define pci_phys_to_io(dev, addr) (addr) +#define pci_io_to_phys(dev, addr) (addr) + #endif /* _ASM_PCI_H_ */ diff --git a/include/pci.h b/include/pci.h index 1c8e216..9b61635 100644 --- a/include/pci.h +++ b/include/pci.h @@ -432,21 +432,6 @@ extern __inline__ void pci_set_ops(struct pci_controller *hose, extern void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data); -extern phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, - unsigned long addr, unsigned long flags); -extern unsigned long pci_hose_phys_to_bus(struct pci_controller* hose, - phys_addr_t addr, unsigned long flags); - -#define pci_phys_to_bus(dev, addr, flags) \ - pci_hose_phys_to_bus(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags)) -#define pci_bus_to_phys(dev, addr, flags) \ - pci_hose_bus_to_phys(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags)) - -#define pci_phys_to_mem(dev, addr) pci_phys_to_bus((dev), (addr), PCI_REGION_MEM) -#define pci_mem_to_phys(dev, addr) pci_bus_to_phys((dev), (addr), PCI_REGION_MEM) -#define pci_phys_to_io(dev, addr) pci_phys_to_bus((dev), (addr), PCI_REGION_IO) -#define pci_io_to_phys(dev, addr) pci_bus_to_phys((dev), (addr), PCI_REGION_IO) - extern int pci_hose_read_config_byte(struct pci_controller *hose, pci_dev_t dev, int where, u8 *val); extern int pci_hose_read_config_word(struct pci_controller *hose, @@ -503,11 +488,6 @@ extern int pci_hose_config_device(struct pci_controller *hose, unsigned long mem, unsigned long command); -#ifdef CONFIG_MPC824X -extern void pci_mpc824x_init (struct pci_controller *hose); -#endif +#include <asm/pci.h> -#ifdef CONFIG_MPC85xx -extern void pci_mpc85xx_init (struct pci_controller *hose); -#endif #endif /* _PCI_H */ -- 1.5.5.1

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[U-Boot-Users] [PATCH] SPI Flash: Support the ST Microelectronics M25P80 and M25P40 SPI Flash
by Jason McMullan 21 Aug '08

21 Aug '08

This commit adds MTD support for the M25P80 (1Mx8) and the M25P40 (512kx8) SPI Flash components from ST Microelectronics. Tested with the M25P40, but should work for the M25P80 according to the spec sheet. Signed-off-by: Jason McMullan <mcmullan(a)netapp.com> --- drivers/mtd/spi/Makefile | 1 + drivers/mtd/spi/spi_flash.c | 5 + drivers/mtd/spi/spi_flash_internal.h | 1 + drivers/mtd/spi/stmicro.c | 326 ++++++++++++++++++++++++++++++++++ 4 files changed, 333 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/spi/stmicro.c diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index af6af97..01b288a 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -27,6 +27,7 @@ LIB := $(obj)libspi_flash.a COBJS-$(CONFIG_SPI_FLASH) += spi_flash.o COBJS-$(CONFIG_SPI_FLASH_ATMEL) += atmel.o +COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index d581cb3..dd4d130 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -134,6 +134,11 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, flash = spi_flash_probe_atmel(spi, idcode); break; #endif +#ifdef CONFIG_SPI_FLASH_STMICRO + case 0xff: + flash = spi_flash_probe_stmicro(spi, idcode); + break; +#endif default: debug("SF: Unsupported manufacturer %02X\n", idcode[0]); flash = NULL; diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 1438050..e5f758e 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -43,3 +43,4 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, /* Manufacturer-specific probe functions */ struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode); +struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode); diff --git a/drivers/mtd/spi/stmicro.c b/drivers/mtd/spi/stmicro.c new file mode 100644 index 0000000..cb5a971 --- /dev/null +++ b/drivers/mtd/spi/stmicro.c @@ -0,0 +1,326 @@ +/* + * $Id$ + * + * Copyright 2008, Network Appliance Inc. + * Author: Jason McMullan <mcmullan(a)netapp.com> + * + */ + +#include <common.h> +#include <malloc.h> +#include <spi_flash.h> + +#include "spi_flash_internal.h" + +/* M25Pxx-specific commands */ +#define CMD_M25PXX_WREN 0x06 /* Write Enable */ +#define CMD_M25PXX_WRDI 0x04 /* Write Disable */ +#define CMD_M25PXX_RDSR 0x05 /* Read Status Register */ +#define CMD_M25PXX_WRSR 0x01 /* Write Status Register */ +#define CMD_M25PXX_READ 0x03 /* Read Data Bytes */ +#define CMD_M25PXX_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */ +#define CMD_M25PXX_PP 0x02 /* Page Program */ +#define CMD_M25PXX_SE 0xd8 /* Sector Erase */ +#define CMD_M25PXX_BE 0xc7 /* Bulk Erase */ +#define CMD_M25PXX_DP 0xb9 /* Deep Power-down */ +#define CMD_M25PXX_RES 0xab /* Release from DP, and Read Signature */ + +#define STM_ID_M25P40 0x12 +#define STM_ID_M25P80 0x13 + +#define STMICRO_SR_WIP (1 << 0) /* Write-in-Progress */ + +struct stmicro_spi_flash_params { + uint8_t idcode1; + uint8_t esig; + /* Log2 of page size in power-of-two mode */ + uint8_t l2_page_size; + uint16_t pages_per_sector; + uint8_t nr_sectors; + const char *name; +}; + +struct stmicro_spi_flash { + const struct stmicro_spi_flash_params *params; + struct spi_flash flash; +}; + +static inline struct stmicro_spi_flash * +to_stmicro_spi_flash(struct spi_flash *flash) +{ + return container_of(flash, struct stmicro_spi_flash, flash); +} + +static const struct stmicro_spi_flash_params stmicro_spi_flash_table[] = { + { + .idcode1 = 0xff, + .esig = STM_ID_M25P40, + .l2_page_size = 8, + .pages_per_sector = 256, + .nr_sectors = 8, + .name = "M25P40", + }, + { + .idcode1 = 0xff, + .esig = STM_ID_M25P80, + .l2_page_size = 8, + .pages_per_sector = 256, + .nr_sectors = 16, + .name = "M25P80", + }, +}; + +static int stmicro_wait_ready(struct spi_flash *flash, unsigned long timeout) +{ + struct spi_slave *spi = flash->spi; + unsigned long timebase; + int ret; + u8 status; + u8 cmd[4] = { CMD_M25PXX_RDSR, 0xff, 0xff, 0xff }; + + ret = spi_xfer(spi, 32, &cmd[0], NULL, SPI_XFER_BEGIN); + if (ret) { + debug("SF: Failed to send command %02x: %d\n", cmd, ret); + return ret; + } + + timebase = get_timer(0); + do { + ret = spi_xfer(spi, 8, NULL, &status, 0); + if (ret) + return -1; + + if ((status & STMICRO_SR_WIP) == 0) + break; + + } while (1 || get_timer(timebase) < timeout); + + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); + + if ((status & STMICRO_SR_WIP) == 0) + return 0; + + /* Timed out */ + return -1; +} + +/* + * Assemble the address part of a command for STMicro devices in + * non-power-of-two page size mode. + */ +static void stmicro_build_address(struct stmicro_spi_flash *stm, u8 *cmd, u32 offset) +{ + unsigned long page_addr; + unsigned long byte_addr; + unsigned long page_size; + unsigned int page_shift; + + /* + * The "extra" space per page is the power-of-two page size + * divided by 32. + */ + page_shift = stm->params->l2_page_size; + page_size = (1 << page_shift); + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = page_addr >> (16 - page_shift); + cmd[1] = page_addr << (page_shift - 8) | (byte_addr >> 8); + cmd[2] = byte_addr; +} + +static int stmicro_read_fast(struct spi_flash *flash, + u32 offset, size_t len, void *buf) +{ + struct stmicro_spi_flash *stm = to_stmicro_spi_flash(flash); + u8 cmd[5]; + + cmd[0] = CMD_READ_ARRAY_FAST; + stmicro_build_address(stm, cmd + 1, offset); + cmd[4] = 0x00; + + return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len); +} + +static int stmicro_write(struct spi_flash *flash, + u32 offset, size_t len, const void *buf) +{ + struct stmicro_spi_flash *stm = to_stmicro_spi_flash(flash); + unsigned long page_addr; + unsigned long byte_addr; + unsigned long page_size; + unsigned int page_shift; + size_t chunk_len; + size_t actual; + int ret; + u8 cmd[4]; + + page_shift = stm->params->l2_page_size; + page_size = (1 << page_shift); + page_addr = offset / page_size; + byte_addr = offset % page_size; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + for (actual = 0; actual < len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[0] = CMD_M25PXX_PP; + cmd[1] = page_addr >> (16 - page_shift); + cmd[2] = page_addr << (page_shift - 8) | (byte_addr >> 8); + cmd[3] = byte_addr; + debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %d\n", + buf + actual, + cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); + + ret = spi_flash_cmd(flash->spi, CMD_M25PXX_WREN, NULL, 0); + if (ret < 0) { + debug("SF: Enabling Write failed\n"); + goto out; + } + + ret = spi_flash_cmd_write(flash->spi, cmd, 4, + buf + actual, chunk_len); + if (ret < 0) { + debug("SF: STMicro Page Program failed\n"); + goto out; + } + + ret = stmicro_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); + if (ret < 0) { + debug("SF: STMicro page programming timed out\n"); + goto out; + } + + page_addr++; + byte_addr = 0; + } + + debug("SF: STMicro: Successfully programmed %u bytes @ 0x%x\n", + len, offset); + ret = 0; + +out: + spi_release_bus(flash->spi); + return ret; +} + +int stmicro_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + struct stmicro_spi_flash *stm = to_stmicro_spi_flash(flash); + unsigned long sector_size; + unsigned int page_shift; + size_t actual; + int ret; + u8 cmd[4]; + + /* + * This function currently uses sector erase only. + * probably speed things up by using bulk erase + * when possible. + */ + + page_shift = stm->params->l2_page_size; + sector_size = (1 << page_shift) * stm->params->pages_per_sector; + + if (offset % sector_size || len % sector_size) { + debug("SF: Erase offset/length not multiple of sector size\n"); + return -1; + } + + len /= sector_size; + cmd[0] = CMD_M25PXX_SE; + cmd[2] = 0x00; + cmd[3] = 0x00; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + for (actual = 0; actual < len; actual++) { + cmd[1] = (offset / sector_size) + actual; + + ret = spi_flash_cmd(flash->spi, CMD_M25PXX_WREN, NULL, 0); + if (ret < 0) { + debug("SF: Enabling Write failed\n"); + goto out; + } + + ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0); + if (ret < 0) { + debug("SF: STMicro page erase failed\n"); + goto out; + } + + ret = stmicro_wait_ready(flash, 2 * CFG_HZ); /* Up to 2 seconds */ + if (ret < 0) { + debug("SF: STMicro page erase timed out\n"); + goto out; + } + } + + debug("SF: STMicro: Successfully erased %u bytes @ 0x%x\n", + len * sector_size, offset); + ret = 0; + +out: + spi_release_bus(flash->spi); + return ret; +} + +struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode) +{ + const struct stmicro_spi_flash_params *params; + unsigned long page_size; + struct stmicro_spi_flash *stm; + unsigned int i; + int ret; + u8 id[4]; + + ret = spi_flash_cmd(spi, CMD_M25PXX_RES, id, 4); + if (ret) + return NULL; + + for (i = 0; i < ARRAY_SIZE(stmicro_spi_flash_table); i++) { + params = &stmicro_spi_flash_table[i]; + if (params->idcode1 == idcode[1] && + params->esig == id[3]) + break; + } + + if (i == ARRAY_SIZE(stmicro_spi_flash_table)) { + debug("SF: Unsupported STMicro ID %02x\n", + id[3]); + return NULL; + } + + stm = malloc(sizeof(struct stmicro_spi_flash)); + if (!stm) { + debug("SF: Failed to allocate memory\n"); + return NULL; + } + + stm->params = params; + stm->flash.spi = spi; + stm->flash.name = params->name; + + /* Assuming power-of-two page size initially. */ + page_size = 1 << params->l2_page_size; + + stm->flash.write = stmicro_write; + stm->flash.erase = stmicro_erase; + stm->flash.read = stmicro_read_fast; + stm->flash.size = page_size * params->pages_per_sector + * params->nr_sectors; + + debug("SF: Detected %s with page size %u, total %u bytes\n", + params->name, page_size, stm->flash.size); + + return &stm->flash; +} -- 1.5.4.3

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[U-Boot-Users] Question about Bad CRC
by Rugunda, Solo 04 Aug '08

04 Aug '08

Hi I know that with UBoot, to fix the Bad CRC, all you have to do is to type saveenv during the boot process. However, what if someone does not have access to a terminal to be able to type in the saveenv command? Basically, I want to know of a way that a Bad CRC can be fixed without a user having to interact with the boot up process. Thank you. Solo

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[U-Boot-Users] [PATCH 1/1] FAT Bare Partition Support
by Antonio R. Costa 02 Aug '08

02 Aug '08

Logic unit: Purpose: Add support for bare partitions (no partition table) Author: Antnoio R. Costa <antonio.costa <at> atmel.com> Date : 11 Jun 2008 Status: ~~~~~~ Some SD cards are not formatted with a partition table but with just a bare partition at the beginnig of the memory. I modified get_partition_info_extended to call test_block_type as done by print_partition_extended. In this way bare FAT partitions are recognised. Now we need a test for Ext2. Signed-off-by: Antonio R. Costa <antonio.costa(a)atmel.com> diff --git a/disk/part_dos.c b/disk/part_dos.c index 4d778ec..e5cc8aa 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -1,4 +1,7 @@ /* + * (C) Copyright 2008 Atmel Corp. + * Antonio R. Costa <antonio.costa <at> atmel.com> + * <costa.antonior <at> gmail.com> * (C) Copyright 2001 * Raymond Lo, lo(a)routefree.com * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. @@ -53,6 +56,11 @@ static inline int le32_to_int(unsigned char *le32) ); } +static inline int le16_to_int(unsigned char *le16) +{ + return ((le16[1] << 8) + le16[0]); +} + static inline int is_extended(int part_type) { return (part_type == 0x5 || @@ -166,12 +174,20 @@ static int get_partition_info_extended (block_dev_desc_t *dev_desc, int ext_part unsigned char buffer[DEFAULT_SECTOR_SIZE]; dos_partition_t *pt; int i; - + if (dev_desc->block_read (dev_desc->dev, ext_part_sector, 1, (ulong *) buffer) != 1) { printf ("** Can't read partition table on %d:%d **\n", dev_desc->dev, ext_part_sector); return -1; } + +/* + * ARC: This check is bad: + * unfortunately both MBR and FAT bootsector + * have a sign 0x55aa @ 0x1FF + * I replaced it by test_block_type as in + * print_partition_extended + if (buffer[DOS_PART_MAGIC_OFFSET] != 0x55 || buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) { printf ("bad MBR sector signature 0x%02x%02x\n", @@ -179,7 +195,19 @@ static int get_partition_info_extended (block_dev_desc_t *dev_desc, int ext_part buffer[DOS_PART_MAGIC_OFFSET + 1]); return -1; } - +*/ + i=test_block_type(buffer); + + if(i==-1) { + printf ("bad MBR sector signature 0x%02x%02x\n", + buffer[DOS_PART_MAGIC_OFFSET], + buffer[DOS_PART_MAGIC_OFFSET + 1]); + return -1; + } + + if(i==DOS_PBR) + return -1; + /* Print all primary/logical partitions */ pt = (dos_partition_t *) (buffer + DOS_PART_TBL_OFFSET); for (i = 0; i < 4; i++, pt++) { @@ -193,6 +221,7 @@ static int get_partition_info_extended (block_dev_desc_t *dev_desc, int ext_part info->blksz = 512; info->start = ext_part_sector + le32_to_int (pt->start4); info->size = le32_to_int (pt->size4); + switch(dev_desc->if_type) { case IF_TYPE_IDE: case IF_TYPE_SATA: @@ -208,6 +237,13 @@ static int get_partition_info_extended (block_dev_desc_t *dev_desc, int ext_part case IF_TYPE_DOC: sprintf ((char *)info->name, "docd%c%d\n", 'a' + dev_desc->dev, part_num); break; + case IF_TYPE_MMC: + sprintf ((char *)info->name, "mmc%c%d\n", 'a' + dev_desc->dev, part_num); + break; + case IF_TYPE_SD: + case IF_TYPE_SDHC: + sprintf ((char *)info->name, "sd%c%d\n", 'a' + dev_desc->dev, part_num); + break; default: sprintf ((char *)info->name, "xx%c%d\n", 'a' + dev_desc->dev, part_num); break; -- 1.5.4.3

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[U-Boot-Users] [PATCH] NAND testing: chip->state does not always get set.
by Marcel Ziswiler 31 Jul '08

31 Jul '08

Fixes an issue with chip->state not always being set causing troubles. Signed-off-by: Marcel Ziswiler <marcel(a)ziswiler.com> --- drivers/mtd/nand/nand_base.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index bfd5cac..4a61fee 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -768,6 +768,7 @@ nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state) #else static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state) { + this->state = new_state; return 0; } #endif @@ -1649,6 +1650,9 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, */ cached = 0; + /* Somehow chip->state does not always get set causing troubles. */ + chip->state = FL_WRITING; + if (!cached || !(chip->options & NAND_CACHEPRG)) { chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); -- 1.5.4.1

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[U-Boot-Users] fdt/fdt_fixup_ethernet
by Marc Leeman 29 Jul '08

29 Jul '08

Since I moved to FDT (from the previous OF implementation), I get the following behaviour. Our board has a small 128 byte flash that stores a number of MAC addresses. I use a small command (getmac) to get the data from the devices and store them in the u-boot environment (ethaddr, eth1addr, eth2addr, eth3addr, eth4addr and eth5addr): # fw_printenv |grep eth netdev=eth0 ethact=TSEC0 ethaddr=00:04:a5:01:05:a8 eth1addr=00:04:a5:01:05:a8 eth2addr=00:04:a5:01:05:a9 eth3addr=00:04:a5:01:05:aa eth4addr=00:04:a5:01:05:ab The hardcoded MAC addresses are local range: #define CONFIG_ETHADDR 02:04:a5:01:05:ce #define CONFIG_ETH1ADDR 02:04:a5:01:05:ce There are no defines for ETH2-ETH5. the boot command is: getmac; setcy22150; run runsystem with runsystem: "runsystem=if itest $kernel -eq 0;" "then run scriptcmd;" "else if itest $kernel -eq 1;" "then run runupgr;" "else if itest $kernel -eq 2;" "then run runfact;" "else if itest $kernel -eq 3;" "then setenv kernel 2; saveenv; run runupgr;" "else setenv kernel 2; saveenv; run runfact;" The first time a boards boots, it will not find a valid environment in flash and will store its hardcoded values. It will then get the mac addresses from a seperate device; store them in the u-boot environment and save it in flash (else branch runsystem). However, the MAC addresses that are passed to the kernel are a mix of the hardcoded defaults and the ones retrieved from the mac flash: U-Boot 1.3.3-svn28560 (Jun 23 2008 - 15:03:58) MPC83XX Reset Status: Software Hard, External/Internal Soft, External/Internal Hard CPU: e300c1, MPC8347_PBGA_E, Rev: 1.1 at 349.999 MHz, CSB: 233.333 MHz Board: Barco BARCO8347NGS103 Platform. I2C: ready DRAM: 64 MB FLASH: 16 MB *** Warning - bad CRC, using default environment PCI1: 32-bit on PMC1 PCI2: 32-bit on PMC2, PMC3 PCI: Bus Dev VenId DevId Class Int 00 13 1172 0005 ff00 00 In: serial Out: serial Err: serial Net: TSEC0, TSEC1 Barco U-Boot Port Hit any key to stop autoboot: 0 MAC 0 (ethaddr): 00:04:a5:01:05:a8 MAC 1 (eth1addr): 00:04:a5:01:05:a8 MAC 2 (eth2addr): 00:04:a5:01:05:a9 MAC 3 (eth3addr): 00:04:a5:01:05:aa MAC 4 (eth4addr): 00:04:a5:01:05:ab Setting CY22150 Clock divider, .... CY22150 set Saving Environment to Flash... Un-Protected 1 sectors Un-Protected 1 sectors Erasing Flash... . done Erased 1 sectors Writing to Flash... done Protected 1 sectors Protected 1 sectors ## Booting kernel from Legacy Image at fe080000 ... Image Name: Linux-2.6.24 Created: 2008-06-23 8:55:45 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 927965 Bytes = 906.2 kB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ## Flattened Device Tree blob at fefc0000 Booting using the fdt blob at 0xfefc0000 Loading Device Tree to 007fd000, end 007fffff ... OK Fixup ethernet device 0 (00:04:a5:01:05:a8). <----- Fixup ethernet device 1 (02:04:a5:01:05:ce). <----- Fixup ethernet device 2 (00:00:00:00:00:00). <----- [ 0.037465] PCI: Cannot allocate resource region 0 of device 0000:00:00.0 [ 0.037491] PCI: Cannot allocate resource region 2 of device 0000:00:00.0 [ 0.037509] PCI: Cannot allocate resource region 4 of device 0000:00:00.0 init started: BusyBox v1.10.3 (2008-06-23 10:57:01 CEST) Please press Enter to activate this console. This only occurs the first time. When u-boot gets initialised with a valid environment (containing the correct MAC addresses), the correct MAC addresses get passed. Before the LIBFDT, this was not the case (and the MAC addresses were set properly). starting pid 325, tty '/dev/ttyS0': '/bin/sh --login' BusyBox v1.10.3 (2008-06-23 10:57:01 CEST) built-in shell (ash) Enter 'help' for a list of built-in commands. # reboot The system is going down NOW! Sending SIGTERM to all processes Requesting system reboot [ 500.869058] Restarting system. U-Boot 1.3.3-svn28560 (Jun 23 2008 - 15:03:58) MPC83XX Reset Status: Software Hard, External/Internal Soft, External/Internal Hard CPU: e300c1, MPC8347_PBGA_E, Rev: 1.1 at 349.999 MHz, CSB: 233.333 MHz Board: Barco BARCO8347NGS103 Platform. I2C: ready DRAM: 64 MB FLASH: 16 MB PCI1: 32-bit on PMC1 PCI2: 32-bit on PMC2, PMC3 PCI: Bus Dev VenId DevId Class Int 00 13 1172 0005 ff00 00 In: serial Out: serial Err: serial Net: TSEC0, TSEC1 Barco U-Boot Port Hit any key to stop autoboot: 0 MAC 0 (ethaddr): 00:04:a5:01:05:a8 MAC 1 (eth1addr): 00:04:a5:01:05:a8 MAC 2 (eth2addr): 00:04:a5:01:05:a9 MAC 3 (eth3addr): 00:04:a5:01:05:aa MAC 4 (eth4addr): 00:04:a5:01:05:ab Setting CY22150 Clock divider, .... CY22150 set ## Booting kernel from Legacy Image at fe080000 ... Image Name: Linux-2.6.24-barco1 Created: 2008-06-23 8:55:45 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 927965 Bytes = 906.2 kB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ## Flattened Device Tree blob at fefc0000 Booting using the fdt blob at 0xfefc0000 Loading Device Tree to 007fd000, end 007fffff ... OK Fixup ethernet device 0 (00:04:a5:01:05:a8). Fixup ethernet device 1 (00:04:a5:01:05:a8). Fixup ethernet device 2 (00:04:a5:01:05:a9). [ 0.037465] PCI: Cannot allocate resource region 0 of device 0000:00:00.0 [ 0.037491] PCI: Cannot allocate resource region 2 of device 0000:00:00.0 [ 0.037509] PCI: Cannot allocate resource region 4 of device 0000:00:00.0 init started: BusyBox v1.10.3 (2008-06-23 10:57:01 CEST) Please press Enter to activate this console. -- greetz, marc Doesn't simply shooting them dead strike you as viable? Rygel - Self Inflicted Wounds - Could'a, Would'a, Should'a chiana 2.6.18-4-ixp4xx #1 Tue Mar 27 18:01:56 BST 2007 GNU/Linux

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[U-Boot-Users] Add support for the hammerhead (AVR32) board
by Julien May 24 Jul '08

24 Jul '08

Hi This patch adds support for our new hammerhead (AVR32) board. Thanks & best rgds. Julien May

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Re: [U-Boot-Users] [PATCH]: Fix for bug: U-boot environment corrupt by reading uninitialized flash memory instead of RAM.
by Wolfgang Denk 22 Jul '08

22 Jul '08

In message <005801c8c0f0$2baed020$830c7060$@Tjernlund@transmode.se> you wrote: > > > > > If you do not like the way it is fixed, then remove git-commit > > > > c0559be371b2a64b1a817088c3308688e2182f93 which causes this regression > > > > for the time being, to buy more time to fix it in a different/better > > > > way for the next release. Now with this commit the complete at91-board > > > > series (boards that boot from dataflash or nandflash) are broken. > > > > So,we have a serious regression here. > > > > > > That's what I did now: I reverted commit c0559be3. > > > > > > Joakim, please re-submit after the problems were understood and fixed. > > > > You want me to resubmit something I got no control over? That won't > > happen and I doubt the problem boards will care either so I guess > > this improvement is lost. > > > > Jocke > > Has the problem boards been fixed yet? If so please resubmit commit c0559be3. So what *is* the state of this? If nobody responds soon, I will indeed re-apply that patch, andthen I will not revert this commit again. So if you think this bytes you, please speak up *now*. Jock, would you please send me a reminder in a week or so? Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Hindsight is an exact science.

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