February 2008 - U-Boot

[U-Boot-Users] [PATCHv2] [ads5121] DDR2 init/timing update.
by Grzegorz Bernacki 07 Feb '08

07 Feb '08

>From Chris Alger's CW bluestone config file. Signed-off-by: John Rigby <jrigby(a)freescale.com> Signed-off-by: Grzegorz Bernacki <gjb(a)semihalf.com> --- This patch was created by John Rigby. I tested it and rebased against current top of the tree. This is cleaned up version of previous patch, some defines were updated and unused defines were removed. board/ads5121/ads5121.c | 34 +++++++++++++++++++++------------- include/configs/ads5121.h | 15 ++++++--------- 2 files changed, 27 insertions(+), 22 deletions(-) diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c index 1582c22..462f41d 100644 --- a/board/ads5121/ads5121.c +++ b/board/ads5121/ads5121.c @@ -126,24 +126,24 @@ long int fixed_sdram (void) im->mddrc.prioman_config2 = CFG_MDDRCGRP_PM_CFG2; im->mddrc.hiprio_config = CFG_MDDRCGRP_HIPRIO_CFG; im->mddrc.lut_table0_main_upper = CFG_MDDRCGRP_LUT0_MU; - im->mddrc.lut_table1_main_upper = CFG_MDDRCGRP_LUT1_MU; - im->mddrc.lut_table2_main_upper = CFG_MDDRCGRP_LUT2_MU; - im->mddrc.lut_table3_main_upper = CFG_MDDRCGRP_LUT3_MU; - im->mddrc.lut_table4_main_upper = CFG_MDDRCGRP_LUT4_MU; im->mddrc.lut_table0_main_lower = CFG_MDDRCGRP_LUT0_ML; + im->mddrc.lut_table1_main_upper = CFG_MDDRCGRP_LUT1_MU; im->mddrc.lut_table1_main_lower = CFG_MDDRCGRP_LUT1_ML; + im->mddrc.lut_table2_main_upper = CFG_MDDRCGRP_LUT2_MU; im->mddrc.lut_table2_main_lower = CFG_MDDRCGRP_LUT2_ML; + im->mddrc.lut_table3_main_upper = CFG_MDDRCGRP_LUT3_MU; im->mddrc.lut_table3_main_lower = CFG_MDDRCGRP_LUT3_ML; + im->mddrc.lut_table4_main_upper = CFG_MDDRCGRP_LUT4_MU; im->mddrc.lut_table4_main_lower = CFG_MDDRCGRP_LUT4_ML; im->mddrc.lut_table0_alternate_upper = CFG_MDDRCGRP_LUT0_AU; - im->mddrc.lut_table1_alternate_upper = CFG_MDDRCGRP_LUT1_AU; - im->mddrc.lut_table2_alternate_upper = CFG_MDDRCGRP_LUT2_AU; - im->mddrc.lut_table3_alternate_upper = CFG_MDDRCGRP_LUT3_AU; - im->mddrc.lut_table4_alternate_upper = CFG_MDDRCGRP_LUT4_AU; im->mddrc.lut_table0_alternate_lower = CFG_MDDRCGRP_LUT0_AL; + im->mddrc.lut_table1_alternate_upper = CFG_MDDRCGRP_LUT1_AU; im->mddrc.lut_table1_alternate_lower = CFG_MDDRCGRP_LUT1_AL; + im->mddrc.lut_table2_alternate_upper = CFG_MDDRCGRP_LUT2_AU; im->mddrc.lut_table2_alternate_lower = CFG_MDDRCGRP_LUT2_AL; + im->mddrc.lut_table3_alternate_upper = CFG_MDDRCGRP_LUT3_AU; im->mddrc.lut_table3_alternate_lower = CFG_MDDRCGRP_LUT3_AL; + im->mddrc.lut_table4_alternate_upper = CFG_MDDRCGRP_LUT4_AU; im->mddrc.lut_table4_alternate_lower = CFG_MDDRCGRP_LUT4_AL; /* Initialize MDDRC */ @@ -157,18 +157,26 @@ long int fixed_sdram (void) im->mddrc.ddr_command = CFG_MICRON_NOP; im->mddrc.ddr_command = CFG_MICRON_PCHG_ALL; + im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_RFSH; + im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_RFSH; + im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_INIT_DEV_OP; + im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_EM2; + im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_PCHG_ALL; im->mddrc.ddr_command = CFG_MICRON_EM2; im->mddrc.ddr_command = CFG_MICRON_EM3; im->mddrc.ddr_command = CFG_MICRON_EN_DLL; - im->mddrc.ddr_command = CFG_MICRON_RST_DLL; + im->mddrc.ddr_command = CFG_MICRON_INIT_DEV_OP; im->mddrc.ddr_command = CFG_MICRON_PCHG_ALL; im->mddrc.ddr_command = CFG_MICRON_RFSH; im->mddrc.ddr_command = CFG_MICRON_INIT_DEV_OP; im->mddrc.ddr_command = CFG_MICRON_OCD_DEFAULT; - im->mddrc.ddr_command = CFG_MICRON_OCD_EXIT; - - for (i = 0; i < 10; i++) - im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_PCHG_ALL; + im->mddrc.ddr_command = CFG_MICRON_NOP; /* Start MDDRC */ im->mddrc.ddr_time_config0 = CFG_MDDRC_TIME_CFG0_RUN; diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index ce458ae..79e6306 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -109,25 +109,22 @@ * [04:00] DRAM tRPA */ -#define CFG_MDDRC_SYS_CFG 0xF8604200 -#define CFG_MDDRC_SYS_CFG_RUN 0xE8604200 -#define CFG_MDDRC_SYS_CFG_EN 0x30000000 -#define CFG_MDDRC_TIME_CFG0 0x0000281E -#define CFG_MDDRC_TIME_CFG0_RUN 0x01F4281E +#define CFG_MDDRC_SYS_CFG 0xF8604A00 +#define CFG_MDDRC_SYS_CFG_RUN 0xE8604A00 +#define CFG_MDDRC_SYS_CFG_EN 0xF0000000 +#define CFG_MDDRC_TIME_CFG0 0x00003D2E +#define CFG_MDDRC_TIME_CFG0_RUN 0x06183D2E #define CFG_MDDRC_TIME_CFG1 0x54EC1168 #define CFG_MDDRC_TIME_CFG2 0x35210864 #define CFG_MICRON_NOP 0x01380000 #define CFG_MICRON_PCHG_ALL 0x01100400 -#define CFG_MICRON_MR 0x01000022 #define CFG_MICRON_EM2 0x01020000 #define CFG_MICRON_EM3 0x01030000 #define CFG_MICRON_EN_DLL 0x01010000 -#define CFG_MICRON_RST_DLL 0x01000932 #define CFG_MICRON_RFSH 0x01080000 -#define CFG_MICRON_INIT_DEV_OP 0x01000832 +#define CFG_MICRON_INIT_DEV_OP 0x01000432 #define CFG_MICRON_OCD_DEFAULT 0x01010780 -#define CFG_MICRON_OCD_EXIT 0x01010400 /* DDR Priority Manager Configuration */ #define CFG_MDDRCGRP_PM_CFG1 0x000777AA -- 1.5.2.2

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[U-Boot-Users] [PATCH] [ADS5121] Change IPS freq to 66MHz
by John Rigby 07 Feb '08

07 Feb '08

Recommended frequency is 66MHz Change divider from 4 to 3. Signed-off-by: John Rigby <jrigby(a)freescale.com> --- include/mpc512x.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/mpc512x.h b/include/mpc512x.h index d1c6fb2..b51cf78 100644 --- a/include/mpc512x.h +++ b/include/mpc512x.h @@ -185,7 +185,7 @@ /* SCFR1 System Clock Frequency Register 1 */ -#define SCFR1_IPS_DIV 0x4 +#define SCFR1_IPS_DIV 0x3 #define SCFR1_IPS_DIV_MASK 0x03800000 #define SCFR1_IPS_DIV_SHIFT 23 -- 1.5.4.rc4.23.gcab31

3 4

[U-Boot-Users] [PATCHv2] [ads5121] Set ips dividor to 1/3 of csb clock.
by Grzegorz Bernacki 07 Feb '08

07 Feb '08

Previous setting cause ips clock to be out of spec. This bug was found by John Rigby from Freescale. Signed-off-by: Grzegorz Bernacki <gjb(a)semihalf.com> diff --git a/include/mpc512x.h b/include/mpc512x.h index a06b5c6..b51cf78 100644 --- a/include/mpc512x.h +++ b/include/mpc512x.h @@ -185,7 +185,7 @@ /* SCFR1 System Clock Frequency Register 1 */ -#define SCFR1_IPS_DIV 0x2 +#define SCFR1_IPS_DIV 0x3 #define SCFR1_IPS_DIV_MASK 0x03800000 #define SCFR1_IPS_DIV_SHIFT 23 -- 1.5.2.2

2 1

[U-Boot-Users] [PATCH] Add attribute POST_PREREL to ECC memory POST
by Larry Johnson 07 Feb '08

07 Feb '08

Signed-off-by: Larry Johnson <lrj(a)acm.org> --- post/tests.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/post/tests.c b/post/tests.c index 0c49e32..698f85c 100644 --- a/post/tests.c +++ b/post/tests.c @@ -241,8 +241,8 @@ struct post_test post_list[] = { "ECC test", "ecc", - "This test checks ECC facility of memory.", - POST_ROM | POST_ALWAYS, + "This test checks the ECC facility of memory.", + POST_ROM | POST_ALWAYS | POST_PREREL, &ecc_post_test, NULL, NULL, -- 1.5.2.5

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[U-Boot-Users] how to use mtdparts command in uboot
by nagi reddy chitta 06 Feb '08

06 Feb '08

Hi All, I am working on a project where my processor is MIPS and my NOR flash size is 32MB. So for i am managing all MTD partitions statically in Linux and the system is working fine. Now we are planning to change the mtd management to UBoot, so that i can add/delete/modify the partitions using command line facility of UBoot. i ported all required files to my working uboot sources, but not able to use the command *mtdparts properly.* My flash layout(partition info) shall look like: Flash is top boot one: Total Size:32MB Partition1: 3-4MB (Linux kernel) Partition2: 4-6MB(Root file system) Partition3: 8MB(application active) Partition4: 8MB(application backup) Partition5:3MB(Data base) Partitions6:512MB(UBoot) Some free memory. I wanted to put above info in UBoot using mtdparts. I tried to going thru the code but confused bit. Please can some one help me on getting some info regarding usage of mtdparts related commands? i have gone thru the mailing list also, but could not get much information. Best Regards, Nagi

2 1

[U-Boot-Users] [PATCH v2] spi: Kill spi_chipsel table and introduce spi_setup()
by Haavard Skinnemoen 06 Feb '08

06 Feb '08

No need to add an extra layer of indirection and externals all over the place. Just let the board code define two functions, spi_cs_activate() and spi_cs_deactivate, and use them to do any board-specific magic with the chipselects. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) Also introduce a new function, spi_setup(), which must be called to initialize communications parameters for a given slave. This function will also check if the given chipselect id is valid. The driver may call spi_cs_is_valid(), which is defined by the board code if necessary, to verify that a given chipselect id is valid on the current board. Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen(a)atmel.com> --- I haven't tested if the boards affected by this patch still work, or even build, so use with care. I'd very much like some feedback on whether this API change is a good thing or not though. board/amcc/taihu/taihu.c | 16 ++++--- board/freescale/mpc8349emds/mpc8349emds.c | 25 +++++------ board/sacsng/sacsng.c | 35 ++++++--------- board/ssv/adnpesc1/adnpesc1.c | 27 ++++++------ common/cmd_spi.c | 22 +++------ common/soft_spi.c | 28 ++++-------- cpu/nios/spi.c | 16 ++++--- drivers/rtc/ds1306.c | 28 ++++++++---- drivers/spi/mpc8xxx_spi.c | 17 +++++-- include/spi.h | 68 +++++++++++++++++++++-------- 10 files changed, 156 insertions(+), 126 deletions(-) diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c index ea83671..98e7f29 100644 --- a/board/amcc/taihu/taihu.c +++ b/board/amcc/taihu/taihu.c @@ -165,16 +165,20 @@ unsigned char spi_read(void) return (unsigned char)gpio_read_out_bit(SPI_DIN_GPIO15); } -void taihu_spi_chipsel(int cs) +int spi_cs_is_valid(int cs) { - gpio_write_bit(SPI_CS_GPIO0, cs); + return cs == 0; } -spi_chipsel_type spi_chipsel[]= { - taihu_spi_chipsel -}; +void spi_cs_activate(int cs) +{ + gpio_write_bit(SPI_CS_GPIO0, 1); +} -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(int cs) +{ + gpio_write_bit(SPI_CS_GPIO0, 0); +} #ifdef CONFIG_PCI static unsigned char int_lines[32] = { diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c index 9f4ac8e..f8af162 100644 --- a/board/freescale/mpc8349emds/mpc8349emds.c +++ b/board/freescale/mpc8349emds/mpc8349emds.c @@ -259,25 +259,24 @@ void sdram_init(void) #define SPI_CS_MASK 0x80000000 -void spi_eeprom_chipsel(int cs) +int spi_cs_is_valid(int cs) +{ + return cs == 0; +} + +void spi_cs_activate(int cs) { volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; - if (cs) - iopd->dat &= ~SPI_CS_MASK; - else - iopd->dat |= SPI_CS_MASK; + iopd->dat &= ~SPI_CS_MASK; } -/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_eeprom_chipsel, -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(int cs) +{ + volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; + iopd->dat |= SPI_CS_MASK; +} #endif /* CONFIG_HARD_SPI */ #if defined(CONFIG_OF_BOARD_SETUP) diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c index 25209e0..c454061 100644 --- a/board/sacsng/sacsng.c +++ b/board/sacsng/sacsng.c @@ -842,37 +842,30 @@ void show_boot_progress (int status) #define SPI_ADC_CS_MASK 0x00000800 #define SPI_DAC_CS_MASK 0x00001000 -void spi_adc_chipsel(int cs) +static const u32 cs_mask[] = { + SPI_ADC_CS_MASK, + SPI_DAC_CS_MASK, +}; + +int spi_cs_is_valid(int cs) +{ + return cs < sizeof(cs_mask) / sizeof(cs_mask[0]); +} + +void spi_cs_activate(int cs) { volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */); - if(cs) - iopd->pdat &= ~SPI_ADC_CS_MASK; /* activate the chip select */ - else - iopd->pdat |= SPI_ADC_CS_MASK; /* deactivate the chip select */ + iopd->pdat &= ~cs_mask[cs]; } -void spi_dac_chipsel(int cs) +void spi_cs_deactivate(int cs) { volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */); - if(cs) - iopd->pdat &= ~SPI_DAC_CS_MASK; /* activate the chip select */ - else - iopd->pdat |= SPI_DAC_CS_MASK; /* deactivate the chip select */ + iopd->pdat |= cs_mask[cs]; } -/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects: it calls the appropriate function to control the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_adc_chipsel, - spi_dac_chipsel -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); - #endif #endif /* CONFIG_MISC_INIT_R */ diff --git a/board/ssv/adnpesc1/adnpesc1.c b/board/ssv/adnpesc1/adnpesc1.c index 2ec3a72..834fd17 100644 --- a/board/ssv/adnpesc1/adnpesc1.c +++ b/board/ssv/adnpesc1/adnpesc1.c @@ -69,25 +69,24 @@ long int initdram (int board_type) #define SPI_RTC_CS_MASK 0x00000001 -void spi_rtc_chipsel(int cs) +int spi_cs_is_valid(int cs) +{ + return cs == 0; +} + +void spi_cs_activate(int cs) { nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE; - if (cs) - spi->slaveselect = SPI_RTC_CS_MASK; /* activate (1) */ - else - spi->slaveselect = 0; /* deactivate (0) */ + spi->slaveselect = SPI_RTC_CS_MASK; /* activate (1) */ } -/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects: it calls the appropriate function to control the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_rtc_chipsel -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(int cs) +{ + nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE; + + spi->slaveselect = 0; /* deactivate (0) */ +} #endif diff --git a/common/cmd_spi.c b/common/cmd_spi.c index 7604422..cab906f 100644 --- a/common/cmd_spi.c +++ b/common/cmd_spi.c @@ -38,13 +38,6 @@ #endif /* - * External table of chip select functions (see the appropriate board - * support for the actual definition of the table). - */ -extern spi_chipsel_type spi_chipsel[]; -extern int spi_chipsel_cnt; - -/* * Values from last command. */ static int device; @@ -101,19 +94,20 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } } - if ((device < 0) || (device >= spi_chipsel_cnt)) { - printf("Invalid device %d, giving up.\n", device); - return 1; - } if ((bitlen < 0) || (bitlen > (MAX_SPI_BYTES * 8))) { printf("Invalid bitlen %d, giving up.\n", bitlen); return 1; } - debug ("spi_chipsel[%d] = %08X\n", - device, (uint)spi_chipsel[device]); + /* FIXME: Make these parameters configurable */ + if (spi_setup(device, 1000000, SPI_MODE_0)) { + printf("Invalid device %d, giving up.\n", device); + return 1; + } + + debug ("spi chipsel = %08X\n", device); - if(spi_xfer(spi_chipsel[device], bitlen, dout, din) != 0) { + if(spi_xfer(device, bitlen, dout, din) != 0) { printf("Error with the SPI transaction.\n"); rcode = 1; } else { diff --git a/common/soft_spi.c b/common/soft_spi.c index e425061..251de1a 100644 --- a/common/soft_spi.c +++ b/common/soft_spi.c @@ -56,6 +56,11 @@ void spi_init (void) #endif } +int spi_setup(int cs, unsigned int max_hz, unsigned int mode) +{ + /* TODO: Implement the four possible SPI modes */ + return spi_cs_is_valid(cs) ? 0 : -1; +} /*----------------------------------------------------------------------- * SPI transfer @@ -68,16 +73,8 @@ void spi_init (void) * and "din" can point to the same memory location, in which case the * input data overwrites the output data (since both are buffered by * temporary variables, this is OK). - * - * If the chipsel() function is not NULL, it is called with a parameter - * of '1' (chip select active) at the start of the transfer and again with - * a parameter of '0' at the end of the transfer. - * - * If the chipsel() function _is_ NULL, it the responsibility of the - * caller to make the appropriate chip select active before calling - * spi_xfer() and making it inactive after spi_xfer() returns. */ -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) +int spi_xfer(int cs, int bitlen, uchar *dout, uchar *din) { #ifdef CFG_IMMR volatile immap_t *immr = (immap_t *)CFG_IMMR; @@ -86,12 +83,10 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) uchar tmpdout = 0; int j; - PRINTD("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", - (int)chipsel, *(uint *)dout, *(uint *)din, bitlen); + PRINTD("spi_xfer: chipsel %d dout %08X din %08X bitlen %d\n", + cs, *(uint *)dout, *(uint *)din, bitlen); - if(chipsel != NULL) { - (*chipsel)(1); /* select the target chip */ - } + spi_cs_activate(cs); for(j = 0; j < bitlen; j++) { /* @@ -124,10 +119,7 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) SPI_SCL(0); /* SPI wants the clock left low for idle */ - if(chipsel != NULL) { - (*chipsel)(0); /* deselect the target chip */ - - } + spi_cs_deactivate(cs); return(0); } diff --git a/cpu/nios/spi.c b/cpu/nios/spi.c index f37146b..c00ba87 100644 --- a/cpu/nios/spi.c +++ b/cpu/nios/spi.c @@ -83,13 +83,19 @@ static void memdump (void *pv, int num) #endif /* DEBUG */ +int spi_setup(int cs, unsigned int max_hz, unsigned int mode) +{ + /* TODO: Add support for different modes and speeds */ + return spi_cs_is_valid(cs) ? 0 : -1; +} + /* * SPI transfer: * * See include/spi.h and http://www.altera.com/literature/ds/ds_nios_spi.pdf * for more informations. */ -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) +int spi_xfer(int cs, int bitlen, uchar *dout, uchar *din) { int j; @@ -98,9 +104,7 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) memdump((void*)dout, (bitlen + 7) / 8); - if(chipsel != NULL) { - chipsel(1); /* select the target chip */ - } + spi_cs_activate(cs); if (bitlen > CFG_NIOS_SPIBITS) { /* leave chip select active */ spi->control |= NIOS_SPI_SSO; @@ -146,9 +150,7 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) spi->control &= ~NIOS_SPI_SSO; } - if(chipsel != NULL) { - chipsel(0); /* deselect the target chip */ - } + spi_cs_deactivate(cs); memdump((void*)din, (bitlen + 7) / 8); diff --git a/drivers/rtc/ds1306.c b/drivers/rtc/ds1306.c index 89e433d..49f66a9 100644 --- a/drivers/rtc/ds1306.c +++ b/drivers/rtc/ds1306.c @@ -62,13 +62,6 @@ #define RTC_USER_RAM_BASE 0x20 -/* - * External table of chip select functions (see the appropriate board - * support for the actual definition of the table). - */ -extern spi_chipsel_type spi_chipsel[]; -extern int spi_chipsel_cnt; - static unsigned int bin2bcd (unsigned int n); static unsigned char bcd2bin (unsigned char c); @@ -308,6 +301,15 @@ void rtc_get (struct rtc_time *tmp) { unsigned char sec, min, hour, mday, wday, mon, year; + /* + * Assuming Vcc = 2.0V (lowest speed) + * + * REVISIT: If we add an rtc_init() function we can do this + * step just once. + */ + if (spi_setup(CFG_SPI_RTC_DEVID, 600000, SPI_MODE_3 | SPI_CS_HIGH)) + return; + sec = rtc_read (RTC_SECONDS); min = rtc_read (RTC_MINUTES); hour = rtc_read (RTC_HOURS); @@ -356,6 +358,10 @@ void rtc_get (struct rtc_time *tmp) /* set clock time from *tmp in DS1306 RTC */ void rtc_set (struct rtc_time *tmp) { + /* Assuming Vcc = 2.0V (lowest speed) */ + if (spi_setup(CFG_SPI_RTC_DEVID, 600000, SPI_MODE_3 | SPI_CS_HIGH)) + return; + debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); @@ -374,6 +380,10 @@ void rtc_set (struct rtc_time *tmp) /* reset the DS1306 */ void rtc_reset (void) { + /* Assuming Vcc = 2.0V (lowest speed) */ + if (spi_setup(CFG_SPI_RTC_DEVID, 600000, SPI_MODE_3 | SPI_CS_HIGH)) + return; + /* clear the control register */ rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */ rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */ @@ -398,7 +408,7 @@ static unsigned char rtc_read (unsigned char reg) dout[0] = reg; - if (spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din) != 0) { + if (spi_xfer (CFG_SPI_RTC_DEVID, 16, dout, din) != 0) { return 0; } else { return din[1]; @@ -415,7 +425,7 @@ static void rtc_write (unsigned char reg, unsigned char val) dout[0] = 0x80 | reg; dout[1] = val; - spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din); + spi_xfer (CFG_SPI_RTC_DEVID, 16, dout, din); } #endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */ diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index a3d1c95..3c263f7 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -37,6 +37,15 @@ #define SPI_TIMEOUT 1000 +int spi_setup(int cs, unsigned int max_hz, unsigned int mode) +{ + /* + * TODO: Some of the code in spi_init() should probably move + * here. + */ + return spi_cs_is_valid(cs) ? 0 : -1; +} + void spi_init(void) { volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; @@ -53,7 +62,7 @@ void spi_init(void) spi->com = 0; /* LST bit doesn't do anything, so disregard */ } -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) +int spi_xfer(int cs, int bitlen, uchar *dout, uchar *din) { volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; unsigned int tmpdout, tmpdin, event; @@ -64,8 +73,7 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) debug("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", (int)chipsel, *(uint *) dout, *(uint *) din, bitlen); - if (chipsel != NULL) - (*chipsel) (1); /* select the target chip */ + spi_cs_activate(cs); spi->event = 0xffffffff; /* Clear all SPI events */ @@ -135,8 +143,7 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin); } - if (chipsel != NULL) - (*chipsel) (0); /* deselect the target chip */ + spi_cs_deactivate(cs); return 0; } diff --git a/include/spi.h b/include/spi.h index 03dc5bc..646f87b 100644 --- a/include/spi.h +++ b/include/spi.h @@ -24,17 +24,31 @@ #ifndef _SPI_H_ #define _SPI_H_ -/* - * The function call pointer type used to drive the chip select. - */ -typedef void (*spi_chipsel_type)(int cs); - - /*----------------------------------------------------------------------- * Initialization, must be called once on start up. */ void spi_init(void); +#define SPI_CPHA 0x01 /* clock phase */ +#define SPI_CPOL 0x02 /* clock polarity */ +#define SPI_MODE_0 (0|0) /* (original MicroWire) */ +#define SPI_MODE_1 (0|SPI_CPHA) +#define SPI_MODE_2 (SPI_CPOL|0) +#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) +#define SPI_CS_HIGH 0x04 /* CS active high */ + +/*----------------------------------------------------------------------- + * Set up communications parameters for a SPI slave. + * + * This must be called once for each slave. + * cs: Chip select ID of the slave chip. + * max_hz: Maximum SCK rate in Hz. + * mode: Clock polarity and clock phase. + * + * Returns: 0 on success, nonzero if one or more of the parameters are + * not supported. + */ +int spi_setup(int cs, unsigned int max_hz, unsigned int mode); /*----------------------------------------------------------------------- * SPI transfer @@ -48,19 +62,8 @@ void spi_init(void); * input data overwrites the output data (since both are buffered by * temporary variables, this is OK). * - * If the chipsel() function is not NULL, it is called with a parameter - * of '1' (chip select active) at the start of the transfer and again with - * a parameter of '0' at the end of the transfer. - * - * If the chipsel() function _is_ NULL, it the responsibility of the - * caller to make the appropriate chip select active before calling - * spi_xfer() and making it inactive after spi_xfer() returns. - * * spi_xfer() interface: - * chipsel: Routine to call to set/clear the chip select: - * if chipsel is NULL, it is not used. - * if(cs), make the chip select active (typically '0'). - * if(!cs), make the chip select inactive (typically '1'). + * cs: Chip select ID of the slave chip. * dout: Pointer to a string of bits to send out. The bits are * held in a byte array and are sent MSB first. * din: Pointer to a string of bits that will be filled in. @@ -68,6 +71,33 @@ void spi_init(void); * * Returns: 0 on success, not 0 on failure */ -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din); +int spi_xfer(int cs, int bitlen, uchar *dout, uchar *din); + +/*----------------------------------------------------------------------- + * Determine if a SPI chipselect is valid. + * This function is provided by the board if the low-level SPI driver + * needs it to determine if a given chipselect is actually valid. + * + * Returns: 1 if cs identifies a valid chip, 0 otherwise. + */ +int spi_cs_is_valid(int cs); + +/*----------------------------------------------------------------------- + * Activate a SPI chipselect. + * This function is provided by the board code when using a driver + * that can't control its chipselects automatically (e.g. + * common/soft_spi.c). When called, it should activate the chip select + * to the device identified by "cs". + */ +void spi_cs_activate(int cs); + +/*----------------------------------------------------------------------- + * Deactivate a SPI chipselect. + * This function is provided by the board code when using a driver + * that can't control its chipselects automatically (e.g. + * common/soft_spi.c). When called, it should deactivate the chip + * select to the device identified by "cs". + */ +void spi_cs_deactivate(int cs); #endif /* _SPI_H_ */ -- 1.5.3.8

5 10

[U-Boot-Users] [PATCH] Fix incorrect address test in AT91F_DataflashSelect().
by Stelian Pop 06 Feb '08

06 Feb '08

Signed-off-by: Stelian Pop <stelian(a)popies.net> --- drivers/mtd/dataflash.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/mtd/dataflash.c b/drivers/mtd/dataflash.c index 4084ff7..2421407 100644 --- a/drivers/mtd/dataflash.c +++ b/drivers/mtd/dataflash.c @@ -309,7 +309,7 @@ AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash, for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) if ( dataflash_info[i].id - && ((((int) addr) & 0xFF000000) == + && ((((int) *addr) & 0xFF000000) == dataflash_info[i].logical_address)) { addr_valid = 1; break; -- 1.5.3.3

2 1

[U-Boot-Users] When Love Comes Knocking
by exss＠mediasyst.de 06 Feb '08

06 Feb '08

The Miracle of Love http://67.182.1.227/

1 0

[U-Boot-Users] [PATCH] Use a structure instead of the error prone unnamed array to define the possible dataflash banks.
by Stelian Pop 06 Feb '08

06 Feb '08

Signed-off-by: Stelian Pop <stelian(a)popies.net> --- drivers/mtd/dataflash.c | 31 ++++++++++++++++++------------- 1 files changed, 18 insertions(+), 13 deletions(-) diff --git a/drivers/mtd/dataflash.c b/drivers/mtd/dataflash.c index 91903c8..4084ff7 100644 --- a/drivers/mtd/dataflash.c +++ b/drivers/mtd/dataflash.c @@ -26,17 +26,22 @@ AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; static AT91S_DataFlash DataFlashInst; +struct dataflash_addr { + unsigned long addr; + int cs; +}; + #ifdef CONFIG_AT91SAM9260EK -int cs[][CFG_MAX_DATAFLASH_BANKS] = { +struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ {CFG_DATAFLASH_LOGIC_ADDR_CS1, 1} }; #elif defined(CONFIG_AT91SAM9263EK) -int cs[][CFG_MAX_DATAFLASH_BANKS] = { - {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0} /* Logical adress, CS */ +struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { + {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ }; #else -int cs[][CFG_MAX_DATAFLASH_BANKS] = { +struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ {CFG_DATAFLASH_LOGIC_ADDR_CS3, 3} }; @@ -114,7 +119,7 @@ int AT91F_DataflashInit (void) dataflash_info[i].Desc.state = IDLE; dataflash_info[i].id = 0; dataflash_info[i].Device.pages_number = 0; - dfcode = AT91F_DataflashProbe (cs[i][1], + dfcode = AT91F_DataflashProbe (cs[i].cs, &dataflash_info[i].Desc); switch (dfcode) { @@ -123,9 +128,9 @@ int AT91F_DataflashInit (void) dataflash_info[i].Device.pages_size = 528; dataflash_info[i].Device.page_offset = 10; dataflash_info[i].Device.byte_mask = 0x300; - dataflash_info[i].Device.cs = cs[i][1]; + dataflash_info[i].Device.cs = cs[i].cs; dataflash_info[i].Desc.DataFlash_state = IDLE; - dataflash_info[i].logical_address = cs[i][0]; + dataflash_info[i].logical_address = cs[i].addr; dataflash_info[i].id = dfcode; found[i] += dfcode;; break; @@ -135,9 +140,9 @@ int AT91F_DataflashInit (void) dataflash_info[i].Device.pages_size = 528; dataflash_info[i].Device.page_offset = 10; dataflash_info[i].Device.byte_mask = 0x300; - dataflash_info[i].Device.cs = cs[i][1]; + dataflash_info[i].Device.cs = cs[i].cs; dataflash_info[i].Desc.DataFlash_state = IDLE; - dataflash_info[i].logical_address = cs[i][0]; + dataflash_info[i].logical_address = cs[i].addr; dataflash_info[i].id = dfcode; found[i] += dfcode;; break; @@ -147,9 +152,9 @@ int AT91F_DataflashInit (void) dataflash_info[i].Device.pages_size = 1056; dataflash_info[i].Device.page_offset = 11; dataflash_info[i].Device.byte_mask = 0x700; - dataflash_info[i].Device.cs = cs[i][1]; + dataflash_info[i].Device.cs = cs[i].cs; dataflash_info[i].Desc.DataFlash_state = IDLE; - dataflash_info[i].logical_address = cs[i][0]; + dataflash_info[i].logical_address = cs[i].addr; dataflash_info[i].id = dfcode; found[i] += dfcode;; break; @@ -159,9 +164,9 @@ int AT91F_DataflashInit (void) dataflash_info[i].Device.pages_size = 1056; dataflash_info[i].Device.page_offset = 11; dataflash_info[i].Device.byte_mask = 0x700; - dataflash_info[i].Device.cs = cs[i][1]; + dataflash_info[i].Device.cs = cs[i].cs; dataflash_info[i].Desc.DataFlash_state = IDLE; - dataflash_info[i].logical_address = cs[i][0]; + dataflash_info[i].logical_address = cs[i].addr; dataflash_info[i].id = dfcode; found[i] += dfcode;; break; -- 1.5.3.3

1 0

[U-Boot-Users] OR1200 (OpenRISC) Support?
by Jeremiah Frick 05 Feb '08

05 Feb '08

4 4