December 2008 - U-Boot

[U-Boot] [PATCH 1/2] XPedite5200 board support cleanup
by Peter Tyser 26 Dec '08

26 Dec '08

Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> --- This should be applied to the 85xx repository and depends on the currently applied "XPedite5200 board support" patch. board/xes/common/actl_nand.c | 65 ++++ board/xes/common/fsl_85xx_pci.c | 6 +- board/xes/xpedite5200/Makefile | 55 ++++ board/xes/xpedite5200/config.mk | 34 +++ board/xes/xpedite5200/ddr.c | 91 ++++++ board/xes/xpedite5200/law.c | 51 ++++ board/xes/xpedite5200/tlb.c | 85 ++++++ board/xes/xpedite5200/u-boot.lds | 145 +++++++++ board/xes/xpedite5200/xpedite5200.c | 125 ++++++++ include/configs/XPEDITE5200.h | 546 +++++++++++++++++++++++++++++++++++ 10 files changed, 1200 insertions(+), 3 deletions(-) create mode 100644 board/xes/common/actl_nand.c create mode 100644 board/xes/xpedite5200/Makefile create mode 100644 board/xes/xpedite5200/config.mk create mode 100644 board/xes/xpedite5200/ddr.c create mode 100644 board/xes/xpedite5200/law.c create mode 100644 board/xes/xpedite5200/tlb.c create mode 100644 board/xes/xpedite5200/u-boot.lds create mode 100644 board/xes/xpedite5200/xpedite5200.c create mode 100644 include/configs/XPEDITE5200.h diff --git a/board/xes/common/actl_nand.c b/board/xes/common/actl_nand.c new file mode 100644 index 0000000..465aeb0 --- /dev/null +++ b/board/xes/common/actl_nand.c @@ -0,0 +1,65 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * This driver support NAND devices which have address lines + * connected as ALE and CLE inputs. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <nand.h> +#include <asm/io.h> + +/* + * Hardware specific access to control-lines + */ +static void nand_addr_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W; + + if (ctrl & NAND_CTRL_CHANGE) { + IO_ADDR_W = (ulong)this->IO_ADDR_W; + + IO_ADDR_W &= ~(CONFIG_SYS_NAND_ACTL_CLE | + CONFIG_SYS_NAND_ACTL_ALE | + CONFIG_SYS_NAND_ACTL_NCE); + if (ctrl & NAND_CLE) + IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_CLE; + if (ctrl & NAND_ALE) + IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_ALE; + if (ctrl & NAND_NCE) + IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_NCE; + + this->IO_ADDR_W = (void *)IO_ADDR_W; + } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->ecc.mode = NAND_ECC_SOFT; + nand->cmd_ctrl = nand_addr_hwcontrol; + nand->chip_delay = CONFIG_SYS_NAND_ACTL_DELAY; + + return 0; +} diff --git a/board/xes/common/fsl_85xx_pci.c b/board/xes/common/fsl_85xx_pci.c index 56f3447..cd65a73 100644 --- a/board/xes/common/fsl_85xx_pci.c +++ b/board/xes/common/fsl_85xx_pci.c @@ -179,7 +179,7 @@ void pci_init_board(void) fsl_pci_init(hose); - first_free_busno = hose->last_busno+1; + first_free_busno = hose->last_busno + 1; printf(" PCI1 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); } else { @@ -289,7 +289,7 @@ void pci_init_board(void) if (!host) fsl_pci_config_unlock(hose); - first_free_busno = hose->last_busno+1; + first_free_busno = hose->last_busno + 1; printf(" PCIE2 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); } @@ -343,7 +343,7 @@ void pci_init_board(void) if (!host) fsl_pci_config_unlock(hose); - first_free_busno = hose->last_busno+1; + first_free_busno = hose->last_busno + 1; printf(" PCIE3 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); } diff --git a/board/xes/xpedite5200/Makefile b/board/xes/xpedite5200/Makefile new file mode 100644 index 0000000..02fe8fc --- /dev/null +++ b/board/xes/xpedite5200/Makefile @@ -0,0 +1,55 @@ +# +# Copyright 2008 Extreme Engineering Solutions, Inc. +# Copyright 2004 Freescale Semiconductor. +# (C) Copyright 2001-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += $(BOARD).o +COBJS-y += ddr.o +COBJS-y += law.o +COBJS-y += tlb.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) $(SOBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/xes/xpedite5200/config.mk b/board/xes/xpedite5200/config.mk new file mode 100644 index 0000000..be5a5c3 --- /dev/null +++ b/board/xes/xpedite5200/config.mk @@ -0,0 +1,34 @@ +# +# Copyright 2008 Extreme Engineering Solutions, Inc. +# Copyright 2004, 2007 Freescale Semiconductor. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# xpedite5200 board +# +ifndef TEXT_BASE +TEXT_BASE = 0xfff80000 +endif + +PLATFORM_CPPFLAGS += -DCONFIG_E500=1 +PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 +PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1 +PLATFORM_CPPFLAGS += -mrelocatable diff --git a/board/xes/xpedite5200/ddr.c b/board/xes/xpedite5200/ddr.c new file mode 100644 index 0000000..c5616d5 --- /dev/null +++ b/board/xes/xpedite5200/ddr.c @@ -0,0 +1,91 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include <common.h> +#include <i2c.h> + +#include <asm/fsl_ddr_sdram.h> +#include <asm/fsl_ddr_dimm_params.h> + +static void +get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address) +{ + i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t)); + + /* We use soldered memory, but use an SPD EEPROM to describe it. + * The SPD has an unspecified dimm type, but the DDR2 initialization + * code requires a specific type to be specified. This sets the type + * as a standard unregistered SO-DIMM. */ + if (spd->dimm_type == 0) { + spd->dimm_type = 0x4; + ((uchar *)spd)[63] += 0x4; + } +} + +unsigned int fsl_ddr_get_mem_data_rate(void) +{ + return get_ddr_freq(0); +} + +void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd, + unsigned int ctrl_num) +{ + unsigned int i; + + if (ctrl_num) { + printf("%s: invalid ctrl_num = %d\n", __func__, ctrl_num); + return; + } + + for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) + get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS); +} + +void fsl_ddr_board_options(memctl_options_t *popts, + dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + /* + * Factors to consider for clock adjust: + * - number of chips on bus + * - position of slot + * - DDR1 vs. DDR2? + * - ??? + * + * This needs to be determined on a board-by-board basis. + * 0110 3/4 cycle late + * 0111 7/8 cycle late + */ + popts->clk_adjust = 7; + + /* + * Factors to consider for CPO: + * - frequency + * - ddr1 vs. ddr2 + */ + popts->cpo_override = 9; + + /* + * Factors to consider for write data delay: + * - number of DIMMs + * + * 1 = 1/4 clock delay + * 2 = 1/2 clock delay + * 3 = 3/4 clock delay + * 4 = 1 clock delay + * 5 = 5/4 clock delay + * 6 = 3/2 clock delay + */ + popts->write_data_delay = 3; + + /* + * Factors to consider for half-strength driver enable: + * - number of DIMMs installed + */ + popts->half_strength_driver_enable = 0; +} diff --git a/board/xes/xpedite5200/law.c b/board/xes/xpedite5200/law.c new file mode 100644 index 0000000..386f9c5 --- /dev/null +++ b/board/xes/xpedite5200/law.c @@ -0,0 +1,51 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/fsl_law.h> +#include <asm/mmu.h> + +/* + * Notes: + * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. + * If flash is 8M at default position (last 8M), no LAW needed. + */ + +struct law_entry law_table[] = { + /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ + SET_LAW(CONFIG_SYS_FLASH_BASE2, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CONFIG_SYS_NAND_BASE, LAW_SIZE_1M, LAW_TRGT_IF_LBC), +#if CONFIG_SYS_PCI1_MEM_PHYS + SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_1G, LAW_TRGT_IF_PCI_1), + SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAWAR_SIZE_8M, LAW_TRGT_IF_PCI_1), +#endif +#if CONFIG_SYS_PCI2_MEM_PHYS + SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI_2), + SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCI_2), +#endif +}; + +int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/xes/xpedite5200/tlb.c b/board/xes/xpedite5200/tlb.c new file mode 100644 index 0000000..bd7bff8 --- /dev/null +++ b/board/xes/xpedite5200/tlb.c @@ -0,0 +1,85 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/mmu.h> + +struct fsl_e_tlb_entry tlb_table[] = { + /* TLB 0 - for temp stack in cache */ + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + + /* W**G* - NOR flashes */ + /* This will be changed to *I*G* after relocation to RAM. */ + SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE2, CONFIG_SYS_FLASH_BASE2, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G, + 0, 0, BOOKE_PAGESZ_256M, 1), + + SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 1, BOOKE_PAGESZ_1M, 1), + + /* *I*G* - NAND flash */ + SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 2, BOOKE_PAGESZ_1M, 1), + +#if CONFIG_PCI1 + /* *I*G* - PCI MEM */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_PHYS, CONFIG_SYS_PCI1_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 3, BOOKE_PAGESZ_1G, 1), +#endif + +#if CONFIG_PCI2 + /* *I*G* - PCI MEM */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCI2_MEM_PHYS, CONFIG_SYS_PCI2_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 4, BOOKE_PAGESZ_256M, 1), +#endif + +#if defined(CONFIG_PCI1) || defined(CONFIG_PCI2) + /* *I*G* - PCI IO */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_IO_PHYS, CONFIG_SYS_PCI1_IO_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 5, BOOKE_PAGESZ_16M, 1), +#endif +}; + +int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/board/xes/xpedite5200/u-boot.lds b/board/xes/xpedite5200/u-boot.lds new file mode 100644 index 0000000..bd952d2 --- /dev/null +++ b/board/xes/xpedite5200/u-boot.lds @@ -0,0 +1,145 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2004, 2007-2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +PHDRS +{ + text PT_LOAD; + bss PT_LOAD; +} + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + *(.text) + *(.got1) + } :text + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } :text + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + .bootpg ADDR(.text) + 0x7f000 : + { + cpu/mpc85xx/start.o (.bootpg) + } :text = 0xffff + + .resetvec ADDR(.text) + 0x7fffc : + { + *(.resetvec) + } :text = 0xffff + + . = ADDR(.text) + 0x80000; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } :bss + + . = ALIGN(4); + _end = . ; + PROVIDE (end = .); +} diff --git a/board/xes/xpedite5200/xpedite5200.c b/board/xes/xpedite5200/xpedite5200.c new file mode 100644 index 0000000..e266d1d --- /dev/null +++ b/board/xes/xpedite5200/xpedite5200.c @@ -0,0 +1,125 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2004, 2007 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <pci.h> +#include <asm/processor.h> +#include <asm/immap_85xx.h> +#include <asm/immap_fsl_pci.h> +#include <asm/io.h> +#include <asm/cache.h> +#include <asm/mmu.h> +#include <libfdt.h> +#include <fdt_support.h> +#include <pca953x.h> + +extern void ft_board_pci_setup(void *blob, bd_t *bd); + +int checkboard(void) +{ + volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); + volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR); + + char *s; + + printf("Board: X-ES %s PMC\n", CONFIG_SYS_BOARD_NAME); + printf(" "); + s = getenv("board_rev"); + if (s) + printf("Rev %s, ", s); + s = getenv("serial#"); + if (s) + printf("Serial# %s, ", s); + s = getenv("board_cfg"); + if (s) + printf("Cfg %s", s); + printf("\n"); + + lbc->ltesr = 0xffffffff; /* Clear LBC error interrupts */ + lbc->lteir = 0xffffffff; /* Enable LBC error interrupts */ + ecm->eedr = 0xffffffff; /* Clear ecm errors */ + ecm->eeer = 0xffffffff; /* Enable ecm errors */ + + return 0; +} + +static void flash_cs_fixup(void) +{ + volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); + int flash_sel; + + /* + * Print boot dev and swap flash flash chip selects if booted from 2nd + * flash. Swapping chip selects presents user with a common memory + * map regardless of which flash was booted from. + */ + flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) & + CONFIG_SYS_PCA953X_FLASH_PASS_CS)); + printf("FLASH: Executed from FLASH%d\n", flash_sel ? 2 : 1); + + if (flash_sel) { + lbc->br0 = CONFIG_SYS_BR1_PRELIM; + lbc->or0 = CONFIG_SYS_OR1_PRELIM; + + lbc->br1 = CONFIG_SYS_BR0_PRELIM; + lbc->or1 = CONFIG_SYS_OR0_PRELIM; + } +} + +int board_early_init_r(void) +{ + /* Initialize PCA9557 devices */ + pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); + pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0); + + /* + * Remap NOR flash region to caching-inhibited + * so that flash can be erased/programmed properly. + */ + + /* Flush d-cache and invalidate i-cache of any FLASH data */ + flush_dcache(); + invalidate_icache(); + + /* Invalidate existing TLB entry for NOR flash */ + disable_tlb(0); + set_tlb(1, (CONFIG_SYS_FLASH_BASE2 & 0xf0000000), + (CONFIG_SYS_FLASH_BASE2 & 0xf0000000), + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 0, BOOKE_PAGESZ_256M, 1); + + flash_cs_fixup(); + + return 0; +} + +#if defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ +#ifdef CONFIG_PCI + ft_board_pci_setup(blob, bd); +#endif + ft_cpu_setup(blob, bd); +} +#endif diff --git a/include/configs/XPEDITE5200.h b/include/configs/XPEDITE5200.h new file mode 100644 index 0000000..1df6855 --- /dev/null +++ b/include/configs/XPEDITE5200.h @@ -0,0 +1,546 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2004-2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * xpedite5200 board configuration file + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + */ +#define CONFIG_BOOKE 1 /* BOOKE */ +#define CONFIG_E500 1 /* BOOKE e500 family */ +#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ +#define CONFIG_MPC8548 1 +#define CONFIG_XPEDITE5200 1 +#define CONFIG_SYS_BOARD_NAME "XPedite5200" +#define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#define CONFIG_RELOC_FIXUP_WORKS /* Fully relocate to SDRAM */ + +#define CONFIG_PCI 1 /* Enable PCI/PCIE */ +#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ +#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ +#define CONFIG_PCI1 1 /* PCI controller 1 */ +#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ +#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ + +/* + * DDR config + */ +#define CONFIG_FSL_DDR2 +#undef CONFIG_FSL_DDR_INTERACTIVE +#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ +#define CONFIG_DDR_SPD +#define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#define SPD_EEPROM_ADDRESS 0x54 +#define CONFIG_NUM_DDR_CONTROLLERS 1 +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL 2 +#define CONFIG_DDR_ECC +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_VERY_BIG_RAM + +#define CONFIG_SYS_CLK_FREQ 66666666 + +/* + * These can be toggled for performance analysis, otherwise use default. + */ +#define CONFIG_L2_CACHE /* toggle L2 cache */ +#define CONFIG_BTB /* toggle branch predition */ +#define CONFIG_ENABLE_36BIT_PHYS 1 + +/* + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) + */ +#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ +#define CONFIG_SYS_CCSRBAR 0xef000000 /* relocated CCSRBAR */ +#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */ +#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR + 0x8000) + +/* + * Diagnostics + */ +#define CONFIG_SYS_ALT_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x20000000 + +/* + * Memory map + * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable + * 0x8000_0000 0xbfff_ffff PCI1 Mem 1G non-cacheable + * 0xe000_0000 0xe7ff_ffff SRAM/SSRAM/L1 Cache 128M non-cacheable + * 0xe800_0000 0xe87f_ffff PCI1 IO 8M non-cacheable + * 0xef00_0000 0xef0f_ffff CCSR/IMMR 1M non-cacheable + * 0xef80_0000 0xef8f_ffff NAND Flash 1M non-cacheable + * 0xf800_0000 0xfbff_ffff NOR Flash 2 64M non-cacheable + * 0xfc00_0000 0xffff_ffff NOR Flash 1 64M non-cacheable + */ + +#define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_4 | LCRR_EADC_3) + +/* + * NAND flash configuration + */ +#define CONFIG_SYS_NAND_BASE 0xef800000 +#define CONFIG_SYS_NAND_BASE2 0xef840000 /* Unused at this time */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_NAND_ACTL +#define CONFIG_SYS_NAND_ACTL_CLE (1 << 3) /* ADDR3 is CLE */ +#define CONFIG_SYS_NAND_ACTL_ALE (1 << 4) /* ADDR4 is ALE */ +#define CONFIG_SYS_NAND_ACTL_NCE (0) /* NCE not controlled by ADDR */ +#define CONFIG_SYS_NAND_ACTL_DELAY 25 + +/* + * NOR flash configuration + */ +#define CONFIG_SYS_FLASH_BASE 0xfc000000 +#define CONFIG_SYS_FLASH_BASE2 0xf8000000 +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2} +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ + {0xfbf40000, 0xc0000} } +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ + +/* + * Chip select configuration + */ +/* NOR Flash 0 on CS0 */ +#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ + BR_PS_16 | \ + BR_V) +#define CONFIG_SYS_OR0_PRELIM (OR_AM_64MB | \ + OR_GPCM_ACS_DIV4 | \ + OR_GPCM_SCY_8) + +/* NOR Flash 1 on CS1 */ +#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FLASH_BASE2 | \ + BR_PS_16 | \ + BR_V) +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_OR0_PRELIM + +/* NAND flash on CS2 */ +#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \ + BR_PS_8 | \ + BR_V) + +/* NAND flash on CS2 */ +#define CONFIG_SYS_OR2_PRELIM (OR_AM_256KB | \ + OR_GPCM_BCTLD | \ + OR_GPCM_CSNT | \ + OR_GPCM_ACS_DIV4 | \ + OR_GPCM_SCY_4 | \ + OR_GPCM_TRLX | \ + OR_GPCM_EHTR) + +/* NAND flash on CS3 */ +#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_NAND_BASE2 | \ + BR_PS_8 | \ + BR_V) +#define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_OR2_PRELIM + +/* + * Use L1 as initial stack + */ +#define CONFIG_SYS_INIT_RAM_LOCK 1 +#define CONFIG_SYS_INIT_RAM_ADDR 0xe0000000 +#define CONFIG_SYS_INIT_RAM_END 0x4000 + +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ + +/* + * Serial Port + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) +#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} +#define CONFIG_BAUDRATE 115200 +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ + +/* + * Use the HUSH parser + */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* + * Pass open firmware flat tree + */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_OF_STDOUT_VIA_ALIAS 1 + +#define CONFIG_SYS_64BIT_VSPRINTF 1 +#define CONFIG_SYS_64BIT_STRTOUL 1 + +/* + * I2C + */ +#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ +#define CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_CMD_TREE + +/* I2C EEPROM */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */ + +/* I2C RTC */ +#define CONFIG_RTC_M41T11 1 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_SYS_M41T11_BASE_YEAR 2000 + +/* GPIO */ +#define CONFIG_PCA953X +#define CONFIG_SYS_I2C_PCA953X_ADDR0 0x18 +#define CONFIG_SYS_I2C_PCA953X_ADDR1 0x19 +#define CONFIG_SYS_I2C_PCA953X_ADDR CONFIG_SYS_I2C_PCA953X_ADDR0 + +/* PCA957 @ 0x18 */ +#define CONFIG_SYS_PCA953X_BRD_CFG0 0x01 +#define CONFIG_SYS_PCA953X_BRD_CFG1 0x02 +#define CONFIG_SYS_PCA953X_BRD_CFG2 0x04 +#define CONFIG_SYS_PCA953X_XMC_ROOT0 0x08 +#define CONFIG_SYS_PCA953X_FLASH_PASS_CS 0x10 +#define CONFIG_SYS_PCA953X_FLASH_WP 0x20 +#define CONFIG_SYS_PCA953X_MONARCH 0x40 +#define CONFIG_SYS_PCA953X_EREADY 0x80 + +/* PCA957 @ 0x19 */ +#define CONFIG_SYS_PCA953X_P14_IO0 0x01 +#define CONFIG_SYS_PCA953X_P14_IO1 0x02 +#define CONFIG_SYS_PCA953X_P14_IO2 0x04 +#define CONFIG_SYS_PCA953X_P14_IO3 0x08 +#define CONFIG_SYS_PCA953X_P14_IO4 0x10 +#define CONFIG_SYS_PCA953X_P14_IO5 0x20 +#define CONFIG_SYS_PCA953X_P14_IO6 0x40 +#define CONFIG_SYS_PCA953X_P14_IO7 0x80 + +/* + * General PCI + * Memory space is mapped 1-1, but I/O space must start from 0. + */ +#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 +#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE +#define CONFIG_SYS_PCI1_MEM_SIZE 0x40000000 /* 1G */ +#define CONFIG_SYS_PCI1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCI1_IO_PHYS 0xe8000000 +#define CONFIG_SYS_PCI1_IO_SIZE 0x00800000 /* 1M */ + +/* + * Networking options + */ +#define CONFIG_TSEC_ENET /* tsec ethernet support */ +#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ +#define CONFIG_NET_MULTI 1 +#define CONFIG_MII 1 /* MII PHY management */ +#define CONFIG_ETHPRIME "eTSEC1" + +#define CONFIG_TSEC1 1 +#define CONFIG_TSEC1_NAME "eTSEC1" +#define TSEC1_FLAGS TSEC_GIGABIT +#define TSEC1_PHY_ADDR 1 +#define TSEC1_PHYIDX 0 +#define CONFIG_HAS_ETH0 + +#define CONFIG_TSEC2 1 +#define CONFIG_TSEC2_NAME "eTSEC2" +#define TSEC2_FLAGS TSEC_GIGABIT +#define TSEC2_PHY_ADDR 2 +#define TSEC2_PHYIDX 0 +#define CONFIG_HAS_ETH1 + +#define CONFIG_TSEC3 1 +#define CONFIG_TSEC3_NAME "eTSEC3" +#define TSEC3_FLAGS TSEC_GIGABIT +#define TSEC3_PHY_ADDR 3 +#define TSEC3_PHYIDX 0 +#define CONFIG_HAS_ETH2 + +#define CONFIG_TSEC4 1 +#define CONFIG_TSEC4_NAME "eTSEC4" +#define TSEC4_FLAGS TSEC_GIGABIT +#define TSEC4_PHY_ADDR 4 +#define TSEC4_PHYIDX 0 +#define CONFIG_HAS_ETH3 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY + +/* + * Command configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NET +#define CONFIG_CMD_PCA953X +#define CONFIG_CMD_PCA953X_INFO +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_SNTP + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ +#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */ +#define CONFIG_PANIC_HANG /* do not reset board on panic */ +#define CONFIG_PREBOOT /* enable preboot variable */ +#define CONFIG_FIT 1 +#define CONFIG_FIT_VERBOSE 1 +#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ +#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 16 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ + +/* + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +/* + * Environment Configuration + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */ +#define CONFIG_ENV_SIZE 0x8000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024)) + +/* + * Flash memory map: + * fff80000 - ffffffff Pri U-Boot (512 KB) + * fff40000 - fff7ffff Pri U-Boot Environment (256 KB) + * fff00000 - fff3ffff Pri FDT (256KB) + * fef00000 - ffefffff Pri OS image (16MB) + * fc000000 - feefffff Pri OS Use/Filesystem (47MB) + * + * fbf80000 - fbffffff Sec U-Boot (512 KB) + * fbf40000 - fbf7ffff Sec U-Boot Environment (256 KB) + * fbf00000 - fbf3ffff Sec FDT (256KB) + * faf00000 - fbefffff Sec OS image (16MB) + * f8000000 - faefffff Sec OS Use/Filesystem (47MB) + */ +#define CONFIG_UBOOT1_ENV_ADDR MK_STR(0xfff80000) +#define CONFIG_UBOOT2_ENV_ADDR MK_STR(0xfbf80000) +#define CONFIG_FDT1_ENV_ADDR MK_STR(0xfff00000) +#define CONFIG_FDT2_ENV_ADDR MK_STR(0xfbf00000) +#define CONFIG_OS1_ENV_ADDR MK_STR(0xfef00000) +#define CONFIG_OS2_ENV_ADDR MK_STR(0xfaf00000) + +#define CONFIG_PROG_UBOOT1 \ + "$download_cmd $loadaddr $ubootfile; " \ + "if test $? -eq 0; then " \ + "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; " \ + "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; " \ + "if test $? -ne 0; then " \ + "echo PROGRAM FAILED; " \ + "else; " \ + "echo PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_UBOOT2 \ + "$download_cmd $loadaddr $ubootfile; " \ + "if test $? -eq 0; then " \ + "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; " \ + "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; " \ + "if test $? -ne 0; then " \ + "echo PROGRAM FAILED; " \ + "else; " \ + "echo PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_BOOT_OS_NET \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "if test -n $fdtaddr; then " \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "bootm $osaddr - $fdtaddr; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi; " \ + "else; " \ + "bootm $osaddr; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_OS1 \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_OS1_ENV_ADDR" +$filesize; " \ + "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ + "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo OS PROGRAM FAILED; " \ + "else; " \ + "echo OS PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_OS2 \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_OS2_ENV_ADDR" +$filesize; " \ + "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ + "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo OS PROGRAM FAILED; " \ + "else; " \ + "echo OS PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_FDT1 \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;" \ + "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ + "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo FDT PROGRAM FAILED; " \ + "else; " \ + "echo FDT PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_FDT2 \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;" \ + "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ + "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo FDT PROGRAM FAILED; " \ + "else; " \ + "echo FDT PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=yes\0" \ + "download_cmd=tftp\0" \ + "console_args=console=ttyS0,115200\0" \ + "root_args=root=/dev/nfs rw\0" \ + "misc_args=ip=on\0" \ + "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \ + "bootfile=/home/user/file\0" \ + "osfile=/home/user/uImage-XPedite5200\0" \ + "fdtfile=/home/user/xpedite5200.dtb\0" \ + "ubootfile=/home/user/u-boot.bin\0" \ + "fdtaddr=c00000\0" \ + "osaddr=0x1000000\0" \ + "loadaddr=0x1000000\0" \ + "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \ + "prog_uboot2="CONFIG_PROG_UBOOT2"\0" \ + "prog_os1="CONFIG_PROG_OS1"\0" \ + "prog_os2="CONFIG_PROG_OS2"\0" \ + "prog_fdt1="CONFIG_PROG_FDT1"\0" \ + "prog_fdt2="CONFIG_PROG_FDT2"\0" \ + "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \ + "bootcmd_flash1=run set_bootargs; " \ + "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\ + "bootcmd_flash2=run set_bootargs; " \ + "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\ + "bootcmd=run bootcmd_flash1\0" +#endif /* __CONFIG_H */ -- 1.6.0.2.GIT

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Re: [U-Boot] debug uboot from ram for x86 board
by Lance Zhang 26 Dec '08

26 Dec '08

> I carefully read the codes related to the do_go function, and I find that(u > boot 1.1.6): > In do_go() functions: > #if defined(CONFIG_I386) > /* > * x86 does not use a dedicated register to pass the pointer > * to the global_data > */ > argv[0] = (char *)gd; > #endif > > But in app_startup function: > void app_startup(char **argv) > { > unsigned long * cp = &__bss_start; > > /* Zero out BSS */ > while (cp < &_end) { > *cp++ = 0; > } > > #if defined(CONFIG_I386) > /* x86 does not have a dedicated register for passing global_data */ > global_data = (gd_t *)argv[-1]; > jt = global_data->jt; > #endif > } > > The gd is not in the same place :see do_go is argv[0], and app_startup is (gd_t > *)argv[-1]. > > But later I modified the global_data = (gd_t *)argv[-1]; in app_startup > function to global_data = (gd_t *)argv[0], the change still does not make sense. > > Any ideas? Maybe I should change the argv[0] = (char *)gd; in do_go function > to argv[-1] = (char *)gd; > Later, I tried remove the function bodies, and the main function like this: int _main (int argc, char *argv[]) { return (8); } And got the following result: boot > go 01000000 ## Starting application at 0x01000000 ... ## Application terminated, rc = 0x8 I am sure app_startup and do_go are not consistent, so I can not use any printf or some other function calls. Currently I can not update the flash as I do not have jtag tools. Later I will update flash and see if it could fix the problem. Thanks in advance

1 0

[U-Boot] debug uboot from ram for x86 board
by LanceZ 26 Dec '08

26 Dec '08

Hi there, I am trying to add some codes(driver) to u boot, but I do not have jtag or other debugging tools. what I can use are :serial port/ethernet, so I can use tftp and loadb to download the bin to ram. Currently, I tried to use "loadb" to load the sample(hello_world) to ram and then execute it, I always failed .here are the output for my testing. I rename hello_world to rt61test then rebuild all uboot use nm command get follows: 00040000 T rt61test 00040098 T dummy then start my board In: serial Out: serial Err: serial Net: i82559#0 boot > loadb 0x40000 ## Ready for binary (kermit) download to 0x00040000 at 115200 bps... ## Start Addr = 0x00040000 boot > go 40000 ## Starting application at 0x00040000 ... Invalid Instruction at 0000:00000000 I also tried other address for loadb(loadb 0x1000000) I got the same error result Appreciate anyone can give me a direction or explain the error Thanks -- View this message in context: http://www.nabble.com/debug-uboot-from-ram-for-x86-board-tp21165593p2116559… Sent from the Uboot - Users mailing list archive at Nabble.com.

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[U-Boot] My Linux kernel hangs at the Uncompressing Linux ... phase
by Diptopal Basu 25 Dec '08

25 Dec '08

Hi , I have compiled a Linux kernel ( version 2.6.22.19 ) for ARM at91rm9200dk board, I used the mkimage utility in U boot load the kernel at a specific area of memory . ( Skyeye Simulator ) However I get the Uncompressing Linux ... message and it stays at that line indefinitely ... attaching screenshot ... this is on the skyeye simulator . I am just booting the kernel I do not have a device tree blob or anything else here , that is , I compiled the kernel with at91rm9200dk defconfig, got the zImage , used mkimage to add a U boot header and using bootm <memory location where the file is flashed > command to start it . What could be the problem ? Regards Diptopal Basu

3 2

[U-Boot] How does U boot pass kernel parameters to Operating System ...
by Diptopal Basu 25 Dec '08

25 Dec '08

Hi , I am using U boot for ARM at91rm9200dk . How does U boot pass Kernel parameters to Linux Operating system ? I mean the Tagged list (e.g. ATAG_CORE , ATAG_MEM , ATAG_NONE etc ) . Is is sent during the 'bootm' command ? How to edit the Tagged list if required ? Regards Diptopal Basu

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Re: [U-Boot] [RFC][PATCH] Code Clean-up (weak functions)
by Shinya Kuribayashi 25 Dec '08

25 Dec '08

Joakim Tjernlund wrote: > Checking for NULL before invocation won't work unless you fix the relocation > routine not to relocate NULL values. That is what I have been trying to say > several times now. That fix should be performed regardless so no nasty > surprises will happen in the future. Perhaps there are other cases besides > weak symbols too. > You can either fix the assembler routine in all start.S or make all relevant > boards use the C-versions I posted. > > Jocke Sorry, I'm confused. I'll wait and see how it goes... Shinya

1 0

Re: [U-Boot] [RFC][PATCH] Code Clean-up (weak functions)
by Shinya Kuribayashi 25 Dec '08

25 Dec '08

Joakim Tjernlund wrote: >>> - There is no purely weak functions and therfore no longer code like: >>> if (do_something) >>> do_somthing(); >>> All instances have been replaced by empty functions with an alias. e.g. >>> void __do_something (args) {} >>> do_something(args) __atttribute__((weak, alias("__do_something"))); > > Curious as to why you removed such code? Was it because it didn't work? If > so I might have an answer for that. See my post: > "Re: [U-Boot] [PATCH V4] cmd_bdinfo: move implementation to arch instead of common" > > Jocke Good to know. This doc also helps: http://docs.sun.com/app/docs/doc/817-1984/chapter2-11?l=en&a=view Then, - we must try to not leave undefined weak symbols at all, - or check the symbol before invocation for the safety in case of NULL dereference.

5 4

[U-Boot] [RFC][PATCH] Code Clean-up (weak functions)
by Graeme Russ 25 Dec '08

25 Dec '08

This patch makes all definitions, declarations and usages of weak functions consistent. Signed-off-by: Graeme Russ <graeme.russ(a)gmail.com> --- WARNING: This patch hits a _lot_ of arches - Please The following patch applies the following rules: - All functions are defined without __attribute__((weak)) in header files - All weak functions are declared as __function() in the source file with funtion() __attribute__((weak, alias("function"))); on the line immediately after the closing brace of __function() - for example: void __do_something (args) { ...some code... } do_something(args) __atttribute__((weak, alias("__do_something"))); - If the weak alias decleration exceeds 80 columns, the __attribute__ is placed on the following line, indented by one tab - There is no purely weak functions and therfore no longer code like: if (do_something) do_somthing(); All instances have been replaced by empty functions with an alias. e.g. void __do_something (args) {} do_something(args) __atttribute__((weak, alias("__do_something"))); board/incaip/incaip.c | 2 +- board/purple/purple.c | 2 +- board/tb0229/tb0229.c | 2 +- .../xilinx/ppc405-generic/xilinx_ppc405_generic.c | 1 - common/cmd_boot.c | 6 ++-- common/cmd_bootm.c | 6 +++- common/cmd_elf.c | 4 +- common/cmd_ide.c | 6 ++-- common/cmd_log.c | 3 +- common/main.c | 3 +- common/serial.c | 3 +- cpu/at32ap/cpu.c | 6 +++- cpu/blackfin/cpu.h | 2 +- cpu/blackfin/reset.c | 6 +++- cpu/mips/cpu.c | 8 +++--- cpu/mpc8xxx/ddr/util.c | 5 ++- cpu/ppc4xx/44x_spd_ddr.c | 3 +- cpu/ppc4xx/44x_spd_ddr2.c | 3 +- cpu/ppc4xx/4xx_pci.c | 3 +- cpu/ppc4xx/4xx_pcie.c | 2 +- cpu/ppc4xx/fdt.c | 3 +- drivers/mtd/cfi_flash.c | 24 +++++++++++++------ drivers/net/mcfmii.c | 3 +- include/asm-avr32/arch-at32ap700x/clk.h | 2 +- include/asm-mips/reboot.h | 2 +- include/common.h | 2 +- lib_arm/board.c | 21 +++++++++++----- lib_ppc/board.c | 6 +++- lib_ppc/interrupts.c | 4 +- 29 files changed, 86 insertions(+), 57 deletions(-) diff --git a/board/incaip/incaip.c b/board/incaip/incaip.c index 3b30970..3ee3ac9 100644 --- a/board/incaip/incaip.c +++ b/board/incaip/incaip.c @@ -31,7 +31,7 @@ extern uint incaip_get_cpuclk(void); -void _machine_restart(void) +void machine_restart(void) { *INCA_IP_WDT_RST_REQ = 0x3f; } diff --git a/board/purple/purple.c b/board/purple/purple.c index 54bef65..c243487 100644 --- a/board/purple/purple.c +++ b/board/purple/purple.c @@ -54,7 +54,7 @@ extern int asc_serial_getc (void); extern int asc_serial_tstc (void); extern void asc_serial_setbrg (void); -void _machine_restart(void) +void machine_restart(void) { void (*f)(void) = (void *) 0xbfc00000; diff --git a/board/tb0229/tb0229.c b/board/tb0229/tb0229.c index d3f05b2..f74573b 100644 --- a/board/tb0229/tb0229.c +++ b/board/tb0229/tb0229.c @@ -16,7 +16,7 @@ #include <asm/reboot.h> #include <pci.h> -void _machine_restart(void) +void machine_restart(void) { void (*f)(void) = (void *) 0xbfc00000; diff --git a/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c b/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c index 9bd1770..57ffdc8 100644 --- a/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c +++ b/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c @@ -25,7 +25,6 @@ ulong __get_PCI_freq(void) { return 0; } - ulong get_PCI_freq(void) __attribute__((weak, alias("__get_PCI_freq"))); int __board_pre_init(void) diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 6024ffe..7d77b8d 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -28,12 +28,12 @@ #include <command.h> #include <net.h> -/* Allow ports to override the default behavior */ -__attribute__((weak)) -unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char *argv[]) +unsigned long __do_go_exec (ulong (*entry)(int, char *[]), int argc, char *argv[]) { return entry (argc, argv); } +unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char *argv[]) + __attribute__((weak, alias("__do_go_exec"))); int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index a8f85e9..137cf65 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -159,13 +159,15 @@ void __board_lmb_reserve(struct lmb *lmb) { /* please define platform specific board_lmb_reserve() */ } -void board_lmb_reserve(struct lmb *lmb) __attribute__((weak, alias("__board_lmb_reserve"))); +void board_lmb_reserve(struct lmb *lmb) + __attribute__((weak, alias("__board_lmb_reserve"))); void __arch_lmb_reserve(struct lmb *lmb) { /* please define platform specific arch_lmb_reserve() */ } -void arch_lmb_reserve(struct lmb *lmb) __attribute__((weak, alias("__arch_lmb_reserve"))); +void arch_lmb_reserve(struct lmb *lmb) + __attribute__((weak, alias("__arch_lmb_reserve"))); #if defined(__ARM__) #define IH_INITRD_ARCH IH_ARCH_ARM diff --git a/common/cmd_elf.c b/common/cmd_elf.c index 27a4b73..4cd2975 100644 --- a/common/cmd_elf.c +++ b/common/cmd_elf.c @@ -27,8 +27,6 @@ DECLARE_GLOBAL_DATA_PTR; int valid_elf_image (unsigned long addr); unsigned long load_elf_image (unsigned long addr); -/* Allow ports to override the default behavior */ -__attribute__((weak)) unsigned long do_bootelf_exec (ulong (*entry)(int, char *[]), int argc, char *argv[]) { unsigned long ret; @@ -52,6 +50,8 @@ unsigned long do_bootelf_exec (ulong (*entry)(int, char *[]), int argc, char *ar return ret; } +unsigned long do_bootelf_exec (ulong (*entry)(int, char *[]), int argc, char *argv[]) + __attribute__((weak, alias("__do_bootelf_exec"))); /* ====================================================================== * Interpreter command to boot an arbitrary ELF image from memory. diff --git a/common/cmd_ide.c b/common/cmd_ide.c index db05f76..0b890f0 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -529,7 +529,7 @@ __ide_outb(int dev, int port, unsigned char val) outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port))); } void inline ide_outb (int dev, int port, unsigned char val) - __attribute__((weak, alias("__ide_outb"))); + __attribute__((weak, alias("__ide_outb"))); unsigned char inline __ide_inb(int dev, int port) @@ -541,7 +541,7 @@ __ide_inb(int dev, int port) return val; } unsigned char inline ide_inb(int dev, int port) - __attribute__((weak, alias("__ide_inb"))); + __attribute__((weak, alias("__ide_inb"))); #ifdef CONFIG_TUNE_PIO int inline @@ -550,7 +550,7 @@ __ide_set_piomode(int pio_mode) return 0; } int inline ide_set_piomode(int pio_mode) - __attribute__((weak, alias("__ide_set_piomode"))); + __attribute__((weak, alias("__ide_set_piomode"))); #endif void ide_init (void) diff --git a/common/cmd_log.c b/common/cmd_log.c index febdb90..854c30d 100644 --- a/common/cmd_log.c +++ b/common/cmd_log.c @@ -70,7 +70,8 @@ unsigned long __logbuffer_base(void) { return CONFIG_SYS_SDRAM_BASE + gd->bd->bi_memsize - LOGBUFF_LEN; } -unsigned long logbuffer_base (void) __attribute__((weak, alias("__logbuffer_base"))); +unsigned long logbuffer_base (void) + __attribute__((weak, alias("__logbuffer_base"))); void logbuff_init_ptrs (void) { diff --git a/common/main.c b/common/main.c index a999a5d..5b9da3b 100644 --- a/common/main.c +++ b/common/main.c @@ -48,7 +48,8 @@ DECLARE_GLOBAL_DATA_PTR; * Board-specific Platform code can reimplement show_boot_progress () if needed */ void inline __show_boot_progress (int val) {} -void inline show_boot_progress (int val) __attribute__((weak, alias("__show_boot_progress"))); +void inline show_boot_progress (int val) + __attribute__((weak, alias("__show_boot_progress"))); #if defined(CONFIG_BOOT_RETRY_TIME) && defined(CONFIG_RESET_TO_RETRY) extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* for do_reset() prototype */ diff --git a/common/serial.c b/common/serial.c index b38d1e7..a7c6946 100644 --- a/common/serial.c +++ b/common/serial.c @@ -75,7 +75,8 @@ struct serial_device *__default_serial_console (void) #endif } -struct serial_device *default_serial_console(void) __attribute__((weak, alias("__default_serial_console"))); +struct serial_device *default_serial_console(void) + __attribute__((weak, alias("__default_serial_console"))); #endif int serial_register (struct serial_device *dev) diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c index f92d3e2..4e7eded 100644 --- a/cpu/at32ap/cpu.c +++ b/cpu/at32ap/cpu.c @@ -43,6 +43,9 @@ DECLARE_GLOBAL_DATA_PTR; +void inline __gclk_init(void) {} +void inline gclk_init (void) __attribute__((weak, alias("__gclk_init"))); + int cpu_init(void) { extern void _evba(void); @@ -65,8 +68,7 @@ int cpu_init(void) sysreg_write(EVBA, (unsigned long)&_evba); asm volatile("csrf %0" : : "i"(SYSREG_EM_OFFSET)); - if(gclk_init) - gclk_init(); + gclk_init(); return 0; } diff --git a/cpu/blackfin/cpu.h b/cpu/blackfin/cpu.h index 0a13c28..5aa1787 100644 --- a/cpu/blackfin/cpu.h +++ b/cpu/blackfin/cpu.h @@ -27,7 +27,7 @@ #include <command.h> -void board_reset(void) __attribute__((__weak__)); +void board_reset(void); void bfin_reset_or_hang(void) __attribute__((__noreturn__)); void bfin_panic(struct pt_regs *reg); void dump(struct pt_regs *regs); diff --git a/cpu/blackfin/reset.c b/cpu/blackfin/reset.c index d1e34b3..e89b980 100644 --- a/cpu/blackfin/reset.c +++ b/cpu/blackfin/reset.c @@ -65,6 +65,9 @@ void bfin_reset(void) } } +void inline __board_reset(void) {} +void inline board_reset (void) __attribute__((weak, alias("__board_reset"))); + /* We need to trampoline ourselves up into L1 since our linker * does not have relaxtion support and will only generate a * PC relative call with a 25 bit immediate. This is not enough @@ -73,8 +76,7 @@ void bfin_reset(void) __attribute__ ((__noreturn__)) static inline void bfin_reset_trampoline(void) { - if (board_reset) - board_reset(); + board_reset(); while (1) asm("jump (%0);" : : "a" (bfin_reset)); } diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c index b7180b0..84c4730 100644 --- a/cpu/mips/cpu.c +++ b/cpu/mips/cpu.c @@ -38,13 +38,13 @@ : \ : "i" (op), "R" (*(unsigned char *)(addr))) -void __attribute__((weak)) _machine_restart(void) -{ -} +void inline __machine_restart(void) {} +void inline machine_restart (void) + __attribute__((weak, alias("__machine_restart"))); int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - _machine_restart(); + machine_restart(); fprintf(stderr, "*** reset failed ***\n"); return 0; diff --git a/cpu/mpc8xxx/ddr/util.c b/cpu/mpc8xxx/ddr/util.c index 27c135b..56de559 100644 --- a/cpu/mpc8xxx/ddr/util.c +++ b/cpu/mpc8xxx/ddr/util.c @@ -97,7 +97,8 @@ __fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params, } } -__attribute__((weak, alias("__fsl_ddr_set_lawbar"))) void +void fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params, unsigned int memctl_interleaved, - unsigned int ctrl_num); + unsigned int ctrl_num) + __attribute__((weak, alias("__fsl_ddr_set_lawbar"))); diff --git a/cpu/ppc4xx/44x_spd_ddr.c b/cpu/ppc4xx/44x_spd_ddr.c index 153391e..79976a3 100644 --- a/cpu/ppc4xx/44x_spd_ddr.c +++ b/cpu/ppc4xx/44x_spd_ddr.c @@ -79,7 +79,8 @@ void __spd_ddr_init_hang (void) { hang (); } -void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang"))); +void spd_ddr_init_hang (void) + __attribute__((weak, alias("__spd_ddr_init_hang"))); /*-----------------------------------------------------------------------------+ | General Definition diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index b40e4b1..d456b97 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -171,7 +171,8 @@ void __spd_ddr_init_hang (void) { hang (); } -void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang"))); +void spd_ddr_init_hang (void) + __attribute__((weak, alias("__spd_ddr_init_hang"))); /* * To provide an interface for board specific config values in this common diff --git a/cpu/ppc4xx/4xx_pci.c b/cpu/ppc4xx/4xx_pci.c index e8871fc..b1f90b8 100644 --- a/cpu/ppc4xx/4xx_pci.c +++ b/cpu/ppc4xx/4xx_pci.c @@ -89,7 +89,8 @@ int __pci_pre_init(struct pci_controller *hose) { return 1; } -int pci_pre_init(struct pci_controller *hose) __attribute__((weak, alias("__pci_pre_init"))); +int pci_pre_init(struct pci_controller *hose) + __attribute__((weak, alias("__pci_pre_init"))); #if defined(CONFIG_405GP) || defined(CONFIG_405EP) diff --git a/cpu/ppc4xx/4xx_pcie.c b/cpu/ppc4xx/4xx_pcie.c index fd40d8a..970932b 100644 --- a/cpu/ppc4xx/4xx_pcie.c +++ b/cpu/ppc4xx/4xx_pcie.c @@ -729,7 +729,7 @@ int __ppc4xx_init_pcie_port_hw(int port, int rootport) #endif /* CONFIG_405EX */ int ppc4xx_init_pcie_port_hw(int port, int rootport) -__attribute__((weak, alias("__ppc4xx_init_pcie_port_hw"))); + __attribute__((weak, alias("__ppc4xx_init_pcie_port_hw"))); /* * We map PCI Express configuration access into the 512MB regions diff --git a/cpu/ppc4xx/fdt.c b/cpu/ppc4xx/fdt.c index c55e1cf..cd6ed58 100644 --- a/cpu/ppc4xx/fdt.c +++ b/cpu/ppc4xx/fdt.c @@ -72,7 +72,8 @@ void __ft_board_setup(void *blob, bd_t *bd) fdt_strerror(rc)); } } -void ft_board_setup(void *blob, bd_t *bd) __attribute__((weak, alias("__ft_board_setup"))); +void ft_board_setup(void *blob, bd_t *bd + __attribute__((weak, alias("__ft_board_setup"))); /* * Fixup all PCIe nodes by setting the device_type property diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index e8afe99..5055274 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -251,14 +251,22 @@ static u64 __flash_read64(void *addr) } #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS -void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); -void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); -void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); -void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); -u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); -u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); -u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); -u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); +void flash_write8(u8 value, void *addr) + __attribute__((weak, alias("__flash_write8"))); +void flash_write16(u16 value, void *addr) + __attribute__((weak, alias("__flash_write16"))); +void flash_write32(u32 value, void *addr) + __attribute__((weak, alias("__flash_write32"))); +void flash_write64(u64 value, void *addr) + __attribute__((weak, alias("__flash_write64"))); +u8 flash_read8(void *addr) + __attribute__((weak, alias("__flash_read8"))); +u16 flash_read16(void *addr) + __attribute__((weak, alias("__flash_read16"))); +u32 flash_read32(void *addr) + __attribute__((weak, alias("__flash_read32"))); +u64 flash_read64(void *addr) + __attribute__((weak, alias("__flash_read64"))); #else #define flash_write8 __flash_write8 #define flash_write16 __flash_write16 diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c index 2b733c6..41e1c94 100644 --- a/drivers/net/mcfmii.c +++ b/drivers/net/mcfmii.c @@ -218,8 +218,6 @@ int mii_discover_phy(struct eth_device *dev) } #endif /* CONFIG_SYS_DISCOVER_PHY */ -void mii_init(void) __attribute__((weak,alias("__mii_init"))); - void __mii_init(void) { FEC_INFO_T *info; @@ -269,6 +267,7 @@ void __mii_init(void) info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16; info->dup_spd |= miiphy_speed(dev->name, info->phy_addr); } +void mii_init(void) __attribute__((weak,alias("__mii_init"))); /* * Read and write a MII PHY register, routines used by MII Utilities diff --git a/include/asm-avr32/arch-at32ap700x/clk.h b/include/asm-avr32/arch-at32ap700x/clk.h index 7817572..7a23fd8 100644 --- a/include/asm-avr32/arch-at32ap700x/clk.h +++ b/include/asm-avr32/arch-at32ap700x/clk.h @@ -82,7 +82,7 @@ static inline unsigned long get_spi_clk_rate(unsigned int dev_id) #endif extern void clk_init(void); -extern void gclk_init(void) __attribute__((weak)); +extern void gclk_init(void); /* Board code may need the SDRAM base clock as a compile-time constant */ #define SDRAMC_BUS_HZ (MAIN_CLK_RATE >> CONFIG_SYS_CLKDIV_HSB) diff --git a/include/asm-mips/reboot.h b/include/asm-mips/reboot.h index 978d206..26885c0 100644 --- a/include/asm-mips/reboot.h +++ b/include/asm-mips/reboot.h @@ -9,6 +9,6 @@ #ifndef _ASM_REBOOT_H #define _ASM_REBOOT_H -extern void _machine_restart(void); +extern void machine_restart(void); #endif /* _ASM_REBOOT_H */ diff --git a/include/common.h b/include/common.h index 5968036..6583f00 100644 --- a/include/common.h +++ b/include/common.h @@ -693,7 +693,7 @@ int pcmcia_init (void); /* * Board-specific Platform code can reimplement show_boot_progress () if needed */ -void __attribute__((weak)) show_boot_progress (int val); +void show_boot_progress (int val); #ifdef CONFIG_INIT_CRITICAL #error CONFIG_INIT_CRITICAL is deprecated! diff --git a/lib_arm/board.c b/lib_arm/board.c index 2358beb..67b9469 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -123,19 +123,26 @@ void *sbrk (ptrdiff_t increment) * May be supplied by boards if desired */ void inline __coloured_LED_init (void) {} -void inline coloured_LED_init (void) __attribute__((weak, alias("__coloured_LED_init"))); +void inline coloured_LED_init (void) + __attribute__((weak, alias("__coloured_LED_init"))); void inline __red_LED_on (void) {} -void inline red_LED_on (void) __attribute__((weak, alias("__red_LED_on"))); +void inline red_LED_on (void) + __attribute__((weak, alias("__red_LED_on"))); void inline __red_LED_off(void) {} -void inline red_LED_off(void) __attribute__((weak, alias("__red_LED_off"))); +void inline red_LED_off(void) + __attribute__((weak, alias("__red_LED_off"))); void inline __green_LED_on(void) {} -void inline green_LED_on(void) __attribute__((weak, alias("__green_LED_on"))); +void inline green_LED_on(void) + __attribute__((weak, alias("__green_LED_on"))); void inline __green_LED_off(void) {} -void inline green_LED_off(void)__attribute__((weak, alias("__green_LED_off"))); +void inline green_LED_off(void) + __attribute__((weak, alias("__green_LED_off"))); void inline __yellow_LED_on(void) {} -void inline yellow_LED_on(void)__attribute__((weak, alias("__yellow_LED_on"))); +void inline yellow_LED_on(void) + __attribute__((weak, alias("__yellow_LED_on"))); void inline __yellow_LED_off(void) {} -void inline yellow_LED_off(void)__attribute__((weak, alias("__yellow_LED_off"))); +void inline yellow_LED_off(void) + __attribute__((weak, alias("__yellow_LED_off"))); /************************************************************************ * Init Utilities * diff --git a/lib_ppc/board.c b/lib_ppc/board.c index 289a32a..caebc2b 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -206,7 +206,8 @@ void __board_add_ram_info(int use_default) { /* please define platform specific board_add_ram_info() */ } -void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info"))); +void board_add_ram_info(int) + __attribute__((weak, alias("__board_add_ram_info"))); static int init_func_ram (void) @@ -643,7 +644,8 @@ int __is_sata_supported(void) * board have such issue.*/ return 1; } -int is_sata_supported(void) __attribute__((weak, alias("__is_sata_supported"))); +int is_sata_supported(void) + __attribute__((weak, alias("__is_sata_supported"))); /************************************************************************ * diff --git a/lib_ppc/interrupts.c b/lib_ppc/interrupts.c index f603170..696259b 100644 --- a/lib_ppc/interrupts.c +++ b/lib_ppc/interrupts.c @@ -32,12 +32,12 @@ #endif #ifdef CONFIG_SHOW_ACTIVITY -void board_show_activity (ulong) __attribute__((weak, alias("__board_show_activity"))); - void __board_show_activity (ulong dummy) { return; } +void board_show_activity (ulong) + __attribute__((weak, alias("__board_show_activity"))); #endif /* CONFIG_SHOW_ACTIVITY */ #ifndef CONFIG_SYS_WATCHDOG_FREQ -- 1.6.0.2.GIT

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[U-Boot] Error in buffer data for NAND flash write, read on OMAP3430SDP.
by Radha Krishna 24 Dec '08

24 Dec '08

Hi All, I am using NAND Flash write, read APIs for writing and reading of my data to/from the same block. [SNIP] OMAP34XX SDP # nand dua//I created this command The manufacturer id = 2c device Id = a1 Erasing at 0x01440000 -- 100% complete. Cleanmarker written at 0x01440000 . ERASE OK Writing data at 0x01440000 -- 100% complete. WRITE OK Reading data from 0x01440000 -- 100% complete. READ OK OMAP34XX SDP # But when I compare write buffer and read buffer,some of the data is not matching(read data is different from write data). Could some one tell me the solution for this. Regards, Krishna.

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[U-Boot] U-Boot on Xilinx ML510
by Felix Radensky 24 Dec '08

24 Dec '08

Hi, I was wandering whether latest u-boot supports ML510 board. I know that ML507 is supported in u-boot, and I know that Linux supports ML510, but I didn't find anything about u-boot on ML510. Thanks a lot. Felix.

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