November 2008 - U-Boot

[U-Boot] [RFC PATCH 0/1] Add ehci core
by Michael Trimarchi 25 Nov '08

25 Nov '08

Add ehci core support Signed-off-by: Michael Trimarchi <trimarchi(a)gandalf.sssup.it> --- common/cmd_usb.c | 3 +- common/usb.c | 2 +- drivers/usb/Makefile | 2 + drivers/usb/usb_ehci.h | 120 ++++++++ drivers/usb/usb_ehci_core.c | 635 +++++++++++++++++++++++++++++++++++++++++++ drivers/usb/usb_ehci_core.h | 29 ++ include/usb.h | 15 +- include/usb_defs.h | 10 + 8 files changed, 808 insertions(+), 8 deletions(-) create mode 100644 drivers/usb/usb_ehci.h create mode 100644 drivers/usb/usb_ehci_core.c create mode 100644 drivers/usb/usb_ehci_core.h diff --git a/common/cmd_usb.c b/common/cmd_usb.c index 99e551f..532df37 100644 --- a/common/cmd_usb.c +++ b/common/cmd_usb.c @@ -276,7 +276,8 @@ void usb_show_tree_graph(struct usb_device *dev,char *pre) pre[index++]= has_child ? '|' : ' '; pre[index]=0; printf(" %s (%s, %dmA)\n",usb_get_class_desc(dev->config.if_desc[0].bInterfaceClass), - dev->slow ? "1.5MBit/s" : "12MBit/s",dev->config.MaxPower * 2); + (dev->speed == USB_SPEED_LOW) ? "1.5MBit/s" : (dev->speed == USB_SPEED_FULL) + ? "12MBit/s" : "480MBit/s", dev->config.MaxPower * 2); if (strlen(dev->mf) || strlen(dev->prod) || strlen(dev->serial)) diff --git a/common/usb.c b/common/usb.c index 7ab5df6..1518d9a 100644 --- a/common/usb.c +++ b/common/usb.c @@ -1126,7 +1126,7 @@ void usb_hub_port_connect_change(struct usb_device *dev, int port) /* Allocate a new device struct for it */ usb = usb_alloc_new_device(); - usb->slow = (portstatus & USB_PORT_STAT_LOW_SPEED) ? 1 : 0; + usb->speed = (portstatus & USB_PORT_STAT_LOW_SPEED) ? 1 : 0; dev->children[port] = usb; usb->parent = dev; diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile index c67a490..6a4df02 100644 --- a/drivers/usb/Makefile +++ b/drivers/usb/Makefile @@ -34,6 +34,8 @@ COBJS-y += usbdcore.o COBJS-y += usbdcore_ep0.o COBJS-y += usbdcore_mpc8xx.o COBJS-y += usbdcore_omap1510.o +COBJS-$(CONFIG_USB_EHCI) += usb_ehci_core.o +COBJS-$(CONFIG_USB_EHCI_FSL) += usb_ehci_fsl.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/usb/usb_ehci.h b/drivers/usb/usb_ehci.h new file mode 100644 index 0000000..9911068 --- /dev/null +++ b/drivers/usb/usb_ehci.h @@ -0,0 +1,120 @@ +/*- + * Copyright (c) 2007-2008, Juniper Networks, Inc. + * All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef USB_EHCI_H +#define USB_EHCI_H + +/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */ +#define DeviceRequest \ + ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE)<<8) +#define DeviceOutRequest \ + ((USB_DIR_OUT|USB_TYPE_STANDARD|USB_RECIP_DEVICE)<<8) + +#define InterfaceRequest \ + ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8) + +#define EndpointRequest \ + ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8) +#define EndpointOutRequest \ + ((USB_DIR_OUT|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8) + +/* + * Register Space. + */ +struct ehci_hccr { + uint8_t cr_caplength; + uint16_t cr_hciversion; + uint32_t cr_hcsparams; + uint32_t cr_hccparams; + uint8_t cr_hcsp_portrt[8]; +}; + +struct ehci_hcor { + uint32_t or_usbcmd; + uint32_t or_usbsts; + uint32_t or_usbintr; + uint32_t or_frindex; + uint32_t or_ctrldssegment; + uint32_t or_periodiclistbase; + uint32_t or_asynclistaddr; + uint32_t _reserved_[9]; + uint32_t or_configflag; + uint32_t or_portsc[2]; + uint32_t or_systune; +}; + +#define EHCI_PS_WKOC_E 0x00400000 /* RW wake on over current */ +#define EHCI_PS_WKDSCNNT_E 0x00200000 /* RW wake on disconnect */ +#define EHCI_PS_WKCNNT_E 0x00100000 /* RW wake on connect */ +#define EHCI_PS_PTC 0x000f0000 /* RW port test control */ +#define EHCI_PS_PIC 0x0000c000 /* RW port indicator control */ +#define EHCI_PS_PO 0x00002000 /* RW port owner */ +#define EHCI_PS_PP 0x00001000 /* RW,RO port power */ +#define EHCI_PS_LS 0x00000c00 /* RO line status */ +#define EHCI_PS_IS_LOWSPEED(x) (((x) & EHCI_PS_LS) == 0x00000400) +#define EHCI_PS_PR 0x00000100 /* RW port reset */ +#define EHCI_PS_SUSP 0x00000080 /* RW suspend */ +#define EHCI_PS_FPR 0x00000040 /* RW force port resume */ +#define EHCI_PS_OCC 0x00000020 /* RWC over current change */ +#define EHCI_PS_OCA 0x00000010 /* RO over current active */ +#define EHCI_PS_PEC 0x00000008 /* RWC port enable change */ +#define EHCI_PS_PE 0x00000004 /* RW port enable */ +#define EHCI_PS_CSC 0x00000002 /* RWC connect status change */ +#define EHCI_PS_CS 0x00000001 /* RO connect status */ +#define EHCI_PS_CLEAR (EHCI_PS_OCC|EHCI_PS_PEC|EHCI_PS_CSC) + +/* + * Schedule Interface Space. + * + * IMPORTANT: Software must ensure that no interface data structure + * reachable by the EHCI host controller spans a 4K page boundary! + * + * Periodic transfers (i.e. isochronous and interrupt transfers) are + * not supported. + */ + +/* Queue Element Transfer Descriptor (qTD). */ +struct qTD { + uint32_t qt_next; +#define QT_NEXT_TERMINATE 1 + uint32_t qt_altnext; + uint32_t qt_token; + uint32_t qt_buffer[5]; +}; + +/* Queue Head (QH). */ +struct QH { + uint32_t qh_link; +#define QH_LINK_TERMINATE 1 +#define QH_LINK_TYPE_ITD 0 +#define QH_LINK_TYPE_QH 2 +#define QH_LINK_TYPE_SITD 4 +#define QH_LINK_TYPE_FSTN 6 + uint32_t qh_endpt1; + uint32_t qh_endpt2; + uint32_t qh_curtd; + struct qTD qh_overlay; +}; + +/* Low level intit functions */ + +int ehci_hcd_init(void); +int ehci_hcd_stop(void); +#endif /* USB_EHCI_H */ diff --git a/drivers/usb/usb_ehci_core.c b/drivers/usb/usb_ehci_core.c new file mode 100644 index 0000000..9675bd0 --- /dev/null +++ b/drivers/usb/usb_ehci_core.c @@ -0,0 +1,635 @@ +/*- + * Copyright (c) 2007-2008, Juniper Networks, Inc. + * Copyright (c) 2008, Excito Elektronik i Skåne AB + * All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <usb.h> +#include <asm/io.h> +#include "usb_ehci.h" + +int rootdev; +struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ +volatile struct ehci_hcor *hcor; + +static uint16_t portreset; +static struct QH qh_list __attribute__((aligned(32))); + +struct usb_device_descriptor device = { + sizeof(struct usb_device_descriptor), /* bLength */ + 1, /* bDescriptorType: UDESC_DEVICE */ + 0x0002, /* bcdUSB: v2.0 */ + 9, /* bDeviceClass: UDCLASS_HUB */ + 0, /* bDeviceSubClass: UDSUBCLASS_HUB */ + 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */ + 64, /* bMaxPacketSize: 64 bytes */ + 0x0000, /* idVendor */ + 0x0000, /* idProduct */ + 0x0001, /* bcdDevice */ + 1, /* iManufacturer */ + 2, /* iProduct */ + 0, /* iSerialNumber */ + 1 /* bNumConfigurations: 1 */ +}; + +struct usb_config_descriptor config = { + sizeof(struct usb_config_descriptor), + 2, /* bDescriptorType: UDESC_CONFIG */ + sizeof(struct usb_config_descriptor) + + sizeof(struct usb_interface_descriptor) + + sizeof(struct usb_endpoint_descriptor), + 0, + 1, /* bNumInterface */ + 1, /* bConfigurationValue */ + 0, /* iConfiguration */ + 0x40, /* bmAttributes: UC_SELF_POWER */ + 0 /* bMaxPower */ +}; + +struct usb_interface_descriptor interface = { + sizeof(struct usb_interface_descriptor), /* bLength */ + 4, /* bDescriptorType: UDESC_INTERFACE */ + 0, /* bInterfaceNumber */ + 0, /* bAlternateSetting */ + 1, /* bNumEndpoints */ + 9, /* bInterfaceClass: UICLASS_HUB */ + 0, /* bInterfaceSubClass: UISUBCLASS_HUB */ + 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */ + 0 /* iInterface */ +}; + +struct usb_endpoint_descriptor endpoint = { +sizeof(struct usb_endpoint_descriptor), /* bLength */ + 5, /* bDescriptorType: UDESC_ENDPOINT */ + 0x81, /* bEndpointAddress: UE_DIR_IN | EHCI_INTR_ENDPT */ + 3, /* bmAttributes: UE_INTERRUPT */ + 8, 0, /* wMaxPacketSize */ + 255 /* bInterval */ +}; + +struct usb_hub_descriptor hub = { + sizeof(struct usb_hub_descriptor), /* bDescLength */ + 0x29, /* bDescriptorType: hub + descriptor */ + 2, /* bNrPorts -- runtime modified */ + 0, 0, /* wHubCharacteristics */ + 0xff, /* bPwrOn2PwrGood */ + {}, /* bHubCntrCurrent */ + {} /* at most 7 ports! XXX */ +}; + +static void *ehci_alloc(size_t sz, size_t align) +{ + static struct QH qh __attribute__((aligned(32))); + static struct qTD td[3] __attribute__((aligned (32))); + static int ntds; + void *p; + + switch (sz) { + case sizeof(struct QH): + p = &qh; + ntds = 0; + break; + case sizeof(struct qTD): + if (ntds == 3) { + debug("out of TDs"); + return NULL; + } + p = &td[ntds]; + ntds++; + break; + default: + debug("unknown allocation size"); + return NULL; + } + + memset(p, sz, 0); + return p; +} + +static void ehci_free(void *p, size_t sz) +{ +} + +static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz) +{ + uint32_t addr, delta, next; + int idx; + + addr = (uint32_t) buf; + idx = 0; + while (idx < 5) { + td->qt_buffer[idx] = cpu_to_le32(addr); + next = (addr + 4096) & ~4095; + delta = next - addr; + if (delta >= sz) + break; + sz -= delta; + addr = next; + idx++; + } + + if (idx == 5) { + debug("out of buffer pointers (%u bytes left)", sz); + return -1; + } + + return 0; +} + +static int +ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, + int length, struct devrequest *req) +{ + struct QH *qh; + struct qTD *td; + volatile struct qTD *vtd; + unsigned long ts; + uint32_t *tdp; + uint32_t endpt, token, usbsts; + uint32_t c, toggle; + + debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p", dev, pipe, + buffer, length, req); + if (req != NULL) + debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u", + req->request, req->request, + req->requesttype, req->requesttype, + le16_to_cpu(req->value), le16_to_cpu(req->value), + le16_to_cpu(req->index), le16_to_cpu(req->index)); + + qh = ehci_alloc(sizeof(struct QH), 32); + if (qh == NULL) { + debug("unable to allocate QH"); + return -1; + } + qh->qh_link = cpu_to_le32((uint32_t)&qh_list | QH_LINK_TYPE_QH); + c = (usb_pipespeed(pipe) != USB_SPEED_HIGH && + usb_pipeendpoint(pipe) == 0) ? 1 : 0; + endpt = (8 << 28) | + (c << 27) | + (usb_maxpacket(dev, pipe) << 16) | + (0 << 15) | + (1 << 14) | + (usb_pipespeed(pipe) << 12) | + (usb_pipeendpoint(pipe) << 8) | + (0 << 7) | (usb_pipedevice(pipe) << 0); + qh->qh_endpt1 = cpu_to_le32(endpt); + endpt = (1 << 30) | + (dev->portnr << 23) | + (dev->parent->devnum << 16) | (0 << 8) | (0 << 0); + qh->qh_endpt2 = cpu_to_le32(endpt); + qh->qh_overlay.qt_next = cpu_to_le32(QT_NEXT_TERMINATE); + qh->qh_overlay.qt_altnext = cpu_to_le32(QT_NEXT_TERMINATE); + + td = NULL; + tdp = &qh->qh_overlay.qt_next; + + toggle = + usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)); + + if (req != NULL) { + td = ehci_alloc(sizeof(struct qTD), 32); + if (td == NULL) { + debug("unable to allocate SETUP td"); + goto fail; + } + td->qt_next = cpu_to_le32(QT_NEXT_TERMINATE); + td->qt_altnext = cpu_to_le32(QT_NEXT_TERMINATE); + token = (0 << 31) | + (sizeof(*req) << 16) | + (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0); + td->qt_token = cpu_to_le32(token); + if (ehci_td_buffer(td, req, sizeof(*req)) != 0) { + debug("unable construct SETUP td"); + ehci_free(td, sizeof(*td)); + goto fail; + } + *tdp = cpu_to_le32((uint32_t) td); + tdp = &td->qt_next; + toggle = 1; + } + + if (length > 0 || req == NULL) { + td = ehci_alloc(sizeof(struct qTD), 32); + if (td == NULL) { + debug("unable to allocate DATA td"); + goto fail; + } + td->qt_next = cpu_to_le32(QT_NEXT_TERMINATE); + td->qt_altnext = cpu_to_le32(QT_NEXT_TERMINATE); + token = (toggle << 31) | + (length << 16) | + ((req == NULL ? 1 : 0) << 15) | + (0 << 12) | + (3 << 10) | + ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0); + td->qt_token = cpu_to_le32(token); + if (ehci_td_buffer(td, buffer, length) != 0) { + debug("unable construct DATA td"); + ehci_free(td, sizeof(*td)); + goto fail; + } + *tdp = cpu_to_le32((uint32_t) td); + tdp = &td->qt_next; + } + + if (req != NULL) { + td = ehci_alloc(sizeof(struct qTD), 32); + if (td == NULL) { + debug("unable to allocate ACK td"); + goto fail; + } + td->qt_next = cpu_to_le32(QT_NEXT_TERMINATE); + td->qt_altnext = cpu_to_le32(QT_NEXT_TERMINATE); + token = (toggle << 31) | + (0 << 16) | + (1 << 15) | + (0 << 12) | + (3 << 10) | + ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0); + td->qt_token = cpu_to_le32(token); + *tdp = cpu_to_le32((uint32_t) td); + tdp = &td->qt_next; + } + + qh_list.qh_link = cpu_to_le32((uint32_t) qh | QH_LINK_TYPE_QH); + + usbsts = le32_to_cpu(hcor->or_usbsts); + hcor->or_usbsts = cpu_to_le32(usbsts & 0x3f); + + /* Enable async. schedule. */ + hcor->or_usbcmd |= cpu_to_le32(0x20); + while ((hcor->or_usbsts & cpu_to_le32(0x8000)) == 0) + udelay(1); + + /* Wait for TDs to be processed. */ + ts = get_timer(0); + vtd = td; + do { + token = le32_to_cpu(vtd->qt_token); + if (!(token & 0x80)) + break; + } while (get_timer(ts) < CONFIG_SYS_HZ); + + /* Disable async schedule. */ + hcor->or_usbcmd &= ~cpu_to_le32(0x20); + while ((hcor->or_usbsts & cpu_to_le32(0x8000)) != 0) + udelay(1); + + qh_list.qh_link = cpu_to_le32((uint32_t)&qh_list | QH_LINK_TYPE_QH); + + token = le32_to_cpu(qh->qh_overlay.qt_token); + if (!(token & 0x80)) { + debug("TOKEN=%#x", token); + switch (token & 0xfc) { + case 0: + toggle = token >> 31; + usb_settoggle(dev, usb_pipeendpoint(pipe), + usb_pipeout(pipe), toggle); + dev->status = 0; + break; + case 0x40: + dev->status = USB_ST_STALLED; + break; + case 0xa0: + case 0x20: + dev->status = USB_ST_BUF_ERR; + break; + case 0x50: + case 0x10: + dev->status = USB_ST_BABBLE_DET; + break; + default: + dev->status = USB_ST_CRC_ERR; + break; + } + dev->act_len = length - ((token >> 16) & 0x7fff); + } else { + dev->act_len = 0; + debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x", + dev->devnum, le32_to_cpu(hcor->or_usbsts), + le32_to_cpu(hcor->or_portsc[0]), + le32_to_cpu(hcor->or_portsc[1])); + } + + return (dev->status != USB_ST_NOT_PROC) ? 0 : -1; + +fail: + td = (void *)le32_to_cpu(qh->qh_overlay.qt_next); + while (td != (void *)QT_NEXT_TERMINATE) { + qh->qh_overlay.qt_next = td->qt_next; + ehci_free(td, sizeof(*td)); + td = (void *)le32_to_cpu(qh->qh_overlay.qt_next); + } + ehci_free(qh, sizeof(*qh)); + return -1; +} + +static inline int min3(int a, int b, int c) +{ + + if (b < a) + a = b; + if (c < a) + a = c; + return a; +} + +ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, + int length, struct devrequest *req) +{ + uint8_t tmpbuf[4]; + u16 typeReq; + void *srcptr; + int len, srclen; + uint32_t reg; + + srclen = 0; + srcptr = NULL; + + debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u", + req->request, req->request, + req->requesttype, req->requesttype, + le16_to_cpu(req->value), le16_to_cpu(req->index)); + + typeReq = req->request << 8 | req->requesttype; + + switch (typeReq) { + case DeviceRequest | USB_REQ_GET_DESCRIPTOR: + switch (le16_to_cpu(req->value) >> 8) { + case USB_DT_DEVICE: + srcptr = &device; + srclen = sizeof(struct usb_device_descriptor); + break; + case USB_DT_CONFIG: + srcptr = &config; + srclen = sizeof(config) + + sizeof(struct usb_interface_descriptor) + + sizeof(struct usb_hub_descriptor); + break; + case USB_DT_STRING: + switch (le16_to_cpu(req->value) & 0xff) { + case 0: /* Language */ + srcptr = "\4\3\1\0"; + srclen = 4; + break; + case 1: /* Vendor */ + srcptr = "\16\3u\0-\0b\0o\0o\0t\0"; + srclen = 14; + break; + case 2: /* Product */ + srcptr = "\52\3E\0H\0C\0I\0 " + "\0H\0o\0s\0t\0 " + "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0"; + srclen = 42; + break; + default: + goto unknown; + } + break; + default: + debug("unknown value %x", le16_to_cpu(req->value)); + goto unknown; + } + break; + case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8): + switch (le16_to_cpu(req->value) >> 8) { + case USB_DT_HUB: + srcptr = &hub; + srclen = sizeof(hub); + break; + default: + debug("unknown value %x", le16_to_cpu(req->value)); + goto unknown; + } + break; + case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): + rootdev = le16_to_cpu(req->value); + break; + case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: + /* Nothing to do */ + break; + case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8): + tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */ + tmpbuf[1] = 0; + srcptr = tmpbuf; + srclen = 2; + break; + case DeviceRequest | USB_REQ_GET_STATUS: + memset(tmpbuf, 0, 4); + reg = le32_to_cpu(hcor->or_portsc[le16_to_cpu(req->index) + - 1]); + if (reg & EHCI_PS_CS) + tmpbuf[0] |= USB_PORT_STAT_CONNECTION; + if (reg & EHCI_PS_PE) + tmpbuf[0] |= USB_PORT_STAT_ENABLE; + if (reg & EHCI_PS_SUSP) + tmpbuf[0] |= USB_PORT_STAT_SUSPEND; + if (reg & EHCI_PS_OCA) + tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT; + if (reg & EHCI_PS_PR) + tmpbuf[0] |= USB_PORT_STAT_RESET; + if (reg & EHCI_PS_PP) + tmpbuf[1] |= USB_PORT_STAT_POWER >> 8; + tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; + + if (reg & EHCI_PS_CSC) + tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION; + if (reg & EHCI_PS_PEC) + tmpbuf[2] |= USB_PORT_STAT_C_ENABLE; + if (reg & EHCI_PS_OCC) + tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT; + if (portreset & (1 << le16_to_cpu(req->index))) + tmpbuf[2] |= USB_PORT_STAT_C_RESET; + srcptr = tmpbuf; + srclen = 4; + break; + case DeviceOutRequest | USB_REQ_SET_FEATURE: + reg = le32_to_cpu(hcor->or_portsc[le16_to_cpu(req->index) - 1]); + reg &= ~EHCI_PS_CLEAR; + switch (le16_to_cpu(req->value)) { + case USB_PORT_FEAT_POWER: + reg |= EHCI_PS_PP; + break; + case USB_PORT_FEAT_RESET: + if (EHCI_PS_IS_LOWSPEED(reg)) { + /* Low speed device, give up ownership. */ + reg |= EHCI_PS_PO; + break; + } + /* Start reset sequence. */ + reg &= ~EHCI_PS_PE; + reg |= EHCI_PS_PR; + hcor->or_portsc[le16_to_cpu(req->index) - 1] = + cpu_to_le32(reg); + /* Wait for reset to complete. */ + udelay(500000); + /* Terminate reset sequence. */ + reg &= ~EHCI_PS_PR; + /* TODO: is it only fsl chip that requires this + * manual setting of port enable? + */ + reg |= EHCI_PS_PE; + hcor->or_portsc[le16_to_cpu(req->index) - 1] = + cpu_to_le32(reg); + /* Wait for HC to complete reset. */ + udelay(2000); + reg = + le32_to_cpu(hcor->or_portsc[le16_to_cpu(req->index) + - 1]); + reg &= ~EHCI_PS_CLEAR; + if ((reg & EHCI_PS_PE) == 0) { + /* Not a high speed device, give up + * ownership. */ + reg |= EHCI_PS_PO; + break; + } + portreset |= 1 << le16_to_cpu(req->index); + break; + default: + debug("unknown feature %x", le16_to_cpu(req->value)); + goto unknown; + } + hcor->or_portsc[le16_to_cpu(req->index) - 1] = + cpu_to_le32(reg); + break; + case DeviceOutRequest | USB_REQ_CLEAR_FEATURE: + reg = le32_to_cpu(hcor->or_portsc[le16_to_cpu(req->index) - 1]); + reg &= ~EHCI_PS_CLEAR; + switch (le16_to_cpu(req->value)) { + case USB_PORT_FEAT_ENABLE: + reg &= ~EHCI_PS_PE; + break; + case USB_PORT_FEAT_C_CONNECTION: + reg |= EHCI_PS_CSC; + break; + case USB_PORT_FEAT_C_RESET: + portreset &= ~(1 << le16_to_cpu(req->index)); + break; + default: + debug("unknown feature %x", le16_to_cpu(req->value)); + goto unknown; + } + hcor->or_portsc[le16_to_cpu(req->index) - 1] = + cpu_to_le32(reg); + break; + default: + debug("Unknown request"); + goto unknown; + } + + len = min3(srclen, le16_to_cpu(req->length), length); + if (srcptr != NULL && len > 0) + memcpy(buffer, srcptr, len); + dev->act_len = len; + dev->status = 0; + return 0; + +unknown: + debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x", + req->requesttype, req->request, le16_to_cpu(req->value), + le16_to_cpu(req->index), le16_to_cpu(req->length)); + + dev->act_len = 0; + dev->status = USB_ST_STALLED; + return -1; +} + +int usb_lowlevel_stop(void) +{ + return ehci_hcd_stop(); +} + +int usb_lowlevel_init(void) +{ + uint32_t reg; + + if (ehci_hcd_init() != 0) + return -1; + + /* Set head of reclaim list */ + memset(&qh_list, 0, sizeof(qh_list)); + qh_list.qh_link = cpu_to_le32((uint32_t)&qh_list | QH_LINK_TYPE_QH); + qh_list.qh_endpt1 = cpu_to_le32((1 << 15) | (USB_SPEED_HIGH << 12)); + qh_list.qh_curtd = cpu_to_le32(QT_NEXT_TERMINATE); + qh_list.qh_overlay.qt_next = cpu_to_le32(QT_NEXT_TERMINATE); + qh_list.qh_overlay.qt_altnext = cpu_to_le32(QT_NEXT_TERMINATE); + qh_list.qh_overlay.qt_token = cpu_to_le32(0x40); + + /* Set async. queue head pointer. */ + hcor->or_asynclistaddr = cpu_to_le32((uint32_t)&qh_list); + + reg = le32_to_cpu(hccr->cr_hcsparams); + hub.bNbrPorts = reg & 0xf; + if (reg & 0x10000) /* Port Indicators */ + hub.wHubCharacteristics |= 0x80; + if (reg & 0x10) /* Port Power Control */ + hub.wHubCharacteristics |= 0x01; + + /* take control over the ports */ + hcor->or_configflag |= cpu_to_le32(1); + + /* Start the host controller. */ + hcor->or_usbcmd |= cpu_to_le32(1); + + rootdev = 0; + + return 0; +} + +int +submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, + int length) +{ + + if (usb_pipetype(pipe) != PIPE_BULK) { + debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe)); + return -1; + } + return ehci_submit_async(dev, pipe, buffer, length, NULL); +} + +int +submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, + int length, struct devrequest *setup) +{ + + if (usb_pipetype(pipe) != PIPE_CONTROL) { + debug("non-control pipe (type=%lu)", usb_pipetype(pipe)); + return -1; + } + + if (usb_pipedevice(pipe) == rootdev) { + if (rootdev == 0) + dev->speed = USB_SPEED_HIGH; + return ehci_submit_root(dev, pipe, buffer, length, setup); + } + return ehci_submit_async(dev, pipe, buffer, length, setup); +} + +int +submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, + int length, int interval) +{ + + debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", + dev, pipe, buffer, length, interval); + return -1; +} diff --git a/drivers/usb/usb_ehci_core.h b/drivers/usb/usb_ehci_core.h new file mode 100644 index 0000000..39e5c5e --- /dev/null +++ b/drivers/usb/usb_ehci_core.h @@ -0,0 +1,29 @@ +/*- + * Copyright (c) 2007-2008, Juniper Networks, Inc. + * Copyright (c) 2008, Excito Elektronik i Skåne AB + * All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef USB_EHCI_CORE_H +#define USB_EHCI_CORE_H + +extern int rootdev; +extern struct ehci_hccr *hccr; +extern volatile struct ehci_hcor *hcor; + +#endif diff --git a/include/usb.h b/include/usb.h index 9a2e72c..840e657 100644 --- a/include/usb.h +++ b/include/usb.h @@ -139,7 +139,7 @@ enum { struct usb_device { int devnum; /* Device number on USB bus */ - int slow; /* Slow device? */ + int speed; /* full/low/high */ char mf[32]; /* manufacturer */ char prod[32]; /* product */ char serial[32]; /* serial number */ @@ -171,6 +171,7 @@ struct usb_device { unsigned long status; int act_len; /* transfered bytes */ int maxchild; /* Number of ports if hub */ + int portnr; struct usb_device *parent; struct usb_device *children[USB_MAXCHILDREN]; }; @@ -180,6 +181,7 @@ struct usb_device { */ #if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || \ + defined(CONFIG_USB_EHCI) || \ defined(CONFIG_USB_OHCI_NEW) || defined (CONFIG_USB_SL811HS) || \ defined(CONFIG_USB_ISP116X_HCD) || defined(CONFIG_USB_R8A66597_HCD) @@ -274,7 +276,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); * - endpoint number (4 bits) * - current Data0/1 state (1 bit) * - direction (1 bit) - * - speed (1 bit) + * - speed (2 bits) * - max packet size (2 bits: 8, 16, 32 or 64) * - pipe type (2 bits: control, interrupt, bulk, isochronous) * @@ -290,7 +292,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); * - device: bits 8-14 * - endpoint: bits 15-18 * - Data0/1: bit 19 - * - speed: bit 26 (0 = Full, 1 = Low Speed) + * - speed: bits 26-27 (0 = Full, 1 = Low, 2 = High) * - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt, 10 = control, 11 = bulk) * * Why? Because it's arbitrary, and whatever encoding we select is really @@ -300,8 +302,8 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); */ /* Create various pipes... */ #define create_pipe(dev,endpoint) \ - (((dev)->devnum << 8) | (endpoint << 15) | ((dev)->slow << 26) | (dev)->maxpacketsize) -#define default_pipe(dev) ((dev)->slow <<26) + (((dev)->devnum << 8) | (endpoint << 15) | ((dev)->speed << 26) | (dev)->maxpacketsize) +#define default_pipe(dev) ((dev)->speed << 26) #define usb_sndctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | create_pipe(dev,endpoint)) #define usb_rcvctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) @@ -333,7 +335,8 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); #define usb_pipe_endpdev(pipe) (((pipe) >> 8) & 0x7ff) #define usb_pipeendpoint(pipe) (((pipe) >> 15) & 0xf) #define usb_pipedata(pipe) (((pipe) >> 19) & 1) -#define usb_pipeslow(pipe) (((pipe) >> 26) & 1) +#define usb_pipespeed(pipe) (((pipe) >> 26) & 3) +#define usb_pipeslow(pipe) (usb_pipespeed(pipe) == USB_SPEED_LOW) #define usb_pipetype(pipe) (((pipe) >> 30) & 3) #define usb_pipeisoc(pipe) (usb_pipetype((pipe)) == PIPE_ISOCHRONOUS) #define usb_pipeint(pipe) (usb_pipetype((pipe)) == PIPE_INTERRUPT) diff --git a/include/usb_defs.h b/include/usb_defs.h index 353019f..8032e57 100644 --- a/include/usb_defs.h +++ b/include/usb_defs.h @@ -80,6 +80,12 @@ #define USB_DIR_OUT 0 #define USB_DIR_IN 0x80 +/* USB device speeds */ +#define USB_SPEED_FULL 0x0 /* 12Mbps */ +#define USB_SPEED_LOW 0x1 /* 1.5Mbps */ +#define USB_SPEED_HIGH 0x2 /* 480Mbps */ +#define USB_SPEED_RESERVED 0x3 + /* Descriptor types */ #define USB_DT_DEVICE 0x01 #define USB_DT_CONFIG 0x02 @@ -202,6 +208,7 @@ #define USB_PORT_FEAT_RESET 4 #define USB_PORT_FEAT_POWER 8 #define USB_PORT_FEAT_LOWSPEED 9 +#define USB_PORT_FEAT_HIGHSPEED 10 #define USB_PORT_FEAT_C_CONNECTION 16 #define USB_PORT_FEAT_C_ENABLE 17 #define USB_PORT_FEAT_C_SUSPEND 18 @@ -216,6 +223,9 @@ #define USB_PORT_STAT_RESET 0x0010 #define USB_PORT_STAT_POWER 0x0100 #define USB_PORT_STAT_LOW_SPEED 0x0200 +#define USB_PORT_STAT_HIGH_SPEED 0x0400 /* support for EHCI */ +#define USB_PORT_STAT_SPEED \ + (USB_PORT_STAT_LOW_SPEED | USB_PORT_STAT_HIGH_SPEED) /* wPortChange bits */ #define USB_PORT_STAT_C_CONNECTION 0x0001 -- 1.5.6.5

4 3

[U-Boot] [RFC PATCH 1/1] Add ehci freescale support
by Michael Trimarchi 25 Nov '08

25 Nov '08

Add ehci freescale support Signed-off-by: Michael Trimarchi <trimarchimichael(a)yahoo.it> --- drivers/usb/usb_ehci_fsl.c | 99 ++++++++++++++++++++++++++++++++++++++++++++ drivers/usb/usb_ehci_fsl.h | 82 ++++++++++++++++++++++++++++++++++++ 2 files changed, 181 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/usb_ehci_fsl.c create mode 100644 drivers/usb/usb_ehci_fsl.h diff --git a/drivers/usb/usb_ehci_fsl.c b/drivers/usb/usb_ehci_fsl.c new file mode 100644 index 0000000..da4b273 --- /dev/null +++ b/drivers/usb/usb_ehci_fsl.c @@ -0,0 +1,99 @@ +/* + * (C) Copyright 2008, Excito Elektronik i Skåne AB + * + * Author: Tor Krill tor(a)excito.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <pci.h> +#include <usb.h> +#include <mpc83xx.h> +#include <asm/io.h> +#include <asm/bitops.h> + +#include "usb_ehci.h" +#include "usb_ehci_fsl.h" +#include "usb_ehci_core.h" + +/* + * Create the appropriate control structures to manage + * a new EHCI host controller. + * + * Excerpts from linux ehci fsl driver. + */ +int ehci_hcd_init(void) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + uint32_t addr, temp; + + addr = (uint32_t)&(im->usb[0]); + hccr = (struct ehci_hccr *)(addr + FSL_SKIP_PCI); + hcor = (struct ehci_hcor *)((uint32_t) hccr + hccr->cr_caplength); + + /* Configure clock */ + clrsetbits_be32(&(im->clk.sccr), MPC83XX_SCCR_USB_MASK, + MPC83XX_SCCR_USB_DRCM_11); + + /* Confgure interface. */ + temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL)); + out_be32((void *)(addr + FSL_SOC_USB_CTRL), temp + | REFSEL_16MHZ | UTMI_PHY_EN); + + /* Wait for clock to stabilize */ + do { + temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL)); + udelay(1000); + } while (!(temp & PHY_CLK_VALID)); + + /* Set to Host mode */ + temp = in_le32((void *)(addr + FSL_SOC_USB_USBMODE)); + out_le32((void *)(addr + FSL_SOC_USB_USBMODE), temp | CM_HOST); + + out_be32((void *)(addr + FSL_SOC_USB_SNOOP1), SNOOP_SIZE_2GB); + out_be32((void *)(addr + FSL_SOC_USB_SNOOP2), + 0x80000000 | SNOOP_SIZE_2GB); + + /* Init phy */ + /* TODO: handle different phys? */ + out_le32(&(hcor->or_portsc[0]), PORT_PTS_UTMI); + + /* Enable interface. */ + temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL)); + out_be32((void *)(addr + FSL_SOC_USB_CTRL), temp | USB_EN); + + out_be32((void *)(addr + FSL_SOC_USB_PRICTRL), 0x0000000c); + out_be32((void *)(addr + FSL_SOC_USB_AGECNTTHRSH), 0x00000040); + out_be32((void *)(addr + FSL_SOC_USB_SICTRL), 0x00000001); + + /* Enable interface. */ + temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL)); + out_be32((void *)(addr + FSL_SOC_USB_CTRL), temp | USB_EN); + + temp = in_le32((void *)(addr + FSL_SOC_USB_USBMODE)); + + return 0; +} + +/* + * Destroy the appropriate control structures corresponding + * the the EHCI host controller. + */ +int ehci_hcd_stop(void) +{ + return 0; +} diff --git a/drivers/usb/usb_ehci_fsl.h b/drivers/usb/usb_ehci_fsl.h new file mode 100644 index 0000000..829dbf3 --- /dev/null +++ b/drivers/usb/usb_ehci_fsl.h @@ -0,0 +1,82 @@ +/* Copyright (c) 2005 freescale semiconductor + * Copyright (c) 2005 MontaVista Software + * Copyright (c) 2008 Excito Elektronik i Skåne AB + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#ifndef _EHCI_FSL_H +#define _EHCI_FSL_H +/* Global offsets */ +#define FSL_SKIP_PCI 0x100 + +/* offsets for the non-ehci registers in the FSL SOC USB controller */ +#define FSL_SOC_USB_ULPIVP 0x170 +#define FSL_SOC_USB_PORTSC1 0x184 +#define PORT_PTS_MSK (3<<30) +#define PORT_PTS_UTMI (0<<30) +#define PORT_PTS_ULPI (2<<30) +#define PORT_PTS_SERIAL (3<<30) +#define PORT_PTS_PTW (1<<28) + +/* USBMODE Register bits */ +#define CM_IDLE (0<<0) +#define CM_RESERVED (1<<0) +#define CM_DEVICE (2<<0) +#define CM_HOST (3<<0) +#define USBMODE_RESERVED_2 (0<<2) +#define SLOM (1<<3) +#define SDIS (1<<4) + +/* CONTROL Register bits */ +#define ULPI_INT_EN (1<<0) +#define WU_INT_EN (1<<1) +#define USB_EN (1<<2) +#define LSF_EN (1<<3) +#define KEEP_OTG_ON (1<<4) +#define OTG_PORT (1<<5) +#define REFSEL_12MHZ (0<<6) +#define REFSEL_16MHZ (1<<6) +#define REFSEL_48MHZ (2<<6) +#define PLL_RESET (1<<8) +#define UTMI_PHY_EN (1<<9) +#define PHY_CLK_SEL_UTMI (0<<10) +#define PHY_CLK_SEL_ULPI (1<<10) +#define CLKIN_SEL_USB_CLK (0<<11) +#define CLKIN_SEL_USB_CLK2 (1<<11) +#define CLKIN_SEL_SYS_CLK (2<<11) +#define CLKIN_SEL_SYS_CLK2 (3<<11) +#define RESERVED_18 (0<<13) +#define RESERVED_17 (0<<14) +#define RESERVED_16 (0<<15) +#define WU_INT (1<<16) +#define PHY_CLK_VALID (1<<17) + +#define FSL_SOC_USB_PORTSC2 0x188 +#define FSL_SOC_USB_USBMODE 0x1a8 +#define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ +#define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ +#define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ +#define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */ +#define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */ +#define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */ +#define SNOOP_SIZE_2GB 0x1e + +/* System Clock Control Register */ +#define MPC83XX_SCCR_USB_MASK 0x00f00000 +#define MPC83XX_SCCR_USB_DRCM_11 0x00300000 +#define MPC83XX_SCCR_USB_DRCM_01 0x00100000 +#define MPC83XX_SCCR_USB_DRCM_10 0x00200000 + +#endif /* _EHCI_FSL_H */ -- 1.5.6.5

2 1

Re: [U-Boot] [PATCH 2/4][RFC] Add ehci core functionality
by Wolfgang Denk 25 Nov '08

25 Nov '08

Dear michael, In message <492BE407.7030309(a)gandalf.sssup.it> you wrote: > SGksCgpNYXJrdXMgS2xvdHpiw7xjaGVyIHdyb3RlOgo+IE9uIEZyaSwgTm92IDIxLCAyMDA4IGF0 > IDEwOjIyOjUxQU0gKzAxMDAsIG1pY2hhZWwgd3JvdGU6Cj4gICAKPj4gSGksCj4+Cj4+IEkgaGF2 > ZSByZWRvbmUgdGhlIHBhdGNoLiBXaGF0IGRvIHlvdSB0aGluaz8KPj4KPj4gSSBjYW4ndCB0ZXN0 > IHRoZW0uIFRoZXkgY29tcGlsZS4KPj4gICAgIAo+Cj4gTm90IGZvciBtZSAoYm9hcmQgaXMgc2Vx > dW9pYSk6Cj4KPiBtYWtlIC1DIGNvbW1vbi8KPiBtYWtlWzFdOiBFbnRlcmluZyBkaXJlY3Rvcnkg > YC9ob21lL21rL3NyYy9naXQvdS1ib290L2NvbW1vbicKPiBwcGNfNHh4RlAtZ2NjIC1nICAtT3Mg > ICAtZlBJQyAtZmZpeGVkLXIxNCAtbWVhYmkgLWZuby1zdHJpY3QtYWxpYXNpbmcgLURfX0tFUk5F > TF9fIC1EVEVYVF9CQVNFPTB4RkZGQTAwMDAgLUkvaG9tZS9tay9zcmMvZ2l0L3UtYm9vdC9pbmNs > dWRlIC1mbm8tYnVpbHRpbiAtZmZyZWVzdGFuZGluZyAtbm9zdGRpbmMgLWlzeXN0ZW0gL2hvbWUv > bWsvZWxka3MvZWxkay00LjIvdXNyL2Jpbi8uLi9saWIvZ2NjL3Bvd2VycGMtbGludXgvNC4yLjIv > aW5jbHVkZSAtcGlwZSAgLURDT05GSUdfUFBDIC1EX19wb3dlcnBjX18gLURDT05GSUdfNHh4IC1m > Zml4ZWQtcjIgLW1zdHJpbmcgLW1zb2Z0LWZsb2F0IC1XYSwtbTQ0MCAtbWNwdT00NDAgLURDT05G > SUdfNDQwPTEgLVdhbGwgLVdzdHJpY3QtcHJvdG90eXBlcyAtZm5vLXN0YWNrLXByb3RlY3RvciAt > YyAtbyB1c2IubyB1c2IuYwo+IHVzYi5jOiBJbiBmdW5jdGlvbiAndXNiX2h1Yl9wb3J0X2Nvbm5l > Y3RfY2hhbmdlJzoKPiB1c2IuYzoxMTI5OiBlcnJvcjogJ3N0cnVjdCB1c2JfZGV2aWNlJyBoYXMg > bm8gbWVtYmVyIG5hbWVkICdzbG93Jwo+IG1ha2VbMV06ICoqKiBbdXNiLm9dIEVycm9yIDEKPiBt > YWtlWzFdOiBUYXJnZXQgYGFsbCcgbm90IHJlbWFkZSBiZWNhdXNlIG9mIGVycm9ycy4KPgo+IEJl > c3QgcmVnYXJkcwo+IE1hcmt1cwo+Cj4gICAKCkNhbiB5b3UgcGxlYXNlIHNlbmQgeW91ciBjb25m > aWd1cmF0aW9uPwoKCi0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t > LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0KVGhpcyBTRi5OZXQgZW1haWwgaXMgc3BvbnNv > cmVkIGJ5IHRoZSBNb2JsaW4gWW91ciBNb3ZlIERldmVsb3BlcidzIGNoYWxsZW5nZQpCdWlsZCB0 > aGUgY29vbGVzdCBMaW51eCBiYXNlZCBhcHBsaWNhdGlvbnMgd2l0aCBNb2JsaW4gU0RLICYgd2lu > IGdyZWF0IHByaXplcwpHcmFuZCBwcml6ZSBpcyBhIHRyaXAgZm9yIHR3byB0byBhbiBPcGVuIFNv > dXJjZSBldmVudCBhbnl3aGVyZSBpbiB0aGUgd29ybGQKaHR0cDovL21vYmxpbi1jb250ZXN0Lm9y > Zy9yZWRpcmVjdC5waHA/YmFubmVyX2lkPTEwMCZ1cmw9LwpfX19fX19fX19fX19fX19fX19fX19f > X19fX19fX19fX19fX19fX19fX19fX19fXwpVLUJvb3QtVXNlcnMgbWFpbGluZyBsaXN0ClUtQm9v > dC1Vc2Vyc0BsaXN0cy5zb3VyY2Vmb3JnZS5uZXQKaHR0cHM6Ly9saXN0cy5zb3VyY2Vmb3JnZS5u > ZXQvbGlzdHMvbGlzdGluZm8vdS1ib290LXVzZXJzCg== Please stop posting base64 encoded stuff. Send plain text only. And please stop sending to the old sourceforge list. The mailing list address is u-boot(a)lists.denx.de > Markus Klotzbücher wrote: ... > > Not for me (board is sequoia): ... >Can you please send your configuration? Markus explicitely mentioned that he was using the "sequoia" board configuration. What else would you need? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de You don't need a weatherman to know which way the wind blows. - Bob Dylan

2 1

[U-Boot] [RFC PATCH 0/1] Add ehci core
by Michael Trimarchi 25 Nov '08

25 Nov '08

Add ehci core functionality --- common/cmd_usb.c | 3 +- drivers/usb/usb_ehci.h | 120 ++++++++ drivers/usb/usb_ehci_core.c | 633 +++++++++++++++++++++++++++++++++++++++++++ drivers/usb/usb_ehci_core.h | 29 ++ include/usb.h | 15 +- include/usb_defs.h | 10 + 6 files changed, 803 insertions(+), 7 deletions(-) create mode 100644 drivers/usb/usb_ehci.h create mode 100644 drivers/usb/usb_ehci_core.c create mode 100644 drivers/usb/usb_ehci_core.h diff --git a/common/cmd_usb.c b/common/cmd_usb.c index 99e551f..532df37 100644 --- a/common/cmd_usb.c +++ b/common/cmd_usb.c @@ -276,7 +276,8 @@ void usb_show_tree_graph(struct usb_device *dev,char *pre) pre[index++]= has_child ? '|' : ' '; pre[index]=0; printf(" %s (%s, %dmA)\n",usb_get_class_desc(dev->config.if_desc[0].bInterfaceClass), - dev->slow ? "1.5MBit/s" : "12MBit/s",dev->config.MaxPower * 2); + (dev->speed == USB_SPEED_LOW) ? "1.5MBit/s" : (dev->speed == USB_SPEED_FULL) + ? "12MBit/s" : "480MBit/s", dev->config.MaxPower * 2); if (strlen(dev->mf) || strlen(dev->prod) || strlen(dev->serial)) diff --git a/drivers/usb/usb_ehci.h b/drivers/usb/usb_ehci.h new file mode 100644 index 0000000..821082a --- /dev/null +++ b/drivers/usb/usb_ehci.h @@ -0,0 +1,120 @@ +/*- + * Copyright (c) 2007-2008, Juniper Networks, Inc. + * All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef USB_EHCI_H +#define USB_EHCI_H + +/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */ +#define DeviceRequest \ + ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE)<<8) +#define DeviceOutRequest \ + ((USB_DIR_OUT|USB_TYPE_STANDARD|USB_RECIP_DEVICE)<<8) + +#define InterfaceRequest \ + ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8) + +#define EndpointRequest \ + ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8) +#define EndpointOutRequest \ + ((USB_DIR_OUT|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8) + +/* + * Register Space. + */ +struct ehci_hccr { + uint8_t cr_caplength; + uint16_t cr_hciversion; + uint32_t cr_hcsparams; + uint32_t cr_hccparams; + uint8_t cr_hcsp_portrt[8]; +}; + +struct ehci_hcor { + uint32_t or_usbcmd; + uint32_t or_usbsts; + uint32_t or_usbintr; + uint32_t or_frindex; + uint32_t or_ctrldssegment; + uint32_t or_periodiclistbase; + uint32_t or_asynclistaddr; + uint32_t _reserved_[9]; + uint32_t or_configflag; + uint32_t or_portsc[2]; + uint32_t or_systune; +}; + +#define EHCI_PS_WKOC_E 0x00400000 /* RW wake on over current */ +#define EHCI_PS_WKDSCNNT_E 0x00200000 /* RW wake on disconnect */ +#define EHCI_PS_WKCNNT_E 0x00100000 /* RW wake on connect */ +#define EHCI_PS_PTC 0x000f0000 /* RW port test control */ +#define EHCI_PS_PIC 0x0000c000 /* RW port indicator control */ +#define EHCI_PS_PO 0x00002000 /* RW port owner */ +#define EHCI_PS_PP 0x00001000 /* RW,RO port power */ +#define EHCI_PS_LS 0x00000c00 /* RO line status */ +#define EHCI_PS_IS_LOWSPEED(x) (((x) & EHCI_PS_LS) == 0x00000400) +#define EHCI_PS_PR 0x00000100 /* RW port reset */ +#define EHCI_PS_SUSP 0x00000080 /* RW suspend */ +#define EHCI_PS_FPR 0x00000040 /* RW force port resume */ +#define EHCI_PS_OCC 0x00000020 /* RWC over current change */ +#define EHCI_PS_OCA 0x00000010 /* RO over current active */ +#define EHCI_PS_PEC 0x00000008 /* RWC port enable change */ +#define EHCI_PS_PE 0x00000004 /* RW port enable */ +#define EHCI_PS_CSC 0x00000002 /* RWC connect status change */ +#define EHCI_PS_CS 0x00000001 /* RO connect status */ +#define EHCI_PS_CLEAR (EHCI_PS_OCC|EHCI_PS_PEC|EHCI_PS_CSC) + +/* + * Schedule Interface Space. + * + * IMPORTANT: Software must ensure that no interface data structure + * reachable by the EHCI host controller spans a 4K page boundary! + * + * Periodic transfers (i.e. isochronous and interrupt transfers) are + * not supported. + */ + +/* Queue Element Transfer Descriptor (qTD). */ +struct qTD { + uint32_t qt_next; +#define QT_NEXT_TERMINATE 1 + uint32_t qt_altnext; + uint32_t qt_token; + uint32_t qt_buffer[5]; +}; + +/* Queue Head (QH). */ +struct QH { + uint32_t qh_link; +#define QH_LINK_TERMINATE 1 +#define QH_LINK_TYPE_ITD 0 +#define QH_LINK_TYPE_QH 2 +#define QH_LINK_TYPE_SITD 4 +#define QH_LINK_TYPE_FSTN 6 + uint32_t qh_endpt1; + uint32_t qh_endpt2; + uint32_t qh_curtd; + struct qTD qh_overlay; +}; + +/* Low level intit functions */ + +int ehci_hcd_init (void); +int ehci_hcd_stop (void); +#endif /* USB_EHCI_H */ diff --git a/drivers/usb/usb_ehci_core.c b/drivers/usb/usb_ehci_core.c new file mode 100644 index 0000000..ef947d5 --- /dev/null +++ b/drivers/usb/usb_ehci_core.c @@ -0,0 +1,633 @@ +/*- + * Copyright (c) 2007-2008, Juniper Networks, Inc. + * Copyright (c) 2008, Excito Elektronik i Skåne AB + * All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <usb.h> +#include <asm/io.h> +#include "usb_ehci.h" + +int rootdev; +struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ +volatile struct ehci_hcor *hcor; + +static uint16_t portreset; +static struct QH qh_list __attribute__ ((aligned (32))); + +struct usb_device_descriptor device = { + sizeof(struct usb_device_descriptor), /* bLength */ + 1, /* bDescriptorType: UDESC_DEVICE */ + 0x0002, /* bcdUSB: v2.0 */ + 9, /* bDeviceClass: UDCLASS_HUB */ + 0, /* bDeviceSubClass: UDSUBCLASS_HUB */ + 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */ + 64, /* bMaxPacketSize: 64 bytes */ + 0x0000, /* idVendor */ + 0x0000, /* idProduct */ + 0x0001, /* bcdDevice */ + 1, /* iManufacturer */ + 2, /* iProduct */ + 0, /* iSerialNumber */ + 1 /* bNumConfigurations: 1 */ +}; + +struct usb_config_descriptor config = { + sizeof(struct usb_config_descriptor), + 2, /* bDescriptorType: UDESC_CONFIG */ + sizeof(struct usb_config_descriptor) + + sizeof(struct usb_interface_descriptor) + + sizeof(struct usb_endpoint_descriptor), + 0, + 1, /* bNumInterface */ + 1, /* bConfigurationValue */ + 0, /* iConfiguration */ + 0x40, /* bmAttributes: UC_SELF_POWER */ + 0 /* bMaxPower */ +}; + +struct usb_interface_descriptor interface = { + sizeof(struct usb_interface_descriptor), /* bLength */ + 4, /* bDescriptorType: UDESC_INTERFACE */ + 0, /* bInterfaceNumber */ + 0, /* bAlternateSetting */ + 1, /* bNumEndpoints */ + 9, /* bInterfaceClass: UICLASS_HUB */ + 0, /* bInterfaceSubClass: UISUBCLASS_HUB */ + 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */ + 0 /* iInterface */ +}; + +struct usb_endpoint_descriptor endpoint = { +sizeof(struct usb_endpoint_descriptor), /* bLength */ + 5, /* bDescriptorType: UDESC_ENDPOINT */ + 0x81, /* bEndpointAddress: UE_DIR_IN | EHCI_INTR_ENDPT */ + 3, /* bmAttributes: UE_INTERRUPT */ + 8, 0, /* wMaxPacketSize */ + 255 /* bInterval */ +}; + +struct usb_hub_descriptor hub = { + sizeof(struct usb_hub_descriptor), /* bDescLength */ + 0x29, /* bDescriptorType: hub + descriptor */ + 2, /* bNrPorts -- runtime modified */ + 0, 0, /* wHubCharacteristics */ + 0xff, /* bPwrOn2PwrGood */ + {}, /* bHubCntrCurrent */ + {} /* at most 7 ports! XXX */ +}; + +static void *ehci_alloc (size_t sz, size_t align) +{ + static struct QH qh __attribute__ ((aligned (32))); + static struct qTD td[3] __attribute__ ((aligned (32))); + static int ntds = 0; + void *p; + + switch (sz) { + case sizeof (struct QH): + p = &qh; + ntds = 0; + break; + case sizeof (struct qTD): + if (ntds == 3) { + debug ("out of TDs"); + return (NULL); + } + p = &td[ntds]; + ntds++; + break; + default: + debug ("unknown allocation size"); + return (NULL); + } + + memset (p, sz, 0); + return (p); +} + +static void ehci_free (void *p, size_t sz) +{ +} + +static int ehci_td_buffer (struct qTD *td, void *buf, size_t sz) +{ + uint32_t addr, delta, next; + int idx; + + addr = (uint32_t) buf; + idx = 0; + while (idx < 5) { + td->qt_buffer[idx] = cpu_to_le32 (addr); + next = (addr + 4096) & ~4095; + delta = next - addr; + if (delta >= sz) + break; + sz -= delta; + addr = next; + idx++; + } + + if (idx == 5) { + debug ("out of buffer pointers (%u bytes left)", sz); + return (-1); + } + + return (0); +} + +static int +ehci_submit_async (struct usb_device *dev, unsigned long pipe, void *buffer, + int length, struct devrequest *req) +{ + struct QH *qh; + struct qTD *td; + volatile struct qTD *vtd; + unsigned long ts; + uint32_t *tdp; + uint32_t endpt, token, usbsts; + uint32_t c, toggle; + + debug ("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p", dev, pipe, + buffer, length, req); + if (req != NULL) + debug ("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u", + req->request, req->request, + req->requesttype, req->requesttype, + le16_to_cpu (req->value), le16_to_cpu (req->value), + le16_to_cpu (req->index), le16_to_cpu (req->index)); + + qh = ehci_alloc (sizeof (struct QH), 32); + if (qh == NULL) { + debug ("unable to allocate QH"); + return (-1); + } + qh->qh_link = cpu_to_le32 ((uint32_t) & qh_list | QH_LINK_TYPE_QH); + c = (usb_pipespeed (pipe) != USB_SPEED_HIGH && + usb_pipeendpoint (pipe) == 0) ? 1 : 0; + endpt = (8 << 28) | + (c << 27) | + (usb_maxpacket (dev, pipe) << 16) | + (0 << 15) | + (1 << 14) | + (usb_pipespeed (pipe) << 12) | + (usb_pipeendpoint (pipe) << 8) | + (0 << 7) | (usb_pipedevice (pipe) << 0); + qh->qh_endpt1 = cpu_to_le32 (endpt); + endpt = (1 << 30) | + (dev->portnr << 23) | + (dev->parent->devnum << 16) | (0 << 8) | (0 << 0); + qh->qh_endpt2 = cpu_to_le32 (endpt); + qh->qh_overlay.qt_next = cpu_to_le32 (QT_NEXT_TERMINATE); + qh->qh_overlay.qt_altnext = cpu_to_le32 (QT_NEXT_TERMINATE); + + td = NULL; + tdp = &qh->qh_overlay.qt_next; + + toggle = + usb_gettoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe)); + + if (req != NULL) { + td = ehci_alloc (sizeof (struct qTD), 32); + if (td == NULL) { + debug ("unable to allocate SETUP td"); + goto fail; + } + td->qt_next = cpu_to_le32 (QT_NEXT_TERMINATE); + td->qt_altnext = cpu_to_le32 (QT_NEXT_TERMINATE); + token = (0 << 31) | + (sizeof (*req) << 16) | + (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0); + td->qt_token = cpu_to_le32 (token); + if (ehci_td_buffer (td, req, sizeof (*req)) != 0) { + debug ("unable construct SETUP td"); + ehci_free (td, sizeof (*td)); + goto fail; + } + *tdp = cpu_to_le32 ((uint32_t) td); + tdp = &td->qt_next; + toggle = 1; + } + + if (length > 0 || req == NULL) { + td = ehci_alloc (sizeof (struct qTD), 32); + if (td == NULL) { + debug ("unable to allocate DATA td"); + goto fail; + } + td->qt_next = cpu_to_le32 (QT_NEXT_TERMINATE); + td->qt_altnext = cpu_to_le32 (QT_NEXT_TERMINATE); + token = (toggle << 31) | + (length << 16) | + ((req == NULL ? 1 : 0) << 15) | + (0 << 12) | + (3 << 10) | + ((usb_pipein (pipe) ? 1 : 0) << 8) | (0x80 << 0); + td->qt_token = cpu_to_le32 (token); + if (ehci_td_buffer (td, buffer, length) != 0) { + debug ("unable construct DATA td"); + ehci_free (td, sizeof (*td)); + goto fail; + } + *tdp = cpu_to_le32 ((uint32_t) td); + tdp = &td->qt_next; + } + + if (req != NULL) { + td = ehci_alloc (sizeof (struct qTD), 32); + if (td == NULL) { + debug ("unable to allocate ACK td"); + goto fail; + } + td->qt_next = cpu_to_le32 (QT_NEXT_TERMINATE); + td->qt_altnext = cpu_to_le32 (QT_NEXT_TERMINATE); + token = (toggle << 31) | + (0 << 16) | + (1 << 15) | + (0 << 12) | + (3 << 10) | + ((usb_pipein (pipe) ? 0 : 1) << 8) | (0x80 << 0); + td->qt_token = cpu_to_le32 (token); + *tdp = cpu_to_le32 ((uint32_t) td); + tdp = &td->qt_next; + } + + qh_list.qh_link = cpu_to_le32 ((uint32_t) qh | QH_LINK_TYPE_QH); + + usbsts = le32_to_cpu (hcor->or_usbsts); + hcor->or_usbsts = cpu_to_le32 (usbsts & 0x3f); + + /* Enable async. schedule. */ + hcor->or_usbcmd |= cpu_to_le32 (0x20); + while ((hcor->or_usbsts & cpu_to_le32 (0x8000)) == 0) + udelay (1); + + /* Wait for TDs to be processed. */ + ts = get_timer (0); + vtd = td; + do { + token = le32_to_cpu (vtd->qt_token); + if (!(token & 0x80)) + break; + } while (get_timer (ts) < CONFIG_SYS_HZ); + + /* Disable async schedule. */ + hcor->or_usbcmd &= ~cpu_to_le32 (0x20); + while ((hcor->or_usbsts & cpu_to_le32 (0x8000)) != 0) + udelay (1); + + qh_list.qh_link = cpu_to_le32 ((uint32_t) & qh_list | QH_LINK_TYPE_QH); + + token = le32_to_cpu (qh->qh_overlay.qt_token); + if (!(token & 0x80)) { + // debug ("TOKEN=%#x", token); + switch (token & 0xfc) { + case 0: + toggle = token >> 31; + usb_settoggle (dev, usb_pipeendpoint (pipe), + usb_pipeout (pipe), toggle); + dev->status = 0; + break; + case 0x40: + dev->status = USB_ST_STALLED; + break; + case 0xa0: + case 0x20: + dev->status = USB_ST_BUF_ERR; + break; + case 0x50: + case 0x10: + dev->status = USB_ST_BABBLE_DET; + break; + default: + dev->status = USB_ST_CRC_ERR; + break; + } + dev->act_len = length - ((token >> 16) & 0x7fff); + } else { + dev->act_len = 0; + debug ("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x", + dev->devnum, le32_to_cpu (hcor->or_usbsts), + le32_to_cpu (hcor->or_portsc[0]), + le32_to_cpu (hcor->or_portsc[1])); + } + + return ((dev->status != USB_ST_NOT_PROC) ? 0 : -1); + + fail: + td = (void *)le32_to_cpu (qh->qh_overlay.qt_next); + while (td != (void *)QT_NEXT_TERMINATE) { + qh->qh_overlay.qt_next = td->qt_next; + ehci_free (td, sizeof (*td)); + td = (void *)le32_to_cpu (qh->qh_overlay.qt_next); + } + ehci_free (qh, sizeof (*qh)); + return (-1); +} + +static __inline int min3 (int a, int b, int c) +{ + + if (b < a) + a = b; + if (c < a) + a = c; + return (a); +} + +ehci_submit_root (struct usb_device *dev, unsigned long pipe, void *buffer, + int length, struct devrequest *req) +{ + uint8_t tmpbuf[4]; + u16 typeReq; + void *srcptr; + int len, srclen; + uint32_t reg; + + srclen = 0; + srcptr = NULL; + + debug ("req=%u (%#x), type=%u (%#x), value=%u, index=%u", + req->request, req->request, + req->requesttype, req->requesttype, + le16_to_cpu (req->value), le16_to_cpu (req->index)); + + typeReq = req->request << 8 | req->requesttype; + + switch (typeReq) { + case DeviceRequest | USB_REQ_GET_DESCRIPTOR: + switch (le16_to_cpu (req->value) >> 8) { + case USB_DT_DEVICE: + srcptr = &device; + srclen = sizeof(struct usb_device_descriptor); + break; + case USB_DT_CONFIG: + srcptr = &config; + srclen = sizeof(config) + + sizeof (struct usb_interface_descriptor) + + sizeof (struct usb_hub_descriptor); + break; + case USB_DT_STRING: + switch (le16_to_cpu (req->value) & 0xff) { + case 0: /* Language */ + srcptr = "\4\3\1\0"; + srclen = 4; + break; + case 1: /* Vendor */ + srcptr = "\16\3u\0-\0b\0o\0o\0t\0"; + srclen = 14; + break; + case 2: /* Product */ + srcptr = "\52\3E\0H\0C\0I\0 " + "\0H\0o\0s\0t\0 " + "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0"; + srclen = 42; + break; + default: + goto unknown; + } + break; + default: + debug ("unknown value %x", le16_to_cpu (req->value)); + goto unknown; + } + break; + case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8): + switch (le16_to_cpu (req->value) >> 8) { + case USB_DT_HUB: + srcptr = &hub; + srclen = sizeof(hub); + break; + default: + debug ("unknown value %x", le16_to_cpu (req->value)); + goto unknown; + } + break; + case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): + rootdev = le16_to_cpu (req->value); + break; + case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: + /* Nothing to do */ + break; + case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8): + tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */ + tmpbuf[1] = 0; + srcptr = tmpbuf; + srclen = 2; + break; + case DeviceRequest | USB_REQ_GET_STATUS: + memset (tmpbuf, 0, 4); + reg = le32_to_cpu (hcor->or_portsc[le16_to_cpu(req->index) + - 1]); + if (reg & EHCI_PS_CS) + tmpbuf[0] |= USB_PORT_STAT_CONNECTION; + if (reg & EHCI_PS_PE) + tmpbuf[0] |= USB_PORT_STAT_ENABLE; + if (reg & EHCI_PS_SUSP) + tmpbuf[0] |= USB_PORT_STAT_SUSPEND; + if (reg & EHCI_PS_OCA) + tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT; + if (reg & EHCI_PS_PR) + tmpbuf[0] |= USB_PORT_STAT_RESET; + if (reg & EHCI_PS_PP) + tmpbuf[1] |= USB_PORT_STAT_POWER >> 8; + tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; + + if (reg & EHCI_PS_CSC) + tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION; + if (reg & EHCI_PS_PEC) + tmpbuf[2] |= USB_PORT_STAT_C_ENABLE; + if (reg & EHCI_PS_OCC) + tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT; + if (portreset & (1 << le16_to_cpu (req->index))) + tmpbuf[2] |= USB_PORT_STAT_C_RESET; + srcptr = tmpbuf; + srclen = 4; + break; + case DeviceOutRequest | USB_REQ_SET_FEATURE: + reg = le32_to_cpu (hcor->or_portsc[le16_to_cpu (req->index) - 1]); + reg &= ~EHCI_PS_CLEAR; + switch (le16_to_cpu (req->value)) { + case USB_PORT_FEAT_POWER: + reg |= EHCI_PS_PP; + break; + case USB_PORT_FEAT_RESET: + if (EHCI_PS_IS_LOWSPEED (reg)) { + /* Low speed device, give up ownership. */ + reg |= EHCI_PS_PO; + break; + } + /* Start reset sequence. */ + reg &= ~EHCI_PS_PE; + reg |= EHCI_PS_PR; + hcor->or_portsc[le16_to_cpu (req->index) - 1] = + cpu_to_le32 (reg); + /* Wait for reset to complete. */ + udelay (500000); + /* Terminate reset sequence. */ + reg &= ~EHCI_PS_PR; + /* TODO: is it only fsl chip that requires this + * manual setting of port enable? + */ + reg |= EHCI_PS_PE; + hcor->or_portsc[le16_to_cpu (req->index) - 1] = + cpu_to_le32 (reg); + /* Wait for HC to complete reset. */ + udelay (2000); + reg = + le32_to_cpu (hcor->or_portsc[le16_to_cpu (req->index) - 1]); + reg &= ~EHCI_PS_CLEAR; + if ((reg & EHCI_PS_PE) == 0) { + /* Not a high speed device, give up ownership. */ + reg |= EHCI_PS_PO; + break; + } + portreset |= 1 << le16_to_cpu (req->index); + break; + default: + debug ("unknown feature %x", le16_to_cpu (req->value)); + goto unknown; + } + hcor->or_portsc[le16_to_cpu (req->index) - 1] = cpu_to_le32 (reg); + break; + case DeviceOutRequest | USB_REQ_CLEAR_FEATURE: + reg = le32_to_cpu (hcor->or_portsc[le16_to_cpu (req->index) - 1]); + reg &= ~EHCI_PS_CLEAR; + switch (le16_to_cpu (req->value)) { + case USB_PORT_FEAT_ENABLE: + reg &= ~EHCI_PS_PE; + break; + case USB_PORT_FEAT_C_CONNECTION: + reg |= EHCI_PS_CSC; + break; + case USB_PORT_FEAT_C_RESET: + portreset &= ~(1 << le16_to_cpu (req->index)); + break; + default: + debug ("unknown feature %x", le16_to_cpu (req->value)); + goto unknown; + } + hcor->or_portsc[le16_to_cpu (req->index) - 1] = cpu_to_le32 (reg); + break; + default: + debug ("Unknown request %x", + C (req->request, req->requesttype)); + goto unknown; + } + + len = min3 (srclen, le16_to_cpu (req->length), length); + if (srcptr != NULL && len > 0) + memcpy (buffer, srcptr, len); + dev->act_len = len; + dev->status = 0; + return (0); + + unknown: + debug ("requesttype=%x, request=%x, value=%x, index=%x, length=%x", + req->requesttype, req->request, le16_to_cpu (req->value), + le16_to_cpu (req->index), le16_to_cpu (req->length)); + + dev->act_len = 0; + dev->status = USB_ST_STALLED; + return (-1); +} + +int usb_lowlevel_stop (void) +{ + return ehci_hcd_stop (); +} + +int usb_lowlevel_init (void) +{ + uint32_t reg; + + if (ehci_hcd_init () != 0) { + return -1; + } + + /* Set head of reclaim list */ + memset (&qh_list, 0, sizeof (qh_list)); + qh_list.qh_link = cpu_to_le32 ((uint32_t) & qh_list | QH_LINK_TYPE_QH); + qh_list.qh_endpt1 = cpu_to_le32 ((1 << 15) | (USB_SPEED_HIGH << 12)); + qh_list.qh_curtd = cpu_to_le32 (QT_NEXT_TERMINATE); + qh_list.qh_overlay.qt_next = cpu_to_le32 (QT_NEXT_TERMINATE); + qh_list.qh_overlay.qt_altnext = cpu_to_le32 (QT_NEXT_TERMINATE); + qh_list.qh_overlay.qt_token = cpu_to_le32 (0x40); + + /* Set async. queue head pointer. */ + hcor->or_asynclistaddr = cpu_to_le32 ((uint32_t) & qh_list); + + reg = le32_to_cpu (hccr->cr_hcsparams); + hub.bNbrPorts = reg & 0xf; + if (reg & 0x10000) /* Port Indicators */ + hub.wHubCharacteristics |= 0x80; + if (reg & 0x10) /* Port Power Control */ + hub.wHubCharacteristics |= 0x01; + + /* take control over the ports */ + hcor->or_configflag |= cpu_to_le32 (1); + + /* Start the host controller. */ + hcor->or_usbcmd |= cpu_to_le32 (1); + + rootdev = 0; + + return 0; +} + +int +submit_bulk_msg (struct usb_device *dev, unsigned long pipe, void *buffer, + int length) +{ + + if (usb_pipetype (pipe) != PIPE_BULK) { + debug ("non-bulk pipe (type=%lu)", usb_pipetype (pipe)); + return (-1); + } + return (ehci_submit_async (dev, pipe, buffer, length, NULL)); +} + +int +submit_control_msg (struct usb_device *dev, unsigned long pipe, void *buffer, + int length, struct devrequest *setup) +{ + + if (usb_pipetype (pipe) != PIPE_CONTROL) { + debug ("non-control pipe (type=%lu)", usb_pipetype (pipe)); + return (-1); + } + + if (usb_pipedevice (pipe) == rootdev) { + if (rootdev == 0) + dev->speed = USB_SPEED_HIGH; + return (ehci_submit_root (dev, pipe, buffer, length, setup)); + } + return (ehci_submit_async (dev, pipe, buffer, length, setup)); +} + +int +submit_int_msg (struct usb_device *dev, unsigned long pipe, void *buffer, + int length, int interval) +{ + + debug ("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", dev, pipe, + buffer, length, interval); + return (-1); +} diff --git a/drivers/usb/usb_ehci_core.h b/drivers/usb/usb_ehci_core.h new file mode 100644 index 0000000..39e5c5e --- /dev/null +++ b/drivers/usb/usb_ehci_core.h @@ -0,0 +1,29 @@ +/*- + * Copyright (c) 2007-2008, Juniper Networks, Inc. + * Copyright (c) 2008, Excito Elektronik i Skåne AB + * All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef USB_EHCI_CORE_H +#define USB_EHCI_CORE_H + +extern int rootdev; +extern struct ehci_hccr *hccr; +extern volatile struct ehci_hcor *hcor; + +#endif diff --git a/include/usb.h b/include/usb.h index 9a2e72c..840e657 100644 --- a/include/usb.h +++ b/include/usb.h @@ -139,7 +139,7 @@ enum { struct usb_device { int devnum; /* Device number on USB bus */ - int slow; /* Slow device? */ + int speed; /* full/low/high */ char mf[32]; /* manufacturer */ char prod[32]; /* product */ char serial[32]; /* serial number */ @@ -171,6 +171,7 @@ struct usb_device { unsigned long status; int act_len; /* transfered bytes */ int maxchild; /* Number of ports if hub */ + int portnr; struct usb_device *parent; struct usb_device *children[USB_MAXCHILDREN]; }; @@ -180,6 +181,7 @@ struct usb_device { */ #if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || \ + defined(CONFIG_USB_EHCI) || \ defined(CONFIG_USB_OHCI_NEW) || defined (CONFIG_USB_SL811HS) || \ defined(CONFIG_USB_ISP116X_HCD) || defined(CONFIG_USB_R8A66597_HCD) @@ -274,7 +276,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); * - endpoint number (4 bits) * - current Data0/1 state (1 bit) * - direction (1 bit) - * - speed (1 bit) + * - speed (2 bits) * - max packet size (2 bits: 8, 16, 32 or 64) * - pipe type (2 bits: control, interrupt, bulk, isochronous) * @@ -290,7 +292,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); * - device: bits 8-14 * - endpoint: bits 15-18 * - Data0/1: bit 19 - * - speed: bit 26 (0 = Full, 1 = Low Speed) + * - speed: bits 26-27 (0 = Full, 1 = Low, 2 = High) * - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt, 10 = control, 11 = bulk) * * Why? Because it's arbitrary, and whatever encoding we select is really @@ -300,8 +302,8 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); */ /* Create various pipes... */ #define create_pipe(dev,endpoint) \ - (((dev)->devnum << 8) | (endpoint << 15) | ((dev)->slow << 26) | (dev)->maxpacketsize) -#define default_pipe(dev) ((dev)->slow <<26) + (((dev)->devnum << 8) | (endpoint << 15) | ((dev)->speed << 26) | (dev)->maxpacketsize) +#define default_pipe(dev) ((dev)->speed << 26) #define usb_sndctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | create_pipe(dev,endpoint)) #define usb_rcvctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) @@ -333,7 +335,8 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); #define usb_pipe_endpdev(pipe) (((pipe) >> 8) & 0x7ff) #define usb_pipeendpoint(pipe) (((pipe) >> 15) & 0xf) #define usb_pipedata(pipe) (((pipe) >> 19) & 1) -#define usb_pipeslow(pipe) (((pipe) >> 26) & 1) +#define usb_pipespeed(pipe) (((pipe) >> 26) & 3) +#define usb_pipeslow(pipe) (usb_pipespeed(pipe) == USB_SPEED_LOW) #define usb_pipetype(pipe) (((pipe) >> 30) & 3) #define usb_pipeisoc(pipe) (usb_pipetype((pipe)) == PIPE_ISOCHRONOUS) #define usb_pipeint(pipe) (usb_pipetype((pipe)) == PIPE_INTERRUPT) diff --git a/include/usb_defs.h b/include/usb_defs.h index 353019f..8032e57 100644 --- a/include/usb_defs.h +++ b/include/usb_defs.h @@ -80,6 +80,12 @@ #define USB_DIR_OUT 0 #define USB_DIR_IN 0x80 +/* USB device speeds */ +#define USB_SPEED_FULL 0x0 /* 12Mbps */ +#define USB_SPEED_LOW 0x1 /* 1.5Mbps */ +#define USB_SPEED_HIGH 0x2 /* 480Mbps */ +#define USB_SPEED_RESERVED 0x3 + /* Descriptor types */ #define USB_DT_DEVICE 0x01 #define USB_DT_CONFIG 0x02 @@ -202,6 +208,7 @@ #define USB_PORT_FEAT_RESET 4 #define USB_PORT_FEAT_POWER 8 #define USB_PORT_FEAT_LOWSPEED 9 +#define USB_PORT_FEAT_HIGHSPEED 10 #define USB_PORT_FEAT_C_CONNECTION 16 #define USB_PORT_FEAT_C_ENABLE 17 #define USB_PORT_FEAT_C_SUSPEND 18 @@ -216,6 +223,9 @@ #define USB_PORT_STAT_RESET 0x0010 #define USB_PORT_STAT_POWER 0x0100 #define USB_PORT_STAT_LOW_SPEED 0x0200 +#define USB_PORT_STAT_HIGH_SPEED 0x0400 /* support for EHCI */ +#define USB_PORT_STAT_SPEED \ + (USB_PORT_STAT_LOW_SPEED | USB_PORT_STAT_HIGH_SPEED) /* wPortChange bits */ #define USB_PORT_STAT_C_CONNECTION 0x0001 -- 1.5.6.5

2 1

[U-Boot] [RFC PATCH 1/1] Add ehci freescale support
by Michael Trimarchi 25 Nov '08

25 Nov '08

Add ehci support for Freescale 83xx --- drivers/usb/Makefile | 2 + drivers/usb/usb_ehci_fsl.c | 99 ++++++++++++++++++++++++++++++++++++++++++++ drivers/usb/usb_ehci_fsl.h | 82 ++++++++++++++++++++++++++++++++++++ 3 files changed, 183 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/usb_ehci_fsl.c create mode 100644 drivers/usb/usb_ehci_fsl.h diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile index c67a490..6a4df02 100644 --- a/drivers/usb/Makefile +++ b/drivers/usb/Makefile @@ -34,6 +34,8 @@ COBJS-y += usbdcore.o COBJS-y += usbdcore_ep0.o COBJS-y += usbdcore_mpc8xx.o COBJS-y += usbdcore_omap1510.o +COBJS-$(CONFIG_USB_EHCI) += usb_ehci_core.o +COBJS-$(CONFIG_USB_EHCI_FSL) += usb_ehci_fsl.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/usb/usb_ehci_fsl.c b/drivers/usb/usb_ehci_fsl.c new file mode 100644 index 0000000..f050493 --- /dev/null +++ b/drivers/usb/usb_ehci_fsl.c @@ -0,0 +1,99 @@ +/* + * (C) Copyright 2008, Excito Elektronik i Skåne AB + * + * Author: Tor Krill tor(a)excito.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <pci.h> +#include <usb.h> +#include <mpc83xx.h> +#include <asm/io.h> +#include <asm/bitops.h> + +#include "usb_ehci.h" +#include "usb_ehci_fsl.h" +#include "usb_ehci_core.h" + +/* + * Create the appropriate control structures to manage + * a new EHCI host controller. + * + * Excerpts from linux ehci fsl driver. + */ +int ehci_hcd_init (void) +{ + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; + uint32_t addr, temp; + + addr = (uint32_t) & (im->usb[0]); + hccr = (struct ehci_hccr *)(addr + FSL_SKIP_PCI); + hcor = (struct ehci_hcor *)((uint32_t) hccr + hccr->cr_caplength); + + /* Configure clock */ + clrsetbits_be32 (&(im->clk.sccr), MPC83XX_SCCR_USB_MASK, + MPC83XX_SCCR_USB_DRCM_11); + + /* Confgure interface. */ + temp = in_be32 ((void *)(addr + FSL_SOC_USB_CTRL)); + out_be32 ((void *)(addr + FSL_SOC_USB_CTRL), temp + | REFSEL_16MHZ | UTMI_PHY_EN); + + /* Wait for clock to stabilize */ + do { + temp = in_be32 ((void *)(addr + FSL_SOC_USB_CTRL)); + udelay (1000); + } while (!(temp & PHY_CLK_VALID)); + + /* Set to Host mode */ + temp = in_le32 ((void *)(addr + FSL_SOC_USB_USBMODE)); + out_le32 ((void *)(addr + FSL_SOC_USB_USBMODE), temp | CM_HOST); + + out_be32 ((void *)(addr + FSL_SOC_USB_SNOOP1), SNOOP_SIZE_2GB); + out_be32 ((void *)(addr + FSL_SOC_USB_SNOOP2), + 0x80000000 | SNOOP_SIZE_2GB); + + /* Init phy */ + /* TODO: handle different phys? */ + out_le32 (&(hcor->or_portsc[0]), PORT_PTS_UTMI); + + /* Enable interface. */ + temp = in_be32 ((void *)(addr + FSL_SOC_USB_CTRL)); + out_be32 ((void *)(addr + FSL_SOC_USB_CTRL), temp | USB_EN); + + out_be32 ((void *)(addr + FSL_SOC_USB_PRICTRL), 0x0000000c); + out_be32 ((void *)(addr + FSL_SOC_USB_AGECNTTHRSH), 0x00000040); + out_be32 ((void *)(addr + FSL_SOC_USB_SICTRL), 0x00000001); + + /* Enable interface. */ + temp = in_be32 ((void *)(addr + FSL_SOC_USB_CTRL)); + out_be32 ((void *)(addr + FSL_SOC_USB_CTRL), temp | USB_EN); + + temp = in_le32 ((void *)(addr + FSL_SOC_USB_USBMODE)); + + return 0; +} + +/* + * Destroy the appropriate control structures corresponding + * the the EHCI host controller. + */ +int ehci_hcd_stop (void) +{ + return 0; +} diff --git a/drivers/usb/usb_ehci_fsl.h b/drivers/usb/usb_ehci_fsl.h new file mode 100644 index 0000000..829dbf3 --- /dev/null +++ b/drivers/usb/usb_ehci_fsl.h @@ -0,0 +1,82 @@ +/* Copyright (c) 2005 freescale semiconductor + * Copyright (c) 2005 MontaVista Software + * Copyright (c) 2008 Excito Elektronik i Skåne AB + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#ifndef _EHCI_FSL_H +#define _EHCI_FSL_H +/* Global offsets */ +#define FSL_SKIP_PCI 0x100 + +/* offsets for the non-ehci registers in the FSL SOC USB controller */ +#define FSL_SOC_USB_ULPIVP 0x170 +#define FSL_SOC_USB_PORTSC1 0x184 +#define PORT_PTS_MSK (3<<30) +#define PORT_PTS_UTMI (0<<30) +#define PORT_PTS_ULPI (2<<30) +#define PORT_PTS_SERIAL (3<<30) +#define PORT_PTS_PTW (1<<28) + +/* USBMODE Register bits */ +#define CM_IDLE (0<<0) +#define CM_RESERVED (1<<0) +#define CM_DEVICE (2<<0) +#define CM_HOST (3<<0) +#define USBMODE_RESERVED_2 (0<<2) +#define SLOM (1<<3) +#define SDIS (1<<4) + +/* CONTROL Register bits */ +#define ULPI_INT_EN (1<<0) +#define WU_INT_EN (1<<1) +#define USB_EN (1<<2) +#define LSF_EN (1<<3) +#define KEEP_OTG_ON (1<<4) +#define OTG_PORT (1<<5) +#define REFSEL_12MHZ (0<<6) +#define REFSEL_16MHZ (1<<6) +#define REFSEL_48MHZ (2<<6) +#define PLL_RESET (1<<8) +#define UTMI_PHY_EN (1<<9) +#define PHY_CLK_SEL_UTMI (0<<10) +#define PHY_CLK_SEL_ULPI (1<<10) +#define CLKIN_SEL_USB_CLK (0<<11) +#define CLKIN_SEL_USB_CLK2 (1<<11) +#define CLKIN_SEL_SYS_CLK (2<<11) +#define CLKIN_SEL_SYS_CLK2 (3<<11) +#define RESERVED_18 (0<<13) +#define RESERVED_17 (0<<14) +#define RESERVED_16 (0<<15) +#define WU_INT (1<<16) +#define PHY_CLK_VALID (1<<17) + +#define FSL_SOC_USB_PORTSC2 0x188 +#define FSL_SOC_USB_USBMODE 0x1a8 +#define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ +#define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ +#define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ +#define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */ +#define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */ +#define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */ +#define SNOOP_SIZE_2GB 0x1e + +/* System Clock Control Register */ +#define MPC83XX_SCCR_USB_MASK 0x00f00000 +#define MPC83XX_SCCR_USB_DRCM_11 0x00300000 +#define MPC83XX_SCCR_USB_DRCM_01 0x00100000 +#define MPC83XX_SCCR_USB_DRCM_10 0x00200000 + +#endif /* _EHCI_FSL_H */ -- 1.5.6.5

1 0

[U-Boot] ARM pull request
by Jean-Christophe PLAGNIOL-VILLARD 25 Nov '08

25 Nov '08

Hi Wolfgang, please pull The following changes since commit 9b827cf1720acda2473afa516956eab6f7cca9a1: Selvamuthukumar (1): Align end of bss by 4 bytes are available in the git repository at: git://git.denx.de/u-boot-arm.git master Dirk Behme (1): ARM: OMAP: Convert IO macros Ilko Iliev (1): lib_arm: do_bootm_linux() - correct a small mistake drivers/i2c/omap24xx_i2c.c | 131 +++++++++++++++++++++---------------------- lib_arm/bootm.c | 2 +- 2 files changed, 65 insertions(+), 68 deletions(-) Best Regards, J.

3 2

[U-Boot] [ppc4xx] Please pull git://www.denx.de/git/u-boot-ppc4xx.git
by Stefan Roese 25 Nov '08

25 Nov '08

Hi Wolfgang, here an updated pull request after some more fixup patches: The following changes since commit 9b827cf1720acda2473afa516956eab6f7cca9a1: Selvamuthukumar (1): Align end of bss by 4 bytes are available in the git repository at: git://www.denx.de/git/u-boot-ppc4xx.git master Dave Mitchell (2): ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization Matthias Fuchs (3): ppc4xx: Remove unused code from PCI405 code ppc4xx: Use correct io accessors for PCI405 ppc4xx: Remove unused features Michal Simek (1): ppc4xx: ml300 remove Xilinx BSP from ml300 folder Stefan Roese (2): ppc4xx: Clear all potentially pending exceptions in MCSR ppc4xx: ML2 shouldn't include the 4xx EMAC driver Steven A. Falco (1): ppc4xx: Delete unused definitions for SDR0_DDRCFG from ppc4xx.h Yuri Tikhonov (1): ppc4xx: katmai: Change default config board/amcc/canyonlands/init.S | 2 +- board/amcc/luan/luan.c | 23 +- board/esd/pci405/cmd_pci405.c | 871 -------------------- board/esd/pci405/pci405.c | 51 +- board/ml2/u-boot.lds | 1 - .../ml300/sw_services/uboot_v1_00_a/data/Ltypes | 55 -- .../uboot_v1_00_a/data/uboot_v2_1_0.mld | 52 -- .../uboot_v1_00_a/data/uboot_v2_1_0.tcl | 325 -------- cpu/ppc4xx/start.S | 70 +- include/asm-ppc/ppc4xx-isram.h | 75 ++ include/configs/PCI405.h | 57 +-- include/configs/canyonlands.h | 2 +- include/configs/katmai.h | 8 + include/ppc440.h | 54 +-- 14 files changed, 167 insertions(+), 1479 deletions(-) delete mode 100644 board/xilinx/ml300/sw_services/uboot_v1_00_a/data/Ltypes delete mode 100644 board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.mld delete mode 100644 board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.tcl create mode 100644 include/asm-ppc/ppc4xx-isram.h

2 1

[U-Boot] Please pull u-boot-mpc83xx
by Kim Phillips 25 Nov '08

25 Nov '08

Dear Wolfgang Denk, please pull a couple of minor fixes for 83xx: The following changes since commit 9b827cf1720acda2473afa516956eab6f7cca9a1: Selvamuthukumar (1): Align end of bss by 4 bytes are available in the git repository at: git://git.denx.de/u-boot-mpc83xx.git master Heiko Schocher (1): powerpc: 83xx: add missing TIMING_CFG1_CASLAT_* defines Howard Gregory (1): mpc83xx: Improve the performance of DDR memory include/configs/MPC8315ERDB.h | 12 ++++++------ include/mpc83xx.h | 4 +++- 2 files changed, 9 insertions(+), 7 deletions(-) Thanks, Kim

2 1

[U-Boot] [PATCH 1/1] microblaze: Remove XUPV2P board
by monstr＠monstr.eu 25 Nov '08

25 Nov '08

From: Michal Simek <monstr(a)monstr.eu> --- Microblaze platforms use generic settings and to have many platforms is confusing that's why I decided to remove this platform from U-BOOT. ml401 tree is sufficient for covering all Microblaze platforms. This change will go through microblaze custodian tree. Signed-off-by: Michal Simek <monstr(a)monstr.eu> --- MAINTAINERS | 1 - MAKEALL | 1 - Makefile | 5 - board/xilinx/xupv2p/Makefile | 50 -------- board/xilinx/xupv2p/config.mk | 32 ----- board/xilinx/xupv2p/u-boot.lds | 68 ----------- board/xilinx/xupv2p/xparameters.h | 58 ---------- board/xilinx/xupv2p/xupv2p.c | 49 -------- include/configs/xupv2p.h | 226 ------------------------------------- 9 files changed, 0 insertions(+), 490 deletions(-) delete mode 100644 board/xilinx/xupv2p/Makefile delete mode 100644 board/xilinx/xupv2p/config.mk delete mode 100644 board/xilinx/xupv2p/u-boot.lds delete mode 100644 board/xilinx/xupv2p/xparameters.h delete mode 100644 board/xilinx/xupv2p/xupv2p.c delete mode 100644 include/configs/xupv2p.h diff --git a/MAINTAINERS b/MAINTAINERS index 127604b..f048795 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -704,7 +704,6 @@ Yasushi Shoji <yashi(a)atmark-techno.com> Michal Simek <monstr(a)monstr.eu> ML401 MicroBlaze - XUPV2P MicroBlaze ######################################################################### # Coldfire Systems: # diff --git a/MAKEALL b/MAKEALL index dbed268..e6f35d1 100755 --- a/MAKEALL +++ b/MAKEALL @@ -689,7 +689,6 @@ LIST_nios2=" \ LIST_microblaze=" \ ml401 \ suzaku \ - xupv2p \ " ######################################################################### diff --git a/Makefile b/Makefile index fd521b6..0844ce6 100644 --- a/Makefile +++ b/Makefile @@ -3096,11 +3096,6 @@ suzaku_config: unconfig @echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h @$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno -xupv2p_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_XUPV2P 1" > $(obj)include/config.h - @$(MKCONFIG) -a $(@:_config=) microblaze microblaze xupv2p xilinx - #======================================================================== # Blackfin #======================================================================== diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile deleted file mode 100644 index 10b47b2..0000000 --- a/board/xilinx/xupv2p/Makefile +++ /dev/null @@ -1,50 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).a - -COBJS = $(BOARD).o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $^ - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/xilinx/xupv2p/config.mk b/board/xilinx/xupv2p/config.mk deleted file mode 100644 index c07b0b3..0000000 --- a/board/xilinx/xupv2p/config.mk +++ /dev/null @@ -1,32 +0,0 @@ -# -# (C) Copyright 2007 Michal Simek -# -# Michal SIMEK <monstr(a)monstr.eu> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# CAUTION: This file is automatically generated by libgen. -# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 -# - -TEXT_BASE = 0x38000000 - -PLATFORM_CPPFLAGS += -mno-xl-soft-mul -PLATFORM_CPPFLAGS += -mno-xl-soft-div -PLATFORM_CPPFLAGS += -mxl-barrel-shift diff --git a/board/xilinx/xupv2p/u-boot.lds b/board/xilinx/xupv2p/u-boot.lds deleted file mode 100644 index b38f648..0000000 --- a/board/xilinx/xupv2p/u-boot.lds +++ /dev/null @@ -1,68 +0,0 @@ -/* - * (C) Copyright 2004 Atmark Techno, Inc. - * - * Yasushi SHOJI <yashi(a)atmark-techno.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(microblaze) -ENTRY(_start) - -SECTIONS -{ - .text ALIGN(0x4): - { - __text_start = .; - cpu/microblaze/start.o (.text) - *(.text) - __text_end = .; - } - - .rodata ALIGN(0x4): - { - __rodata_start = .; - *(.rodata) - __rodata_end = .; - } - - .data ALIGN(0x4): - { - __data_start = .; - *(.data) - __data_end = .; - } - - .u_boot_cmd ALIGN(0x4): - { - . = .; - __u_boot_cmd_start = .; - *(.u_boot_cmd) - __u_boot_cmd_end = .; - } - - .bss ALIGN(0x4): - { - __bss_start = .; - *(.bss) - . = ALIGN(4); - __bss_end = .; - } - __end = . ; -} diff --git a/board/xilinx/xupv2p/xparameters.h b/board/xilinx/xupv2p/xparameters.h deleted file mode 100644 index 9e5ebda..0000000 --- a/board/xilinx/xupv2p/xparameters.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK <monstr(a)monstr.eu> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * CAUTION: This file is automatically generated by libgen. - * Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 - */ - -/* System Clock Frequency */ -#define XILINX_CLOCK_FREQ 100000000 - -/* Interrupt controller is opb_intc_0 */ -#define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 11 - -/* Timer pheriphery is opb_timer_1 */ -#define XILINX_TIMER_BASEADDR 0x41c00000 -#define XILINX_TIMER_IRQ 1 - -/* Uart pheriphery is RS232_Uart_1 */ -#define XILINX_UARTLITE_BASEADDR 0x40600000 -#define XILINX_UARTLITE_BAUDRATE 115200 - -/* GPIO is LEDs_4Bit*/ -#define XILINX_GPIO_BASEADDR 0x40000000 - -/* FLASH doesn't exist none */ - -/* Main Memory is DDR_256MB_32MX64_rank1_row13_col10_cl2_5 */ -#define XILINX_RAM_START 0x30000000 -#define XILINX_RAM_SIZE 0x10000000 - -/* Sysace Controller is SysACE_CompactFlash */ -#define XILINX_SYSACE_BASEADDR 0x41800000 -#define XILINX_SYSACE_HIGHADDR 0x4180ffff -#define XILINX_SYSACE_MEM_WIDTH 16 - -/* Ethernet controller is Ethernet_MAC */ -#define XILINX_EMACLITE_BASEADDR 0x40C00000 diff --git a/board/xilinx/xupv2p/xupv2p.c b/board/xilinx/xupv2p/xupv2p.c deleted file mode 100644 index b1a76c0..0000000 --- a/board/xilinx/xupv2p/xupv2p.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK <monstr(a)monstr.eu> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* This is a board specific file. It's OK to include board specific - * header files */ - -#include <common.h> -#include <config.h> - -void do_reset (void) -{ -#ifdef CONFIG_SYS_GPIO_0 - *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = - ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR))); -#endif -#ifdef CONFIG_SYS_RESET_ADDRESS - puts ("Reseting board\n"); - asm ("bra r0"); -#endif -} - -int gpio_init (void) -{ -#ifdef CONFIG_SYS_GPIO_0 - *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0x0; -#endif - return 0; -} diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h deleted file mode 100644 index ed844bf..0000000 --- a/include/configs/xupv2p.h +++ /dev/null @@ -1,226 +0,0 @@ -/* - * (C) Copyright 2007-2008 Michal Simek - * - * Michal SIMEK <monstr(a)monstr.eu> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "../board/xilinx/xupv2p/xparameters.h" - -#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ -#define CONFIG_XUPV2P 1 - -/* uart */ -#ifdef XILINX_UARTLITE_BASEADDR -#define CONFIG_XILINX_UARTLITE -#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR -#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE -#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#else -#ifdef XILINX_UART16550_BASEADDR -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1 XILINX_UART16550_BASEADDR -#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 } -#endif -#endif - -/* - * setting reset address - * - * TEXT_BASE is set to place, where the U-BOOT run in RAM, but - * if you want to store U-BOOT in flash, set CONFIG_SYS_RESET_ADDRESS - * to FLASH memory and after loading bitstream jump to FLASH. - * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze - * jump to CONFIG_SYS_RESET_ADDRESS where is the original U-BOOT code. - */ -/* #define CONFIG_SYS_RESET_ADDRESS 0x36000000 */ - -/* ethernet */ -#ifdef XILINX_EMAC_BASEADDR -#define CONFIG_XILINX_EMAC 1 -#define CONFIG_SYS_ENET -#else -#ifdef XILINX_EMACLITE_BASEADDR -#define CONFIG_XILINX_EMACLITE 1 -#define CONFIG_SYS_ENET -#endif -#endif -#undef ET_DEBUG - -/* gpio */ -#ifdef XILINX_GPIO_BASEADDR -#define CONFIG_SYS_GPIO_0 1 -#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR -#endif - -/* interrupt controller */ -#ifdef XILINX_INTC_BASEADDR -#define CONFIG_SYS_INTC_0 1 -#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR -#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS -#endif - -/* timer */ -#ifdef XILINX_TIMER_BASEADDR -#if (XILINX_TIMER_IRQ != -1) -#define CONFIG_SYS_TIMER_0 1 -#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR -#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ -#define FREQUENCE XILINX_CLOCK_FREQ -#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) -#endif -#else -#ifdef XILINX_CLOCK_FREQ -#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ -#else -#error BAD CLOCK FREQ -#endif -#endif -/* - * memory layout - Example - * TEXT_BASE = 0x3600_0000; - * CONFIG_SYS_SRAM_BASE = 0x3000_0000; - * CONFIG_SYS_SRAM_SIZE = 0x1000_0000; - * - * CONFIG_SYS_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000 - * CONFIG_SYS_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000 - * CONFIG_SYS_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000 - * - * 0x3000_0000 CONFIG_SYS_SDRAM_BASE - * FREE - * 0x3600_0000 TEXT_BASE - * U-BOOT code - * 0x3602_0000 - * FREE - * - * STACK - * 0x3FF7_F000 CONFIG_SYS_MALLOC_BASE - * MALLOC_AREA 256kB Alloc - * 0x3FFB_F000 CONFIG_SYS_MONITOR_BASE - * MONITOR_CODE 256kB Env - * 0x3FFF_F000 CONFIG_SYS_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd - * 0x4000_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - */ - -/* ddr sdram - main memory */ -#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START -#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) - -/* global pointer */ -#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) /* start of global data */ - -/* monitor code */ -#define SIZE 0x40000 -#define CONFIG_SYS_MONITOR_LEN SIZE -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MALLOC_LEN SIZE -#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) - -/* stack */ -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE - -#define CONFIG_SYS_NO_FLASH 1 -#define CONFIG_ENV_IS_NOWHERE 1 -#define CONFIG_ENV_SIZE 0x1000 -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_IMLS - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_IRQ - -#ifndef CONFIG_SYS_ENET - #undef CONFIG_CMD_NET -#else - #define CONFIG_CMD_PING -#endif - -#ifdef XILINX_SYSACE_BASEADDR -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#endif - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_PROMPT "U-Boot-mONStR> " -#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */ - -#define CONFIG_BOOTDELAY 30 -#define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "xupv2p" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" -#define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 -#define CONFIG_ETHADDR 00:E0:0C:00:00:FD - -/* architecture dependent code */ -#define CONFIG_SYS_USR_EXCEP /* user exception */ -#define CONFIG_SYS_HZ 1000 - -#define CONFIG_PREBOOT "echo U-BOOT by mONStR;" \ - "base 0;" \ - "echo" - -/* system ace */ -#ifdef XILINX_SYSACE_BASEADDR -#define CONFIG_SYSTEMACE -/* #define DEBUG_SYSTEMACE */ -#define SYSTEMACE_CONFIG_FPGA -#define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR -#define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH -#define CONFIG_DOS_PARTITION -#endif - -#define CONFIG_CMDLINE_EDITING - -#endif /* __CONFIG_H */ -- 1.5.5.1

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[U-Boot] [ubi] Please pull git://www.denx.de/git/u-boot-ubi.git
by Stefan Roese 25 Nov '08

25 Nov '08

Hi Wolfgang, I pushed the 2 small patches to support UBI on NOR FLASH into the ubi repository. Here the updated pull request: The following changes since commit 9b827cf1720acda2473afa516956eab6f7cca9a1: Selvamuthukumar (1): Align end of bss by 4 bytes are available in the git repository at: git://www.denx.de/git/u-boot-ubi.git master Kyungmin Park (11): MTD: Add MTD paritioning infrastructure UBI: Add basic UBI support to U-Boot (Part 1/8) UBI: Add basic UBI support to U-Boot (Part 2/8) UBI: Add basic UBI support to U-Boot (Part 3/8) UBI: Add basic UBI support to U-Boot (Part 4/8) UBI: Add basic UBI support to U-Boot (Part 5/8) UBI: Add basic UBI support to U-Boot (Part 6/8) UBI: Add basic UBI support to U-Boot (Part 7/8) UBI: Add basic UBI support to U-Boot (Part 8/8) UBI: Add UBI command support ARM: Add Apollon UBI support Piotr Ziecik (2): mtd: Remove a printf() from add_mtd_device(). UBI: Add proof-of-concept CFI flash support Stefan Roese (1): UBI: Change parsing of size in commands to default to hex Makefile | 1 + board/apollon/Makefile | 3 +- common/Makefile | 1 + common/cmd_ubi.c | 608 +++++++ drivers/mtd/Makefile | 1 + drivers/mtd/mtdcore.c | 144 ++ drivers/mtd/mtdpart.c | 532 +++++++ drivers/mtd/ubi/Makefile | 51 + drivers/mtd/ubi/build.c | 1186 ++++++++++++++ drivers/mtd/ubi/crc32.c | 518 ++++++ drivers/mtd/ubi/crc32defs.h | 32 + drivers/mtd/ubi/crc32table.h | 136 ++ drivers/mtd/ubi/debug.c | 192 +++ drivers/mtd/ubi/debug.h | 152 ++ drivers/mtd/ubi/eba.c | 1256 +++++++++++++++ drivers/mtd/ubi/io.c | 1274 +++++++++++++++ drivers/mtd/ubi/kapi.c | 638 ++++++++ drivers/mtd/ubi/misc.c | 106 ++ drivers/mtd/ubi/scan.c | 1360 ++++++++++++++++ drivers/mtd/ubi/scan.h | 165 ++ .../ubi-header.h => drivers/mtd/ubi/ubi-media.h | 154 +- drivers/mtd/ubi/ubi.h | 641 ++++++++ drivers/mtd/ubi/upd.c | 441 ++++++ drivers/mtd/ubi/vmt.c | 862 ++++++++++ drivers/mtd/ubi/vtbl.c | 837 ++++++++++ drivers/mtd/ubi/wl.c | 1670 ++++++++++++++++++++ include/configs/apollon.h | 74 +- include/exports.h | 1 + include/jffs2/load_kernel.h | 5 + include/linux/crc32.h | 27 + include/linux/mtd/partitions.h | 84 + include/linux/mtd/ubi-user.h | 161 -- include/linux/mtd/ubi.h | 186 +++ include/linux/types.h | 24 + include/mtd/ubi-user.h | 268 ++++ include/ubi_uboot.h | 217 +++ lib_generic/vsprintf.c | 23 + 37 files changed, 13781 insertions(+), 250 deletions(-) create mode 100644 common/cmd_ubi.c create mode 100644 drivers/mtd/mtdcore.c create mode 100644 drivers/mtd/mtdpart.c create mode 100644 drivers/mtd/ubi/Makefile create mode 100644 drivers/mtd/ubi/build.c create mode 100644 drivers/mtd/ubi/crc32.c create mode 100644 drivers/mtd/ubi/crc32defs.h create mode 100644 drivers/mtd/ubi/crc32table.h create mode 100644 drivers/mtd/ubi/debug.c create mode 100644 drivers/mtd/ubi/debug.h create mode 100644 drivers/mtd/ubi/eba.c create mode 100644 drivers/mtd/ubi/io.c create mode 100644 drivers/mtd/ubi/kapi.c create mode 100644 drivers/mtd/ubi/misc.c create mode 100644 drivers/mtd/ubi/scan.c create mode 100644 drivers/mtd/ubi/scan.h rename include/linux/mtd/ubi-header.h => drivers/mtd/ubi/ubi-media.h (80%) create mode 100644 drivers/mtd/ubi/ubi.h create mode 100644 drivers/mtd/ubi/upd.c create mode 100644 drivers/mtd/ubi/vmt.c create mode 100644 drivers/mtd/ubi/vtbl.c create mode 100644 drivers/mtd/ubi/wl.c create mode 100644 include/linux/crc32.h create mode 100644 include/linux/mtd/partitions.h delete mode 100644 include/linux/mtd/ubi-user.h create mode 100644 include/linux/mtd/ubi.h create mode 100644 include/mtd/ubi-user.h create mode 100644 include/ubi_uboot.h

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