October 2008 - U-Boot

[U-Boot] [PATCH 1/4] Make pixis_set_sgmii more general to support MPC85xx boards.
by Jason Jin 14 Oct '08

14 Oct '08

From: Liu Yu <yu.liu(a)freescale.com> The pixis sgmii command depend on the FPGA support on the board, some 85xx boards support SGMII riser card but did not support this command, define CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command. Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and PIXIS_VCFGEN1_MASK in header file for both boards. Signed-off-by: Liu Yu <yu.liu(a)freescale.com> --- board/freescale/common/pixis.c | 22 +++++++++++++++++++--- include/configs/MPC8544DS.h | 3 +++ 2 files changed, 22 insertions(+), 3 deletions(-) diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index b5a0e84..978a255 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -283,7 +283,7 @@ U_BOOT_CMD( "diswd - Disable watchdog timer \n", NULL); -#ifdef CONFIG_FSL_SGMII_RISER +#ifdef CONFIG_PIXIS_SGMII_CMD int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { int which_tsec = -1; @@ -295,17 +295,33 @@ int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) which_tsec = simple_strtoul(argv[1], NULL, 0); switch (which_tsec) { +#ifdef CONFIG_TSEC1 case 1: mask = PIXIS_VSPEED2_TSEC1SER; switch_mask = PIXIS_VCFGEN1_TSEC1SER; break; +#endif +#ifdef CONFIG_TSEC2 + case 2: + mask = PIXIS_VSPEED2_TSEC2SER; + switch_mask = PIXIS_VCFGEN1_TSEC2SER; + break; +#endif +#ifdef CONFIG_TSEC3 case 3: mask = PIXIS_VSPEED2_TSEC3SER; switch_mask = PIXIS_VCFGEN1_TSEC3SER; break; +#endif +#ifdef CONFIG_TSEC4 + case 4: + mask = PIXIS_VSPEED2_TSEC4SER; + switch_mask = PIXIS_VCFGEN1_TSEC4SER; + break; +#endif default: - mask = PIXIS_VSPEED2_TSEC1SER | PIXIS_VSPEED2_TSEC3SER; - switch_mask = PIXIS_VCFGEN1_TSEC1SER | PIXIS_VCFGEN1_TSEC3SER; + mask = PIXIS_VSPEED2_MASK; + switch_mask = PIXIS_VCFGEN1_MASK; break; } diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index b650874..76e5fb4 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -202,6 +202,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VSPEED2_TSEC3SER 0x1 #define PIXIS_VCFGEN1_TSEC1SER 0x20 #define PIXIS_VCFGEN1_TSEC3SER 0x40 +#define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER|PIXIS_VSPEED2_TSEC3SER) +#define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER) /* define to use L1 as initial stack */ @@ -374,6 +376,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_TSEC3 1 #define CONFIG_TSEC3_NAME "eTSEC3" +#define CONFIG_PIXIS_SGMII_CMD #define CONFIG_FSL_SGMII_RISER 1 #define SGMII_RISER_PHY_OFFSET 0x1c -- 1.5.4

4 11

[U-Boot] EP93XX Uboot support
by Marco Stornelli 14 Oct '08

14 Oct '08

Hi all, is there the uboot support for the ep93xx cpu? is there some board supported? Thanks. Regards, Marco

2 1

[U-Boot] Problems with PCI-E Switch on 460EX
by Ayman M. El-Khashab 14 Oct '08

14 Oct '08

I hope somebody can shed some light on our problem. The summary is that when we use a pci-e switch, we don't see anything on the downstream side of the switch in Linux. U-Boot may or may not see the downstream side (details below). We are using the stock canyonlands (460EX) board with both original and new kernels. We have the 1L port as an end-point and the 4L as a RC. We've purchased a PLX 8509 PCI-E Switch and PLX 8612 PCI-E Switch add-in cards. Each of them fits into the 4 lane port. We also have another COTS pci-e sata controller (our control if you will). sata card to the canyonlands, everything works correctly. This tells me that pci-e, discovery, etc are configured / working. sata to the 8509 and the 8509 to the canyonlands, u-boot will detect the sata card, but for whatever reason, Linux does not see it (via lspci or our own tool). sata to the 8612 and the 8612 to the canyonlands, u-boot does not see the card (and obviously linux does not see the card either). One more data point, we have an NI PCI-E GPIB controller. It has a pci-e to pci bridge on board. U-Boot sees the bridge, but again nothing on the downstream port. We have looked at all of these cases using a lecroy pci-e analyzer. In most cases the u-boot code looks to be doing the right thing. The 8612 being the only odd case. We did notice the pci-e bus number change on the analyzer from 3 to (I think 129) -- I still cannot explain this. 1) Do I have to add anything to the device tree for the switch (I did not believe that it was required) 2) Since it appears no switch/bridge downstream device is visible, is something needed in Linux to make these go? I checked both the u-boot and kernel config and saw nothing obvious other than enabling pci-e 3) Does u-boot require any special configuration to enable all these pci-e devices 4) Anything else to try? Thanks - ame

1 0

[U-Boot] [PATCH] fsl_diu: fix alignment error that caused malloc corruption
by Nikita V. Youshchenko 14 Oct '08

14 Oct '08

commit 81489a85c4c3536ec54290ac9216b746ec346663 Author: Nikita V. Youshchenko <yoush(a)debian.org> Date: Thu Sep 25 00:44:00 2008 +0400 fsl_diu: fix alignment error that caused malloc corruption When aligning malloc()ed screen_base, invalid offset was added. This not only caused misaligned result (which did not cause hardware misbehaviour), but - worse - caused screen_base + smem_len to be out of malloc()ed space, which in turn caused breakage of futher malloc()/free() operation. This patch fixes screen_base alignment. Also this patch makes memset() that cleans framebuffer to be executed on first initialization of diu, not only on re-initialization. It looks correct to clean the framebuffer instead of displaying random garbage; I believe that was disabled only because that memset caused breakage of malloc/free described above - which no longer happens with the fix described above. Signed-off-by: Nikita V. Youshchenko <yoush(a)debian.org> diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c index 75f782e..4d4b0a1 100644 --- a/board/freescale/common/fsl_diu_fb.c +++ b/board/freescale/common/fsl_diu_fb.c @@ -242,10 +242,10 @@ int fsl_diu_init(int xres, printf("Unable to allocate fb memory 1\n"); return -1; } - } else { - memset(info->screen_base, 0, info->smem_len); } + memset(info->screen_base, 0, info->smem_len); + dr.diu_reg->desc[0] = (unsigned int) &dummy_ad; dr.diu_reg->desc[1] = (unsigned int) &dummy_ad; dr.diu_reg->desc[2] = (unsigned int) &dummy_ad; @@ -403,7 +403,7 @@ static int map_video_memory(struct fb_info *info, unsigned long bytes_align) mask = bytes_align - 1; offset = (unsigned long)info->screen_base & mask; if (offset) { - info->screen_base += offset; + info->screen_base += (bytes_align - offset); info->smem_len = info->smem_len - (bytes_align - offset); } else info->smem_len = info->smem_len - bytes_align;

2 1

[U-Boot] [PATCH] Add support for CONFIG_EFI_PARTITION (GUID Partition Table)
by richardretanubun 14 Oct '08

14 Oct '08

Signed-off-by: Richard Retanubun <RichardRetanubun(a)RugggedCom.com> --- disk/Makefile | 1 + disk/part.c | 33 ++++- disk/part_efi.c | 428 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ disk/part_efi.h | 138 ++++++++++++++++++ include/part.h | 8 + 5 files changed, 605 insertions(+), 3 deletions(-) create mode 100644 disk/part_efi.c create mode 100644 disk/part_efi.h diff --git a/disk/Makefile b/disk/Makefile index f19d18d..c479145 100644 --- a/disk/Makefile +++ b/disk/Makefile @@ -32,6 +32,7 @@ COBJS-y += part_mac.o COBJS-y += part_dos.o COBJS-y += part_iso.o COBJS-y += part_amiga.o +COBJS-y += part_efi.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/disk/part.c b/disk/part.c index 5c4bf6b..9db6a78 100644 --- a/disk/part.c +++ b/disk/part.c @@ -198,7 +198,8 @@ void dev_print (block_dev_desc_t *dev_desc) #if defined(CONFIG_MAC_PARTITION) || \ defined(CONFIG_DOS_PARTITION) || \ defined(CONFIG_ISO_PARTITION) || \ - defined(CONFIG_AMIGA_PARTITION) + defined(CONFIG_AMIGA_PARTITION) || \ + defined(CONFIG_EFI_PARTITION) void init_part (block_dev_desc_t * dev_desc) { @@ -216,6 +217,14 @@ void init_part (block_dev_desc_t * dev_desc) } #endif +/* must be placed before DOS partition detection */ +#ifdef CONFIG_EFI_PARTITION + if (test_part_efi(dev_desc) == 0) { + dev_desc->part_type = PART_TYPE_EFI; + return; + } +#endif + #ifdef CONFIG_DOS_PARTITION if (test_part_dos(dev_desc) == 0) { dev_desc->part_type = PART_TYPE_DOS; @@ -272,6 +281,15 @@ int get_partition_info (block_dev_desc_t *dev_desc, int part } break; #endif + +#ifdef CONFIG_EFI_PARTITION + case PART_TYPE_EFI: + if (get_partition_info_efi(dev_desc,part,info) == 0) { + PRINTF ("## Valid EFI partition found ##\n"); + return (0); + } + break; +#endif default: break; } @@ -342,14 +360,23 @@ void print_part (block_dev_desc_t * dev_desc) print_part_amiga (dev_desc); return; #endif + +#ifdef CONFIG_EFI_PARTITION + case PART_TYPE_EFI: + PRINTF ("## Testing for valid EFI partition ##\n"); + print_part_header ("EFI", dev_desc); + print_part_efi (dev_desc); + return; +#endif } puts ("## Unknown partition table\n"); } -#else /* neither MAC nor DOS nor ISO partition configured */ +#else /* neither MAC nor DOS nor ISO nor AMIGA nor EFI partition configured */ # error neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION -# error nor CONFIG_ISO_PARTITION configured! +# error nor CONFIG_ISO_PARTITION nor CONFIG_AMIGA_PARTITION +# error nor CONFIG_EFI_PARTITION configured! #endif #endif diff --git a/disk/part_efi.c b/disk/part_efi.c new file mode 100644 index 0000000..7f89a2c --- /dev/null +++ b/disk/part_efi.c @@ -0,0 +1,428 @@ +/* + * Copyright (C) 2008 RuggedCom, Inc. + * Richard Retanubun <RichardRetanubun(a)RuggedCom.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Problems with CFG_64BIT_LBA: + * + * struct disk_partition.start in include/part.h is sized as ulong. + * When CFG_64BIT_LBA is activated, lbaint_t changes from ulong to uint64_t. + * For now, it is cast back to ulong at assignment. + * + * This limits the maximum size of disk addressable to < 2 Terra Bytes + */ +#include <common.h> +#include <command.h> +#include <ide.h> +#include <malloc.h> +#include "part_efi.h" + +#if (defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_SATA) || \ + defined(CONFIG_CMD_SCSI) || \ + defined(CONFIG_CMD_USB) || \ + defined(CONFIG_MMC) || \ + defined(CONFIG_SYSTEMACE) ) && defined(CONFIG_EFI_PARTITION) + +/* Convert char[2] in little endian format to the host format integer + */ +static inline unsigned short le16_to_int(unsigned char *le16) +{ + return ((le16[1] << 8) + + le16[0]); +} + +/* Convert char[4] in little endian format to the host format integer + */ +static inline unsigned long le32_to_int(unsigned char *le32) +{ + return ((le32[3] << 24) + + (le32[2] << 16) + + (le32[1] << 8) + + le32[0]); +} + +/* Convert char[8] in little endian format to the host format integer + */ +static inline unsigned long long le64_to_int(unsigned char *le64) +{ + return (((unsigned long long)le64[7] << 56) + + ((unsigned long long)le64[6] << 48) + + ((unsigned long long)le64[5] << 40) + + ((unsigned long long)le64[4] << 32) + + ((unsigned long long)le64[3] << 24) + + ((unsigned long long)le64[2] << 16) + + ((unsigned long long)le64[1] << 8) + + (unsigned long long)le64[0]); +} + +/** + * efi_crc32() - EFI version of crc32 function + * @buf: buffer to calculate crc32 of + * @len - length of buf + * + * Description: Returns EFI-style CRC32 value for @buf + */ +static inline unsigned long efi_crc32(const void *buf, unsigned long len) +{ + return crc32(0, buf, len); +} + + +/* + * Private function prototypes + */ + +static int pmbr_part_valid(struct partition *part); +static int is_pmbr_valid(legacy_mbr *mbr); + +static int is_gpt_valid(block_dev_desc_t *dev_desc, unsigned long long lba, + gpt_header *pgpt_head, gpt_entry **pgpt_pte); + +static gpt_entry *alloc_read_gpt_entries(block_dev_desc_t *dev_desc, + gpt_header *pgpt_head); + +static int is_pte_valid(gpt_entry *pte); + +/* + * Public Functions (include/part.h) + */ + +void print_part_efi (block_dev_desc_t *dev_desc) +{ + gpt_header gpt_head; + gpt_entry **pgpt_pte = NULL; + int i = 0; + + if (!dev_desc) { + printf("%s: Invalid Argument(s)\n", __FUNCTION__); + return; + } + /* This function validates AND fills in the GPT header and PTE */ + if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA, + &(gpt_head), pgpt_pte) != 1) { + printf("%s: *** ERROR: Invalid GPT ***\n", __FUNCTION__); + return; + } + + debug("%s: gpt-entry at 0x%08X\n", __FUNCTION__, (unsigned int)*pgpt_pte); + + printf("Part Start LBA End LBA\n"); + for (i = 0; i < le32_to_int(gpt_head.num_partition_entries); i++) { + + if (is_pte_valid(&(*pgpt_pte)[i])) { + printf("%s%d 0x%llX 0x%llX\n", GPT_ENTRY_NAME, (i+1), + le64_to_int((*pgpt_pte)[i].starting_lba), + le64_to_int((*pgpt_pte)[i].ending_lba)); + } else { + break; /* Stop at the first non valid PTE */ + } + } + + /* Remember to free pte */ + if(*pgpt_pte != NULL) { + debug("%s: Freeing pgpt_pte\n", __FUNCTION__); + free(*pgpt_pte); + } + return; +} + +int get_partition_info_efi (block_dev_desc_t *dev_desc, int part, + disk_partition_t * info) +{ + gpt_header gpt_head; + gpt_entry **pgpt_pte = NULL; + + /* "part" argument must be at least 1 */ + if (!dev_desc || !info || part < 1) { + printf("%s: Invalid Argument(s)\n", __FUNCTION__); + return -1; + } + + /* This function validates AND fills in the GPT header and PTE */ + if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA, + &(gpt_head), pgpt_pte) != 1) { + printf("%s: *** ERROR: Invalid GPT ***\n", __FUNCTION__); + return -1; + } + + /* The ulong casting limits the maximum disk size to 2 TB */ + info->start = (ulong)le64_to_int((*pgpt_pte)[part-1].starting_lba); + info->size = (ulong)le64_to_int((*pgpt_pte)[part-1].ending_lba) - info->start; + info->blksz = GPT_BLOCK_SIZE; + + sprintf ((char *)info->name, "%s%d\n", GPT_ENTRY_NAME, part); + sprintf ((char *)info->type, "U-Boot"); + + debug("%s: start 0x%lX, size 0x%lX, name %s", __FUNCTION__, + info->start, info->size, info->name); + + /* Remember to free pte */ + if(*pgpt_pte != NULL) { + debug("%s: Freeing pgpt_pte\n", __FUNCTION__); + free(*pgpt_pte); + } + return 0; +} + +int test_part_efi (block_dev_desc_t *dev_desc) +{ + legacy_mbr legacymbr; + + /* Read legacy MBR from block 0 and validate it */ + if ((dev_desc->block_read(dev_desc->dev, 0, 1, (ulong *) &legacymbr) != 1) + || (is_pmbr_valid(&legacymbr) != 1)) { + return -1; + } + return 0; +} + +/* + * Private functions + */ +/* + * pmbr_part_valid(): Check for EFI partition signature + * + * Returns: 1 if EFI GPT partition type is found. + */ +static int pmbr_part_valid(struct partition *part) +{ + if (part->sys_ind == EFI_PMBR_OSTYPE_EFI_GPT && + le32_to_int(part->start_sect) == 1UL) { + return 1; + } + + return 0; +} + +/* + * is_pmbr_valid(): test Protective MBR for validity + * + * Returns: 1 if PMBR is valid, 0 otherwise. + * Validity depends on two things: + * 1) MSDOS signature is in the last two bytes of the MBR + * 2) One partition of type 0xEE is found, checked by pmbr_part_valid() + */ +static int is_pmbr_valid(legacy_mbr *mbr) +{ + int i = 0; + + if (!mbr || le16_to_int(mbr->signature) != MSDOS_MBR_SIGNATURE) { + return 0; + } + + for (i = 0; i < 4; i++) { + if (pmbr_part_valid(&mbr->partition_record[i])) { + return 1; + } + } + return 0; +} + +/** + * is_gpt_valid() - tests one GPT header and PTEs for validity + * + * lba is the logical block address of the GPT header to test + * gpt is a GPT header ptr, filled on return. + * ptes is a PTEs ptr, filled on return. + * + * Description: returns 1 if valid, 0 on error. + * If valid, returns pointers to PTEs. + */ +static int is_gpt_valid(block_dev_desc_t *dev_desc, unsigned long long lba, + gpt_header *pgpt_head, gpt_entry **pgpt_pte) +{ + unsigned char crc32_backup[4] = {0}; + unsigned long calc_crc32; + unsigned long long lastlba; + + if (!dev_desc || !pgpt_head) { + printf("%s: Invalid Argument(s)\n", __FUNCTION__); + return 0; + } + + /* Read GPT Header from device */ + if (dev_desc->block_read(dev_desc->dev, lba, 1, pgpt_head) != 1) { + printf("*** ERROR: Can't read GPT header ***\n"); + return 0; + } + + /* Check the GPT header signature */ + if (le64_to_int(pgpt_head->signature) != GPT_HEADER_SIGNATURE) { + printf("GUID Partition Table Header signature is wrong:" + "0x%llX != 0x%llX\n", + (unsigned long long)le64_to_int(pgpt_head->signature), + (unsigned long long)GPT_HEADER_SIGNATURE); + return 0; + } + + /* Check the GUID Partition Table CRC */ + memcpy(crc32_backup, pgpt_head->header_crc32, sizeof(crc32_backup)); + memset(pgpt_head->header_crc32, 0, sizeof(pgpt_head->header_crc32)); + + calc_crc32 = efi_crc32((const unsigned char *) pgpt_head, + le32_to_int(pgpt_head->header_size)); + + memcpy(pgpt_head->header_crc32, crc32_backup, sizeof(crc32_backup)); + + if (calc_crc32 != le32_to_int(crc32_backup)) { + printf("GUID Partition Table Header CRC is wrong:" + "0x%08lX != 0x%08lX\n", + le32_to_int(crc32_backup), calc_crc32); + return 0; + } + + /* Check that the my_lba entry points to the LBA that contains the GPT */ + if (le64_to_int(pgpt_head->my_lba) != lba) { + printf("GPT: my_lba incorrect: %llX != %llX\n", + (unsigned long long)le64_to_int(pgpt_head->my_lba), + (unsigned long long)lba); + return 0; + } + + /* Check the first_usable_lba and last_usable_lba are within the disk. */ + lastlba = (unsigned long long)dev_desc->lba; + if (le64_to_int(pgpt_head->first_usable_lba) > lastlba) { + printf("GPT: first_usable_lba incorrect: %llX > %llX\n", + le64_to_int(pgpt_head->first_usable_lba), lastlba); + return 0; + } + if (le64_to_int(pgpt_head->last_usable_lba) > lastlba) { + printf("GPT: last_usable_lba incorrect: %llX > %llX\n", + le64_to_int(pgpt_head->last_usable_lba), lastlba); + return 0; + } + + debug("GPT: first_usable_lba: %llX last_usable_lba %llX last lba %llX\n", + le64_to_int(pgpt_head->first_usable_lba), + le64_to_int(pgpt_head->last_usable_lba), + lastlba); + + /* Read and allocate Partition Table Entries */ + *pgpt_pte = alloc_read_gpt_entries(dev_desc, pgpt_head); + if (*pgpt_pte == NULL) { + printf("GPT: Failed to allocate memory for PTE\n"); + return 0; + } + + /* Check the GUID Partition Table Entry Array CRC */ + calc_crc32 = efi_crc32((const unsigned char *) *pgpt_pte, + le32_to_int(pgpt_head->num_partition_entries) * + le32_to_int(pgpt_head->sizeof_partition_entry)); + + if (calc_crc32 != le32_to_int(pgpt_head->partition_entry_array_crc32)) { + printf("GUID Partition Table Entry Array CRC is wrong:" + "0x%08lX != 0x%08lX\n", + le32_to_int(pgpt_head->partition_entry_array_crc32), + calc_crc32); + + if (*pgpt_pte != NULL) { + free(*pgpt_pte); + } + return 0; + } + + /* We're done, all's well */ + return 1; +} + +/** + * alloc_read_gpt_entries(): reads partition entries from disk + * @dev_desc + * @gpt - GPT header + * + * Description: Returns ptes on success, NULL on error. + * Allocates space for PTEs based on information found in @gpt. + * Notes: remember to free pte when you're done! + */ +static gpt_entry *alloc_read_gpt_entries(block_dev_desc_t *dev_desc, + gpt_header *pgpt_head) +{ + size_t count = 0; + gpt_entry *pte = NULL; + + if (!dev_desc || !pgpt_head) { + printf("%s: Invalid Argument(s)\n", __FUNCTION__); + return NULL; + } + + count = le32_to_int(pgpt_head->num_partition_entries) * + le32_to_int(pgpt_head->sizeof_partition_entry); + + debug("%s: count = %lu * %lu = %u\n", __FUNCTION__, + le32_to_int(pgpt_head->num_partition_entries), + le32_to_int(pgpt_head->sizeof_partition_entry), count); + + /* Allocate memory for PTE, remember to FREE */ + if (count != 0) { + pte = malloc(count); + } + + if (count == 0 || pte == NULL) { + printf("%s: ERROR: Can't allocate 0x%X bytes for GPT Entries\n", + __FUNCTION__, count); + return NULL; + } + + /* Read GPT Entries from device */ + if (dev_desc->block_read + (dev_desc->dev, + (unsigned long)le64_to_int(pgpt_head->partition_entry_lba), + (lbaint_t)(count/GPT_BLOCK_SIZE), pte) + != (count/GPT_BLOCK_SIZE)) { + printf("*** ERROR: Can't read GPT Entries ***\n"); + free(pte); + return NULL; + } + return pte; +} + +/** + * is_pte_valid(): validates a single Partition Table Entry + * @gpt_entry - Pointer to a single Partition Table Entry + * + * Description: returns 1 if valid, 0 on error. + */ +static int is_pte_valid(gpt_entry *pte) +{ + efi_guid_t unused_guid; + + if (!pte) { + printf("%s: Invalid Argument(s)\n", __FUNCTION__); + return 0; + } + + /* Only one validation for now: + * The GUID Partition Type != Unused Entry (ALL-ZERO) + */ + memset(unused_guid.b, 0, sizeof(unused_guid.b)); + + if (memcmp(pte->partition_type_guid.b, unused_guid.b, + sizeof(unused_guid.b)) == 0) { + debug("%s: Found an unused PTE GUID at 0x%08X\n", __FUNCTION__, + (unsigned int)pte); + return 0; + } else { + return 1; + } +} +#endif diff --git a/disk/part_efi.h b/disk/part_efi.h new file mode 100644 index 0000000..988a98b --- /dev/null +++ b/disk/part_efi.h @@ -0,0 +1,138 @@ +/* + * Copyright (C) 2008 RuggedCom, Inc. + * Richard Retanubun <RichardRetanubun(a)RuggedCom.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * See also linux/fs/partitions.efi.h + * + * EFI GUID Partition Table + * Per Intel EFI Specification v1.02 + * http://developer.intel.com/technology/efi/efi.htm +*/ + +#ifndef _DISK_PART_EFI_H +#define _DISK_PART_EFI_H + +#define MSDOS_MBR_SIGNATURE 0xAA55 +#define EFI_PMBR_OSTYPE_EFI 0xEF +#define EFI_PMBR_OSTYPE_EFI_GPT 0xEE + +#define GPT_BLOCK_SIZE 512 +#define GPT_HEADER_SIGNATURE 0x5452415020494645ULL +#define GPT_HEADER_REVISION_V1 0x00010000 +#define GPT_PRIMARY_PARTITION_TABLE_LBA 1ULL +#define GPT_ENTRY_NAME "gpt" + +#define EFI_GUID(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) \ +((efi_guid_t) \ +{{ (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \ + (b) & 0xff, ((b) >> 8) & 0xff, \ + (c) & 0xff, ((c) >> 8) & 0xff, \ + (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) }}) + +#define PARTITION_SYSTEM_GUID \ + EFI_GUID( 0xC12A7328, 0xF81F, 0x11d2, \ + 0xBA, 0x4B, 0x00, 0xA0, 0xC9, 0x3E, 0xC9, 0x3B) +#define LEGACY_MBR_PARTITION_GUID \ + EFI_GUID( 0x024DEE41, 0x33E7, 0x11d3, \ + 0x9D, 0x69, 0x00, 0x08, 0xC7, 0x81, 0xF3, 0x9F) +#define PARTITION_MSFT_RESERVED_GUID \ + EFI_GUID( 0xE3C9E316, 0x0B5C, 0x4DB8, \ + 0x81, 0x7D, 0xF9, 0x2D, 0xF0, 0x02, 0x15, 0xAE) +#define PARTITION_BASIC_DATA_GUID \ + EFI_GUID( 0xEBD0A0A2, 0xB9E5, 0x4433, \ + 0x87, 0xC0, 0x68, 0xB6, 0xB7, 0x26, 0x99, 0xC7) +#define PARTITION_LINUX_RAID_GUID \ + EFI_GUID( 0xa19d880f, 0x05fc, 0x4d3b, \ + 0xa0, 0x06, 0x74, 0x3f, 0x0f, 0x84, 0x91, 0x1e) +#define PARTITION_LINUX_SWAP_GUID \ + EFI_GUID( 0x0657fd6d, 0xa4ab, 0x43c4, \ + 0x84, 0xe5, 0x09, 0x33, 0xc8, 0x4b, 0x4f, 0x4f) +#define PARTITION_LINUX_LVM_GUID \ + EFI_GUID( 0xe6d6d379, 0xf507, 0x44c2, \ + 0xa2, 0x3c, 0x23, 0x8f, 0x2a, 0x3d, 0xf9, 0x28) + +#define UNUSED_GUID 0x00000000000000000000000000000000 +/* linux/include/efi.h */ +typedef unsigned short efi_char16_t; /* UNICODE character */ + +typedef struct { + unsigned char b[16]; +} efi_guid_t; + +/* based on linux/include/genhd.h */ +struct partition { + unsigned char boot_ind; /* 0x80 - active */ + unsigned char head; /* starting head */ + unsigned char sector; /* starting sector */ + unsigned char cyl; /* starting cylinder */ + unsigned char sys_ind; /* What partition type */ + unsigned char end_head; /* end head */ + unsigned char end_sector; /* end sector */ + unsigned char end_cyl; /* end cylinder */ + unsigned char start_sect[4]; /* starting sector counting from 0 */ + unsigned char nr_sects[4]; /* nr of sectors in partition */ +} __attribute__((packed)); + +/* based on linux/fs/partitions.efi.h */ +typedef struct _gpt_header { + unsigned char signature[8]; + unsigned char revision[4]; + unsigned char header_size[4]; + unsigned char header_crc32[4]; + unsigned char reserved1[4]; + unsigned char my_lba[8]; + unsigned char alternate_lba[8]; + unsigned char first_usable_lba[8]; + unsigned char last_usable_lba[8]; + efi_guid_t disk_guid; + unsigned char partition_entry_lba[8]; + unsigned char num_partition_entries[4]; + unsigned char sizeof_partition_entry[4]; + unsigned char partition_entry_array_crc32[4]; + unsigned char reserved2[GPT_BLOCK_SIZE - 92]; +} __attribute__ ((packed)) gpt_header; + +typedef struct _gpt_entry_attributes { + unsigned long long required_to_function:1; + unsigned long long reserved:47; + unsigned long long type_guid_specific:16; +} __attribute__ ((packed)) gpt_entry_attributes; + +typedef struct _gpt_entry { + efi_guid_t partition_type_guid; + efi_guid_t unique_partition_guid; + unsigned char starting_lba[8]; + unsigned char ending_lba[8]; + gpt_entry_attributes attributes; + efi_char16_t partition_name[72 / sizeof (efi_char16_t)]; +} __attribute__ ((packed)) gpt_entry; + +typedef struct _legacy_mbr { + unsigned char boot_code[440]; + unsigned char unique_mbr_signature[4]; + unsigned char unknown[2]; + struct partition partition_record[4]; + unsigned char signature[2]; +} __attribute__ ((packed)) legacy_mbr; + +#endif /* _DISK_PART_EFI_H */ diff --git a/include/part.h b/include/part.h index b22a637..980fd04 100644 --- a/include/part.h +++ b/include/part.h @@ -69,6 +69,7 @@ typedef struct block_dev_desc { #define PART_TYPE_DOS 0x02 #define PART_TYPE_ISO 0x03 #define PART_TYPE_AMIGA 0x04 +#define PART_TYPE_EFI 0x05 /* * Type string for U-Boot bootable partitions @@ -135,4 +136,11 @@ void print_part_amiga (block_dev_desc_t *dev_desc); int test_part_amiga (block_dev_desc_t *dev_desc); #endif +#ifdef CONFIG_EFI_PARTITION +/* disk/part_efi.c */ +int get_partition_info_efi (block_dev_desc_t * dev_desc, int part, disk_partition_t *info); +void print_part_efi (block_dev_desc_t *dev_desc); +int test_part_efi (block_dev_desc_t *dev_desc); +#endif + #endif /* _PART_H */ -- 1.5.5.GIT

3 8

[U-Boot] [PATCH] api: Fix building with CONFIG_API
by Matthias Fuchs 14 Oct '08

14 Oct '08

This patch fixes building with CONFIG_API and COFNIG_USB_STORAGE. USB_MAX_STOR_DEV is defined in include/usb.h, but needed in api/api_storage.c. Signed-off-by: Matthias Fuchs <matthias.fuchs(a)esd-electronics.com> --- api/api_storage.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/api/api_storage.c b/api/api_storage.c index 74391a5..5642dd3 100644 --- a/api/api_storage.c +++ b/api/api_storage.c @@ -30,6 +30,10 @@ #include <common.h> #include <api_public.h> +#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE) +#include <usb.h> +#endif + #define DEBUG #undef DEBUG -- 1.5.3

2 1

[U-Boot] [PATCH] Remove unused CFG_EEPROM_PAGE_WRITE_ENABLE references
by Peter Tyser 14 Oct '08

14 Oct '08

Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> --- doc/README.PIP405 | 8 -------- include/configs/APC405.h | 1 - include/configs/ASH405.h | 1 - include/configs/B2.h | 1 - include/configs/CATcenter.h | 1 - include/configs/CMS700.h | 1 - include/configs/CPCI2DP.h | 1 - include/configs/CPCI405.h | 1 - include/configs/CPCI4052.h | 1 - include/configs/CPCI405AB.h | 1 - include/configs/CPCI405DT.h | 1 - include/configs/CPCIISER4.h | 1 - include/configs/DP405.h | 1 - include/configs/DU405.h | 1 - include/configs/DU440.h | 1 - include/configs/G2000.h | 1 - include/configs/HH405.h | 1 - include/configs/HUB405.h | 1 - include/configs/MIP405.h | 1 - include/configs/MPC8323ERDB.h | 1 - include/configs/OCRTC.h | 1 - include/configs/ORSG.h | 1 - include/configs/PCI405.h | 1 - include/configs/PIP405.h | 1 - include/configs/PLU405.h | 1 - include/configs/PMC405.h | 1 - include/configs/PMC440.h | 1 - include/configs/PPChameleonEVB.h | 1 - include/configs/TASREG.h | 1 - include/configs/TQM8272.h | 1 - include/configs/TQM834x.h | 1 - include/configs/TQM85xx.h | 1 - include/configs/VOH405.h | 1 - include/configs/VOM405.h | 1 - include/configs/W7OLMC.h | 1 - include/configs/W7OLMG.h | 1 - include/configs/WUH405.h | 1 - include/configs/XPEDITE1K.h | 1 - include/configs/acadia.h | 1 - include/configs/alpr.h | 1 - include/configs/bamboo.h | 1 - include/configs/canyonlands.h | 1 - include/configs/ebony.h | 1 - include/configs/ep82xxm.h | 1 - include/configs/hcu4.h | 1 - include/configs/hcu5.h | 1 - include/configs/hymod.h | 1 - include/configs/katmai.h | 1 - include/configs/luan.h | 1 - include/configs/lwmon5.h | 1 - include/configs/mcu25.h | 1 - include/configs/motionpro.h | 1 - include/configs/muas3001.h | 1 - include/configs/mucmc52.h | 2 -- include/configs/ocotea.h | 1 - include/configs/p3p440.h | 1 - include/configs/pcs440ep.h | 1 - include/configs/sequoia.h | 1 - include/configs/socrates.h | 1 - include/configs/stxssa.h | 1 - include/configs/taishan.h | 1 - include/configs/uc101.h | 2 -- include/configs/walnut.h | 1 - include/configs/yosemite.h | 1 - include/configs/zeus.h | 1 - 65 files changed, 0 insertions(+), 74 deletions(-) diff --git a/doc/README.PIP405 b/doc/README.PIP405 index 610ff21..07756a5 100644 --- a/doc/README.PIP405 +++ b/doc/README.PIP405 @@ -132,14 +132,6 @@ Identify: --------- CONFIG_IDENT_STRING added to the U_BOOT_VERSION String - -I2C stuff: ----------- -CFG_EEPROM_PAGE_WRITE_ENABLE enables page write of the I2C EEPROM - CFG_EEPROM_PAGE_WRITE_BITS _must_ be - defined. - - Environment / Console: ---------------------- diff --git a/include/configs/APC405.h b/include/configs/APC405.h index 6ee0a36..cd2b79d 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -315,7 +315,6 @@ extern int flash_banks; /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * External Bus Controller (EBC) Setup diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index 85c6a99..6cd0620 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -256,7 +256,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * Init Memory Controller: diff --git a/include/configs/B2.h b/include/configs/B2.h index d6ab1ad..8afd08d 100644 --- a/include/configs/B2.h +++ b/include/configs/B2.h @@ -194,7 +194,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* Flash banks JFFS2 should use */ /* diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 1603c9c..b67fe06 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -419,7 +419,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /*----------------------------------------------------------------------- * Cache Configuration diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 285cd5c..8da23e6 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -268,7 +268,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_WREN 1 diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h index 58900c3..9770e0b 100644 --- a/include/configs/CPCI2DP.h +++ b/include/configs/CPCI2DP.h @@ -219,7 +219,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_WREN 1 diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index bd43e1d..91dd902 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -264,7 +264,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * Init Memory Controller: diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index 9ec1721..66e480d 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -283,7 +283,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * Init Memory Controller: diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 7899598..035cc1d 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -259,7 +259,6 @@ /* 32 byte page write mode using*/ /* last 5 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* Use EEPROM for environment variables */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index c173539..52830ff 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -286,7 +286,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * Init Memory Controller: diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h index 78b754c..8d30ab6 100644 --- a/include/configs/CPCIISER4.h +++ b/include/configs/CPCIISER4.h @@ -198,7 +198,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ diff --git a/include/configs/DP405.h b/include/configs/DP405.h index 912fb2a..0043453 100644 --- a/include/configs/DP405.h +++ b/include/configs/DP405.h @@ -239,7 +239,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /*----------------------------------------------------------------------- * External Bus Controller (EBC) Setup diff --git a/include/configs/DU405.h b/include/configs/DU405.h index c8bf67f..1037532 100644 --- a/include/configs/DU405.h +++ b/include/configs/DU405.h @@ -225,7 +225,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ diff --git a/include/configs/DU440.h b/include/configs/DU440.h index c757523..07527e4 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -183,7 +183,6 @@ #define CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR 0x54 #define CFG_I2C_EEPROM_ADDR_LEN 2 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 5 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01 diff --git a/include/configs/G2000.h b/include/configs/G2000.h index c12ce48..2f48df5 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -328,7 +328,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /*----------------------------------------------------------------------- * External Bus Controller (EBC) Setup diff --git a/include/configs/HH405.h b/include/configs/HH405.h index 9bcbfe3..a452819 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -360,7 +360,6 @@ /* last 5 bits of the address */ #endif #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /*----------------------------------------------------------------------- * External Bus Controller (EBC) Setup diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index a389d58..49cf52d 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -255,7 +255,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * Init Memory Controller: diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index 66235e3..c86e318 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -110,7 +110,6 @@ #define CFG_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */ /* 64 byte page write mode using*/ /* last 6 bits of the address */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* enable Page write */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 94b3d5a..37c5760 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -327,7 +327,6 @@ #define CFG_I2C_EEPROM_ADDR_LEN 2 #define CFG_EEPROM_PAGE_WRITE_BITS 6 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * General PCI diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h index 94b5bc9..5a3ef5a 100644 --- a/include/configs/OCRTC.h +++ b/include/configs/OCRTC.h @@ -220,7 +220,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * Init Memory Controller: diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h index 4e03088..a14fc09 100644 --- a/include/configs/ORSG.h +++ b/include/configs/ORSG.h @@ -218,7 +218,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * Init Memory Controller: diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h index e70c0d3..2404b1a 100644 --- a/include/configs/PCI405.h +++ b/include/configs/PCI405.h @@ -249,7 +249,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * Init Memory Controller: diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 86ea6c6..2f5ae5a 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -103,7 +103,6 @@ #define CFG_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */ /* 64 byte page write mode using*/ /* last 6 bits of the address */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* enable Page write */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 38c495e..8cc0047 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -295,7 +295,6 @@ /* 16 byte page write mode using */ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * External Bus Controller (EBC) Setup diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h index 966bbf9..656371e 100644 --- a/include/configs/PMC405.h +++ b/include/configs/PMC405.h @@ -267,7 +267,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /*----------------------------------------------------------------------- * External Bus Controller (EBC) Setup diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 9140287..6c1af83 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -233,7 +233,6 @@ #define CFG_I2C_EEPROM_ADDR 0x54 #define CFG_I2C_EEPROM_ADDR_LEN 2 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 5 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01 diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index cf98324..d4aa6e9 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -452,7 +452,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * Init Memory Controller: diff --git a/include/configs/TASREG.h b/include/configs/TASREG.h index dccdf0c..de21f2e 100644 --- a/include/configs/TASREG.h +++ b/include/configs/TASREG.h @@ -148,7 +148,6 @@ /* 32 byte page write mode using*/ /* last 5 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE #if defined (CONFIG_SOFT_I2C) #if 0 /* push-pull */ diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h index 039ecf1..df1ac7b 100644 --- a/include/configs/TQM8272.h +++ b/include/configs/TQM8272.h @@ -119,7 +119,6 @@ #define CFG_I2C_EEPROM_ADDR_LEN 2 #define CFG_EEPROM_PAGE_WRITE_BITS 4 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* necessary for the LM75 chip */ #define CFG_I2C_MULTI_EEPROMS 1 /* more than one eeprom */ /* I2C RTC */ diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index e8f69f6..53e204d 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -213,7 +213,6 @@ extern int tqm834x_num_flash_banks; #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */ #define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16 bit */ #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 32 bytes per write */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 12 /* 10ms +/- 20% */ #define CFG_I2C_MULTI_EEPROMS 1 /* more than one eeprom */ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 5e1cf95..6de8fa2 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -323,7 +323,6 @@ #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */ #define CFG_I2C_EEPROM_ADDR_LEN 2 #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 #define CFG_I2C_MULTI_EEPROMS 1 /* more than one eeprom */ diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index 3ca928e..d03766a 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -292,7 +292,6 @@ /* 32 byte page write mode using*/ /* last 5 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /*----------------------------------------------------------------------- * External Bus Controller (EBC) Setup diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index f235890..f6b0287 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -214,7 +214,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * External Bus Controller (EBC) Setup diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index bb6b6b9..2f5d0ea 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -279,7 +279,6 @@ #define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ /* mask of address bits that overflow into the "EEPROM chip address" */ #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 4 /* The Catalyst CAT24WC08 has */ /* 16 byte page write mode using*/ /* last 4 bits of the address */ diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index 3050caf..4d78b34 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -284,7 +284,6 @@ #define CFG_I2C_EEPROM_ADDR 0x50 /* EEPROM ATMEL 24C04N */ #define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_I2C_MULTI_EEPROMS /*----------------------------------------------------------------------- diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index 582d8cf..f756651 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -252,7 +252,6 @@ /* 16 byte page write mode using*/ /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * Init Memory Controller: diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h index 38ea576..55b5d4e 100644 --- a/include/configs/XPEDITE1K.h +++ b/include/configs/XPEDITE1K.h @@ -156,7 +156,6 @@ extern void out32(unsigned int, unsigned long); #define CFG_ENV_OFFSET 0x100 #define CFG_I2C_EEPROM_ADDR 0x50 /* this is actually the second page of the eeprom */ #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/acadia.h b/include/configs/acadia.h index ed2754d..a32bfe7 100644 --- a/include/configs/acadia.h +++ b/include/configs/acadia.h @@ -203,7 +203,6 @@ #define CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR (0xa8>>1) #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/alpr.h b/include/configs/alpr.h index f342c7a..a19ad7b 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -133,7 +133,6 @@ /* 8 byte page write mode using */ /* last 3 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 40 /* and takes up to 40 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CONFIG_PREBOOT "echo;" \ "echo Type \"run kernelx\" to boot the system;" \ diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h index 41058f8..9c79b7b 100644 --- a/include/configs/bamboo.h +++ b/include/configs/bamboo.h @@ -229,7 +229,6 @@ #define CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR (0xa8>>1) #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index 3b5b280..5c9a00a 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -243,7 +243,6 @@ #define CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR (0xa8>>1) #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/ebony.h b/include/configs/ebony.h index df444d8..a561579 100644 --- a/include/configs/ebony.h +++ b/include/configs/ebony.h @@ -143,7 +143,6 @@ #define CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR (0xa8>>1) #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/ep82xxm.h b/include/configs/ep82xxm.h index ac68c86..d9888d1 100644 --- a/include/configs/ep82xxm.h +++ b/include/configs/ep82xxm.h @@ -220,7 +220,6 @@ #define CFG_I2C_EEPROM_ADDR 0x54 #define CFG_I2C_EEPROM_ADDR_LEN 1 #define CFG_EEPROM_PAGE_WRITE_BITS 3 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 #ifdef CFG_ENV_IS_IN_EEPROM diff --git a/include/configs/hcu4.h b/include/configs/hcu4.h index d99ac53..001e2a7 100644 --- a/include/configs/hcu4.h +++ b/include/configs/hcu4.h @@ -162,7 +162,6 @@ #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07 #define CFG_EEPROM_PAGE_WRITE_BITS 4 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #undef CFG_I2C_MULTI_EEPROMS diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h index 54d6721..a049e18 100644 --- a/include/configs/hcu5.h +++ b/include/configs/hcu5.h @@ -163,7 +163,6 @@ #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07 #define CFG_EEPROM_PAGE_WRITE_BITS 4 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #undef CFG_I2C_MULTI_EEPROMS diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 264192f..702d535 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -288,7 +288,6 @@ /* mask of address bits that overflow into the "EEPROM chip address" */ #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07 -#define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* write eeprom in pages */ #define CFG_EEPROM_PAGE_WRITE_BITS 4 /* 16 byte write page size */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ diff --git a/include/configs/katmai.h b/include/configs/katmai.h index 5dcca75..c67aa04 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -132,7 +132,6 @@ #define CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR (0x50) #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/luan.h b/include/configs/luan.h index 805cc59..645ecbc 100644 --- a/include/configs/luan.h +++ b/include/configs/luan.h @@ -139,7 +139,6 @@ #define CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR (0xa8>>1) #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 3d135c4..c48b7b4 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -267,7 +267,6 @@ /* 64 byte page write mode using*/ /* last 6 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CONFIG_RTC_PCF8563 1 /* enable Philips PCF8563 RTC */ #define CFG_I2C_RTC_ADDR 0x51 /* Philips PCF8563 RTC address */ diff --git a/include/configs/mcu25.h b/include/configs/mcu25.h index 6adba96..68756b8 100644 --- a/include/configs/mcu25.h +++ b/include/configs/mcu25.h @@ -162,7 +162,6 @@ #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07 #define CFG_EEPROM_PAGE_WRITE_BITS 4 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #undef CFG_I2C_MULTI_EEPROMS diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h index f2a35ee..e2592cc 100644 --- a/include/configs/motionpro.h +++ b/include/configs/motionpro.h @@ -308,7 +308,6 @@ * EEPROM configuration */ #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* DTT driver needs this */ #define CFG_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */ #define CFG_I2C_MULTI_EEPROMS 1 /* 2 EEPROMs (addr:50,52) */ diff --git a/include/configs/muas3001.h b/include/configs/muas3001.h index a13648b..e2a595c 100644 --- a/include/configs/muas3001.h +++ b/include/configs/muas3001.h @@ -241,7 +241,6 @@ #define CFG_I2C_SPEED 100000 /* I2C speed and slave address */ #define CFG_I2C_SLAVE 0x7F -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 /* I2C SYSMON (LM75, AD7414 is almost compatible) */ #define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */ diff --git a/include/configs/mucmc52.h b/include/configs/mucmc52.h index 18200ec..75e9be7 100644 --- a/include/configs/mucmc52.h +++ b/include/configs/mucmc52.h @@ -136,8 +136,6 @@ #define CFG_I2C_EEPROM_ADDR_LEN 1 #define CFG_EEPROM_PAGE_WRITE_BITS 4 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 -/* for LM81 */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * RTC configuration diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h index 407aae7..7272df1 100644 --- a/include/configs/ocotea.h +++ b/include/configs/ocotea.h @@ -157,7 +157,6 @@ #define CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR (0xa8>>1) #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index ac0d83a..bf1492f 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -112,7 +112,6 @@ /* 8 byte page write mode using */ /* last 3 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 40 /* and takes up to 40 msec */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /*----------------------------------------------------------------------- * Default configuration (environment varibles...) diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index ba6d932..0c5b2e5 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -143,7 +143,6 @@ #define CFG_I2C_EEPROM_ADDR (0xa4>>1) #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 74f6e3a..63540a0 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -225,7 +225,6 @@ #define CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR (0xa8>>1) #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/socrates.h b/include/configs/socrates.h index a981a8f..11a6fb0 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -258,7 +258,6 @@ #define CFG_DTT_MAX_TEMP 125 #define CFG_DTT_LOW_TEMP -55 #define CFG_DTT_HYSTERESIS 3 -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* necessary for the LM75 chip */ #define CFG_EEPROM_PAGE_WRITE_BITS 4 /* diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index ac349df..732d676 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -216,7 +216,6 @@ #define CFG_I2C_EEPROM_ADDR 0x51 /* 1010001x */ #define CFG_I2C_EEPROM_ADDR_LEN 2 #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 /* diff --git a/include/configs/taishan.h b/include/configs/taishan.h index 81133bb..bb56bd9 100644 --- a/include/configs/taishan.h +++ b/include/configs/taishan.h @@ -139,7 +139,6 @@ #undef CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR 0x50 #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/uc101.h b/include/configs/uc101.h index a186188..f4e38c7 100644 --- a/include/configs/uc101.h +++ b/include/configs/uc101.h @@ -138,8 +138,6 @@ #define CFG_I2C_EEPROM_ADDR_LEN 1 #define CFG_EEPROM_PAGE_WRITE_BITS 4 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 -/* for LM81 */ -#define CFG_EEPROM_PAGE_WRITE_ENABLE /* * RTC configuration diff --git a/include/configs/walnut.h b/include/configs/walnut.h index e19c5f3..456853c 100644 --- a/include/configs/walnut.h +++ b/include/configs/walnut.h @@ -98,7 +98,6 @@ #define CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR (0xa8>>1) #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index cb2042c..6c4d7fb 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -143,7 +143,6 @@ #define CFG_I2C_MULTI_EEPROMS #define CFG_I2C_EEPROM_ADDR (0xa8>>1) #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_ENABLE #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/zeus.h b/include/configs/zeus.h index b50cba5..9108afc 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -175,7 +175,6 @@ /* mask of address bits that overflow into the "EEPROM chip address" */ #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07 -#define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* write eeprom in pages */ #define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 byte write page size */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -- 1.5.4.3

2 1

[U-Boot] [PATCH] Remove CFG_EEPROM_PAGE* dependencies for temperature sensors
by Peter Tyser 14 Oct '08

14 Oct '08

The checks for CFG_EEPROM_PAGE_WRITE_ENABLE and CFG_EEPROM_PAGE_WRITE_BITS in various temperature sensor drivers are not necessary Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> --- drivers/hwmon/ds1621.c | 5 ----- drivers/hwmon/lm75.c | 6 ------ drivers/hwmon/lm81.c | 6 ------ 3 files changed, 0 insertions(+), 17 deletions(-) diff --git a/drivers/hwmon/ds1621.c b/drivers/hwmon/ds1621.c index 749aa26..523f8be 100644 --- a/drivers/hwmon/ds1621.c +++ b/drivers/hwmon/ds1621.c @@ -26,11 +26,6 @@ */ #include <common.h> - -#if !defined(CFG_EEPROM_PAGE_WRITE_ENABLE) || \ - (CFG_EEPROM_PAGE_WRITE_BITS < 1) -# error "CFG_EEPROM_PAGE_WRITE_ENABLE must be defined and CFG_EEPROM_PAGE_WRITE_BITS must be greater than 1 to use CONFIG_DTT_DS1621" -#endif #include <i2c.h> #include <dtt.h> diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c index 67a18f6..6770cdd 100644 --- a/drivers/hwmon/lm75.c +++ b/drivers/hwmon/lm75.c @@ -26,12 +26,6 @@ */ #include <common.h> - -#if !defined(CFG_EEPROM_PAGE_WRITE_ENABLE) || \ - (CFG_EEPROM_PAGE_WRITE_BITS < 1) -# error "CFG_EEPROM_PAGE_WRITE_ENABLE must be defined and CFG_EEPROM_PAGE_WRITE_BITS must be greater than 1 to use CONFIG_DTT_LM75" -#endif - #include <i2c.h> #include <dtt.h> diff --git a/drivers/hwmon/lm81.c b/drivers/hwmon/lm81.c index 9349eb6..668ee9f 100644 --- a/drivers/hwmon/lm81.c +++ b/drivers/hwmon/lm81.c @@ -31,12 +31,6 @@ */ #include <common.h> - -#if !defined(CFG_EEPROM_PAGE_WRITE_ENABLE) || \ - (CFG_EEPROM_PAGE_WRITE_BITS < 1) -# error "CFG_EEPROM_PAGE_WRITE_ENABLE must be defined and CFG_EEPROM_PAGE_WRITE_BITS must be greater than 1 to use CONFIG_DTT_LM81" -#endif - #include <i2c.h> #include <dtt.h> -- 1.5.4.3

2 1

Re: [U-Boot] [U-Boot-Users] [PATCH] cmd_spi: remove broken signed casting for display
by Wolfgang Denk 14 Oct '08

14 Oct '08

Dear Mike Frysinger, In message <1223982278-28497-1-git-send-email-vapier(a)gentoo.org> you wrote: > Since we're working with unsigned data, you can't apply a signed pointer > cast and then attempt to print the result. Otherwise you get wrong output > when the sign bit is set like "0xFF" incorrectly extended to "0xFFFFFFFF". > > Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> > --- > common/cmd_spi.c | 3 +-- > 1 files changed, 1 insertions(+), 2 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Where a calculator on the ENIAC is equipped with 18,000 vacuum tubes and weighs 30 tons, computers in the future may have only 1,000 vacuum tubes and weigh only 1/2 tons. - Popular Mechanics, March 1949

1 0

Re: [U-Boot] [U-Boot-Users] [PATCH] strings cmd: drop old CONFIG_CFG_STRINGS define
by Wolfgang Denk 14 Oct '08

14 Oct '08

Dear Mike Frysinger, In message <1223982324-28573-1-git-send-email-vapier(a)gentoo.org> you wrote: > We don't need CONFIG_CFG_STRINGS anymore now that we have the define > CONFIG_CMD_STRINGS and Makefile control. > > Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> > --- > common/cmd_strings.c | 4 ---- > 1 files changed, 0 insertions(+), 4 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de The high cost of living hasn't affected its popularity.

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