October 2008 - U-Boot

[U-Boot] [PATCH 1/4] bootm: Move to using a function pointer table for the boot os function
by Kumar Gala 29 Oct '08

29 Oct '08

This removes a bit of code and makes it easier for the upcoming sub bootm command support to call into the proper OS specific handler. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- common/cmd_bootm.c | 68 +++++++++++++++++++++++---------------------------- 1 files changed, 31 insertions(+), 37 deletions(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index b02da3e..956e1a0 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -119,6 +119,22 @@ int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); static boot_os_fn do_bootm_integrity; #endif +boot_os_fn * boot_os[] = { + [IH_OS_LINUX] = do_bootm_linux, + [IH_OS_NETBSD] = do_bootm_netbsd, +#ifdef CONFIG_LYNXKDI + [IH_OS_LYNXOS] = do_bootm_lynxkdi, +#endif + [IH_OS_RTEMS] = do_bootm_rtems, +#if defined(CONFIG_CMD_ELF) + [IH_OS_VXWORKS] = do_bootm_vxworks, + [IH_OS_QNX] = do_bootm_qnxelf, +#endif +#ifdef CONFIG_INTEGRITY + [IH_OS_INTEGRITY] = do_bootm_integrity, +#endif +}; + ulong load_addr = CONFIG_SYS_LOAD_ADDR; /* Default Load Address */ static bootm_headers_t images; /* pointers to os/initrd/fdt images */ @@ -386,12 +402,22 @@ static int bootm_load_os(image_info_t os, ulong *load_end, int boot_progress) /*******************************************************************/ /* bootm - boot application image from image in memory */ /*******************************************************************/ +static int relocated = 0; + int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - ulong iflag; ulong load_end = 0; int ret; + boot_os_fn *boot_fn; + + /* relocate boot function table */ + if (0 == relocated) { + int i; + for (i = 0; i < ARRAY_SIZE(boot_os); i++) + boot_os[i] += gd->reloc_off; + relocated = 1; + } if (bootm_start(cmdtp, flag, argc, argv)) return 1; @@ -454,45 +480,13 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) show_boot_progress (8); - switch (images.os.os) { - default: /* handled by (original) Linux case */ - case IH_OS_LINUX: #ifdef CONFIG_SILENT_CONSOLE - fixup_silent_linux(); -#endif - do_bootm_linux (0, argc, argv, &images); - break; - - case IH_OS_NETBSD: - do_bootm_netbsd (0, argc, argv, &images); - break; - -#ifdef CONFIG_LYNXKDI - case IH_OS_LYNXOS: - do_bootm_lynxkdi (0, argc, argv, &images); - break; + if (images.os.os == IH_OS_LINUX) + fixup_silent_linux(); #endif - case IH_OS_RTEMS: - do_bootm_rtems (0, argc, argv, &images); - break; - -#if defined(CONFIG_CMD_ELF) - case IH_OS_VXWORKS: - do_bootm_vxworks (0, argc, argv, &images); - break; - - case IH_OS_QNX: - do_bootm_qnxelf (0, argc, argv, &images); - break; -#endif - -#ifdef CONFIG_INTEGRITY - case IH_OS_INTEGRITY: - do_bootm_integrity (0, argc, argv, &images); - break; -#endif - } + boot_fn = boot_os[images.os.os]; + boot_fn(0, argc, argv, &images); show_boot_progress (-9); #ifdef DEBUG -- 1.5.5.1

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[U-Boot] [PATCH] pci/fsl_pci_init: Enable inbound PCI config cycles
by Peter Tyser 29 Oct '08

29 Oct '08

Set CFG_READY bit in Configuration Ready Register for PCIe devices and clear ACL bit in PBFR to allow Freescale devices to respond to incoming PCI configuration cycles. Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> --- drivers/pci/fsl_pci_init.c | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 7625ccc..6da9c22 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -37,6 +37,11 @@ DECLARE_GLOBAL_DATA_PTR; #include <pci.h> #include <asm/immap_fsl_pci.h> +/* Freescale-specific PCI config registers */ +#define FSL_PCI_PBFR 0x44 +#define FSL_PCIE_CAP_ID 0x4c +#define FSL_PCIE_CFG_RDY 0x4b0 + void pciauto_prescan_setup_bridge(struct pci_controller *hose, pci_dev_t dev, int sub_bus); void pciauto_postscan_setup_bridge(struct pci_controller *hose, @@ -302,6 +307,18 @@ void fsl_pci_init(struct pci_controller *hose) if (temp16) { pci_hose_write_config_word(hose, dev, PCI_SEC_STATUS, 0xffff); } + + /* Enable inbound PCI config cycles */ + pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &temp8); + if (temp8 != 0x0) { + /* PCIe - set CFG_READY bit of Configuration Ready Register */ + pci_hose_write_config_byte(hose, dev, FSL_PCIE_CFG_RDY, 0x1); + } else { + /* PCI - clear ACL bit of PBFR */ + pci_hose_read_config_word(hose, dev, FSL_PCI_PBFR, &temp16); + temp16 &= ~0x20; + pci_hose_write_config_byte(hose, dev, FSL_PCI_PBFR, temp16); + } } #ifdef CONFIG_OF_BOARD_SETUP -- 1.6.0.2.GIT

1 0

[U-Boot] [PATCH 3/5] 86xx: remove the second DDR LAW setting for mpc8641hpcn
by Dave Liu 28 Oct '08

28 Oct '08

The DDR1 LAW will precedence the DDR2 LAW, so remove the second DDR LAW. Signed-off-by: Dave Liu <daveliu(a)freescale.com> --- board/freescale/mpc8641hpcn/law.c | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-) diff --git a/board/freescale/mpc8641hpcn/law.c b/board/freescale/mpc8641hpcn/law.c index 182b4c5..8e13728 100644 --- a/board/freescale/mpc8641hpcn/law.c +++ b/board/freescale/mpc8641hpcn/law.c @@ -55,9 +55,6 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), SET_LAW((CONFIG_SYS_FLASH_BASE & 0xfe000000), LAW_SIZE_32M, LAW_TRGT_IF_LBC), -#if !defined(CONFIG_SPD_EEPROM) - SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), -#endif SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO) }; -- 1.5.4

2 1

[U-Boot] Missing definition of DIV_ROUND
by Gary Jennejohn 28 Oct '08

28 Oct '08

From u-boot HEAD grabbed just a few minutes ago... garyj:tdt:u-boot:bash:1> ./MAKEALL ppc Configuring for cmi_mpc5xx board... strmhz.c: In function 'strmhz': strmhz.c:30: warning: implicit declaration of function 'DIV_ROUND' lib_generic/libgeneric.a(strmhz.o): In function `strmhz': /home/garyj/proj/junk/u-boot/lib_generic/strmhz.c:30: undefined reference to `DIV_ROUND' /home/garyj/proj/junk/u-boot/lib_generic/strmhz.c:34: undefined reference to `DIV_ROUND' make: *** [u-boot] Error 1 size: './u-boot': No such file Configuring for ads5121 board... strmhz.c: In function 'strmhz': strmhz.c:30: warning: implicit declaration of function 'DIV_ROUND' lib_generic/libgeneric.a(strmhz.o): In function `strmhz': /home/garyj/proj/junk/u-boot/lib_generic/strmhz.c:30: undefined reference to `DIV_ROUND' /home/garyj/proj/junk/u-boot/lib_generic/strmhz.c:34: undefined reference to `DIV_ROUND' make: *** [u-boot] Error 1 size: './u-boot': No such file Configuring for BC3450 board... strmhz.c: In function 'strmhz': strmhz.c:30: warning: implicit declaration of function 'DIV_ROUND' lib_generic/libgeneric.a(strmhz.o): In function `strmhz': /home/garyj/proj/junk/u-boot/lib_generic/strmhz.c:30: undefined reference to `DIV_ROUND' /home/garyj/proj/junk/u-boot/lib_generic/strmhz.c:34: undefined reference to `DIV_ROUND' make: *** [u-boot] Error 1 size: './u-boot': No such file Configuring for cm5200 board... strmhz.c: In function 'strmhz': strmhz.c:30: warning: implicit declaration of function 'DIV_ROUND' lib_generic/libgeneric.a(strmhz.o): In function `strmhz': /home/garyj/proj/junk/u-boot/lib_generic/strmhz.c:30: undefined reference to `DIV_ROUND' /home/garyj/proj/junk/u-boot/lib_generic/strmhz.c:34: undefined reference to `DIV_ROUND' make: *** [u-boot] Error 1 size: './u-boot': No such file Configuring for cpci5200 board... strmhz.c: In function 'strmhz': strmhz.c:30: warning: implicit declaration of function 'DIV_ROUND' Script done on Tue 28 Oct 2008 12:16:36 PM CET --- Gary Jennejohn ********************************************************************* DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de *********************************************************************

2 3

[U-Boot] [PATCH] - fix "nand erase clean" problem
by Ilko Iliev 28 Oct '08

28 Oct '08

With this patch "nand erase clean" writes correctly the cleanmarkers. Without this patch "nand erase clean" fills the OOB with zeros which marks all blocks as bad. Signed-off-by: Ilko Iliev <iliev(a)ronetix.at> --- drivers/mtd/nand/nand_util.c | 27 +++++++++++++++++++-------- 1 files changed, 19 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index 52b3d21..a601772 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -156,10 +156,19 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) /* format for JFFS2 ? */ if (opts->jffs2) { - chip->ops.len = chip->ops.ooblen = 64; + if ( chip->ecc.layout->oobfree->length < cleanmarker.totlen ) { + memset(buf, 0xFF, sizeof(buf)); + chip->ops.oobbuf = buf; + chip->ops.ooboffs = chip->badblockpos & ~0x01; + chip->ops.len = chip->ops.ooblen = meminfo->oobsize; + } + else { + chip->ops.oobbuf = (uint8_t *)&cleanmarker; + chip->ops.ooboffs = chip->ecc.layout->oobfree->offset; + chip->ops.len = chip->ops.ooblen = cleanmarker.totlen; + } + chip->ops.datbuf = NULL; - chip->ops.oobbuf = buf; - chip->ops.ooboffs = chip->badblockpos & ~0x01; result = meminfo->write_oob(meminfo, erase.addr + meminfo->oobsize, @@ -170,7 +179,8 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) continue; } else - printf("%s: MTD writeoob at 0x%08x\n",mtd_device, erase.addr + meminfo->oobsize ); + MTDDEBUG (MTD_DEBUG_LEVEL3, "%s: MTD writeoob at 0x%08x\n", + mtd_device, erase.addr + meminfo->oobsize ); } if (!opts->quiet) { @@ -189,12 +199,13 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) if (percent != percent_complete) { percent_complete = percent; - printf("\rErasing at 0x%x -- %3d%% complete.", - erase.addr, percent); + printf("\rErasing %sat 0x%x -- %3d%% complete.", + opts->jffs2 ? "and writing cleanmarker ": "", + erase.addr, percent); if (opts->jffs2 && result == 0) - printf(" Cleanmarker written at 0x%x.", - erase.addr); + MTDDEBUG (MTD_DEBUG_LEVEL3, " Cleanmarker written at 0x%x.", + erase.addr); } } } -- 1.5.2.2 -- Mit freundlichen Grüßen/With best regards, Ilko Iliev Ronetix Development Tools GmbH CPU Modules, JTAG/BDM Emulators and Flash Programmers Waidhausenstrasse 13/5, 1140 Vienna, Austria E-Mail: iliev(a)ronetix.at; Web: www.ronetix.at

2 5

[U-Boot] [PATCH 2/2] 85xx: the DDR tlb is missed for the !CONFIG_SPD_EEPROM case
by Dave Liu 28 Oct '08

28 Oct '08

we need TLB entry for DDR at !SPD case. Signed-off-by: Dave Liu <daveliu(a)freescale.com> --- board/freescale/mpc8536ds/mpc8536ds.c | 6 ++---- board/freescale/mpc8572ds/mpc8572ds.c | 6 ++---- 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 443f5a7..3b56f25 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -61,13 +61,11 @@ initdram(int board_type) #ifdef CONFIG_SPD_EEPROM dram_size = fsl_ddr_sdram(); - - dram_size = setup_ddr_tlbs(dram_size / 0x100000); - - dram_size *= 0x100000; #else dram_size = fixed_sdram(); #endif + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + dram_size *= 0x100000; puts(" DDR: "); return dram_size; diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 2364812..66cf1f0 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -57,13 +57,11 @@ phys_size_t initdram(int board_type) #ifdef CONFIG_SPD_EEPROM dram_size = fsl_ddr_sdram(); - - dram_size = setup_ddr_tlbs(dram_size / 0x100000); - - dram_size *= 0x100000; #else dram_size = fixed_sdram(); #endif + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + dram_size *= 0x100000; puts(" DDR: "); return dram_size; -- 1.5.4

2 1

[U-Boot] [PATCH 1/2] 85xx: remove the unused ddr_enable_ecc in the board file
by Dave Liu 28 Oct '08

28 Oct '08

The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu(a)freescale.com> --- board/atum8548/atum8548.c | 10 ---------- board/freescale/mpc8536ds/mpc8536ds.c | 10 ---------- board/freescale/mpc8544ds/mpc8544ds.c | 10 ---------- board/freescale/mpc8548cds/mpc8548cds.c | 11 ----------- board/freescale/mpc8568mds/mpc8568mds.c | 12 ------------ board/freescale/mpc8572ds/mpc8572ds.c | 10 ---------- board/sbc8548/sbc8548.c | 10 ---------- include/configs/MPC8536DS.h | 2 +- include/configs/MPC8544DS.h | 2 +- include/configs/MPC8548CDS.h | 2 +- include/configs/MPC8568MDS.h | 2 +- include/configs/MPC8572DS.h | 1 + 12 files changed, 5 insertions(+), 77 deletions(-) diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c index 2ef19ce..51c71bf 100644 --- a/board/atum8548/atum8548.c +++ b/board/atum8548/atum8548.c @@ -37,10 +37,6 @@ #include <libfdt.h> #include <fdt_support.h> -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - long int fixed_sdram(void); int board_early_init_f (void) @@ -117,12 +113,6 @@ initdram(int board_type) dram_size = fixed_sdram (); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index ce77bb9..443f5a7 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -41,10 +41,6 @@ #include "../common/pixis.h" #include "../common/sgmii_riser.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - phys_size_t fixed_sdram(void); int checkboard (void) @@ -73,12 +69,6 @@ initdram(int board_type) dram_size = fixed_sdram(); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 826180c..3c0f7df 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -38,10 +38,6 @@ #include "../common/pixis.h" #include "../common/sgmii_riser.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - int checkboard (void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -77,12 +73,6 @@ initdram(int board_type) dram_size *= 0x100000; -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index 875628d..2b82328 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -38,10 +38,6 @@ #include "../common/eeprom.h" #include "../common/via.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - DECLARE_GLOBAL_DATA_PTR; void local_bus_init(void); @@ -118,13 +114,6 @@ initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif - /* * SDRAM Initialization */ diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index eab1900..5025a5c 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -99,11 +99,6 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ }; - -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - void local_bus_init(void); void sdram_init(void); @@ -170,13 +165,6 @@ initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif - /* * SDRAM Initialization */ diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index b2402dc..2364812 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -38,10 +38,6 @@ #include "../common/pixis.h" #include "../common/sgmii_riser.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - long int fixed_sdram(void); int checkboard (void) @@ -69,12 +65,6 @@ phys_size_t initdram(int board_type) dram_size = fixed_sdram(); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 21f82f2..3665704 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -36,10 +36,6 @@ #include <libfdt.h> #include <fdt_support.h> -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - DECLARE_GLOBAL_DATA_PTR; void local_bus_init(void); @@ -114,12 +110,6 @@ initdram(int board_type) dram_size = fixed_sdram (); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif /* * SDRAM Initialization */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index dbddb63..3c435c2 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -98,7 +98,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_DDR_SPD #undef CONFIG_DDR_DLL -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 0987448..127caf5 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -96,7 +96,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 892c52e..228ec95 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -99,7 +99,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_DDR_SPD #define CONFIG_DDR_DLL /* possible DLL fix needed */ -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ba2f152..79eec54 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -91,7 +91,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #define CONFIG_DDR_DLL /* possible DLL fix needed */ -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 66e07eb..78adb04 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -98,6 +98,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_DDR_SPD #undef CONFIG_DDR_DLL +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -- 1.5.4

2 1

[U-Boot] [PATCH 2/3] iMX31: Add support to copy NAND Flash code to RAM
by Alan Carvalho de Assis 28 Oct '08

28 Oct '08

This code is executed from internal 2KB NAND Flash Controller RAM buffer and will copy the remaining U-Boot code from NAND Flash verifying its bad blocks (case it exists). Signed-off-by: Alan Carvalho de Assis <alan.assis(a)freescale.com> --- cpu/arm1136/mx31/Makefile | 2 + cpu/arm1136/mx31/nand_copy.S | 263 +++++++++++++++++++++++++++++++++ include/asm-arm/arch-mx31/mx31-regs.h | 69 +++++++++ 3 files changed, 334 insertions(+), 0 deletions(-) create mode 100644 cpu/arm1136/mx31/nand_copy.S diff --git a/cpu/arm1136/mx31/Makefile b/cpu/arm1136/mx31/Makefile index b648ffd..0490706 100644 --- a/cpu/arm1136/mx31/Makefile +++ b/cpu/arm1136/mx31/Makefile @@ -26,7 +26,9 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a COBJS = interrupts.o serial.o generic.o +SOBJS-$(CONFIG_BOOT_FROM_NAND) = nand_copy.o +SOBJS := $(SOBJS-y) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm1136/mx31/nand_copy.S b/cpu/arm1136/mx31/nand_copy.S new file mode 100644 index 0000000..7a2460c --- /dev/null +++ b/cpu/arm1136/mx31/nand_copy.S @@ -0,0 +1,263 @@ +/* + * Copyright (C) 2008 Freescale Semiconductor, Inc. + * + * Alan Carvalho de Assis <alan.assis(a)freescale.com> + * based on iMX31PDK RedBoot_200814 code. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <asm/arch/mx31-regs.h> + +.macro do_addr_input + and r3, r3, #0xFF + strh r3, [r12, #NFC_FLASH_ADDR_OFF] + mov r3, #NAND_FLASH_CONFIG2_FADD_EN + strh r3, [r12, #NFC_CONFIG2_OFF] + bl do_wait_op_done +.endm /* do_addr_input */ + +do_wait_op_done: +1: ldrh r3, [r12, #NFC_CONFIG2_OFF] + ands r3, r3, #NAND_FLASH_CONFIG2_INT_DONE + beq 1b + bx lr + +nfc_data_output: + mov r3, #(NAND_FLASH_CONFIG1_INT_MSK | NAND_FLASH_CONFIG1_ECC_EN) + strh r3, [r12, #NFC_CONFIG1_OFF] + strh r8, [r12, #NFC_BUF_ADDR_OFF] + mov r3, #FDO_PAGE_SPARE_VAL + strh r3, [r12, #NFC_CONFIG2_OFF] + bx lr + +.globl nand_copy +nand_copy: + /* Copy image from flash to SDRAM first */ + mov r0, #NFC_BASE_ADDR + add r2, r0, #0x800 /* 2K window */ + ldr r1, MXC_UBOOT_ROM_START + +1: ldmia r0!, {r3-r10} + stmia r1!, {r3-r10} + cmp r0, r2 + blo 1b + /* Jump to SDRAM */ + ldr r1, =0x0FFF + and r0, pc, r1 /* offset of pc */ + ldr r1, MXC_UBOOT_ROM_START + add r1, r1, #0x10 + add pc, r0, r1 + nop + nop + nop + nop + +nand_copy_main: + /* Check if x16/2kb page */ + ldr r7, =CCM_BASE + ldr r7, [r7, #0xC] + ands r7, r7, #(1 << 30) + + mov r0, #NAND_FLASH_BOOT + ldr r1, =AVIC_VECTOR0 + str r0, [r1] + mov r0, #MXCFIS_NAND + ldr r1, =AVIC_VECTOR1 + str r0, [r1] + + mov r0, #NFC_BASE_ADDR /* r0: nfc base. Reloaded after each page copying */ + mov r1, #0x800 /* r1: starting flash addr to be copied. Updated constantly */ + add r2, r0, #0x800 /* r2: end of 3rd RAM buf. Doesn't change */ + addeq r2, r0, #0x200 /* r2: end of 1st RAM buf. Doesn't change (only set for small page NAND) */ + add r12, r0, #0xE00 /* r12: NFC register base. Doesn't change */ + ldr r11, MXC_UBOOT_ROM_START + add r13, r11, #0x40000 /* r13: end of SDRAM address for copying. Doesn't change */ + add r11, r11, r1 /* r11: starting SDRAM address for copying. Updated constantly */ + + /* unlock internal buffer */ + mov r3, #0x2 + strh r3, [r12, #0xA] + +nfc_read_page: + mov r3, #0x0 + strh r3, [r12, #NFC_FLASH_CMD_OFF] + mov r3, #NAND_FLASH_CONFIG2_FCMD_EN + strh r3, [r12, #NFC_CONFIG2_OFF] + bl do_wait_op_done + + /* Check if x16/2kb page */ + ldr r7, =CCM_BASE + ldr r7, [r7, #0xC] + ands r7, r7, #(1 << 30) + bne nfc_addr_ops_2kb + + /* 1st addr cycle */ + mov r3, r1 + do_addr_input + /* 1st addr cycle */ + mov r3, r1, lsr #9 + do_addr_input + /* 1st addr cycle */ + mov r3, r1, lsr #17 + do_addr_input + /* 1st addr cycle */ + mov r3, r1, lsr #25 + do_addr_input + b end_of_nfc_addr_ops + +nfc_addr_ops_2kb: + /* 1st addr cycle */ + mov r3, #0 + and r3, r3, #0xFF + strh r3, [r12, #NFC_FLASH_ADDR_OFF] + mov r3, #NAND_FLASH_CONFIG2_FADD_EN + strh r3, [r12, #NFC_CONFIG2_OFF] + bl do_wait_op_done + mov r3, #0 + /* 2nd addr cycle */ + and r3, r3, #0xFF + strh r3, [r12, #NFC_FLASH_ADDR_OFF] + mov r3, #NAND_FLASH_CONFIG2_FADD_EN + strh r3, [r12, #NFC_CONFIG2_OFF] + bl do_wait_op_done + mov r3, r1, lsr #11 + /* 3rd addr cycle */ + and r3, r3, #0xFF + strh r3, [r12, #NFC_FLASH_ADDR_OFF] + mov r3, #NAND_FLASH_CONFIG2_FADD_EN + strh r3, [r12, #NFC_CONFIG2_OFF] + bl do_wait_op_done + mov r3, r1, lsr #19 + /* 4th addr cycle */ + and r3, r3, #0xFF + strh r3, [r12, #NFC_FLASH_ADDR_OFF] + mov r3, #NAND_FLASH_CONFIG2_FADD_EN + strh r3, [r12, #NFC_CONFIG2_OFF] + bl do_wait_op_done + mov r3, r1, lsr #27 + /* 5th addr cycle */ + and r3, r3, #0xFF + strh r3, [r12, #NFC_FLASH_ADDR_OFF] + mov r3, #NAND_FLASH_CONFIG2_FADD_EN + strh r3, [r12, #NFC_CONFIG2_OFF] + bl do_wait_op_done + + mov r3, #0x30 + strh r3, [r12, #NFC_FLASH_CMD_OFF] + mov r3, #NAND_FLASH_CONFIG2_FCMD_EN + strh r3, [r12, #NFC_CONFIG2_OFF] + bl do_wait_op_done + +end_of_nfc_addr_ops: + mov r8, #0 + bl nfc_data_output + bl do_wait_op_done + + /* Check if x16/2kb page */ + ldr r7, =CCM_BASE + ldr r7, [r7, #0xC] + ands r7, r7, #(1 << 30) + beq nfc_addr_data_output_done_512 + + /* For 2K page - 2nd 512 */ + mov r8, #1 + bl nfc_data_output + bl do_wait_op_done + + /* 3rd 512 */ + mov r8, #2 + bl nfc_data_output + bl do_wait_op_done + + /* 4th 512 */ + mov r8, #3 + bl nfc_data_output + bl do_wait_op_done + + /* check for bad block */ + mov r3, r1, lsl #(32-17) /* get rid of block number */ + cmp r3, #(0x800 << (32-17)) /* check if not page 0 or 1 */ + b nfc_addr_data_output_done + +nfc_addr_data_output_done_512: + /* check for bad block */ + mov r3, r1, lsl #(32-5-9) /* get rid of block number */ + cmp r3, #(512 << (32-5-9)) /* check if not page 0 or 1 */ + +nfc_addr_data_output_done: + bhi copy_good_blk + add r4, r0, #0x800 /* r3 -> spare area buf 0 */ + ldrh r4, [r4, #0x4] + and r4, r4, #0xFF00 + cmp r4, #0xFF00 + beq copy_good_blk + /* really sucks. Bad block!!!! */ + cmp r3, #0x0 + beq skip_bad_block + + /* even suckier since we already read the first page! */ + /* Check if x16/2kb page */ + ldr r7, =CCM_BASE + ldr r7, [r7, #0xC] + ands r7, r7, #(1 << 30) + + subeq r11, r11, #512 /* rewind 1 page for the sdram pointer */ + subeq r1, r1, #512 /* rewind 1 page for the flash pointer */ + + /* for 2k page */ + subne r11, r11, #0x800 /* rewind 1 page for the sdram pointer */ + subne r1, r1, #0x800 /* rewind 1 page for the flash pointer */ + +skip_bad_block: + /* Check if x16/2kb page */ + ldr r7, =CCM_BASE + ldr r7, [r7, #0xC] + ands r7, r7, #(1 << 30) + + addeq r1, r1, #(32*512) + addne r1, r1, #(64*2048) + b nfc_read_page + +copy_good_blk: + /* copying page */ +1: ldmia r0!, {r3-r10} + stmia r11!, {r3-r10} + cmp r0, r2 + blo 1b + cmp r11, r13 + bge nand_copy_main_done + /* Check if x16/2kb page */ + ldr r7, =CCM_BASE + ldr r7, [r7, #0xC] + ands r7, r7, #(1 << 30) + + addeq r1, r1, #0x200 + addne r1, r1, #0x800 + mov r0, #NFC_BASE_ADDR + b nfc_read_page + +nand_copy_main_done: + /* Restore stack pointer since sp has been re-used in this file */ + ldr sp, =CFG_INTERNAL_SRAM_STACK + /* Restore return address and return to caller */ + ldr lr, [sp] + bx lr + +MXC_UBOOT_ROM_START: .word 0x87F00000 +UBOOT_IMAGE_SIZE: .word 0x40000 + diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h index b04a718..1c5c121 100644 --- a/include/asm-arm/arch-mx31/mx31-regs.h +++ b/include/asm-arm/arch-mx31/mx31-regs.h @@ -84,8 +84,14 @@ #define IPU_CONF_IC_EN (1<<1) #define IPU_CONF_SCI_EN (1<<0) +#define ARM_PPMRR 0x40000015 + #define WDOG_BASE 0x53FDC000 +#define AVIC_BASE 0x68000000 +#define AVIC_VECTOR0 (AVIC_BASE + 0x100) +#define AVIC_VECTOR1 (AVIC_BASE + 0x104) + /* * Signal Multiplexing (IOMUX) */ @@ -168,4 +174,67 @@ #define CS5_BASE 0xB6000000 #define PCMCIA_MEM_BASE 0xC0000000 +/* + * NAND controller + */ +#define NFC_BASE_ADDR 0xB8000000 +#define NFC_REGS (NFC_BASE_ADDR + 0xE00) + +/* + * Addresses for NFC registers + */ +#define NFC_BUF_SIZE_OFF 0 +#define NFC_BUF_SIZE (*((volatile u16 *)(NFC_REGS + NFC_BUF_SIZE_OFF))) +#define NFC_BUF_ADDR_OFF 0x04 +#define NFC_BUF_ADDR (*((volatile u16 *)(NFC_REGS + NFC_BUF_ADDR_OFF))) +#define NFC_FLASH_ADDR_OFF 0x06 +#define NFC_FLASH_ADDR (*((volatile u16 *)(NFC_REGS + NFC_FLASH_ADDR_OFF))) +#define NFC_FLASH_CMD_OFF 0x08 +#define NFC_FLASH_CMD (*((volatile u16 *)(NFC_REGS + NFC_FLASH_CMD_OFF))) +#define NFC_CONFIG_OFF 0x0A +#define NFC_CONFIG (*((volatile u16 *)(NFC_REGS + NFC_CONFIG_OFF))) +#define NFC_ECC_RSLT_OFF 0x0C +#define NFC_ECC_STATUS_RESULT (*((volatile u16 *)(NFC_REGS + NFC_ECC_RSLT_OFF))) +#define NFC_RSLTMAIN_AREA_OFF 0x0E +#define NFC_RSLTMAIN_AREA (*((volatile u16 *)(NFC_REGS + NFC_RSLTMAIN_AREA_OFF))) +#define NFC_RSLTSPARE_AREA_OFF 0x10 +#define NFC_RSLTSPARE_AREA (*((volatile u16 *)(NFC_REGS + NFC_RSLTSPARE_AREA_OFF))) +#define NFC_WRPROT_OFF 0x12 +#define NFC_WRPROT (*((volatile u16 *)(NFC_REGS + NFC_WRPROT_OFF))) +#define NFC_UNLCKSTART_BLK_OFF 0x14 +#define NFC_UNLCKSTART_BLKADDR (*((volatile u16 *)(NFC_REGS + NFC_UNLOCKSTART_BLK_OFF))) +#define NFC_UNLCKEND_BLK_OFF 0x16 +#define NFC_UNLCKEND_BLKADDR (*((volatile u16 *)(NFC_REGS + NFC_UNLOCKEND_BLK_OFF))) +#define NFC_NF_WRPRST_OFF 0x18 +#define NFC_NF_WRPRST (*((volatile u16 *)(NFC_REGS + NFC_NF_WRPRST_OFF))) +#define NFC_CONFIG1_OFF 0x1A +#define NFC_CONFIG1 (*((volatile u16 *)(NFC_REGS + NFC_CONFIG1_OFF))) +#define NFC_CONFIG2_OFF 0x1C +#define NFC_CONFIG2 (*((volatile u16 *)(NFC_REGS + NFC_CONFIG2_OFF))) + +#define RAM_BUFFER_ADDRESS_RBA_3 0x3 +#define NFC_BUFSIZE_1KB 0x0 +#define NFC_BUFSIZE_2KB 0x1 +#define NFC_CONFIGURATION_UNLOCKED 0x2 +#define ECC_STATUS_RESULT_NO_ERR 0x0 +#define ECC_STATUS_RESULT_1BIT_ERR 0x1 +#define ECC_STATUS_RESULT_2BIT_ERR 0x2 +#define NF_WR_PROT_UNLOCK 0x4 +#define NAND_FLASH_CONFIG1_FORCE_CE (1 << 7) +#define NAND_FLASH_CONFIG1_RST (1 << 6) +#define NAND_FLASH_CONFIG1_BIG (1 << 5) +#define NAND_FLASH_CONFIG1_INT_MSK (1 << 4) +#define NAND_FLASH_CONFIG1_ECC_EN (1 << 3) +#define NAND_FLASH_CONFIG1_SP_EN (1 << 2) +#define NAND_FLASH_CONFIG2_INT_DONE (1 << 15) +#define NAND_FLASH_CONFIG2_FDO_PAGE (0 << 3) +#define NAND_FLASH_CONFIG2_FDO_ID (2 << 3) +#define NAND_FLASH_CONFIG2_FDO_STATUS (4 << 3) +#define NAND_FLASH_CONFIG2_FDI_EN (1 << 2) +#define NAND_FLASH_CONFIG2_FADD_EN (1 << 1) +#define NAND_FLASH_CONFIG2_FCMD_EN (1 << 0) +#define FDO_PAGE_SPARE_VAL 0x8 +#define NAND_FLASH_BOOT 0x10000000 +#define MXCFIS_NAND 0x10000000 + #endif /* __ASM_ARCH_MX31_REGS_H */ -- 1.5.4.3

5 9

[U-Boot] [PATCH 7/7] sh: rsk7203: Moveed rsk7203 board in board/renesas
by Nobuhiro Iwamatsu 28 Oct '08

28 Oct '08

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- Makefile | 2 +- board/renesas/rsk7203/Makefile | 45 ++++++ board/renesas/rsk7203/config.mk | 28 ++++ board/renesas/rsk7203/lowlevel_init.S | 265 +++++++++++++++++++++++++++++++++ board/renesas/rsk7203/rsk7203.c | 71 +++++++++ board/renesas/rsk7203/u-boot.lds | 101 +++++++++++++ board/rsk7203/Makefile | 45 ------ board/rsk7203/config.mk | 28 ---- board/rsk7203/lowlevel_init.S | 265 --------------------------------- board/rsk7203/rsk7203.c | 71 --------- board/rsk7203/u-boot.lds | 101 ------------- 11 files changed, 511 insertions(+), 511 deletions(-) create mode 100644 board/renesas/rsk7203/Makefile create mode 100644 board/renesas/rsk7203/config.mk create mode 100644 board/renesas/rsk7203/lowlevel_init.S create mode 100644 board/renesas/rsk7203/rsk7203.c create mode 100644 board/renesas/rsk7203/u-boot.lds delete mode 100644 board/rsk7203/Makefile delete mode 100644 board/rsk7203/config.mk delete mode 100644 board/rsk7203/lowlevel_init.S delete mode 100644 board/rsk7203/rsk7203.c delete mode 100644 board/rsk7203/u-boot.lds diff --git a/Makefile b/Makefile index 623aeff..ce7442f 100644 --- a/Makefile +++ b/Makefile @@ -3087,7 +3087,7 @@ mimc200_config : unconfig rsk7203_config: unconfig @ >include/config.h @echo "#define CONFIG_RSK7203 1" >> include/config.h - @./mkconfig -a $(@:_config=) sh sh2 rsk7203 + @./mkconfig -a $(@:_config=) sh sh2 rsk7203 renesas ######################################################################### ## sh3 (Renesas SuperH) diff --git a/board/renesas/rsk7203/Makefile b/board/renesas/rsk7203/Makefile new file mode 100644 index 0000000..7365d19 --- /dev/null +++ b/board/renesas/rsk7203/Makefile @@ -0,0 +1,45 @@ +# +# Copyright (C) 2007,2008 Nobuhiro Iwamatsu +# Copyright (C) 2008 Renesas Solutions Corp. +# +# u-boot/board/rsk7203/Makefile +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := rsk7203.o +SOBJS := lowlevel_init.o + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/renesas/rsk7203/config.mk b/board/renesas/rsk7203/config.mk new file mode 100644 index 0000000..61aa51f --- /dev/null +++ b/board/renesas/rsk7203/config.mk @@ -0,0 +1,28 @@ +# +# Copyright (C) 2007,2008 Nobuhiro Iwamatsu +# Copyright (C) 2008 Renesas Solutions Corp. +# +# u-boot/board/rsk7203/config.mk +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +# +# TEXT_BASE refers to image _after_ relocation. +# +# NOTE: Must match value used in u-boot.lds (in this directory). +# + +TEXT_BASE = 0x0C7C0000 diff --git a/board/renesas/rsk7203/lowlevel_init.S b/board/renesas/rsk7203/lowlevel_init.S new file mode 100644 index 0000000..e4d6f9e --- /dev/null +++ b/board/renesas/rsk7203/lowlevel_init.S @@ -0,0 +1,265 @@ +/* + * Copyright (C) 2008 Nobuhiro Iwamatsu + * Copyright (C) 2008 Renesas Solutions Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <config.h> +#include <version.h> + +#include <asm/processor.h> + + .global lowlevel_init + + .text + .align 2 + +lowlevel_init: + /* Cache setting */ + mov.l CCR1_A ,r1 + mov.l CCR1_D ,r0 + mov.l r0,@r1 + + /* ConfigurePortPins */ + mov.l PECRL3_A, r1 + mov.l PECRL3_D, r0 + mov.w r0,@r1 + + mov.l PCCRL4_A, r1 + mov.l PCCRL4_D0, r0 + mov.w r0,@r1 + + mov.l PECRL4_A, r1 + mov.l PECRL4_D0, r0 + mov.w r0,@r1 + + mov.l PEIORL_A, r1 + mov.l PEIORL_D0, r0 + mov.w r0,@r1 + + mov.l PCIORL_A, r1 + mov.l PCIORL_D, r0 + mov.w r0,@r1 + + mov.l PFCRH2_A, r1 + mov.l PFCRH2_D, r0 + mov.w r0,@r1 + + mov.l PFCRH3_A, r1 + mov.l PFCRH3_D, r0 + mov.w r0,@r1 + + mov.l PFCRH1_A, r1 + mov.l PFCRH1_D, r0 + mov.w r0,@r1 + + mov.l PFIORH_A, r1 + mov.l PFIORH_D, r0 + mov.w r0,@r1 + + mov.l PECRL1_A, r1 + mov.l PECRL1_D0, r0 + mov.w r0,@r1 + + mov.l PEIORL_A, r1 + mov.l PEIORL_D1, r0 + mov.w r0,@r1 + + /* Configure Operating Frequency */ + mov.l WTCSR_A ,r1 + mov.l WTCSR_D0 ,r0 + mov.w r0,@r1 + + mov.l WTCSR_A ,r1 + mov.l WTCSR_D1 ,r0 + mov.w r0,@r1 + + mov.l WTCNT_A ,r1 + mov.l WTCNT_D ,r0 + mov.w r0,@r1 + + /* Set clock mode*/ + mov.l FRQCR_A,r1 + mov.l FRQCR_D,r0 + mov.w r0,@r1 + + /* Configure Bus And Memory */ +init_bsc_cs0: + mov.l PCCRL4_A,r1 + mov.l PCCRL4_D1,r0 + mov.w r0,@r1 + + mov.l PECRL1_A,r1 + mov.l PECRL1_D1,r0 + mov.w r0,@r1 + + mov.l CMNCR_A,r1 + mov.l CMNCR_D,r0 + mov.l r0,@r1 + + mov.l SC0BCR_A,r1 + mov.l SC0BCR_D,r0 + mov.l r0,@r1 + + mov.l CS0WCR_A,r1 + mov.l CS0WCR_D,r0 + mov.l r0,@r1 + +init_bsc_cs1: + mov.l PECRL4_A,r1 + mov.l PECRL4_D1,r0 + mov.w r0,@r1 + + mov.l CS1WCR_A,r1 + mov.l CS1WCR_D,r0 + mov.l r0,@r1 + +init_sdram: + mov.l PCCRL2_A,r1 + mov.l PCCRL2_D,r0 + mov.w r0,@r1 + + mov.l PCCRL4_A,r1 + mov.l PCCRL4_D2,r0 + mov.w r0,@r1 + + mov.l PCCRL1_A,r1 + mov.l PCCRL1_D,r0 + mov.w r0,@r1 + + mov.l PCCRL3_A,r1 + mov.l PCCRL3_D,r0 + mov.w r0,@r1 + + mov.l CS3BCR_A,r1 + mov.l CS3BCR_D,r0 + mov.l r0,@r1 + + mov.l CS3WCR_A,r1 + mov.l CS3WCR_D,r0 + mov.l r0,@r1 + + mov.l SDCR_A,r1 + mov.l SDCR_D,r0 + mov.l r0,@r1 + + mov.l RTCOR_A,r1 + mov.l RTCOR_D,r0 + mov.l r0,@r1 + + mov.l RTCSR_A,r1 + mov.l RTCSR_D,r0 + mov.l r0,@r1 + + /* wait 200us */ + mov.l REPEAT_D,r3 + mov #0,r2 +repeat0: + add #1,r2 + cmp/hs r3,r2 + bf repeat0 + nop + + mov.l SDRAM_MODE, r1 + mov #0,r0 + mov.l r0, @r1 + + nop + rts + + .align 4 + +CCR1_A: .long CCR1 +CCR1_D: .long 0x0000090B +PCCRL4_A: .long 0xFFFE3910 +PCCRL4_D0: .long 0x00000000 +PECRL4_A: .long 0xFFFE3A10 +PECRL4_D0: .long 0x00000000 +PECRL3_A: .long 0xFFFE3A12 +PECRL3_D: .long 0x00000000 +PEIORL_A: .long 0xFFFE3A06 +PEIORL_D0: .long 0x00001C00 +PEIORL_D1: .long 0x00001C02 +PCIORL_A: .long 0xFFFE3906 +PCIORL_D: .long 0x00004000 +PFCRH2_A: .long 0xFFFE3A8C +PFCRH2_D: .long 0x00000000 +PFCRH3_A: .long 0xFFFE3A8A +PFCRH3_D: .long 0x00000000 +PFCRH1_A: .long 0xFFFE3A8E +PFCRH1_D: .long 0x00000000 +PFIORH_A: .long 0xFFFE3A84 +PFIORH_D: .long 0x00000729 +PECRL1_A: .long 0xFFFE3A16 +PECRL1_D0: .long 0x00000033 + + +WTCSR_A: .long 0xFFFE0000 +WTCSR_D0: .long 0x0000A518 +WTCSR_D1: .long 0x0000A51D +WTCNT_A: .long 0xFFFE0002 +WTCNT_D: .long 0x00005A84 +FRQCR_A: .long 0xFFFE0010 +FRQCR_D: .long 0x00000104 + +PCCRL4_D1: .long 0x00000010 +PECRL1_D1: .long 0x00000133 + +CMNCR_A: .long 0xFFFC0000 +CMNCR_D: .long 0x00001810 +SC0BCR_A: .long 0xFFFC0004 +SC0BCR_D: .long 0x10000400 +CS0WCR_A: .long 0xFFFC0028 +CS0WCR_D: .long 0x00000B41 +PECRL4_D1: .long 0x00000100 +CS1WCR_A: .long 0xFFFC002C +CS1WCR_D: .long 0x00000B01 +PCCRL4_D2: .long 0x00000011 +PCCRL3_A: .long 0xFFFE3912 +PCCRL3_D: .long 0x00000011 +PCCRL2_A: .long 0xFFFE3914 +PCCRL2_D: .long 0x00001111 +PCCRL1_A: .long 0xFFFE3916 +PCCRL1_D: .long 0x00001010 +PDCRL4_A: .long 0xFFFE3990 +PDCRL4_D: .long 0x00000011 +PDCRL3_A: .long 0xFFFE3992 +PDCRL3_D: .long 0x00000011 +PDCRL2_A: .long 0xFFFE3994 +PDCRL2_D: .long 0x00001111 +PDCRL1_A: .long 0xFFFE3996 +PDCRL1_D: .long 0x00001000 +CS3BCR_A: .long 0xFFFC0010 +CS3BCR_D: .long 0x00004400 +CS3WCR_A: .long 0xFFFC0034 +CS3WCR_D: .long 0x00002892 +SDCR_A: .long 0xFFFC004C +SDCR_D: .long 0x00000809 +RTCOR_A: .long 0xFFFC0058 +RTCOR_D: .long 0xA55A0041 +RTCSR_A: .long 0xFFFC0050 +RTCSR_D: .long 0xa55a0010 + +STBCR3_A: .long 0xFFFE0408 +STBCR3_D: .long 0x00000000 +STBCR4_A: .long 0xFFFE040C +STBCR4_D: .long 0x00000008 +STBCR5_A: .long 0xFFFE0410 +STBCR5_D: .long 0x00000000 +STBCR6_A: .long 0xFFFE0414 +STBCR6_D: .long 0x00000002 +SDRAM_MODE: .long 0xFFFC5040 +REPEAT_D: .long 0x00009C40 diff --git a/board/renesas/rsk7203/rsk7203.c b/board/renesas/rsk7203/rsk7203.c new file mode 100644 index 0000000..2cbd45e --- /dev/null +++ b/board/renesas/rsk7203/rsk7203.c @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2008 Nobuhiro Iwamatsu + * Copyright (C) 2008 Renesas Solutions Corp. + * + * u-boot/board/rsk7203/rsk7203.c + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/processor.h> + +int checkboard(void) +{ + puts("BOARD: Renesas Technology RSK7203\n"); + return 0; +} + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; + printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); + return 0; +} + +void led_set_state(unsigned short value) +{ +} + +/* + * The RSK board has the SMSC9118 wired up 'incorrectly'. + * Byte-swapping is necessary, and so poor performance is inevitable. + * This problem cannot evade by the swap function of CHIP, this can + * evade by software Byte-swapping. + * And this has problem by FIFO access only. pkt_data_pull/pkt_data_push + * functions necessary to solve this problem. + */ +u32 pkt_data_pull(u32 addr) +{ + volatile u16 *addr_16 = (u16 *)addr; + return (u32)((swab16(*addr_16) << 16) & 0xFFFF0000)\ + | swab16(*(addr_16 + 1)); +} + +void pkt_data_push(u32 addr, u32 val) +{ + *(volatile u16 *)(addr + 2) = swab16((u16)val); + *(volatile u16 *)(addr) = swab16((u16)(val >> 16)); +} diff --git a/board/renesas/rsk7203/u-boot.lds b/board/renesas/rsk7203/u-boot.lds new file mode 100644 index 0000000..63e5b97 --- /dev/null +++ b/board/renesas/rsk7203/u-boot.lds @@ -0,0 +1,101 @@ +/* + * Copyright (C) 2008 Nobuhiro Iwamatsu + * Copyright (C) 2008 Renesas Solutions Corp. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +OUTPUT_ARCH(sh) +ENTRY(_start) + +SECTIONS +{ + /* + * Base address of internal SDRAM is 0x0C000000. + * + * NOTE: This address must match with the definition of + *TEXT_BASE in config.mk (in this directory). + */ + + . = 0x0C000000 + (8*1024*1024) - (256*1024); + + PROVIDE (reloc_dst = .); + + PROVIDE (_ftext = .); + PROVIDE (_fcode = .); + PROVIDE (_start = .); + + .text : + { + cpu/sh2/start.o (.text) + . = ALIGN(8192); + common/env_embedded.o (.ppcenv) + . = ALIGN(8192); + common/env_embedded.o (.ppcenvr) + . = ALIGN(8192); + *(.text) + . = ALIGN(4); + } =0xFF + PROVIDE (_ecode = .); + .rodata : + { + *(.rodata) + . = ALIGN(4); + } + PROVIDE (_etext = .); + + + PROVIDE (_fdata = .); + .data : + { + *(.data) + . = ALIGN(4); + } + PROVIDE (_edata = .); + + PROVIDE (_fgot = .); + .got : + { + *(.got) + . = ALIGN(4); + } + PROVIDE (_egot = .); + + PROVIDE (__u_boot_cmd_start = .); + .u_boot_cmd : + { + *(.u_boot_cmd) + . = ALIGN(4); + } + PROVIDE (__u_boot_cmd_end = .); + + PROVIDE (reloc_dst_end = .); + + PROVIDE (bss_start = .); + PROVIDE (__bss_start = .); + .bss : + { + *(.bss) + . = ALIGN(4); + } + PROVIDE (bss_end = .); + + PROVIDE (_end = .); +} diff --git a/board/rsk7203/Makefile b/board/rsk7203/Makefile deleted file mode 100644 index 7365d19..0000000 --- a/board/rsk7203/Makefile +++ /dev/null @@ -1,45 +0,0 @@ -# -# Copyright (C) 2007,2008 Nobuhiro Iwamatsu -# Copyright (C) 2008 Renesas Solutions Corp. -# -# u-boot/board/rsk7203/Makefile -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA - -include $(TOPDIR)/config.mk - -LIB = lib$(BOARD).a - -OBJS := rsk7203.o -SOBJS := lowlevel_init.o - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak .depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/rsk7203/config.mk b/board/rsk7203/config.mk deleted file mode 100644 index 61aa51f..0000000 --- a/board/rsk7203/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# Copyright (C) 2007,2008 Nobuhiro Iwamatsu -# Copyright (C) 2008 Renesas Solutions Corp. -# -# u-boot/board/rsk7203/config.mk -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA - -# -# TEXT_BASE refers to image _after_ relocation. -# -# NOTE: Must match value used in u-boot.lds (in this directory). -# - -TEXT_BASE = 0x0C7C0000 diff --git a/board/rsk7203/lowlevel_init.S b/board/rsk7203/lowlevel_init.S deleted file mode 100644 index e4d6f9e..0000000 --- a/board/rsk7203/lowlevel_init.S +++ /dev/null @@ -1,265 +0,0 @@ -/* - * Copyright (C) 2008 Nobuhiro Iwamatsu - * Copyright (C) 2008 Renesas Solutions Corp. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#include <config.h> -#include <version.h> - -#include <asm/processor.h> - - .global lowlevel_init - - .text - .align 2 - -lowlevel_init: - /* Cache setting */ - mov.l CCR1_A ,r1 - mov.l CCR1_D ,r0 - mov.l r0,@r1 - - /* ConfigurePortPins */ - mov.l PECRL3_A, r1 - mov.l PECRL3_D, r0 - mov.w r0,@r1 - - mov.l PCCRL4_A, r1 - mov.l PCCRL4_D0, r0 - mov.w r0,@r1 - - mov.l PECRL4_A, r1 - mov.l PECRL4_D0, r0 - mov.w r0,@r1 - - mov.l PEIORL_A, r1 - mov.l PEIORL_D0, r0 - mov.w r0,@r1 - - mov.l PCIORL_A, r1 - mov.l PCIORL_D, r0 - mov.w r0,@r1 - - mov.l PFCRH2_A, r1 - mov.l PFCRH2_D, r0 - mov.w r0,@r1 - - mov.l PFCRH3_A, r1 - mov.l PFCRH3_D, r0 - mov.w r0,@r1 - - mov.l PFCRH1_A, r1 - mov.l PFCRH1_D, r0 - mov.w r0,@r1 - - mov.l PFIORH_A, r1 - mov.l PFIORH_D, r0 - mov.w r0,@r1 - - mov.l PECRL1_A, r1 - mov.l PECRL1_D0, r0 - mov.w r0,@r1 - - mov.l PEIORL_A, r1 - mov.l PEIORL_D1, r0 - mov.w r0,@r1 - - /* Configure Operating Frequency */ - mov.l WTCSR_A ,r1 - mov.l WTCSR_D0 ,r0 - mov.w r0,@r1 - - mov.l WTCSR_A ,r1 - mov.l WTCSR_D1 ,r0 - mov.w r0,@r1 - - mov.l WTCNT_A ,r1 - mov.l WTCNT_D ,r0 - mov.w r0,@r1 - - /* Set clock mode*/ - mov.l FRQCR_A,r1 - mov.l FRQCR_D,r0 - mov.w r0,@r1 - - /* Configure Bus And Memory */ -init_bsc_cs0: - mov.l PCCRL4_A,r1 - mov.l PCCRL4_D1,r0 - mov.w r0,@r1 - - mov.l PECRL1_A,r1 - mov.l PECRL1_D1,r0 - mov.w r0,@r1 - - mov.l CMNCR_A,r1 - mov.l CMNCR_D,r0 - mov.l r0,@r1 - - mov.l SC0BCR_A,r1 - mov.l SC0BCR_D,r0 - mov.l r0,@r1 - - mov.l CS0WCR_A,r1 - mov.l CS0WCR_D,r0 - mov.l r0,@r1 - -init_bsc_cs1: - mov.l PECRL4_A,r1 - mov.l PECRL4_D1,r0 - mov.w r0,@r1 - - mov.l CS1WCR_A,r1 - mov.l CS1WCR_D,r0 - mov.l r0,@r1 - -init_sdram: - mov.l PCCRL2_A,r1 - mov.l PCCRL2_D,r0 - mov.w r0,@r1 - - mov.l PCCRL4_A,r1 - mov.l PCCRL4_D2,r0 - mov.w r0,@r1 - - mov.l PCCRL1_A,r1 - mov.l PCCRL1_D,r0 - mov.w r0,@r1 - - mov.l PCCRL3_A,r1 - mov.l PCCRL3_D,r0 - mov.w r0,@r1 - - mov.l CS3BCR_A,r1 - mov.l CS3BCR_D,r0 - mov.l r0,@r1 - - mov.l CS3WCR_A,r1 - mov.l CS3WCR_D,r0 - mov.l r0,@r1 - - mov.l SDCR_A,r1 - mov.l SDCR_D,r0 - mov.l r0,@r1 - - mov.l RTCOR_A,r1 - mov.l RTCOR_D,r0 - mov.l r0,@r1 - - mov.l RTCSR_A,r1 - mov.l RTCSR_D,r0 - mov.l r0,@r1 - - /* wait 200us */ - mov.l REPEAT_D,r3 - mov #0,r2 -repeat0: - add #1,r2 - cmp/hs r3,r2 - bf repeat0 - nop - - mov.l SDRAM_MODE, r1 - mov #0,r0 - mov.l r0, @r1 - - nop - rts - - .align 4 - -CCR1_A: .long CCR1 -CCR1_D: .long 0x0000090B -PCCRL4_A: .long 0xFFFE3910 -PCCRL4_D0: .long 0x00000000 -PECRL4_A: .long 0xFFFE3A10 -PECRL4_D0: .long 0x00000000 -PECRL3_A: .long 0xFFFE3A12 -PECRL3_D: .long 0x00000000 -PEIORL_A: .long 0xFFFE3A06 -PEIORL_D0: .long 0x00001C00 -PEIORL_D1: .long 0x00001C02 -PCIORL_A: .long 0xFFFE3906 -PCIORL_D: .long 0x00004000 -PFCRH2_A: .long 0xFFFE3A8C -PFCRH2_D: .long 0x00000000 -PFCRH3_A: .long 0xFFFE3A8A -PFCRH3_D: .long 0x00000000 -PFCRH1_A: .long 0xFFFE3A8E -PFCRH1_D: .long 0x00000000 -PFIORH_A: .long 0xFFFE3A84 -PFIORH_D: .long 0x00000729 -PECRL1_A: .long 0xFFFE3A16 -PECRL1_D0: .long 0x00000033 - - -WTCSR_A: .long 0xFFFE0000 -WTCSR_D0: .long 0x0000A518 -WTCSR_D1: .long 0x0000A51D -WTCNT_A: .long 0xFFFE0002 -WTCNT_D: .long 0x00005A84 -FRQCR_A: .long 0xFFFE0010 -FRQCR_D: .long 0x00000104 - -PCCRL4_D1: .long 0x00000010 -PECRL1_D1: .long 0x00000133 - -CMNCR_A: .long 0xFFFC0000 -CMNCR_D: .long 0x00001810 -SC0BCR_A: .long 0xFFFC0004 -SC0BCR_D: .long 0x10000400 -CS0WCR_A: .long 0xFFFC0028 -CS0WCR_D: .long 0x00000B41 -PECRL4_D1: .long 0x00000100 -CS1WCR_A: .long 0xFFFC002C -CS1WCR_D: .long 0x00000B01 -PCCRL4_D2: .long 0x00000011 -PCCRL3_A: .long 0xFFFE3912 -PCCRL3_D: .long 0x00000011 -PCCRL2_A: .long 0xFFFE3914 -PCCRL2_D: .long 0x00001111 -PCCRL1_A: .long 0xFFFE3916 -PCCRL1_D: .long 0x00001010 -PDCRL4_A: .long 0xFFFE3990 -PDCRL4_D: .long 0x00000011 -PDCRL3_A: .long 0xFFFE3992 -PDCRL3_D: .long 0x00000011 -PDCRL2_A: .long 0xFFFE3994 -PDCRL2_D: .long 0x00001111 -PDCRL1_A: .long 0xFFFE3996 -PDCRL1_D: .long 0x00001000 -CS3BCR_A: .long 0xFFFC0010 -CS3BCR_D: .long 0x00004400 -CS3WCR_A: .long 0xFFFC0034 -CS3WCR_D: .long 0x00002892 -SDCR_A: .long 0xFFFC004C -SDCR_D: .long 0x00000809 -RTCOR_A: .long 0xFFFC0058 -RTCOR_D: .long 0xA55A0041 -RTCSR_A: .long 0xFFFC0050 -RTCSR_D: .long 0xa55a0010 - -STBCR3_A: .long 0xFFFE0408 -STBCR3_D: .long 0x00000000 -STBCR4_A: .long 0xFFFE040C -STBCR4_D: .long 0x00000008 -STBCR5_A: .long 0xFFFE0410 -STBCR5_D: .long 0x00000000 -STBCR6_A: .long 0xFFFE0414 -STBCR6_D: .long 0x00000002 -SDRAM_MODE: .long 0xFFFC5040 -REPEAT_D: .long 0x00009C40 diff --git a/board/rsk7203/rsk7203.c b/board/rsk7203/rsk7203.c deleted file mode 100644 index 2cbd45e..0000000 --- a/board/rsk7203/rsk7203.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Copyright (C) 2008 Nobuhiro Iwamatsu - * Copyright (C) 2008 Renesas Solutions Corp. - * - * u-boot/board/rsk7203/rsk7203.c - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/processor.h> - -int checkboard(void) -{ - puts("BOARD: Renesas Technology RSK7203\n"); - return 0; -} - -int board_init(void) -{ - return 0; -} - -int dram_init(void) -{ - DECLARE_GLOBAL_DATA_PTR; - - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; - printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); - return 0; -} - -void led_set_state(unsigned short value) -{ -} - -/* - * The RSK board has the SMSC9118 wired up 'incorrectly'. - * Byte-swapping is necessary, and so poor performance is inevitable. - * This problem cannot evade by the swap function of CHIP, this can - * evade by software Byte-swapping. - * And this has problem by FIFO access only. pkt_data_pull/pkt_data_push - * functions necessary to solve this problem. - */ -u32 pkt_data_pull(u32 addr) -{ - volatile u16 *addr_16 = (u16 *)addr; - return (u32)((swab16(*addr_16) << 16) & 0xFFFF0000)\ - | swab16(*(addr_16 + 1)); -} - -void pkt_data_push(u32 addr, u32 val) -{ - *(volatile u16 *)(addr + 2) = swab16((u16)val); - *(volatile u16 *)(addr) = swab16((u16)(val >> 16)); -} diff --git a/board/rsk7203/u-boot.lds b/board/rsk7203/u-boot.lds deleted file mode 100644 index 63e5b97..0000000 --- a/board/rsk7203/u-boot.lds +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (C) 2008 Nobuhiro Iwamatsu - * Copyright (C) 2008 Renesas Solutions Corp. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") -OUTPUT_ARCH(sh) -ENTRY(_start) - -SECTIONS -{ - /* - * Base address of internal SDRAM is 0x0C000000. - * - * NOTE: This address must match with the definition of - *TEXT_BASE in config.mk (in this directory). - */ - - . = 0x0C000000 + (8*1024*1024) - (256*1024); - - PROVIDE (reloc_dst = .); - - PROVIDE (_ftext = .); - PROVIDE (_fcode = .); - PROVIDE (_start = .); - - .text : - { - cpu/sh2/start.o (.text) - . = ALIGN(8192); - common/env_embedded.o (.ppcenv) - . = ALIGN(8192); - common/env_embedded.o (.ppcenvr) - . = ALIGN(8192); - *(.text) - . = ALIGN(4); - } =0xFF - PROVIDE (_ecode = .); - .rodata : - { - *(.rodata) - . = ALIGN(4); - } - PROVIDE (_etext = .); - - - PROVIDE (_fdata = .); - .data : - { - *(.data) - . = ALIGN(4); - } - PROVIDE (_edata = .); - - PROVIDE (_fgot = .); - .got : - { - *(.got) - . = ALIGN(4); - } - PROVIDE (_egot = .); - - PROVIDE (__u_boot_cmd_start = .); - .u_boot_cmd : - { - *(.u_boot_cmd) - . = ALIGN(4); - } - PROVIDE (__u_boot_cmd_end = .); - - PROVIDE (reloc_dst_end = .); - - PROVIDE (bss_start = .); - PROVIDE (__bss_start = .); - .bss : - { - *(.bss) - . = ALIGN(4); - } - PROVIDE (bss_end = .); - - PROVIDE (_end = .); -} -- 1.5.6.5

1 0

[U-Boot] [PATCH 6/7] sh: MigoR: Moveed MigoR board in board/renesas
by Nobuhiro Iwamatsu 28 Oct '08

28 Oct '08

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- Makefile | 2 +- board/MigoR/Makefile | 52 ------- board/MigoR/config.mk | 31 ---- board/MigoR/lowlevel_init.S | 264 ----------------------------------- board/MigoR/migo_r.c | 53 ------- board/MigoR/u-boot.lds | 105 -------------- board/renesas/MigoR/Makefile | 52 +++++++ board/renesas/MigoR/config.mk | 31 ++++ board/renesas/MigoR/lowlevel_init.S | 264 +++++++++++++++++++++++++++++++++++ board/renesas/MigoR/migo_r.c | 53 +++++++ board/renesas/MigoR/u-boot.lds | 105 ++++++++++++++ 11 files changed, 506 insertions(+), 506 deletions(-) delete mode 100644 board/MigoR/Makefile delete mode 100644 board/MigoR/config.mk delete mode 100644 board/MigoR/lowlevel_init.S delete mode 100644 board/MigoR/migo_r.c delete mode 100644 board/MigoR/u-boot.lds create mode 100644 board/renesas/MigoR/Makefile create mode 100644 board/renesas/MigoR/config.mk create mode 100644 board/renesas/MigoR/lowlevel_init.S create mode 100644 board/renesas/MigoR/migo_r.c create mode 100644 board/renesas/MigoR/u-boot.lds diff --git a/Makefile b/Makefile index 74414f6..623aeff 100644 --- a/Makefile +++ b/Makefile @@ -3110,7 +3110,7 @@ ms7720se_config: unconfig MigoR_config : unconfig @mkdir -p $(obj)include @echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h - @./mkconfig -a $(@:_config=) sh sh4 MigoR + @./mkconfig -a $(@:_config=) sh sh4 MigoR renesas ms7750se_config: unconfig @mkdir -p $(obj)include diff --git a/board/MigoR/Makefile b/board/MigoR/Makefile deleted file mode 100644 index 661b59d..0000000 --- a/board/MigoR/Makefile +++ /dev/null @@ -1,52 +0,0 @@ -# -# Copyright (C) 2007 -# Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> -# -# Copyright (C) 2007 -# Kenati Technologies, Inc. -# -# board/MigoR/Makefile -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).a - -COBJS := migo_r.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/MigoR/config.mk b/board/MigoR/config.mk deleted file mode 100644 index 2c5085a..0000000 --- a/board/MigoR/config.mk +++ /dev/null @@ -1,31 +0,0 @@ -# -# Copyright (C) 2007 -# Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> -# -# Copyright (C) 2007 -# Kenati Technologies, Inc. -# -# board/MigoR/config.mk -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA - -# -# TEXT_BASE refers to image _after_ relocation. -# -# NOTE: Must match value used in u-boot.lds (in this directory). -# - -TEXT_BASE = 0x8FFC0000 diff --git a/board/MigoR/lowlevel_init.S b/board/MigoR/lowlevel_init.S deleted file mode 100644 index e48f7b3..0000000 --- a/board/MigoR/lowlevel_init.S +++ /dev/null @@ -1,264 +0,0 @@ -/* - * Copyright (C) 2007 - * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> - * - * Copyright (C) 2007 - * Kenati Technologies, Inc. - * - * board/MigoR/lowlevel_init.S - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <version.h> - -#include <asm/processor.h> - -/* - * Board specific low level init code, called _very_ early in the - * startup sequence. Relocation to SDRAM has not happened yet, no - * stack is available, bss section has not been initialised, etc. - * - * (Note: As no stack is available, no subroutines can be called...). - */ - - .global lowlevel_init - - .text - .align 2 - -lowlevel_init: - mov.l CCR_A, r1 ! Address of Cache Control Register - mov.l CCR_D, r0 ! Instruction Cache Invalidate - mov.l r0, @r1 - - mov.l MMUCR_A, r1 ! Address of MMU Control Register - mov.l MMUCR_D, r0 ! TI == TLB Invalidate bit - mov.l r0, @r1 - - mov.l MSTPCR0_A, r1 ! Address of Power Control Register 0 - mov.l MSTPCR0_D, r0 ! - mov.l r0, @r1 - - mov.l MSTPCR2_A, r1 ! Address of Power Control Register 2 - mov.l MSTPCR2_D, r0 ! - mov.l r0, @r1 - - mov.l PFC_PULCR_A, r1 - mov.w PFC_PULCR_D, r0 - mov.w r0,@r1 - - mov.l PFC_DRVCR_A, r1 - mov.w PFC_DRVCR_D, r0 - mov.w r0, @r1 - - mov.l SBSCR_A, r1 ! - mov.w SBSCR_D, r0 ! - mov.w r0, @r1 - - mov.l PSCR_A, r1 ! - mov.w PSCR_D, r0 ! - mov.w r0, @r1 - - mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register) - mov.w RWTCSR_D_1, r0 ! 0xA507 -> timer_STOP/WDT_CLK=max - mov.w r0, @r1 - - mov.l RWTCNT_A, r1 ! 0xA4520000 (Watchdog Count Register) - mov.w RWTCNT_D, r0 ! 0x5A00 -> Clear - mov.w r0, @r1 - - mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register) - mov.w RWTCSR_D_2, r0 ! 0xA504 -> timer_STOP/CLK=500ms - mov.w r0, @r1 - - mov.l DLLFRQ_A, r1 ! 20080115 - mov.l DLLFRQ_D, r0 ! 20080115 - mov.l r0, @r1 - - mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register - mov.l FRQCR_D, r0 ! 20080115 - mov.l r0, @r1 - - mov.l CCR_A, r1 ! Address of Cache Control Register - mov.l CCR_D_2, r0 ! ?? - mov.l r0, @r1 - -bsc_init: - mov.l CMNCR_A, r1 ! CMNCR address -> R1 - mov.l CMNCR_D, r0 ! CMNCR data -> R0 - mov.l r0, @r1 ! CMNCR set - - mov.l CS0BCR_A, r1 ! CS0BCR address -> R1 - mov.l CS0BCR_D, r0 ! CS0BCR data -> R0 - mov.l r0, @r1 ! CS0BCR set - - mov.l CS4BCR_A, r1 ! CS4BCR address -> R1 - mov.l CS4BCR_D, r0 ! CS4BCR data -> R0 - mov.l r0, @r1 ! CS4BCR set - - mov.l CS5ABCR_A, r1 ! CS5ABCR address -> R1 - mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0 - mov.l r0, @r1 ! CS5ABCR set - - mov.l CS5BBCR_A, r1 ! CS5BBCR address -> R1 - mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0 - mov.l r0, @r1 ! CS5BBCR set - - mov.l CS6ABCR_A, r1 ! CS6ABCR address -> R1 - mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0 - mov.l r0, @r1 ! CS6ABCR set - - mov.l CS0WCR_A, r1 ! CS0WCR address -> R1 - mov.l CS0WCR_D, r0 ! CS0WCR data -> R0 - mov.l r0, @r1 ! CS0WCR set - - mov.l CS4WCR_A, r1 ! CS4WCR address -> R1 - mov.l CS4WCR_D, r0 ! CS4WCR data -> R0 - mov.l r0, @r1 ! CS4WCR set - - mov.l CS5AWCR_A, r1 ! CS5AWCR address -> R1 - mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0 - mov.l r0, @r1 ! CS5AWCR set - - mov.l CS5BWCR_A, r1 ! CS5BWCR address -> R1 - mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0 - mov.l r0, @r1 ! CS5BWCR set - - mov.l CS6AWCR_A, r1 ! CS6AWCR address -> R1 - mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0 - mov.l r0, @r1 ! CS6AWCR set - - ! SDRAM initialization - mov.l SDCR_A, r1 ! SB_SDCR address -> R1 - mov.l SDCR_D, r0 ! SB_SDCR data -> R0 - mov.l r0, @r1 ! SB_SDCR set - - mov.l SDWCR_A, r1 ! SB_SDWCR address -> R1 - mov.l SDWCR_D, r0 ! SB_SDWCR data -> R0 - mov.l r0, @r1 ! SB_SDWCR set - - mov.l SDPCR_A, r1 ! SB_SDPCR address -> R1 - mov.l SDPCR_D, r0 ! SB_SDPCR data -> R0 - mov.l r0, @r1 ! SB_SDPCR set - - mov.l RTCOR_A, r1 ! SB_RTCOR address -> R1 - mov.l RTCOR_D, r0 ! SB_RTCOR data -> R0 - mov.l r0, @r1 ! SB_RTCOR set - - mov.l RTCNT_A, r1 ! SB_RTCNT address -> R1 - mov.l RTCNT_D, r0 ! SB_RTCNT data -> R0 - mov.l r0, @r1 - - mov.l RTCSR_A, r1 ! SB_RTCSR address -> R1 - mov.l RTCSR_D, r0 ! SB_RTCSR data -> R0 - mov.l r0, @r1 ! SB_RTCSR set - - mov.l RFCR_A, r1 ! SB_RFCR address -> R1 - mov.l RFCR_D, r0 ! SB_RFCR data -> R0 - mov.l r0, @r1 - - mov.l SDMR3_A, r1 ! SDMR3 address -> R1 - mov #0x00, r0 ! SDMR3 data -> R0 - mov.b r0, @r1 ! SDMR3 set - - ! BL bit off (init = ON) (?!?) - - stc sr, r0 ! BL bit off(init=ON) - mov.l SR_MASK_D, r1 - and r1, r0 - ldc r0, sr - - rts - mov #0, r0 - - .align 4 - -CCR_A: .long CCR -MMUCR_A: .long MMUCR -MSTPCR0_A: .long MSTPCR0 -MSTPCR2_A: .long MSTPCR2 -PFC_PULCR_A: .long PULCR -PFC_DRVCR_A: .long DRVCR -SBSCR_A: .long SBSCR -PSCR_A: .long PSCR -RWTCSR_A: .long RWTCSR -RWTCNT_A: .long RWTCNT -FRQCR_A: .long FRQCR -PLLCR_A: .long PLLCR -DLLFRQ_A: .long DLLFRQ - -CCR_D: .long 0x00000800 -CCR_D_2: .long 0x00000103 -MMUCR_D: .long 0x00000004 -MSTPCR0_D: .long 0x00001001 -MSTPCR2_D: .long 0xffffffff -PFC_PULCR_D: .long 0x6000 -PFC_DRVCR_D: .long 0x0464 -FRQCR_D: .long 0x07033639 -PLLCR_D: .long 0x00005000 -DLLFRQ_D: .long 0x000004F6 ! 20080115 - -CMNCR_A: .long CMNCR -CMNCR_D: .long 0x0000001B ! 20080115 -CS0BCR_A: .long CS0BCR ! Flash bank 1 -CS0BCR_D: .long 0x24920400 -CS4BCR_A: .long CS4BCR ! -CS4BCR_D: .long 0x10003400 ! 20080115 -CS5ABCR_A: .long CS5ABCR ! -CS5ABCR_D: .long 0x24920400 -CS5BBCR_A: .long CS5BBCR ! -CS5BBCR_D: .long 0x24920400 -CS6ABCR_A: .long CS6ABCR ! -CS6ABCR_D: .long 0x24920400 - -CS0WCR_A: .long CS0WCR -CS0WCR_D: .long 0x00000380 -CS4WCR_A: .long CS4WCR -CS4WCR_D: .long 0x00100A81 ! 20080115 -CS5AWCR_A: .long CS5AWCR -CS5AWCR_D: .long 0x00000300 -CS5BWCR_A: .long CS5BWCR -CS5BWCR_D: .long 0x00000300 -CS6AWCR_A: .long CS6AWCR -CS6AWCR_D: .long 0x00000300 - -SDCR_A: .long SBSC_SDCR -SDCR_D: .long 0x80160809 ! 20080115 -SDWCR_A: .long SBSC_SDWCR -SDWCR_D: .long 0x0014450C ! 20080115 -SDPCR_A: .long SBSC_SDPCR -SDPCR_D: .long 0x00000087 -RTCOR_A: .long SBSC_RTCOR -RTCNT_A: .long SBSC_RTCNT -RTCNT_D: .long 0xA55A0012 -RTCOR_D: .long 0xA55A001C ! 20080115 -RTCSR_A: .long SBSC_RTCSR -RFCR_A: .long SBSC_RFCR -RFCR_D: .long 0xA55A0221 -RTCSR_D: .long 0xA55A009a ! 20080115 -SDMR3_A: .long 0xFE581180 ! 20080115 - -SR_MASK_D: .long 0xEFFFFF0F - - .align 2 - -SBSCR_D: .word 0x0044 -PSCR_D: .word 0x0000 -RWTCSR_D_1: .word 0xA507 -RWTCSR_D_2: .word 0xA504 ! 20080115 -RWTCNT_D: .word 0x5A00 diff --git a/board/MigoR/migo_r.c b/board/MigoR/migo_r.c deleted file mode 100644 index 204ca78..0000000 --- a/board/MigoR/migo_r.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (C) 2007 - * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> - * - * Copyright (C) 2007 - * Kenati Technologies, Inc. - * - * board/MigoR/migo_r.c - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/processor.h> - -int checkboard(void) -{ - puts("BOARD: Renesas MigoR\n"); - return 0; -} - -int board_init(void) -{ - return 0; -} - -int dram_init (void) -{ - DECLARE_GLOBAL_DATA_PTR; - - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; - printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); - return 0; -} - -void led_set_state (unsigned short value) -{ -} diff --git a/board/MigoR/u-boot.lds b/board/MigoR/u-boot.lds deleted file mode 100644 index f9c1eff..0000000 --- a/board/MigoR/u-boot.lds +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyrigth (c) 2007 - * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") -OUTPUT_ARCH(sh) -ENTRY(_start) - -SECTIONS -{ - /* - Base address of internal SDRAM is 0x0C000000. - Although size of SDRAM can be either 16 or 32 MBytes, - we assume 16 MBytes (ie ignore upper half if the full - 32 MBytes is present). - - NOTE: This address must match with the definition of - TEXT_BASE in config.mk (in this directory). - - */ - . = 0x8C000000 + (64*1024*1024) - (256*1024); - - PROVIDE (reloc_dst = .); - - PROVIDE (_ftext = .); - PROVIDE (_fcode = .); - PROVIDE (_start = .); - - .text : - { - cpu/sh4/start.o (.text) - . = ALIGN(8192); - common/env_embedded.o (.ppcenv) - . = ALIGN(8192); - common/env_embedded.o (.ppcenvr) - . = ALIGN(8192); - *(.text) - . = ALIGN(4); - } =0xFF - PROVIDE (_ecode = .); - .rodata : - { - *(.rodata) - . = ALIGN(4); - } - PROVIDE (_etext = .); - - - PROVIDE (_fdata = .); - .data : - { - *(.data) - . = ALIGN(4); - } - PROVIDE (_edata = .); - - PROVIDE (_fgot = .); - .got : - { - *(.got) - . = ALIGN(4); - } - PROVIDE (_egot = .); - - PROVIDE (__u_boot_cmd_start = .); - .u_boot_cmd : - { - *(.u_boot_cmd) - . = ALIGN(4); - } - PROVIDE (__u_boot_cmd_end = .); - - PROVIDE (reloc_dst_end = .); - /* _reloc_dst_end = .; */ - - PROVIDE (bss_start = .); - PROVIDE (__bss_start = .); - .bss : - { - *(.bss) - . = ALIGN(4); - } - PROVIDE (bss_end = .); - - PROVIDE (_end = .); -} diff --git a/board/renesas/MigoR/Makefile b/board/renesas/MigoR/Makefile new file mode 100644 index 0000000..661b59d --- /dev/null +++ b/board/renesas/MigoR/Makefile @@ -0,0 +1,52 @@ +# +# Copyright (C) 2007 +# Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> +# +# Copyright (C) 2007 +# Kenati Technologies, Inc. +# +# board/MigoR/Makefile +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := migo_r.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/renesas/MigoR/config.mk b/board/renesas/MigoR/config.mk new file mode 100644 index 0000000..2c5085a --- /dev/null +++ b/board/renesas/MigoR/config.mk @@ -0,0 +1,31 @@ +# +# Copyright (C) 2007 +# Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> +# +# Copyright (C) 2007 +# Kenati Technologies, Inc. +# +# board/MigoR/config.mk +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +# +# TEXT_BASE refers to image _after_ relocation. +# +# NOTE: Must match value used in u-boot.lds (in this directory). +# + +TEXT_BASE = 0x8FFC0000 diff --git a/board/renesas/MigoR/lowlevel_init.S b/board/renesas/MigoR/lowlevel_init.S new file mode 100644 index 0000000..e48f7b3 --- /dev/null +++ b/board/renesas/MigoR/lowlevel_init.S @@ -0,0 +1,264 @@ +/* + * Copyright (C) 2007 + * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * Copyright (C) 2007 + * Kenati Technologies, Inc. + * + * board/MigoR/lowlevel_init.S + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <version.h> + +#include <asm/processor.h> + +/* + * Board specific low level init code, called _very_ early in the + * startup sequence. Relocation to SDRAM has not happened yet, no + * stack is available, bss section has not been initialised, etc. + * + * (Note: As no stack is available, no subroutines can be called...). + */ + + .global lowlevel_init + + .text + .align 2 + +lowlevel_init: + mov.l CCR_A, r1 ! Address of Cache Control Register + mov.l CCR_D, r0 ! Instruction Cache Invalidate + mov.l r0, @r1 + + mov.l MMUCR_A, r1 ! Address of MMU Control Register + mov.l MMUCR_D, r0 ! TI == TLB Invalidate bit + mov.l r0, @r1 + + mov.l MSTPCR0_A, r1 ! Address of Power Control Register 0 + mov.l MSTPCR0_D, r0 ! + mov.l r0, @r1 + + mov.l MSTPCR2_A, r1 ! Address of Power Control Register 2 + mov.l MSTPCR2_D, r0 ! + mov.l r0, @r1 + + mov.l PFC_PULCR_A, r1 + mov.w PFC_PULCR_D, r0 + mov.w r0,@r1 + + mov.l PFC_DRVCR_A, r1 + mov.w PFC_DRVCR_D, r0 + mov.w r0, @r1 + + mov.l SBSCR_A, r1 ! + mov.w SBSCR_D, r0 ! + mov.w r0, @r1 + + mov.l PSCR_A, r1 ! + mov.w PSCR_D, r0 ! + mov.w r0, @r1 + + mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register) + mov.w RWTCSR_D_1, r0 ! 0xA507 -> timer_STOP/WDT_CLK=max + mov.w r0, @r1 + + mov.l RWTCNT_A, r1 ! 0xA4520000 (Watchdog Count Register) + mov.w RWTCNT_D, r0 ! 0x5A00 -> Clear + mov.w r0, @r1 + + mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register) + mov.w RWTCSR_D_2, r0 ! 0xA504 -> timer_STOP/CLK=500ms + mov.w r0, @r1 + + mov.l DLLFRQ_A, r1 ! 20080115 + mov.l DLLFRQ_D, r0 ! 20080115 + mov.l r0, @r1 + + mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register + mov.l FRQCR_D, r0 ! 20080115 + mov.l r0, @r1 + + mov.l CCR_A, r1 ! Address of Cache Control Register + mov.l CCR_D_2, r0 ! ?? + mov.l r0, @r1 + +bsc_init: + mov.l CMNCR_A, r1 ! CMNCR address -> R1 + mov.l CMNCR_D, r0 ! CMNCR data -> R0 + mov.l r0, @r1 ! CMNCR set + + mov.l CS0BCR_A, r1 ! CS0BCR address -> R1 + mov.l CS0BCR_D, r0 ! CS0BCR data -> R0 + mov.l r0, @r1 ! CS0BCR set + + mov.l CS4BCR_A, r1 ! CS4BCR address -> R1 + mov.l CS4BCR_D, r0 ! CS4BCR data -> R0 + mov.l r0, @r1 ! CS4BCR set + + mov.l CS5ABCR_A, r1 ! CS5ABCR address -> R1 + mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0 + mov.l r0, @r1 ! CS5ABCR set + + mov.l CS5BBCR_A, r1 ! CS5BBCR address -> R1 + mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0 + mov.l r0, @r1 ! CS5BBCR set + + mov.l CS6ABCR_A, r1 ! CS6ABCR address -> R1 + mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0 + mov.l r0, @r1 ! CS6ABCR set + + mov.l CS0WCR_A, r1 ! CS0WCR address -> R1 + mov.l CS0WCR_D, r0 ! CS0WCR data -> R0 + mov.l r0, @r1 ! CS0WCR set + + mov.l CS4WCR_A, r1 ! CS4WCR address -> R1 + mov.l CS4WCR_D, r0 ! CS4WCR data -> R0 + mov.l r0, @r1 ! CS4WCR set + + mov.l CS5AWCR_A, r1 ! CS5AWCR address -> R1 + mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0 + mov.l r0, @r1 ! CS5AWCR set + + mov.l CS5BWCR_A, r1 ! CS5BWCR address -> R1 + mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0 + mov.l r0, @r1 ! CS5BWCR set + + mov.l CS6AWCR_A, r1 ! CS6AWCR address -> R1 + mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0 + mov.l r0, @r1 ! CS6AWCR set + + ! SDRAM initialization + mov.l SDCR_A, r1 ! SB_SDCR address -> R1 + mov.l SDCR_D, r0 ! SB_SDCR data -> R0 + mov.l r0, @r1 ! SB_SDCR set + + mov.l SDWCR_A, r1 ! SB_SDWCR address -> R1 + mov.l SDWCR_D, r0 ! SB_SDWCR data -> R0 + mov.l r0, @r1 ! SB_SDWCR set + + mov.l SDPCR_A, r1 ! SB_SDPCR address -> R1 + mov.l SDPCR_D, r0 ! SB_SDPCR data -> R0 + mov.l r0, @r1 ! SB_SDPCR set + + mov.l RTCOR_A, r1 ! SB_RTCOR address -> R1 + mov.l RTCOR_D, r0 ! SB_RTCOR data -> R0 + mov.l r0, @r1 ! SB_RTCOR set + + mov.l RTCNT_A, r1 ! SB_RTCNT address -> R1 + mov.l RTCNT_D, r0 ! SB_RTCNT data -> R0 + mov.l r0, @r1 + + mov.l RTCSR_A, r1 ! SB_RTCSR address -> R1 + mov.l RTCSR_D, r0 ! SB_RTCSR data -> R0 + mov.l r0, @r1 ! SB_RTCSR set + + mov.l RFCR_A, r1 ! SB_RFCR address -> R1 + mov.l RFCR_D, r0 ! SB_RFCR data -> R0 + mov.l r0, @r1 + + mov.l SDMR3_A, r1 ! SDMR3 address -> R1 + mov #0x00, r0 ! SDMR3 data -> R0 + mov.b r0, @r1 ! SDMR3 set + + ! BL bit off (init = ON) (?!?) + + stc sr, r0 ! BL bit off(init=ON) + mov.l SR_MASK_D, r1 + and r1, r0 + ldc r0, sr + + rts + mov #0, r0 + + .align 4 + +CCR_A: .long CCR +MMUCR_A: .long MMUCR +MSTPCR0_A: .long MSTPCR0 +MSTPCR2_A: .long MSTPCR2 +PFC_PULCR_A: .long PULCR +PFC_DRVCR_A: .long DRVCR +SBSCR_A: .long SBSCR +PSCR_A: .long PSCR +RWTCSR_A: .long RWTCSR +RWTCNT_A: .long RWTCNT +FRQCR_A: .long FRQCR +PLLCR_A: .long PLLCR +DLLFRQ_A: .long DLLFRQ + +CCR_D: .long 0x00000800 +CCR_D_2: .long 0x00000103 +MMUCR_D: .long 0x00000004 +MSTPCR0_D: .long 0x00001001 +MSTPCR2_D: .long 0xffffffff +PFC_PULCR_D: .long 0x6000 +PFC_DRVCR_D: .long 0x0464 +FRQCR_D: .long 0x07033639 +PLLCR_D: .long 0x00005000 +DLLFRQ_D: .long 0x000004F6 ! 20080115 + +CMNCR_A: .long CMNCR +CMNCR_D: .long 0x0000001B ! 20080115 +CS0BCR_A: .long CS0BCR ! Flash bank 1 +CS0BCR_D: .long 0x24920400 +CS4BCR_A: .long CS4BCR ! +CS4BCR_D: .long 0x10003400 ! 20080115 +CS5ABCR_A: .long CS5ABCR ! +CS5ABCR_D: .long 0x24920400 +CS5BBCR_A: .long CS5BBCR ! +CS5BBCR_D: .long 0x24920400 +CS6ABCR_A: .long CS6ABCR ! +CS6ABCR_D: .long 0x24920400 + +CS0WCR_A: .long CS0WCR +CS0WCR_D: .long 0x00000380 +CS4WCR_A: .long CS4WCR +CS4WCR_D: .long 0x00100A81 ! 20080115 +CS5AWCR_A: .long CS5AWCR +CS5AWCR_D: .long 0x00000300 +CS5BWCR_A: .long CS5BWCR +CS5BWCR_D: .long 0x00000300 +CS6AWCR_A: .long CS6AWCR +CS6AWCR_D: .long 0x00000300 + +SDCR_A: .long SBSC_SDCR +SDCR_D: .long 0x80160809 ! 20080115 +SDWCR_A: .long SBSC_SDWCR +SDWCR_D: .long 0x0014450C ! 20080115 +SDPCR_A: .long SBSC_SDPCR +SDPCR_D: .long 0x00000087 +RTCOR_A: .long SBSC_RTCOR +RTCNT_A: .long SBSC_RTCNT +RTCNT_D: .long 0xA55A0012 +RTCOR_D: .long 0xA55A001C ! 20080115 +RTCSR_A: .long SBSC_RTCSR +RFCR_A: .long SBSC_RFCR +RFCR_D: .long 0xA55A0221 +RTCSR_D: .long 0xA55A009a ! 20080115 +SDMR3_A: .long 0xFE581180 ! 20080115 + +SR_MASK_D: .long 0xEFFFFF0F + + .align 2 + +SBSCR_D: .word 0x0044 +PSCR_D: .word 0x0000 +RWTCSR_D_1: .word 0xA507 +RWTCSR_D_2: .word 0xA504 ! 20080115 +RWTCNT_D: .word 0x5A00 diff --git a/board/renesas/MigoR/migo_r.c b/board/renesas/MigoR/migo_r.c new file mode 100644 index 0000000..204ca78 --- /dev/null +++ b/board/renesas/MigoR/migo_r.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2007 + * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * Copyright (C) 2007 + * Kenati Technologies, Inc. + * + * board/MigoR/migo_r.c + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/processor.h> + +int checkboard(void) +{ + puts("BOARD: Renesas MigoR\n"); + return 0; +} + +int board_init(void) +{ + return 0; +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; + printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); + return 0; +} + +void led_set_state (unsigned short value) +{ +} diff --git a/board/renesas/MigoR/u-boot.lds b/board/renesas/MigoR/u-boot.lds new file mode 100644 index 0000000..f9c1eff --- /dev/null +++ b/board/renesas/MigoR/u-boot.lds @@ -0,0 +1,105 @@ +/* + * Copyrigth (c) 2007 + * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +OUTPUT_ARCH(sh) +ENTRY(_start) + +SECTIONS +{ + /* + Base address of internal SDRAM is 0x0C000000. + Although size of SDRAM can be either 16 or 32 MBytes, + we assume 16 MBytes (ie ignore upper half if the full + 32 MBytes is present). + + NOTE: This address must match with the definition of + TEXT_BASE in config.mk (in this directory). + + */ + . = 0x8C000000 + (64*1024*1024) - (256*1024); + + PROVIDE (reloc_dst = .); + + PROVIDE (_ftext = .); + PROVIDE (_fcode = .); + PROVIDE (_start = .); + + .text : + { + cpu/sh4/start.o (.text) + . = ALIGN(8192); + common/env_embedded.o (.ppcenv) + . = ALIGN(8192); + common/env_embedded.o (.ppcenvr) + . = ALIGN(8192); + *(.text) + . = ALIGN(4); + } =0xFF + PROVIDE (_ecode = .); + .rodata : + { + *(.rodata) + . = ALIGN(4); + } + PROVIDE (_etext = .); + + + PROVIDE (_fdata = .); + .data : + { + *(.data) + . = ALIGN(4); + } + PROVIDE (_edata = .); + + PROVIDE (_fgot = .); + .got : + { + *(.got) + . = ALIGN(4); + } + PROVIDE (_egot = .); + + PROVIDE (__u_boot_cmd_start = .); + .u_boot_cmd : + { + *(.u_boot_cmd) + . = ALIGN(4); + } + PROVIDE (__u_boot_cmd_end = .); + + PROVIDE (reloc_dst_end = .); + /* _reloc_dst_end = .; */ + + PROVIDE (bss_start = .); + PROVIDE (__bss_start = .); + .bss : + { + *(.bss) + . = ALIGN(4); + } + PROVIDE (bss_end = .); + + PROVIDE (_end = .); +} -- 1.5.6.5

1 0