January 2008 - U-Boot

Re: [U-Boot-Users] CUSTODIANS: List of open issues / not applied patches
by Wolfgang Denk 16 Jan '08

16 Jan '08

Dear Peter, in message <000301c85377$b20206b0$9a4d010a(a)Emea.Arm.com> you wrote: > ACK > > Regards > > Peter Could you please explain how we should interpret this message? You see, the end of the merge window is coming close, and we haven't seen any pull request (nor any other feedback to the ARM related patches) from you yet. Is your "ACK" supposed to mean that you are working on the stuff, and will submit a pull request in time, or is it intended to express that you don't have time to care and ask us (Stefan Roese, me, ...) to go ahead and process at least the patches which seem to be OK, or what else do you want to tell us? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de The human mind treats a new idea the way the body treats a strange protein - it rejects it. - P. Medawar

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[U-Boot-Users] [PATCH v2] Remove #undef DEBUGx and #define DEBUG from all board header files
by Timur Tabi 16 Jan '08

16 Jan '08

Remove the "#undef DEBUG" and other DEBUG_xxx lines from all board header files. Also remove the "#define DEBUG" and other DEBUG_xxx lines from all board header files. The inclusion of these line makes it impossible to control debug on a per-file basis. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- Removed all the "#define DEBUG" statements as well. include/configs/AP1000.h | 2 -- include/configs/BAB7xx.h | 1 - include/configs/EB+MCF-EV123.h | 1 - include/configs/ELPPC.h | 1 - include/configs/IP860.h | 1 - include/configs/IPHASE4539.h | 2 -- include/configs/M5235EVB.h | 2 -- include/configs/M5271EVB.h | 2 -- include/configs/M5329EVB.h | 2 -- include/configs/M54455EVB.h | 2 -- include/configs/MPC8323ERDB.h | 2 -- include/configs/MPC832XEMDS.h | 2 -- include/configs/MPC8349EMDS.h | 2 -- include/configs/MPC8360EMDS.h | 2 -- include/configs/MPC8360ERDK.h | 2 -- include/configs/MPC837XEMDS.h | 2 -- include/configs/MPC8540EVAL.h | 2 -- include/configs/MVBLUE.h | 2 -- include/configs/QS823.h | 4 ---- include/configs/QS850.h | 4 ---- include/configs/QS860T.h | 4 ---- include/configs/Rattler.h | 2 -- include/configs/ads5121.h | 3 --- include/configs/assabet.h | 2 -- include/configs/csb226.h | 2 -- include/configs/ep8248.h | 2 -- include/configs/ep82xxm.h | 2 -- include/configs/gcplus.h | 2 -- include/configs/gw8260.h | 4 ---- include/configs/integratorap.h | 1 - include/configs/mgcoge.h | 2 -- include/configs/mpc7448hpc2.h | 2 -- include/configs/ms7722se.h | 1 - include/configs/ms7750se.h | 1 - include/configs/ppmc7xx.h | 1 - include/configs/pxa255_idp.h | 7 ------- include/configs/sacsng.h | 4 ---- include/configs/sbc8260.h | 4 ---- include/configs/sbc8349.h | 2 -- include/configs/utx8245.h | 1 - 40 files changed, 0 insertions(+), 89 deletions(-) diff --git a/include/configs/AP1000.h b/include/configs/AP1000.h index d490b33..baa9741 100644 --- a/include/configs/AP1000.h +++ b/include/configs/AP1000.h @@ -22,8 +22,6 @@ * (easy to change) */ -#undef DEBUG - #define CONFIG_405 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ diff --git a/include/configs/BAB7xx.h b/include/configs/BAB7xx.h index c11e9c9..8ec70aa 100644 --- a/include/configs/BAB7xx.h +++ b/include/configs/BAB7xx.h @@ -28,7 +28,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG #define GTREGREAD(x) 0xffffffff /* needed for debug */ /* diff --git a/include/configs/EB+MCF-EV123.h b/include/configs/EB+MCF-EV123.h index dae5295..6e0269b 100644 --- a/include/configs/EB+MCF-EV123.h +++ b/include/configs/EB+MCF-EV123.h @@ -27,7 +27,6 @@ #define CONFIG_EB_MCF_EV123 -#undef DEBUG #undef CFG_HALT_BEFOR_RAM_JUMP #undef ET_DEBUG diff --git a/include/configs/ELPPC.h b/include/configs/ELPPC.h index bb77188..c64537f 100644 --- a/include/configs/ELPPC.h +++ b/include/configs/ELPPC.h @@ -28,7 +28,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG #define GTREGREAD(x) 0xffffffff /* needed for debug */ /* diff --git a/include/configs/IP860.h b/include/configs/IP860.h index bd961d8..d2c2ee5 100644 --- a/include/configs/IP860.h +++ b/include/configs/IP860.h @@ -189,7 +189,6 @@ #undef CFG_ENV_IS_IN_FLASH #undef CFG_ENV_IS_IN_NVRAM #undef CFG_ENV_IS_IN_NVRAM -#undef DEBUG_I2C #define CFG_ENV_IS_IN_EEPROM #ifdef CFG_ENV_IS_IN_NVRAM diff --git a/include/configs/IPHASE4539.h b/include/configs/IPHASE4539.h index 6fee455..bb2c96a 100644 --- a/include/configs/IPHASE4539.h +++ b/include/configs/IPHASE4539.h @@ -30,8 +30,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG /* General debug */ - /*----------------------------------------------------------------------- * High Level Configuration Options * (easy to change) diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 7f544c8..3b4bff3 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -37,8 +37,6 @@ #define CONFIG_MCF523x /* define processor family */ #define CONFIG_M5235 /* define processor type */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h index 798ec0c..47e1e03 100644 --- a/include/configs/M5271EVB.h +++ b/include/configs/M5271EVB.h @@ -31,8 +31,6 @@ #ifndef _M5271EVB_H #define _M5271EVB_H -#undef DEBUG - /* * High Level Configuration Options (easy to change) */ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 47d74a3..914ef38 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -37,8 +37,6 @@ #define CONFIG_MCF532x /* define processor family */ #define CONFIG_M5329 /* define processor type */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 211f11d..6697fb5 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -38,8 +38,6 @@ #define CONFIG_M54455 /* define processor type */ #define CONFIG_M54455EVB /* M54455EVB board */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 4ea8709..0e33fce 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index 25ac58c..8cf0a5b 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -20,8 +20,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 437a9a5..2c6534c 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -29,8 +29,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index fdacb90..310d03f 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -22,8 +22,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index 0f6f8f1..72d36c1 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -17,8 +17,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 2b84e9c..61de084 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -21,8 +21,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 2868dcb..330615a 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -238,8 +238,6 @@ #define INTEL_LXT971_PHY 1 #endif -#undef DEBUG - /* Environment */ #ifndef CFG_RAMBOOT #if defined(CONFIG_RAM_AS_FLASH) diff --git a/include/configs/MVBLUE.h b/include/configs/MVBLUE.h index 0defafe..d799f54 100644 --- a/include/configs/MVBLUE.h +++ b/include/configs/MVBLUE.h @@ -53,8 +53,6 @@ #define ERR_LED(code) #endif -#undef DEBUG - #define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_MVBLUE 1 diff --git a/include/configs/QS823.h b/include/configs/QS823.h index 3657fea..fdf0e01 100644 --- a/include/configs/QS823.h +++ b/include/configs/QS823.h @@ -38,10 +38,6 @@ #undef CFG_DEVICE_NULLDEV /* null device */ #undef CONFIG_SILENT_CONSOLE /* silent console */ #undef CFG_CONSOLE_INFO_QUIET /* silent console ? */ -#undef DEBUG /* debug output code */ -#undef DEBUG_FLASH /* debug flash code */ -#undef FLASH_DEBUG /* debug fash code */ -#undef DEBUG_ENV /* debug environment code */ #define CFG_DIRECT_FLASH_TFTP 1 /* allow direct tftp to flash */ #define CONFIG_ENV_OVERWRITE 1 /* allow overwrite MAC address */ diff --git a/include/configs/QS850.h b/include/configs/QS850.h index 3db539f..4e7eea1 100644 --- a/include/configs/QS850.h +++ b/include/configs/QS850.h @@ -38,10 +38,6 @@ #undef CFG_DEVICE_NULLDEV /* null device */ #undef CONFIG_SILENT_CONSOLE /* silent console */ #undef CFG_CONSOLE_INFO_QUIET /* silent console ? */ -#undef DEBUG /* debug output code */ -#undef DEBUG_FLASH /* debug flash code */ -#undef FLASH_DEBUG /* debug fash code */ -#undef DEBUG_ENV /* debug environment code */ #define CFG_DIRECT_FLASH_TFTP 1 /* allow direct tftp to flash */ #define CONFIG_ENV_OVERWRITE 1 /* allow overwrite MAC address */ diff --git a/include/configs/QS860T.h b/include/configs/QS860T.h index b3442de..ff2e39e 100644 --- a/include/configs/QS860T.h +++ b/include/configs/QS860T.h @@ -38,10 +38,6 @@ #undef CFG_DEVICE_NULLDEV /* null device */ #undef CONFIG_SILENT_CONSOLE /* silent console */ #undef CFG_CONSOLE_INFO_QUIET /* silent console ? */ -#undef DEBUG /* debug output code */ -#undef DEBUG_FLASH /* debug flash code */ -#undef FLASH_DEBUG /* debug fash code */ -#undef DEBUG_ENV /* debug environment code */ #define CFG_DIRECT_FLASH_TFTP 1 /* allow direct tftp to flash */ #define CONFIG_ENV_OVERWRITE 1 /* allow overwrite MAC address */ diff --git a/include/configs/Rattler.h b/include/configs/Rattler.h index d7652fa..428c0c2 100644 --- a/include/configs/Rattler.h +++ b/include/configs/Rattler.h @@ -37,8 +37,6 @@ #define CONFIG_RATTLER /* Analogue&Micro Rattler board */ -#undef DEBUG - /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index a4de552..b5c69f0 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -27,9 +27,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define DEBUG -#undef DEBUG - /* * Memory map for the ADS5121 board: * diff --git a/include/configs/assabet.h b/include/configs/assabet.h index 226ad54..d10f092 100644 --- a/include/configs/assabet.h +++ b/include/configs/assabet.h @@ -29,8 +29,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options * (easy to change) diff --git a/include/configs/csb226.h b/include/configs/csb226.h index 0be0f21..41ad4dc 100644 --- a/include/configs/csb226.h +++ b/include/configs/csb226.h @@ -31,8 +31,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define DEBUG 1 - /* * High Level Configuration Options * (easy to change) diff --git a/include/configs/ep8248.h b/include/configs/ep8248.h index 85ad70a..cebe849 100644 --- a/include/configs/ep8248.h +++ b/include/configs/ep8248.h @@ -31,8 +31,6 @@ #define CONFIG_EP8248 /* Embedded Planet EP8248 board */ -#undef DEBUG - #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ diff --git a/include/configs/ep82xxm.h b/include/configs/ep82xxm.h index 4febd32..8e5d6e5 100644 --- a/include/configs/ep82xxm.h +++ b/include/configs/ep82xxm.h @@ -31,8 +31,6 @@ #define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board */ /* 256MB SDRAM / 64MB FLASH */ -#undef DEBUG - #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h index e11ce4c..3b1b4ab 100644 --- a/include/configs/gcplus.h +++ b/include/configs/gcplus.h @@ -29,8 +29,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000. * We don't actually init RAM in this case since we're using U-Boot as diff --git a/include/configs/gw8260.h b/include/configs/gw8260.h index ff57240..401b5cf 100644 --- a/include/configs/gw8260.h +++ b/include/configs/gw8260.h @@ -50,10 +50,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* Enable debug prints */ -#undef DEBUG /* General debug */ -#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ - /* What is the oscillator's (UX2) frequency in Hz? */ #define CONFIG_8260_CLKIN (66 * 1000 * 1000) diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 1452bf2..083eb2f 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -146,7 +146,6 @@ /*#define CONFIG_PCI /--* include pci support */ #undef CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define DEBUG #define CONFIG_EEPRO100 #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/mgcoge.h b/include/configs/mgcoge.h index 3de2466..f4a1cc0 100644 --- a/include/configs/mgcoge.h +++ b/include/configs/mgcoge.h @@ -35,8 +35,6 @@ #define CONFIG_CPM2 1 /* Has a CPM2 */ -#undef DEBUG - /* * Select serial console configuration * diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h index bd3107a..c7216c9 100644 --- a/include/configs/mpc7448hpc2.h +++ b/include/configs/mpc7448hpc2.h @@ -33,8 +33,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* Board Configuration Definitions */ /* MPC7448HPC2 (High-Performance Computing II) (Taiga) board */ diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index ae0d018..8538037 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -25,7 +25,6 @@ #ifndef __MS7722SE_H #define __MS7722SE_H -#undef DEBUG #define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7722 1 diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 3668156..a25364d 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -25,7 +25,6 @@ #ifndef __MS7750SE_H #define __MS7750SE_H -#undef DEBUG #define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7750 1 diff --git a/include/configs/ppmc7xx.h b/include/configs/ppmc7xx.h index fe7de7b..1d2d38b 100644 --- a/include/configs/ppmc7xx.h +++ b/include/configs/ppmc7xx.h @@ -30,7 +30,6 @@ * do_bdinfo - Required to build with debug */ -#undef DEBUG #ifdef DEBUG #define GTREGREAD(x) 0xFFFFFFFF #define do_bdinfo(a,b,c,d) diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index 4a9cadb..56a9b35 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -45,13 +45,6 @@ #undef CONFIG_SKIP_RELOCATE_UBOOT /* define for developing */ /* - * define the following to enable debug blinks. A debug blink function - * must be defined in memsetup.S - */ -#undef DEBUG_BLINK_ENABLE -#undef DEBUG_BLINKC_ENABLE - -/* * High Level Configuration Options * (easy to change) */ diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h index c474acd..4a64b2e 100644 --- a/include/configs/sacsng.h +++ b/include/configs/sacsng.h @@ -35,9 +35,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG /* General debug */ -#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ - #undef CONFIG_LOGBUFFER /* External logbuffer support */ /***************************************************************************** @@ -257,7 +254,6 @@ */ #define CONFIG_SOFT_SPI /* Enable SPI driver */ #define MAX_SPI_BYTES 4 /* Maximum number of bytes we can handle */ -#undef DEBUG_SPI /* Disable SPI debugging */ /* * Software (bit-bang) SPI driver configuration diff --git a/include/configs/sbc8260.h b/include/configs/sbc8260.h index b1d41a6..9739b3a 100644 --- a/include/configs/sbc8260.h +++ b/include/configs/sbc8260.h @@ -35,10 +35,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* Enable debug prints */ -#undef DEBUG /* General debug */ -#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ - /***************************************************************************** * * These settings must match the way _your_ board is set up diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 4cc4ff1..2498b3e 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -31,8 +31,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h index cd00c49..7fb41fe 100644 --- a/include/configs/utx8245.h +++ b/include/configs/utx8245.h @@ -49,7 +49,6 @@ #define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_UTX8245 1 -#define DEBUG 1 #define CONFIG_IDENT_STRING " [UTX5] " -- 1.5.2.4

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[U-Boot-Users] [PATCH] FSL: Generalize PIXIS reset command parsing.
by Jon Loeliger 16 Jan '08

16 Jan '08

From: James Yang <james.yang(a)freescale.com> Before, the order of arguments to the pixis_reset command needed to be supplied in a hard-coded order. Generalize the command parsing to allow any order. Signed-off-by: James Yang <james.yang(a)freescale.com> Acked-by: Jon Loeliger <jdl(a)freescale.com> --- board/freescale/common/pixis.c | 214 ++++++++++++++++++++-------------------- 1 files changed, 106 insertions(+), 108 deletions(-) diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index 00eb4a0..bff6a82 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -183,7 +183,7 @@ int set_px_corepll(ulong corepll) void read_from_px_regs(int set) { - u8 mask = 0x1C; + u8 mask = 0x1C; /* COREPLL, MPXPLL, SYSCLK controlled by PIXIS */ u8 tmp = in8(PIXIS_BASE + PIXIS_VCFGEN0); if (set) @@ -196,7 +196,7 @@ void read_from_px_regs(int set) void read_from_px_regs_altbank(int set) { - u8 mask = 0x04; + u8 mask = 0x04; /* FLASHBANK and FLASHMAP controlled by PIXIS */ u8 tmp = in8(PIXIS_BASE + PIXIS_VCFGEN1); if (set) @@ -207,15 +207,26 @@ void read_from_px_regs_altbank(int set) } #ifndef CFG_PIXIS_VBOOT_MASK -#define CFG_PIXIS_VBOOT_MASK 0x40 +#define CFG_PIXIS_VBOOT_MASK (0x40) #endif +void clear_altbank(void) +{ + u8 tmp; + + tmp = in8(PIXIS_BASE + PIXIS_VBOOT); + tmp &= ~CFG_PIXIS_VBOOT_MASK; + + out8(PIXIS_BASE + PIXIS_VBOOT, tmp); +} + + void set_altbank(void) { u8 tmp; tmp = in8(PIXIS_BASE + PIXIS_VBOOT); - tmp ^= CFG_PIXIS_VBOOT_MASK; + tmp |= CFG_PIXIS_VBOOT_MASK; out8(PIXIS_BASE + PIXIS_VBOOT, tmp); } @@ -226,11 +237,11 @@ void set_px_go(void) u8 tmp; tmp = in8(PIXIS_BASE + PIXIS_VCTL); - tmp = tmp & 0x1E; + tmp = tmp & 0x1E; /* clear GO bit */ out8(PIXIS_BASE + PIXIS_VCTL, tmp); tmp = in8(PIXIS_BASE + PIXIS_VCTL); - tmp = tmp | 0x01; + tmp = tmp | 0x01; /* set GO bit - start reset sequencer */ out8(PIXIS_BASE + PIXIS_VCTL, tmp); } @@ -292,7 +303,7 @@ static ulong strfractoint(uchar *strptr) * simply create the intarr. */ i = 0; - while (strptr[i] != 46) { + while (strptr[i] != '.') { if (strptr[i] == 0) { no_dec = 1; break; @@ -312,7 +323,7 @@ static ulong strfractoint(uchar *strptr) } else { j = 0; i++; /* Skipping the decimal point */ - while ((strptr[i] > 47) && (strptr[i] < 58)) { + while ((strptr[i] >= '0') && (strptr[i] <= '9')) { decarr[j] = strptr[i]; i++; j++; @@ -339,8 +350,14 @@ static ulong strfractoint(uchar *strptr) int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - ulong val; - ulong corepll; + unsigned int i; + char *p_cf = NULL; + char *p_cf_sysclk = NULL; + char *p_cf_corepll = NULL; + char *p_cf_mpxpll = NULL; + char *p_altbank = NULL; + char *p_wd = NULL; + unsigned int unknown_param = 0; /* * No args is a simple reset request. @@ -350,116 +367,97 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* not reached */ } - if (strcmp(argv[1], "cf") == 0) { + for (i = 1; i < argc; i++) { + if (strcmp(argv[i], "cf") == 0) { + p_cf = argv[i]; + if (i + 3 >= argc) { + break; + } + p_cf_sysclk = argv[i+1]; + p_cf_corepll = argv[i+2]; + p_cf_mpxpll = argv[i+3]; + i += 3; + continue; + } - /* - * Reset with frequency changed: - * cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> - */ - if (argc < 5) { - puts(cmdtp->usage); - return 1; + if (strcmp(argv[i], "altbank") == 0) { + p_altbank = argv[i]; + continue; } - read_from_px_regs(0); - - val = set_px_sysclk(simple_strtoul(argv[2], NULL, 10)); - - corepll = strfractoint((uchar *)argv[3]); - val = val + set_px_corepll(corepll); - val = val + set_px_mpxpll(simple_strtoul(argv[4], NULL, 10)); - if (val == 3) { - puts("Setting registers VCFGEN0 and VCTL\n"); - read_from_px_regs(1); - puts("Resetting board with values from "); - puts("VSPEED0, VSPEED1, VCLKH, and VCLKL \n"); - set_px_go(); - } else { - puts(cmdtp->usage); - return 1; + if (strcmp(argv[i], "wd") == 0) { + p_wd = argv[i]; + continue; } - while (1) ; /* Not reached */ - - } else if (strcmp(argv[1], "altbank") == 0) { - - /* - * Reset using alternate flash bank: - */ - if (argv[2] == 0) { - /* - * Reset from alternate bank without changing - * frequency and without watchdog timer enabled. - * altbank - */ - read_from_px_regs(0); - read_from_px_regs_altbank(0); - if (argc > 2) { - puts(cmdtp->usage); - return 1; - } - puts("Setting registers VCFGNE1, VBOOT, and VCTL\n"); - set_altbank(); - read_from_px_regs_altbank(1); - puts("Resetting board to boot from the other bank.\n"); - set_px_go(); - - } else if (strcmp(argv[2], "cf") == 0) { - /* - * Reset with frequency changed - * altbank cf <SYSCLK freq> <COREPLL ratio> - * <MPXPLL ratio> - */ - read_from_px_regs(0); - read_from_px_regs_altbank(0); - val = set_px_sysclk(simple_strtoul(argv[3], NULL, 10)); - corepll = strfractoint((uchar *)argv[4]); - val = val + set_px_corepll(corepll); - val = val + set_px_mpxpll(simple_strtoul(argv[5], - NULL, 10)); - if (val == 3) { - puts("Setting registers VCFGEN0, VCFGEN1, VBOOT, and VCTL\n"); - set_altbank(); - read_from_px_regs(1); - read_from_px_regs_altbank(1); - puts("Enabling watchdog timer on the FPGA\n"); - puts("Resetting board with values from "); - puts("VSPEED0, VSPEED1, VCLKH and VCLKL "); - puts("to boot from the other bank.\n"); - set_px_go_with_watchdog(); - } else { - puts(cmdtp->usage); - return 1; - } + unknown_param = 1; + } - while (1) ; /* Not reached */ - - } else if (strcmp(argv[2], "wd") == 0) { - /* - * Reset from alternate bank without changing - * frequencies but with watchdog timer enabled: - * altbank wd - */ - read_from_px_regs(0); - read_from_px_regs_altbank(0); - puts("Setting registers VCFGEN1, VBOOT, and VCTL\n"); - set_altbank(); - read_from_px_regs_altbank(1); - puts("Enabling watchdog timer on the FPGA\n"); - puts("Resetting board to boot from the other bank.\n"); - set_px_go_with_watchdog(); - while (1) ; /* Not reached */ - - } else { - puts(cmdtp->usage); + /* + * Check that cf has all required parms + */ + if ((p_cf && !(p_cf_sysclk && p_cf_corepll && p_cf_mpxpll)) + || unknown_param) { + puts(cmdtp->help); + return 1; + } + + /* + * PIXIS seems to be sensitive to the ordering of + * the registers that are touched. + */ + read_from_px_regs(0); + + if (p_altbank) { + read_from_px_regs_altbank(0); + } + clear_altbank(); + + /* + * Clock configuration specified. + */ + if (p_cf) { + unsigned long sysclk; + unsigned long corepll; + unsigned long mpxpll; + + sysclk = simple_strtoul(p_cf_sysclk, NULL, 10); + corepll = strfractoint((uchar *) p_cf_corepll); + mpxpll = simple_strtoul(p_cf_mpxpll, NULL, 10); + + if (!(set_px_sysclk(sysclk) + && set_px_corepll(corepll) + && set_px_mpxpll(mpxpll))) { + puts(cmdtp->help); return 1; } + read_from_px_regs(1); + } + /* + * Altbank specified + * + * NOTE CHANGE IN BEHAVIOR: previous code would default + * to enabling watchdog if altbank is specified. + * Now the watchdog must be enabled explicitly using 'wd'. + */ + if (p_altbank) { + set_altbank(); + read_from_px_regs_altbank(1); + } + + /* + * Reset with watchdog specified. + */ + if (p_wd) { + set_px_go_with_watchdog(); } else { - puts(cmdtp->usage); - return 1; + set_px_go(); } + /* + * Shouldn't be reached. + */ return 0; } -- 1.5.2.1.126.g6abd0

1 0

[U-Boot-Users] [PATCH] Remove #undef DEBUGx from all board header files
by Timur Tabi 16 Jan '08

16 Jan '08

Remove the "#undef DEBUG" and other DEBUG_xxx lines from all board header files. The inclusion of this line makes it impossible to enable debug code in other source files, because "#define DEBUG" typically needs to be defined before any header files are included. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- include/configs/AP1000.h | 2 -- include/configs/BAB7xx.h | 1 - include/configs/EB+MCF-EV123.h | 1 - include/configs/ELPPC.h | 1 - include/configs/IP860.h | 1 - include/configs/IPHASE4539.h | 2 -- include/configs/M5235EVB.h | 2 -- include/configs/M5271EVB.h | 2 -- include/configs/M5329EVB.h | 2 -- include/configs/M54455EVB.h | 2 -- include/configs/MPC8323ERDB.h | 2 -- include/configs/MPC832XEMDS.h | 2 -- include/configs/MPC8349EMDS.h | 2 -- include/configs/MPC8360EMDS.h | 2 -- include/configs/MPC8360ERDK.h | 2 -- include/configs/MPC837XEMDS.h | 2 -- include/configs/MPC8540EVAL.h | 2 -- include/configs/MVBLUE.h | 2 -- include/configs/QS823.h | 4 ---- include/configs/QS850.h | 4 ---- include/configs/QS860T.h | 4 ---- include/configs/Rattler.h | 2 -- include/configs/ads5121.h | 1 - include/configs/assabet.h | 2 -- include/configs/ep8248.h | 2 -- include/configs/ep82xxm.h | 2 -- include/configs/gcplus.h | 2 -- include/configs/gw8260.h | 4 ---- include/configs/mgcoge.h | 2 -- include/configs/mpc7448hpc2.h | 2 -- include/configs/ms7722se.h | 1 - include/configs/ms7750se.h | 1 - include/configs/ppmc7xx.h | 1 - include/configs/pxa255_idp.h | 7 ------- include/configs/sacsng.h | 4 ---- include/configs/sbc8260.h | 4 ---- include/configs/sbc8349.h | 2 -- 37 files changed, 0 insertions(+), 83 deletions(-) diff --git a/include/configs/AP1000.h b/include/configs/AP1000.h index d490b33..baa9741 100644 --- a/include/configs/AP1000.h +++ b/include/configs/AP1000.h @@ -22,8 +22,6 @@ * (easy to change) */ -#undef DEBUG - #define CONFIG_405 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ diff --git a/include/configs/BAB7xx.h b/include/configs/BAB7xx.h index c11e9c9..8ec70aa 100644 --- a/include/configs/BAB7xx.h +++ b/include/configs/BAB7xx.h @@ -28,7 +28,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG #define GTREGREAD(x) 0xffffffff /* needed for debug */ /* diff --git a/include/configs/EB+MCF-EV123.h b/include/configs/EB+MCF-EV123.h index dae5295..6e0269b 100644 --- a/include/configs/EB+MCF-EV123.h +++ b/include/configs/EB+MCF-EV123.h @@ -27,7 +27,6 @@ #define CONFIG_EB_MCF_EV123 -#undef DEBUG #undef CFG_HALT_BEFOR_RAM_JUMP #undef ET_DEBUG diff --git a/include/configs/ELPPC.h b/include/configs/ELPPC.h index bb77188..c64537f 100644 --- a/include/configs/ELPPC.h +++ b/include/configs/ELPPC.h @@ -28,7 +28,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG #define GTREGREAD(x) 0xffffffff /* needed for debug */ /* diff --git a/include/configs/IP860.h b/include/configs/IP860.h index bd961d8..d2c2ee5 100644 --- a/include/configs/IP860.h +++ b/include/configs/IP860.h @@ -189,7 +189,6 @@ #undef CFG_ENV_IS_IN_FLASH #undef CFG_ENV_IS_IN_NVRAM #undef CFG_ENV_IS_IN_NVRAM -#undef DEBUG_I2C #define CFG_ENV_IS_IN_EEPROM #ifdef CFG_ENV_IS_IN_NVRAM diff --git a/include/configs/IPHASE4539.h b/include/configs/IPHASE4539.h index 6fee455..bb2c96a 100644 --- a/include/configs/IPHASE4539.h +++ b/include/configs/IPHASE4539.h @@ -30,8 +30,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG /* General debug */ - /*----------------------------------------------------------------------- * High Level Configuration Options * (easy to change) diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 7f544c8..3b4bff3 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -37,8 +37,6 @@ #define CONFIG_MCF523x /* define processor family */ #define CONFIG_M5235 /* define processor type */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h index 798ec0c..47e1e03 100644 --- a/include/configs/M5271EVB.h +++ b/include/configs/M5271EVB.h @@ -31,8 +31,6 @@ #ifndef _M5271EVB_H #define _M5271EVB_H -#undef DEBUG - /* * High Level Configuration Options (easy to change) */ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 47d74a3..914ef38 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -37,8 +37,6 @@ #define CONFIG_MCF532x /* define processor family */ #define CONFIG_M5329 /* define processor type */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 211f11d..6697fb5 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -38,8 +38,6 @@ #define CONFIG_M54455 /* define processor type */ #define CONFIG_M54455EVB /* M54455EVB board */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 4ea8709..0e33fce 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index 25ac58c..8cf0a5b 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -20,8 +20,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 437a9a5..2c6534c 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -29,8 +29,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index fdacb90..310d03f 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -22,8 +22,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index 0f6f8f1..72d36c1 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -17,8 +17,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 2b84e9c..61de084 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -21,8 +21,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 2868dcb..330615a 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -238,8 +238,6 @@ #define INTEL_LXT971_PHY 1 #endif -#undef DEBUG - /* Environment */ #ifndef CFG_RAMBOOT #if defined(CONFIG_RAM_AS_FLASH) diff --git a/include/configs/MVBLUE.h b/include/configs/MVBLUE.h index 0defafe..d799f54 100644 --- a/include/configs/MVBLUE.h +++ b/include/configs/MVBLUE.h @@ -53,8 +53,6 @@ #define ERR_LED(code) #endif -#undef DEBUG - #define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_MVBLUE 1 diff --git a/include/configs/QS823.h b/include/configs/QS823.h index 3657fea..fdf0e01 100644 --- a/include/configs/QS823.h +++ b/include/configs/QS823.h @@ -38,10 +38,6 @@ #undef CFG_DEVICE_NULLDEV /* null device */ #undef CONFIG_SILENT_CONSOLE /* silent console */ #undef CFG_CONSOLE_INFO_QUIET /* silent console ? */ -#undef DEBUG /* debug output code */ -#undef DEBUG_FLASH /* debug flash code */ -#undef FLASH_DEBUG /* debug fash code */ -#undef DEBUG_ENV /* debug environment code */ #define CFG_DIRECT_FLASH_TFTP 1 /* allow direct tftp to flash */ #define CONFIG_ENV_OVERWRITE 1 /* allow overwrite MAC address */ diff --git a/include/configs/QS850.h b/include/configs/QS850.h index 3db539f..4e7eea1 100644 --- a/include/configs/QS850.h +++ b/include/configs/QS850.h @@ -38,10 +38,6 @@ #undef CFG_DEVICE_NULLDEV /* null device */ #undef CONFIG_SILENT_CONSOLE /* silent console */ #undef CFG_CONSOLE_INFO_QUIET /* silent console ? */ -#undef DEBUG /* debug output code */ -#undef DEBUG_FLASH /* debug flash code */ -#undef FLASH_DEBUG /* debug fash code */ -#undef DEBUG_ENV /* debug environment code */ #define CFG_DIRECT_FLASH_TFTP 1 /* allow direct tftp to flash */ #define CONFIG_ENV_OVERWRITE 1 /* allow overwrite MAC address */ diff --git a/include/configs/QS860T.h b/include/configs/QS860T.h index b3442de..ff2e39e 100644 --- a/include/configs/QS860T.h +++ b/include/configs/QS860T.h @@ -38,10 +38,6 @@ #undef CFG_DEVICE_NULLDEV /* null device */ #undef CONFIG_SILENT_CONSOLE /* silent console */ #undef CFG_CONSOLE_INFO_QUIET /* silent console ? */ -#undef DEBUG /* debug output code */ -#undef DEBUG_FLASH /* debug flash code */ -#undef FLASH_DEBUG /* debug fash code */ -#undef DEBUG_ENV /* debug environment code */ #define CFG_DIRECT_FLASH_TFTP 1 /* allow direct tftp to flash */ #define CONFIG_ENV_OVERWRITE 1 /* allow overwrite MAC address */ diff --git a/include/configs/Rattler.h b/include/configs/Rattler.h index d7652fa..428c0c2 100644 --- a/include/configs/Rattler.h +++ b/include/configs/Rattler.h @@ -37,8 +37,6 @@ #define CONFIG_RATTLER /* Analogue&Micro Rattler board */ -#undef DEBUG - /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index a4de552..681b81b 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -28,7 +28,6 @@ #define __CONFIG_H #define DEBUG -#undef DEBUG /* * Memory map for the ADS5121 board: diff --git a/include/configs/assabet.h b/include/configs/assabet.h index 226ad54..d10f092 100644 --- a/include/configs/assabet.h +++ b/include/configs/assabet.h @@ -29,8 +29,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options * (easy to change) diff --git a/include/configs/ep8248.h b/include/configs/ep8248.h index 85ad70a..cebe849 100644 --- a/include/configs/ep8248.h +++ b/include/configs/ep8248.h @@ -31,8 +31,6 @@ #define CONFIG_EP8248 /* Embedded Planet EP8248 board */ -#undef DEBUG - #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ diff --git a/include/configs/ep82xxm.h b/include/configs/ep82xxm.h index 4febd32..8e5d6e5 100644 --- a/include/configs/ep82xxm.h +++ b/include/configs/ep82xxm.h @@ -31,8 +31,6 @@ #define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board */ /* 256MB SDRAM / 64MB FLASH */ -#undef DEBUG - #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h index e11ce4c..3b1b4ab 100644 --- a/include/configs/gcplus.h +++ b/include/configs/gcplus.h @@ -29,8 +29,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000. * We don't actually init RAM in this case since we're using U-Boot as diff --git a/include/configs/gw8260.h b/include/configs/gw8260.h index ff57240..401b5cf 100644 --- a/include/configs/gw8260.h +++ b/include/configs/gw8260.h @@ -50,10 +50,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* Enable debug prints */ -#undef DEBUG /* General debug */ -#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ - /* What is the oscillator's (UX2) frequency in Hz? */ #define CONFIG_8260_CLKIN (66 * 1000 * 1000) diff --git a/include/configs/mgcoge.h b/include/configs/mgcoge.h index 3de2466..f4a1cc0 100644 --- a/include/configs/mgcoge.h +++ b/include/configs/mgcoge.h @@ -35,8 +35,6 @@ #define CONFIG_CPM2 1 /* Has a CPM2 */ -#undef DEBUG - /* * Select serial console configuration * diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h index bd3107a..c7216c9 100644 --- a/include/configs/mpc7448hpc2.h +++ b/include/configs/mpc7448hpc2.h @@ -33,8 +33,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* Board Configuration Definitions */ /* MPC7448HPC2 (High-Performance Computing II) (Taiga) board */ diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index ae0d018..8538037 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -25,7 +25,6 @@ #ifndef __MS7722SE_H #define __MS7722SE_H -#undef DEBUG #define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7722 1 diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 3668156..a25364d 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -25,7 +25,6 @@ #ifndef __MS7750SE_H #define __MS7750SE_H -#undef DEBUG #define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7750 1 diff --git a/include/configs/ppmc7xx.h b/include/configs/ppmc7xx.h index fe7de7b..1d2d38b 100644 --- a/include/configs/ppmc7xx.h +++ b/include/configs/ppmc7xx.h @@ -30,7 +30,6 @@ * do_bdinfo - Required to build with debug */ -#undef DEBUG #ifdef DEBUG #define GTREGREAD(x) 0xFFFFFFFF #define do_bdinfo(a,b,c,d) diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index 4a9cadb..56a9b35 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -45,13 +45,6 @@ #undef CONFIG_SKIP_RELOCATE_UBOOT /* define for developing */ /* - * define the following to enable debug blinks. A debug blink function - * must be defined in memsetup.S - */ -#undef DEBUG_BLINK_ENABLE -#undef DEBUG_BLINKC_ENABLE - -/* * High Level Configuration Options * (easy to change) */ diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h index c474acd..4a64b2e 100644 --- a/include/configs/sacsng.h +++ b/include/configs/sacsng.h @@ -35,9 +35,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG /* General debug */ -#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ - #undef CONFIG_LOGBUFFER /* External logbuffer support */ /***************************************************************************** @@ -257,7 +254,6 @@ */ #define CONFIG_SOFT_SPI /* Enable SPI driver */ #define MAX_SPI_BYTES 4 /* Maximum number of bytes we can handle */ -#undef DEBUG_SPI /* Disable SPI debugging */ /* * Software (bit-bang) SPI driver configuration diff --git a/include/configs/sbc8260.h b/include/configs/sbc8260.h index b1d41a6..9739b3a 100644 --- a/include/configs/sbc8260.h +++ b/include/configs/sbc8260.h @@ -35,10 +35,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* Enable debug prints */ -#undef DEBUG /* General debug */ -#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ - /***************************************************************************** * * These settings must match the way _your_ board is set up diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 4cc4ff1..2498b3e 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -31,8 +31,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ -- 1.5.2.4

2 2

[U-Boot-Users] resend #4: [PATCH 4/5]: add AcTux-3 board support
by Michael Schwingen 16 Jan '08

16 Jan '08

Signed-off-by: Michael Schwingen <michael(a)schwingen.org> diff --git a/board/actux3/Makefile b/board/actux3/Makefile new file mode 100644 index 0000000..f6168c3 --- /dev/null +++ b/board/actux3/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := actux3.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/actux3/actux3.c b/board/actux3/actux3.c new file mode 100644 index 0000000..b3a345e --- /dev/null +++ b/board/actux3/actux3.c @@ -0,0 +1,162 @@ +/* + * (C) Copyright 2007 + * Michael Schwingen, michael(a)schwingen.org + * + * (C) Copyright 2006 + * Stefan Roese, DENX Software Engineering, sr(a)denx.de. + * + * (C) Copyright 2002 + * Kyle Harris, Nexus Technologies, Inc. kharris(a)nexus-tech.net + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <malloc.h> +#include <asm/arch/ixp425.h> +#include <asm/io.h> + +#include <miiphy.h> + +#include "actux3_hw.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_init (void) +{ + gd->bd->bi_arch_number = MACH_TYPE_ACTUX3; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = 0x00000100; + + GPIO_OUTPUT_ENABLE (CFG_GPIO_IORST); + GPIO_OUTPUT_ENABLE (CFG_GPIO_ETHRST); + GPIO_OUTPUT_ENABLE (CFG_GPIO_DSR); + GPIO_OUTPUT_ENABLE (CFG_GPIO_DCD); + GPIO_OUTPUT_ENABLE (CFG_GPIO_LED5_GN); + GPIO_OUTPUT_ENABLE (CFG_GPIO_LED6_RT); + GPIO_OUTPUT_ENABLE (CFG_GPIO_LED6_GN); + + GPIO_OUTPUT_CLEAR (CFG_GPIO_IORST); + GPIO_OUTPUT_CLEAR (CFG_GPIO_ETHRST); + + GPIO_OUTPUT_CLEAR (CFG_GPIO_DSR); + GPIO_OUTPUT_SET (CFG_GPIO_DCD); + + GPIO_OUTPUT_CLEAR (CFG_GPIO_LED5_GN); + GPIO_OUTPUT_CLEAR (CFG_GPIO_LED6_RT); + GPIO_OUTPUT_CLEAR (CFG_GPIO_LED6_GN); + + /* + * Setup GPIO's for Interrupt inputs + */ + GPIO_OUTPUT_DISABLE (CFG_GPIO_DBGINT); + GPIO_OUTPUT_DISABLE (CFG_GPIO_ETHINT); + + /* + * Setup GPIO's for 33MHz clock output + */ + GPIO_OUTPUT_ENABLE (CFG_GPIO_PCI_CLK); + GPIO_OUTPUT_ENABLE (CFG_GPIO_EXTBUS_CLK); + *IXP425_GPIO_GPCLKR = 0x011001FF; + + /* CS1: IPAC-X */ + *IXP425_EXP_CS1 = 0x94d10013; + /* CS5: Debug port */ + *IXP425_EXP_CS5 = 0x9d520003; + /* CS6: Release/Option register */ + *IXP425_EXP_CS6 = 0x81860001; + /* CS7: LEDs */ + *IXP425_EXP_CS7 = 0x80900003; + + udelay (533); + GPIO_OUTPUT_SET (CFG_GPIO_IORST); + GPIO_OUTPUT_SET (CFG_GPIO_ETHRST); + + ACTUX3_LED1_RT (1); + ACTUX3_LED1_GN (0); + ACTUX3_LED2_RT (0); + ACTUX3_LED2_GN (0); + ACTUX3_LED3_RT (0); + ACTUX3_LED3_GN (0); + ACTUX3_LED4_GN (0); + ACTUX3_LED5_RT (0); + + return 0; +} + +/* + * Check Board Identity + */ +int checkboard (void) +{ + char revision; + char *s = getenv ("serial#"); + + puts ("Board: AcTux-3 rev."); + putc (ACTUX3_BOARDREL + 'A' - 1); + + if (s != NULL) { + puts (", serial# "); + puts (s); + } + putc ('\n'); + + return (0); +} + +/************************************************************************* + * get_board_rev() - setup to pass kernel board revision information + * 0 = reserved + * 1 = Rev. A + * 2 = Rev. B + *************************************************************************/ +u32 get_board_rev (void) +{ + return ACTUX3_BOARDREL; +} + +int dram_init (void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return (0); +} + +void reset_phy (void) +{ + int i; + + /* initialize the PHY */ + miiphy_reset ("NPE0", CONFIG_PHY_ADDR); + + /* all LED outputs = Link/Act */ + miiphy_write ("NPE0", CONFIG_PHY_ADDR, 0x16, 0x0AAA); + + /* set all ethernet switch ports to forwarding state */ + for (i = 1; i <= 5; i++) + miiphy_write ("NPE0", CONFIG_PHY_ADDR + 8 + i, 0x04, 0x03); + +} diff --git a/board/actux3/actux3_hw.h b/board/actux3/actux3_hw.h new file mode 100644 index 0000000..a4f0685 --- /dev/null +++ b/board/actux3/actux3_hw.h @@ -0,0 +1,60 @@ +/* + * (C) Copyright 2007 + * Michael Schwingen, michael(a)schwingen.org + * + * hardware register definitions for the AcTux-1 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ACTUX3_HW_H +#define _ACTUX3_HW_H + +/* 0 = LED off,1 = ON */ +#define ACTUX3_LED1_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 0) +#define ACTUX3_LED1_GN(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 1) +#define ACTUX3_LED2_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 2) +#define ACTUX3_LED2_GN(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 3) +#define ACTUX3_LED3_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 4) +#define ACTUX3_LED3_GN(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 5) +#define ACTUX3_LED4_GN(a) writeb((a)^1, IXP425_EXP_BUS_CS7_BASE_PHYS + 6) +#define ACTUX3_LED5_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 7) + +#define ACTUX3_DBG_PORT IXP425_EXP_BUS_CS5_BASE_PHYS +#define ACTUX3_BOARDREL (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0x0F) +#define ACTUX3_OPTION (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0xF0) + +/* GPIO settings */ +#define CFG_GPIO_DBGINT 0 +#define CFG_GPIO_ETHINT 1 +#define CFG_GPIO_ETHRST 2 /* Out */ +#define CFG_GPIO_LED5_GN 3 /* Out */ +#define CFG_GPIO_LED6_RT 4 /* Out */ +#define CFG_GPIO_LED6_GN 5 /* Out */ +#define CFG_GPIO_DSR 6 /* Out */ +#define CFG_GPIO_DCD 7 /* Out */ +#define CFG_GPIO_DBGJUMPER 9 +#define CFG_GPIO_BUTTON1 10 +#define CFG_GPIO_DBGSENSE 11 +#define CFG_GPIO_DTR 12 +#define CFG_GPIO_IORST 13 /* Out */ +#define CFG_GPIO_PCI_CLK 14 /* Out */ +#define CFG_GPIO_EXTBUS_CLK 15 /* Out */ + +#endif diff --git a/board/actux3/config.mk b/board/actux3/config.mk new file mode 100644 index 0000000..9a634cd --- /dev/null +++ b/board/actux3/config.mk @@ -0,0 +1,4 @@ +TEXT_BASE = 0x00e00000 + +# include NPE ethernet driver +BOARDLIBS = cpu/ixp/npe/libnpe.a diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds new file mode 100644 index 0000000..b9a9eb9 --- /dev/null +++ b/board/actux3/u-boot.lds @@ -0,0 +1,74 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm") +OUTPUT_ARCH (arm) +ENTRY (_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN (4); + .text : { + cpu/ixp/start.o (.text) + lib_generic/string.o (.text) + lib_generic/vsprintf.o (.text) + lib_arm/board.o (.text) + common/dlmalloc.o (.text) + cpu/ixp/cpu.o (.text) + + . = env_offset; + common/environment.o (.ppcenv) + + * (.text) + } + + . = ALIGN (4); + .rodata : { + *(.rodata) + } + + . = ALIGN (4); + .data : { + *(.data) + } + + . = ALIGN (4); + .got : { + *(.got) + } + + . =.; + __u_boot_cmd_start =.; + .u_boot_cmd : { + *(.u_boot_cmd) + } + __u_boot_cmd_end =.; + + . = ALIGN (4); + __bss_start =.; + .bss (NOLOAD): { + *(.bss) + } + _end =.; +} diff --git a/include/configs/actux3.h b/include/configs/actux3.h new file mode 100644 index 0000000..5e468e6 --- /dev/null +++ b/include/configs/actux3.h @@ -0,0 +1,224 @@ +/* + * (C) Copyright 2007 + * Michael Schwingen, michael(a)schwingen.org + * + * Configuration settings for the AcTux-3 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_IXP425 1 +#define CONFIG_ACTUX3 1 + +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + +#define CFG_IXP425_CONSOLE IXP425_UART2 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTDELAY 3 +#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ + +/*************************************************************** + * U-boot generic defines start here. + ***************************************************************/ +#undef CONFIG_USE_IRQ + +/* Size of malloc() pool */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +/* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_SIZE 128 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Command line configuration. */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ELF + +#define CONFIG_BOOTCOMMAND "run boot_flash" +/* enable passing of ATAGs */ +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#define CONFIG_REVISION_TAG 1 + +#if defined(CONFIG_CMD_KGDB) +# define CONFIG_KGDB_BAUDRATE 230400 +/* which serial port to use */ +# define CONFIG_KGDB_SER_INDEX 1 +#endif + +/* Miscellaneous configurable options */ +#define CFG_LONGHELP +#define CFG_PROMPT "=> " +/* Console I/O Buffer Size */ +#define CFG_CBSIZE 256 +/* Print Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) +/* max number of command args */ +#define CFG_MAXARGS 16 +/* Boot Argument Buffer Size */ +#define CFG_BARGSIZE CFG_CBSIZE + +#define CFG_MEMTEST_START 0x00400000 +#define CFG_MEMTEST_END 0x00800000 + +/* everything, incl board info, in Hz */ +#undef CFG_CLKS_IN_HZ +/* spec says 66.666 MHz, but it appears to be 33 */ +#define CFG_HZ 3333333 + +/* default load address */ +#define CFG_LOAD_ADDR 0x00010000 + +/* valid baudrates */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ + 115200, 230400 } +#define CONFIG_SERIAL_RTS_ACTIVE 1 + +/* + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +# define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +# define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/* Expansion bus settings */ +#define CFG_EXP_CS0 0xbd113442 + +/* SDRAM settings */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 0x00000000 +#define CFG_DRAM_BASE 0x00000000 + +/* 16MB SDRAM */ +#define CFG_SDR_CONFIG 0x3A +#define PHYS_SDRAM_1_SIZE 0x01000000 +#define CFG_SDRAM_REFRESH_CNT 0x81a +#define CFG_SDR_MODE_CONFIG 0x1 +#define CFG_DRAM_SIZE 0x01000000 + +/* FLASH organization */ +#define CFG_MAX_FLASH_BANKS 1 +/* max number of sectors on one chip */ +#define CFG_MAX_FLASH_SECT 140 +#define PHYS_FLASH_1 0x50000000 +#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 } + +#define CFG_FLASH_BASE PHYS_FLASH_1 +#define CFG_MONITOR_BASE PHYS_FLASH_1 +#define CFG_MONITOR_LEN (256 << 10) + +/* Use common CFI driver */ +#define CFG_FLASH_CFI +#define CFG_FLASH_CFI_DRIVER +/* no byte writes on IXP4xx */ +#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT + +/* print 'E' for empty sector on flinfo */ +#define CFG_FLASH_EMPTY_INFO + +/* Ethernet */ + +/* include IXP4xx NPE support */ +#define CONFIG_IXP4XX_NPE 1 +/* use separate flash sector with ucode images */ +#define CONFIG_IXP4XX_NPE_EXT_UCODE_BASE 0x50040000 + +#define CONFIG_NET_MULTI 1 +/* NPE0 PHY address */ +#define CONFIG_PHY_ADDR 0x10 +/* MII PHY management */ +#define CONFIG_MII 1 +/* Number of ethernet rx buffers & descriptors */ +#define CFG_RX_ETH_BUFFER 16 +#define CONFIG_RESET_PHY_R 1 +/* ethernet switch connected to MII port */ +#define CONFIG_MII_ETHSWITCH 1 + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NET +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#undef CONFIG_CMD_NFS + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* Cache Configuration */ +#define CFG_CACHELINE_SIZE 32 + +/* + * environment organization: + * one flash sector, embedded in uboot area (bottom bootblock flash) + */ +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 0x2000 +#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x4000) +#define CFG_USE_PPCENV 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \ + "kerneladdr=50050000\0" \ + "rootaddr=50170000\0" \ + "loadaddr=10000\0" \ + "updateboot_ser=mw.b 10000 ff 40000;" \ + " loady ${loadaddr};" \ + " run eraseboot writeboot\0" \ + "updateboot_net=mw.b 10000 ff 40000;" \ + " tftp ${loadaddr} u-boot.bin;" \ + " run eraseboot writeboot\0" \ + "eraseboot=protect off 50000000 50003fff;" \ + " protect off 50006000 5003ffff;" \ + " erase 50000000 50003fff;" \ + " erase 50006000 5003ffff\0" \ + "writeboot=cp.b 10000 50000000 4000;" \ + " cp.b 16000 50006000 3a000\0" \ + "eraseenv=protect off 50004000 50005fff;" \ + " erase 50004000 50005fff\0" \ + "updateroot=tftp ${loadaddr} ${rootfile};" \ + " era ${rootaddr} +${filesize};" \ + " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ + "updatekern=tftp ${loadaddr} ${kernelfile};" \ + " era ${kerneladdr} +${filesize};" \ + " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ + "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ + " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ + "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ + " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ + "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ + "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ + "boot_flash=run flashargs addtty addeth;" \ + " bootm ${kerneladdr}\0" \ + "boot_net=run netargs addtty addeth;" \ + " tftpboot ${loadaddr} ${kernelfile};" \ + " bootm\0" + +#endif /* __CONFIG_H */

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[U-Boot-Users] [PATCH v2] FSL: Convert board/freescale/common/Makefile to use CONFIG_
by Jon Loeliger 16 Jan '08

16 Jan '08

Subject: [PATCH] FSL: Convert board/freescale/common/Makefile to use CONFIG_ Convert the board/freescale/common/Makefile to use CONFIG_* options to select which files to conditionally compile into the board/freescale/common library rather than conditionally compiling entire files. Now handles:: CONFIG_FSL_PIXIS CONFIG_FSL_DIU_FB CONFIG_PQ_MDS_PIB CONFIG_ID_EEPROM is introduced until CFG_ID_EEPROM is gone. Signed-off-by: Jon Loeliger <jdl(a)freescale.com> --- Diffs to v1: Incorporate pq-mds-pib.c into the mix. Just use COBJS-y. board/freescale/common/Makefile | 15 +++++++-------- board/freescale/common/fsl_diu_fb.c | 3 --- board/freescale/common/pixis.c | 4 +--- board/freescale/common/pq-mds-pib.c | 3 --- board/freescale/common/sys_eeprom.c | 2 -- board/freescale/mpc8610hpcd/Makefile | 12 ++++++------ include/configs/MPC8610HPCD.h | 3 +++ include/configs/MPC8641HPCN.h | 3 +++ 8 files changed, 20 insertions(+), 25 deletions(-) diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 9cee9f1..6665e7f 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -29,14 +29,13 @@ endif LIB = $(obj)lib$(VENDOR).a -COBJS := sys_eeprom.o \ - pixis.o \ - pq-mds-pib.o \ - fsl_logo_bmp.o \ - fsl_diu_fb.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) +COBJS-${CONFIG_PQ_MDS_PIB} += pq-mds-pib.o +COBJS-${CONFIG_ID_EEPROM} += sys_eeprom.o +COBJS-${CONFIG_FSL_DIU_FB} += fsl_diu_fb.o fsl_logo_bmp.o +COBJS-${CONFIG_FSL_PIXIS} += pixis.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS)) $(LIB): $(obj).depend $(OBJS) diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c index 5a8576e..2336f6b 100644 --- a/board/freescale/common/fsl_diu_fb.c +++ b/board/freescale/common/fsl_diu_fb.c @@ -27,8 +27,6 @@ #include <i2c.h> #include <malloc.h> -#ifdef CONFIG_FSL_DIU_FB - #include "fsl_diu_fb.h" #ifdef DEBUG @@ -615,4 +613,3 @@ void fsl_diu_clear_screen(void) memset(info->screen_base, 0, info->smem_len); } -#endif /* CONFIG_FSL_DIU_FB */ diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index 45dcf4d..00eb4a0 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -25,9 +25,8 @@ #include <common.h> #include <command.h> #include <watchdog.h> - -#ifdef CONFIG_FSL_PIXIS #include <asm/cache.h> + #include "pixis.h" @@ -474,4 +473,3 @@ U_BOOT_CMD( " pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n" " pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n" ); -#endif /* CONFIG_FSL_PIXIS */ diff --git a/board/freescale/common/pq-mds-pib.c b/board/freescale/common/pq-mds-pib.c index e4f96e8..6c72aa1 100644 --- a/board/freescale/common/pq-mds-pib.c +++ b/board/freescale/common/pq-mds-pib.c @@ -12,8 +12,6 @@ #include <i2c.h> #include <asm/io.h> -#ifdef CONFIG_PQ_MDS_PIB - #include "pq-mds-pib.h" int pib_init(void) @@ -102,4 +100,3 @@ int pib_init(void) i2c_set_bus_num(orig_i2c_bus); return 0; } -#endif /* CONFIG_PQ_MDS_PIB */ diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 7bc663b..bb91e67 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -27,7 +27,6 @@ #include <i2c.h> #include <linux/ctype.h> -#ifdef CFG_ID_EEPROM typedef struct { unsigned char id[4]; /* 0x0000 - 0x0003 */ unsigned char sn[12]; /* 0x0004 - 0x000F */ @@ -253,4 +252,3 @@ int mac_read_from_eeprom(void) } return 0; } -#endif /* CFG_ID_EEPROM */ diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile index 76087c1..12a92ae 100644 --- a/board/freescale/mpc8610hpcd/Makefile +++ b/board/freescale/mpc8610hpcd/Makefile @@ -27,14 +27,14 @@ endif LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o \ - ../common/sys_eeprom.o \ - ../common/pixis.o \ - mpc8610hpcd_diu.o \ - ../common/fsl_diu_fb.o - SOBJS := init.o +COBJS := $(BOARD).o + +COBJS-${CONFIG_FSL_DIU_FB} += mpc8610hpcd_diu.o + +COBJS += ${COBJS-y} + SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index f77c29d..ac4b3e1 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -141,6 +141,9 @@ #endif #define CFG_ID_EEPROM +#ifdef CFG_ID_EEPROM +#define CONFIG_ID_EEPROM +#endif #define ID_EEPROM_ADDR 0x57 diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 7f485c6..ab875f0 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -152,6 +152,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #endif #define CFG_ID_EEPROM 1 +#ifdef CFG_ID_EEPROM +#define CONFIG_ID_EEPROM +#endif #define ID_EEPROM_ADDR 0x57 /* -- 1.5.2.1.126.g6abd0

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[U-Boot-Users] [PATCH] TSEC driver: Change MDIO support to allow access to any PHYs on the MDIO bus
by michael.firth＠bt.com 16 Jan '08

16 Jan '08

The current TSEC driver limits MDIO access to the devices that have been configured as attached to a TSEC MAC. This patch allows access to any PHY device on the MDIO bus through the 'mii' commands. Signed-off-by: Michael Firth <michael.firth(a)bt.com> diff -urN u-boot-1.3.1-orig/drivers/net/tsec.c u-boot-1.3.1/drivers/net/tsec.c --- u-boot-1.3.1-orig/drivers/net/tsec.c 2007-12-06 09:21:19.000000000 +0000 +++ u-boot-1.3.1/drivers/net/tsec.c 2008-01-09 20:19:36.000000000 +0000 @@ -241,10 +244,9 @@ * It will wait for the write to be done (or for a timeout to * expire) before exiting */ -void write_phy_reg(struct tsec_private *priv, uint regnum, uint value) +void write_any_phy_reg(struct tsec_private *priv, uint phyid, uint regnum, uint value) { volatile tsec_t *regbase = priv->phyregs; - uint phyid = priv->phyaddr; int timeout = 1000000; regbase->miimadd = (phyid << 8) | regnum; @@ -255,17 +257,19 @@ while ((regbase->miimind & MIIMIND_BUSY) && timeout--) ; } +/* #define to provide old write_phy_reg functionality without duplicating code */ +#define write_phy_reg(priv, regnum, value) write_any_phy_reg(priv,priv->phyaddr,regnum,value) + /* Reads register regnum on the device's PHY through the * registers specified in priv. It lowers and raises the read * command, and waits for the data to become valid (miimind * notvalid bit cleared), and the bus to cease activity (miimind * busy bit cleared), and then returns the value */ -uint read_phy_reg(struct tsec_private *priv, uint regnum) +uint read_any_phy_reg(struct tsec_private *priv, uint phyid, uint regnum) { uint value; volatile tsec_t *regbase = priv->phyregs; - uint phyid = priv->phyaddr; /* Put the address of the phy, and the register * number into MIIMADD */ @@ -288,6 +292,9 @@ return value; } +/* #define to provide old read_phy_reg functionality without duplicating code */ +#define read_phy_reg(priv,regnum) read_any_phy_reg(priv,priv->phyaddr,regnum) + /* Discover which PHY is attached to the device, and configure it * properly. If the PHY is not recognized, then return 0 * (failure). Otherwise, return 1 @@ -1487,18 +1494,6 @@ #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \ && !defined(BITBANGMII) -struct tsec_private *get_priv_for_phy(unsigned char phyaddr) -{ - int i; - - for (i = 0; i < MAXCONTROLLERS; i++) { - if (privlist[i]->phyaddr == phyaddr) - return privlist[i]; - } - - return NULL; -} - /* * Read a MII PHY register. * @@ -1509,14 +1504,14 @@ unsigned char reg, unsigned short *value) { unsigned short ret; - struct tsec_private *priv = get_priv_for_phy(addr); + struct tsec_private *priv = privlist[0]; if (NULL == priv) { printf("Can't read PHY at address %d\n", addr); return -1; } - ret = (unsigned short)read_phy_reg(priv, reg); + ret = (unsigned short)read_any_phy_reg(priv, addr, reg); *value = ret; return 0; @@ -1531,14 +1526,14 @@ static int tsec_miiphy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value) { - struct tsec_private *priv = get_priv_for_phy(addr); + struct tsec_private *priv = privlist[0]; if (NULL == priv) { printf("Can't write PHY at address %d\n", addr); return -1; } - write_phy_reg(priv, reg, value); + write_any_phy_reg(priv, addr, reg, value); return 0; }

2 1

[U-Boot-Users] [PATCH] QE IO: Add initial data to pin configuration + read/write functions
by David Saada 16 Jan '08

16 Jan '08

Description: On the MPC83xx & MPC85xx architectures that have QE, add initial data to the pin configuration table (qe_iop_conf_tab). Note that this is not mandatory - boards that don't add this field can remain unchanged (as it's the last one). In addition, add IO pin read & write functions. Signed-off-by: David Saada <david.saada(a)ecitele.com> > diff -purN include/ioports.h.orig include/ioports.h --- include/ioports.h.orig 2008-01-02 13:39:04.000000000 +0200 +++ include/ioports.h 2008-01-06 10:20:40.342453000 +0200 @@ -60,6 +60,7 @@ typedef struct { int dir; int open_drain; int assign; + int data; } qe_iop_conf_t; #define QE_IOP_TAB_END (-1) > diff -purN cpu/mpc85xx/cpu_init.c.orig cpu/mpc85xx/cpu_init.c --- cpu/mpc85xx/cpu_init.c.orig 2008-01-02 13:39:04.000000000 +0200 +++ cpu/mpc85xx/cpu_init.c 2008-01-06 10:27:18.963593000 +0200 @@ -37,14 +37,14 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_QE extern qe_iop_conf_t qe_iop_conf_tab[]; extern void qe_config_iopin(u8 port, u8 pin, int dir, - int open_drain, int assign); + int open_drain, int assign, int data); extern void qe_init(uint qe_base); extern void qe_reset(void); static void config_qe_ioports(void) { u8 port, pin; - int dir, open_drain, assign; + int dir, open_drain, assign, data; int i; for (i = 0; qe_iop_conf_tab[i].assign != QE_IOP_TAB_END; i++) { @@ -53,7 +53,8 @@ static void config_qe_ioports(void) dir = qe_iop_conf_tab[i].dir; open_drain = qe_iop_conf_tab[i].open_drain; assign = qe_iop_conf_tab[i].assign; - qe_config_iopin(port, pin, dir, open_drain, assign); + data = qe_iop_conf_tab[i].data; + qe_config_iopin(port, pin, dir, open_drain, assign, data); } } #endif > diff -purN cpu/mpc85xx/qe_io.c.orig cpu/mpc85xx/qe_io.c --- cpu/mpc85xx/qe_io.c.orig 2008-01-02 13:39:04.000000000 +0200 +++ cpu/mpc85xx/qe_io.c 2008-01-06 10:54:24.201604000 +0200 @@ -27,7 +27,7 @@ #if defined(CONFIG_QE) #define NUM_OF_PINS 32 -void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign) +void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign, int data) { u32 pin_2bit_mask; u32 pin_2bit_dir; @@ -38,6 +38,16 @@ void qe_config_iopin(u8 port, u8 pin, in volatile par_io_t *par_io = (volatile par_io_t *) &(gur->qe_par_io); + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Setup the data */ + tmp_val = in_be32(&par_io[port].cpdat); + if (data) + out_be32(&par_io[port].cpdat, pin_1bit_mask | tmp_val); + else + out_be32(&par_io[port].cpdat, ~pin_1bit_mask & tmp_val); + /* Caculate pin location and 2bit mask and dir */ pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); pin_2bit_dir = (u32)(dir << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); @@ -55,9 +65,6 @@ void qe_config_iopin(u8 port, u8 pin, in out_be32(&par_io[port].cpdir1, pin_2bit_dir | tmp_val); } - /* Calculate pin location for 1bit mask */ - pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); - /* Setup the open drain */ tmp_val = in_be32(&par_io[port].cpodr); if (open_drain) @@ -82,4 +89,39 @@ void qe_config_iopin(u8 port, u8 pin, in } } +void qe_read_iopin(u8 port, u8 pin, int *data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + volatile par_io_t *par_io = (volatile par_io_t *) + &(gur->qe_par_io); + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Read the data */ + tmp_val = in_be32(&par_io[port].cpdat); + *data = (tmp_val >> (NUM_OF_PINS - (pin+1))) & 0x1; +} + +void qe_write_iopin(u8 port, u8 pin, int data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + volatile par_io_t *par_io = (volatile par_io_t *) + &(gur->qe_par_io); + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Write the data */ + tmp_val = in_be32(&par_io[port].cpdat); + if (data) + out_be32(&par_io[port].cpdat, pin_1bit_mask | tmp_val); + else + out_be32(&par_io[port].cpdat, ~pin_1bit_mask & tmp_val); +} + #endif /* CONFIG_QE */ > diff -purN cpu/mpc83xx/cpu_init.c.orig cpu/mpc83xx/cpu_init.c --- cpu/mpc83xx/cpu_init.c.orig 2008-01-02 13:39:04.000000000 +0200 +++ cpu/mpc83xx/cpu_init.c 2008-01-06 10:59:54.006108000 +0200 @@ -29,14 +29,14 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_QE extern qe_iop_conf_t qe_iop_conf_tab[]; extern void qe_config_iopin(u8 port, u8 pin, int dir, - int open_drain, int assign); + int open_drain, int assign, int data); extern void qe_init(uint qe_base); extern void qe_reset(void); static void config_qe_ioports(void) { u8 port, pin; - int dir, open_drain, assign; + int dir, open_drain, assign, data; int i; for (i = 0; qe_iop_conf_tab[i].assign != QE_IOP_TAB_END; i++) { @@ -45,7 +45,8 @@ static void config_qe_ioports(void) dir = qe_iop_conf_tab[i].dir; open_drain = qe_iop_conf_tab[i].open_drain; assign = qe_iop_conf_tab[i].assign; - qe_config_iopin(port, pin, dir, open_drain, assign); + data = qe_iop_conf_tab[i].data; + qe_config_iopin(port, pin, dir, open_drain, assign, data); } } #endif > diff -purN cpu/mpc83xx/qe_io.c.orig cpu/mpc83xx/qe_io.c --- cpu/mpc83xx/qe_io.c.orig 2008-01-02 13:39:04.000000000 +0200 +++ cpu/mpc83xx/qe_io.c 2008-01-06 10:59:54.410427000 +0200 @@ -27,7 +27,7 @@ #if defined(CONFIG_QE) #define NUM_OF_PINS 32 -void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign) +void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign, int data) { u32 pin_2bit_mask; u32 pin_2bit_dir; @@ -37,6 +37,17 @@ void qe_config_iopin(u8 port, u8 pin, in volatile immap_t *im = (volatile immap_t *)CFG_IMMR; volatile qepio83xx_t *par_io = (volatile qepio83xx_t *)&im->qepio; + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Setup the data */ + tmp_val = in_be32(&par_io->ioport[port].pdat); + if (data) { + out_be32(&par_io->ioport[port].pdat, pin_1bit_mask | tmp_val); + } else { + out_be32(&par_io->ioport[port].pdat, ~pin_1bit_mask & tmp_val); + } + /* Caculate pin location and 2bit mask and dir */ pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); pin_2bit_dir = (u32)(dir << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); @@ -54,9 +65,6 @@ void qe_config_iopin(u8 port, u8 pin, in out_be32(&par_io->ioport[port].dir1, pin_2bit_dir | tmp_val); } - /* Calculate pin location for 1bit mask */ - pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); - /* Setup the open drain */ tmp_val = in_be32(&par_io->ioport[port].podr); if (open_drain) { @@ -82,4 +90,38 @@ void qe_config_iopin(u8 port, u8 pin, in } } +void qe_read_iopin(u8 port, u8 pin, int *data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + volatile qepio83xx_t *par_io = (volatile qepio83xx_t *)&im->qepio; + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Read the data */ + tmp_val = in_be32(&par_io->ioport[port].pdat); + *data = (tmp_val >> (NUM_OF_PINS - (pin+1))) & 0x1; +} + +void qe_write_iopin(u8 port, u8 pin, int data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + volatile qepio83xx_t *par_io = (volatile qepio83xx_t *)&im->qepio; + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Setup the data */ + tmp_val = in_be32(&par_io->ioport[port].pdat); + if (data) { + out_be32(&par_io->ioport[port].pdat, pin_1bit_mask | tmp_val); + } else { + out_be32(&par_io->ioport[port].pdat, ~pin_1bit_mask & tmp_val); + } +} + #endif /* CONFIG_QE */

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[U-Boot-Users] [PATCH] FSL: Convert board/freescale/common/Makefile to use CONFIG_
by Jon Loeliger 16 Jan '08

16 Jan '08

Convert the board/freescale/common/Makefile to use CONFIG_* options to select which files to conditionally compile into the board/freescale/common library rather than conditionally compiling entire files. Supports CONFIG_FSL_PIXIS and CONFIG_FSL_DIU_FB. CONFIG_ID_EEPROM is introduced until CFG_ID_EEPROM is gone. Signed-off-by: Jon Loeliger <jdl(a)freescale.com> --- board/freescale/common/Makefile | 12 +++++++----- board/freescale/common/fsl_diu_fb.c | 3 --- board/freescale/common/pixis.c | 4 +--- board/freescale/common/sys_eeprom.c | 2 -- board/freescale/mpc8610hpcd/Makefile | 12 ++++++------ include/configs/MPC8610HPCD.h | 3 +++ include/configs/MPC8641HPCN.h | 3 +++ 7 files changed, 20 insertions(+), 19 deletions(-) diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 9cee9f1..a060957 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -29,11 +29,13 @@ endif LIB = $(obj)lib$(VENDOR).a -COBJS := sys_eeprom.o \ - pixis.o \ - pq-mds-pib.o \ - fsl_logo_bmp.o \ - fsl_diu_fb.o +COBJS := pq-mds-pib.o + +COBJS-${CONFIG_ID_EEPROM} += sys_eeprom.o +COBJS-${CONFIG_FSL_DIU_FB} += fsl_diu_fb.o fsl_logo_bmp.o +COBJS-${CONFIG_FSL_PIXIS} += pixis.o + +COBJS += ${COBJS-y} SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c index 5a8576e..2336f6b 100644 --- a/board/freescale/common/fsl_diu_fb.c +++ b/board/freescale/common/fsl_diu_fb.c @@ -27,8 +27,6 @@ #include <i2c.h> #include <malloc.h> -#ifdef CONFIG_FSL_DIU_FB - #include "fsl_diu_fb.h" #ifdef DEBUG @@ -615,4 +613,3 @@ void fsl_diu_clear_screen(void) memset(info->screen_base, 0, info->smem_len); } -#endif /* CONFIG_FSL_DIU_FB */ diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index 45dcf4d..00eb4a0 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -25,9 +25,8 @@ #include <common.h> #include <command.h> #include <watchdog.h> - -#ifdef CONFIG_FSL_PIXIS #include <asm/cache.h> + #include "pixis.h" @@ -474,4 +473,3 @@ U_BOOT_CMD( " pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n" " pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n" ); -#endif /* CONFIG_FSL_PIXIS */ diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 7bc663b..bb91e67 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -27,7 +27,6 @@ #include <i2c.h> #include <linux/ctype.h> -#ifdef CFG_ID_EEPROM typedef struct { unsigned char id[4]; /* 0x0000 - 0x0003 */ unsigned char sn[12]; /* 0x0004 - 0x000F */ @@ -253,4 +252,3 @@ int mac_read_from_eeprom(void) } return 0; } -#endif /* CFG_ID_EEPROM */ diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile index 76087c1..12a92ae 100644 --- a/board/freescale/mpc8610hpcd/Makefile +++ b/board/freescale/mpc8610hpcd/Makefile @@ -27,14 +27,14 @@ endif LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o \ - ../common/sys_eeprom.o \ - ../common/pixis.o \ - mpc8610hpcd_diu.o \ - ../common/fsl_diu_fb.o - SOBJS := init.o +COBJS := $(BOARD).o + +COBJS-${CONFIG_FSL_DIU_FB} += mpc8610hpcd_diu.o + +COBJS += ${COBJS-y} + SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index f77c29d..ac4b3e1 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -141,6 +141,9 @@ #endif #define CFG_ID_EEPROM +#ifdef CFG_ID_EEPROM +#define CONFIG_ID_EEPROM +#endif #define ID_EEPROM_ADDR 0x57 diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 7f485c6..ab875f0 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -152,6 +152,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #endif #define CFG_ID_EEPROM 1 +#ifdef CFG_ID_EEPROM +#define CONFIG_ID_EEPROM +#endif #define ID_EEPROM_ADDR 0x57 /* -- 1.5.2.1.126.g6abd0

3 6

[U-Boot-Users] [PATCH] 85xx: Use proper defines for PCI addresses
by Kumar Gala 16 Jan '08

16 Jan '08

We should be using the _MEM_PHYS for LAW and TLB setup and not _MEM_BASE. While _MEM_BASE & _MEM_PHYS are normally the same, _MEM_BASE should only be used for configuring the PCI ATMU. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- board/freescale/mpc8540ads/init.S | 8 ++++---- board/freescale/mpc8540ads/law.c | 2 +- board/freescale/mpc8541cds/init.S | 16 ++++++++-------- board/freescale/mpc8541cds/law.c | 4 ++-- board/freescale/mpc8548cds/law.c | 4 ++-- board/freescale/mpc8555cds/init.S | 16 ++++++++-------- board/freescale/mpc8555cds/law.c | 4 ++-- board/freescale/mpc8560ads/init.S | 8 ++++---- board/freescale/mpc8560ads/law.c | 2 +- board/freescale/mpc8568mds/init.S | 4 ++-- board/freescale/mpc8568mds/law.c | 4 ++-- board/mpc8540eval/init.S | 4 ++-- board/mpc8540eval/law.c | 2 +- board/pm854/init.S | 8 ++++---- board/pm854/law.c | 2 +- board/pm856/init.S | 8 ++++---- board/pm856/law.c | 2 +- board/sbc8548/init.S | 8 ++++---- board/sbc8548/law.c | 2 +- board/sbc8560/init.S | 4 ++-- board/sbc8560/law.c | 2 +- board/stxgp3/init.S | 8 ++++---- board/stxgp3/law.c | 2 +- board/stxssa/init.S | 16 ++++++++-------- board/stxssa/law.c | 4 ++-- board/tqm85xx/init.S | 8 ++++---- board/tqm85xx/law.c | 2 +- 27 files changed, 77 insertions(+), 77 deletions(-) diff --git a/board/freescale/mpc8540ads/init.S b/board/freescale/mpc8540ads/init.S index c495f1e..4c8dd0e 100644 --- a/board/freescale/mpc8540ads/init.S +++ b/board/freescale/mpc8540ads/init.S @@ -130,8 +130,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 1, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 2: 256M Non-cacheable, guarded @@ -139,8 +139,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 2, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 3: 256M Non-cacheable, guarded diff --git a/board/freescale/mpc8540ads/law.c b/board/freescale/mpc8540ads/law.c index ab6a6f2..785576a 100644 --- a/board/freescale/mpc8540ads/law.c +++ b/board/freescale/mpc8540ads/law.c @@ -48,7 +48,7 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), /* This is not so much the SDRAM map as it is the whole localbus map. */ SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), diff --git a/board/freescale/mpc8541cds/init.S b/board/freescale/mpc8541cds/init.S index 563ea2d..6e93fb0 100644 --- a/board/freescale/mpc8541cds/init.S +++ b/board/freescale/mpc8541cds/init.S @@ -130,8 +130,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 1, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 2: 256M Non-cacheable, guarded @@ -139,8 +139,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 2, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 3: 256M Non-cacheable, guarded @@ -148,8 +148,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 3, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 4: 256M Non-cacheable, guarded @@ -157,8 +157,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 4, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 5: 64M Non-cacheable, guarded diff --git a/board/freescale/mpc8541cds/law.c b/board/freescale/mpc8541cds/law.c index a8aa4db..0ac223c 100644 --- a/board/freescale/mpc8541cds/law.c +++ b/board/freescale/mpc8541cds/law.c @@ -47,8 +47,8 @@ */ struct law_entry law_table[] = { - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(3, CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ diff --git a/board/freescale/mpc8548cds/law.c b/board/freescale/mpc8548cds/law.c index 6920863..0ee53e2 100644 --- a/board/freescale/mpc8548cds/law.c +++ b/board/freescale/mpc8548cds/law.c @@ -52,11 +52,11 @@ struct law_entry law_table[] = { #ifdef CFG_PCI1_MEM_PHYS - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), SET_LAW_ENTRY(3, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), #endif #ifdef CFG_PCI2_MEM_PHYS - SET_LAW_ENTRY(4, CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW_ENTRY(4, CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), #endif #ifdef CFG_PCIE1_MEM_PHYS diff --git a/board/freescale/mpc8555cds/init.S b/board/freescale/mpc8555cds/init.S index 563ea2d..6e93fb0 100644 --- a/board/freescale/mpc8555cds/init.S +++ b/board/freescale/mpc8555cds/init.S @@ -130,8 +130,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 1, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 2: 256M Non-cacheable, guarded @@ -139,8 +139,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 2, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 3: 256M Non-cacheable, guarded @@ -148,8 +148,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 3, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 4: 256M Non-cacheable, guarded @@ -157,8 +157,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 4, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 5: 64M Non-cacheable, guarded diff --git a/board/freescale/mpc8555cds/law.c b/board/freescale/mpc8555cds/law.c index a8aa4db..0ac223c 100644 --- a/board/freescale/mpc8555cds/law.c +++ b/board/freescale/mpc8555cds/law.c @@ -47,8 +47,8 @@ */ struct law_entry law_table[] = { - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(3, CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ diff --git a/board/freescale/mpc8560ads/init.S b/board/freescale/mpc8560ads/init.S index 151b4f6..8ade9ca 100644 --- a/board/freescale/mpc8560ads/init.S +++ b/board/freescale/mpc8560ads/init.S @@ -131,8 +131,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 1, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 2: 256M Non-cacheable, guarded @@ -140,8 +140,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 2, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 3: 256M Non-cacheable, guarded diff --git a/board/freescale/mpc8560ads/law.c b/board/freescale/mpc8560ads/law.c index ab6a6f2..785576a 100644 --- a/board/freescale/mpc8560ads/law.c +++ b/board/freescale/mpc8560ads/law.c @@ -48,7 +48,7 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), /* This is not so much the SDRAM map as it is the whole localbus map. */ SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), diff --git a/board/freescale/mpc8568mds/init.S b/board/freescale/mpc8568mds/init.S index 39819ab..c777eb1 100644 --- a/board/freescale/mpc8568mds/init.S +++ b/board/freescale/mpc8568mds/init.S @@ -140,8 +140,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 2, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1G) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLBe 3: 64M Non-cacheable, guarded diff --git a/board/freescale/mpc8568mds/law.c b/board/freescale/mpc8568mds/law.c index b35bbcd..5e96ea7 100644 --- a/board/freescale/mpc8568mds/law.c +++ b/board/freescale/mpc8568mds/law.c @@ -50,8 +50,8 @@ */ struct law_entry law_table[] = { - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_PCIE1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(3, CFG_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1), SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCI), SET_LAW_ENTRY(5, CFG_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1), SET_LAW_ENTRY(6, CFG_SRIO_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_RIO), diff --git a/board/mpc8540eval/init.S b/board/mpc8540eval/init.S index adc5115..93654a5 100644 --- a/board/mpc8540eval/init.S +++ b/board/mpc8540eval/init.S @@ -115,8 +115,8 @@ tlb1_entry: .long FSL_BOOKE_MAS0(1,8,0) .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI_MEM_BASE,(MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI_MEM_BASE,0,(MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI_MEM_PHYS,(MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI_MEM_PHYS,0,(MAS3_SX|MAS3_SW|MAS3_SR)) .long FSL_BOOKE_MAS0(1,9,0) .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_16K) diff --git a/board/mpc8540eval/law.c b/board/mpc8540eval/law.c index 4d603f0..273ec5c 100644 --- a/board/mpc8540eval/law.c +++ b/board/mpc8540eval/law.c @@ -45,7 +45,7 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(2, CFG_PCI_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI), #ifndef CONFIG_RAM_AS_FLASH SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), #endif diff --git a/board/pm854/init.S b/board/pm854/init.S index f6ea8b3..770daa0 100644 --- a/board/pm854/init.S +++ b/board/pm854/init.S @@ -131,8 +131,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 1, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 2: 256M Non-cacheable, guarded @@ -140,8 +140,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 2, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 3: 256M Non-cacheable, guarded diff --git a/board/pm854/law.c b/board/pm854/law.c index 65a4b59..cb6b37f 100644 --- a/board/pm854/law.c +++ b/board/pm854/law.c @@ -48,7 +48,7 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), /* This is not so much the SDRAM map as it is the whole localbus map. */ SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), diff --git a/board/pm856/init.S b/board/pm856/init.S index f6ea8b3..770daa0 100644 --- a/board/pm856/init.S +++ b/board/pm856/init.S @@ -131,8 +131,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 1, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 2: 256M Non-cacheable, guarded @@ -140,8 +140,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 2, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 3: 256M Non-cacheable, guarded diff --git a/board/pm856/law.c b/board/pm856/law.c index 65a4b59..cb6b37f 100644 --- a/board/pm856/law.c +++ b/board/pm856/law.c @@ -48,7 +48,7 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), /* This is not so much the SDRAM map as it is the whole localbus map. */ SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), diff --git a/board/sbc8548/init.S b/board/sbc8548/init.S index 6696dd9..162c326 100644 --- a/board/sbc8548/init.S +++ b/board/sbc8548/init.S @@ -135,8 +135,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 1, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 2: 256M Non-cacheable, guarded @@ -144,8 +144,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 2, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE + 0x10000000, 0, + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* diff --git a/board/sbc8548/law.c b/board/sbc8548/law.c index 6bf4199..d903cdc 100644 --- a/board/sbc8548/law.c +++ b/board/sbc8548/law.c @@ -48,7 +48,7 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), SET_LAW_ENTRY(3, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ SET_LAW_ENTRY(4, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), diff --git a/board/sbc8560/init.S b/board/sbc8560/init.S index e149fbd..3baa506 100644 --- a/board/sbc8560/init.S +++ b/board/sbc8560/init.S @@ -103,8 +103,8 @@ tlb1_entry: .long FSL_BOOKE_MAS0(1,7,0) .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI_MEM_BASE,(MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI_MEM_BASE,0,(MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI_MEM_PHYS,(MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI_MEM_PHYS,0,(MAS3_SX|MAS3_SW|MAS3_SR)) #if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR) .long FSL_BOOKE_MAS0(1,15,0) diff --git a/board/sbc8560/law.c b/board/sbc8560/law.c index d1c6dc2..e370853 100644 --- a/board/sbc8560/law.c +++ b/board/sbc8560/law.c @@ -53,7 +53,7 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(2, CFG_PCI_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI), SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_LBC), }; diff --git a/board/stxgp3/init.S b/board/stxgp3/init.S index 9bc8dd6..8e1f16e 100644 --- a/board/stxgp3/init.S +++ b/board/stxgp3/init.S @@ -137,8 +137,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 1, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 2: 256M Non-cacheable, guarded @@ -146,8 +146,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 2, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 3: 256M Non-cacheable, guarded diff --git a/board/stxgp3/law.c b/board/stxgp3/law.c index 6f215e1..312b3c5 100644 --- a/board/stxgp3/law.c +++ b/board/stxgp3/law.c @@ -48,7 +48,7 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), /* This is not so much the SDRAM map as it is the whole localbus map. */ SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), diff --git a/board/stxssa/init.S b/board/stxssa/init.S index 0c4fb30..d747946 100644 --- a/board/stxssa/init.S +++ b/board/stxssa/init.S @@ -137,8 +137,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 1, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 2: 256M Non-cacheable, guarded @@ -146,8 +146,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 2, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 3: 256M Non-cacheable, guarded @@ -155,8 +155,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 3, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 4: 256M Non-cacheable, guarded @@ -164,8 +164,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 4, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI2_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI2_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 5: 64M Non-cacheable, guarded diff --git a/board/stxssa/law.c b/board/stxssa/law.c index 2969060..2b25292 100644 --- a/board/stxssa/law.c +++ b/board/stxssa/law.c @@ -49,8 +49,8 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), - SET_LAW_ENTRY(3, CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), + SET_LAW_ENTRY(3, CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), /* Map the whole localbus, including flash and reset latch. */ diff --git a/board/tqm85xx/init.S b/board/tqm85xx/init.S index 1b25deb..f8b9fa2 100644 --- a/board/tqm85xx/init.S +++ b/board/tqm85xx/init.S @@ -119,8 +119,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 2, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 3: 256M Non-cacheable, guarded @@ -128,8 +128,8 @@ tlb1_entry: */ .long FSL_BOOKE_MAS0(1, 3, 0) .long FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M) - .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_BASE + 0x10000000, (MAS2_I|MAS2_G)) - .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_BASE + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) + .long FSL_BOOKE_MAS2(CFG_PCI1_MEM_PHYS + 0x10000000, (MAS2_I|MAS2_G)) + .long FSL_BOOKE_MAS3(CFG_PCI1_MEM_PHYS + 0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) /* * TLB 4: 256M Non-cacheable, guarded diff --git a/board/tqm85xx/law.c b/board/tqm85xx/law.c index 1573e58..224af6c 100644 --- a/board/tqm85xx/law.c +++ b/board/tqm85xx/law.c @@ -45,7 +45,7 @@ struct law_entry law_table[] = { SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), SET_LAW_ENTRY(3, CFG_LBC_FLASH_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), SET_LAW_ENTRY(5, CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), -- 1.5.3.7

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