June 2007 - U-Boot

[U-Boot-Users] PPC assembler question for mpc8548cds
by robert lazarski 02 Jul '07

02 Jul '07

Hi all, I'm porting u-boot to my board. There's the mpc8548cds that matches close to my board in u-boot 1.1.6. My board, however, has 1 Gigabit of flash, 128MB. So this section is the cds code init.S : /* * TLB 0: 16M Non-cacheable, guarded * 0xff000000 16M FLASH * Out of reset this entry is only 4K. */ .long TLB1_MAS0(1, 0, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16M) .long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE), 0,0,0,0,1,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1) And the LAW code is commented as: * 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M * 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M My board has only the boot bank - no 2nd bank. What's confusing me is there is no constant BOOKE_PAGESZ_128M. For example, the cds board has 128MB of SDRAM (my board has no SDRAM) . So the way the cds code allocates the 128MB for sdram is: /* * TLB 6: 64M Cacheable, non-guarded * 0xf000_0000 64M LBC SDRAM */ .long TLB1_MAS0(1, 6, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M) .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1) With LAW comments: * 0xf000_0000 0xf7ff_ffff SDRAM 128M I'm thinking this is because the TLB size can be allocated as 64MB for the 128MB of flash, and then the LAW code needs to allocate the full 128MB for flash. So in preparation for my boards arrival, I'm thinking I can do this for the flash: /* * TLB 0: 64M Non-cacheable, guarded * 0xff000000 64M FLASH * Out of reset this entry is only 4K. */ .long TLB1_MAS0(1, 0, 0) .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M) .long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE), 0,0,0,0,1,0,1,0) .long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1) * 0xff00_0000 0xf7ff_ffff FLASH (boot bank) 128M Yet the LAW comments say this: * If flash is 8M at default position (last 8M), no LAW needed. So since my board has no SDRAM, I'm thinking I can do this: /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ #define LAWBAR5 ((CFG_FLASH_BASE>>12) & 0xfffff) #define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M)) I've been staring at this code for days so I thought I'd ask here. Any ideas? Robert

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[U-Boot-Users] [Patch] Creation of version_autogenerated.h only triggered for new and different contents...
by Carsten Schlote 01 Jul '07

01 Jul '07

Hi, below a simple patch for the make rule, which creates the version_autogenerated.h file. Instead of just updating this file any time make is started, now the file is checked for different contents. If it differs, the version header is updated, otherwise not. This saves unnessesary rebuilds of several files in the tree. Regards Carsten --------- diff --git a/Makefile b/Makefile index c52b21b..7999870 100755 --- a/Makefile +++ b/Makefile @@ -290,11 +290,13 @@ $(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin version: - @echo -n "#define U_BOOT_VERSION \"U-Boot " > $(VERSION_FILE); \ - echo -n "$(U_BOOT_VERSION)" >> $(VERSION_FILE); \ + @echo -n "#define U_BOOT_VERSION \"U-Boot " > $(VERSION_FILE).tmp; \ + echo -n "$(U_BOOT_VERSION)" >> $(VERSION_FILE).tmp; \ echo -n $(shell $(CONFIG_SHELL) $(TOPDIR)/tools/setlocalversion \ - $(TOPDIR)) >> $(VERSION_FILE); \ - echo "\"" >> $(VERSION_FILE) + $(TOPDIR)) >> $(VERSION_FILE).tmp; \ + echo "\"" >> $(VERSION_FILE).tmp + @diff --brief $(VERSION_FILE) $(VERSION_FILE).tmp || cp $(VERSION_FILE).tmp $(VERSION_FILE) + @rm $(VERSION_FILE).tmp gdbtools: $(MAKE) -C tools/gdb all || exit 1

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[U-Boot-Users] get_ticks and get_tbclk problem
by sapirf fersht 01 Jul '07

01 Jul '07

I am having a problem with autoboot when i have a password set. If the password settings are disabled there is a countdown and autoboot. BUT, if the the passwd settings remain and therefore the functions get_tick and get_tbclk are needed to be added, the countdown doesn't happen. I suspect these functions are problematic. If someone has an idea what is wrong, how to repair, I will be grateful. Sapir

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[U-Boot-Users] [PATCH] fix for "fpga load" on spartan3 in slave parallel mode
by Bruce Adler 01 Jul '07

01 Jul '07

The while loop exits too soon if the "busy" function is a dummy function which always returns false. diff -pur a/common/spartan3.c b/common/spartan3.c --- a/common/spartan3.c 2007-06-30 05:15:22.000000000 -0700 +++ b/common/spartan3.c 2007-06-30 05:17:30.000000000 -0700 @@ -176,7 +176,7 @@ static int Spartan3_sp_load (Xilinx_desc "read data:\t0x%p\n" "write data:\t0x%p\n" "busy:\t0x%p\n" - "abort:\t0x%p\n", + "abort:\t0x%p\n" "post:\t0x%p\n\n", __FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err, fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy, @@ -213,7 +213,7 @@ static int Spartan3_sp_load (Xilinx_desc (*fn->abort) (cookie); /* abort the burn */ return FPGA_FAIL; } - } while ((*fn->init) (cookie) && (*fn->busy) (cookie)); + } while ((*fn->init) (cookie) || (*fn->busy) (cookie)); (*fn->wr) (TRUE, TRUE, cookie); /* Assert write, commit */ (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */

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Re: [U-Boot-Users] AT91RM9200-EK : using interruptions on applications running under u-boot
by Sebastien JEAN 30 Jun '07

30 Jun '07

Hi leonid, > What ELDK version you are using? I didn't realize they support ARM, I >use ELDK for PPC only. I compile code for at91rm9200 using Kegel >crosstool. i use ELDK 4.1 arm-linux-x86 under my ubuntu distro. i did not succeeded installing eldk on my intel macbook pro, so i use arm-elf-gcc by the way of mac ports. Do you have some suggestion about my issue ? Cheers, Baz. -----Original Message----- From: u-boot-users-bounces(a)lists.sourceforge.net [mailto:u-boot-users-bounces@lists.sourceforge.net] On Behalf Of Sebastien JEAN Sent: Friday, June 29, 2007 5:01 AM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] AT91RM9200-EK : using interruptions on applications running under u-boot hi, i am developping a custom operating system for AT91RM9200-EK board. I am facing some problems using interrupts. I cross-compile for ARM using ELDK and it works fine. I have succedeed in writing and running sample standalone application using DBGU, by configuring PIO and PDC. I run my applications under u-boot, consequently i do not make low level inits any more (my startup.S file just branch at main). My apps are located at 20000000 (i.e. start of RAM) I tried to configure interrupt handling mecanism in order to manage DBGU i/o under interrupt, but i do not succeeded. I used sample code found in romboot sources, especially asm_ir.S assembly interrupt handler, and the snippets that configure AIC and enable IT. I ve searched for a long time, but i do not what happen. It seems that my interrupt handler is never called. May be something is missing in hw inits. Nevertheless I guess that applications running under u-boot may be able to handle interrupts. If someone had such trouble or have a working example of code that use DBGU interrupts on top of u-boot, it would be very helpful for me. Baz. -- Sebastien JEAN IUT de Valence

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[U-Boot-Users] WG: AT91RM9200 CFI Flash and Timer Functions sporadically fail - SOLVED -
by Erdmann, Thomas 30 Jun '07

30 Jun '07

The problem was the 32 bit variable "timestamp" in interrupts.c. The 16 bit timer TC0 is clocked with 30MHz and "software extended" to 32 bit in timestamp. It gets an overflow all ~133s. When the overflow falls in an flash erase or flash program cycle a false timeout is detected. My work around is to zero the counter "timestamp" before each flash_status_check(). Thanks Thomas -------------------------------------------------------- Absender ist HARTING Electric GmbH & Co. KG; Sitz der Gesellschaft: Espelkamp; Registergericht: Bad Oeynhausen; Register-Nr.: HRA 5602; personlich haftende Gesellschafterin: HARTING Electric Management GmbH; Sitz der Komplementar-GmbH: Espelkamp; Registergericht der Komplementar-GmbH: Bad Oeynhausen; Register-Nr. der Komplementar-GmbH: HRB 8807; Geschaftsfuhrer: Hans Peter Bollin, Dr. Dirk Steinbrink

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by greet2k.Com 30 Jun '07

30 Jun '07

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by Esperanza Presley 29 Jun '07

29 Jun '07

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[U-Boot-Users] u-boot without SDRAM?
by robert lazarski 29 Jun '07

29 Jun '07

Hi all, We have a custom board using the MPC8548E without SDRAM - it has 1 gigabyte of DDR2 memory. Can u-boot relocate itself into DDR2 ? I ask as the README Memory Management section and other docs seem focused on SDRAM. Thanks, Robert

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[U-Boot-Users] MPC832x EMDS and PCI expansion board
by Richard Parsons 29 Jun '07

29 Jun '07

Hi all, I am trying to get the Freescale MPC832X EMDS with a PCI-Exp board to recognise a PCI device. I have the PCI enabled @66Mhz and all appears to be in working order except there are no sane values are being read from the PCI bus. On linux 2.6.22 kernel it registers a lots of PCI devices but they all have the vendor ID of 0. (<sarcasm>I really dont believe the board has a nCipher HSM and a SCSI controller on the PCI board.. unless its so small I cant see it </sarcasm> The Bus powers up, the cards at least get power as far as I can see (blinking light on a 3COM network card :-P Is there anything I am missing? as I cant seem to get this blessed PCI running properly. any hints or suggestions? Best Regards Richard --------- pci dump from uBoot --------- => => pci Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1957 0x00a2 Processor 0x20 00.0b.00 0x0800 0x0000 Build before PCI Rev2.0 0x00 00.0c.00 0x1000 0x0000 Build before PCI Rev2.0 0x00 00.0d.00 0x2000 0x0000 Build before PCI Rev2.0 0x00 00.0e.00 0x4000 0x0000 Build before PCI Rev2.0 0x00 00.0f.00 0x8000 0x0000 Build before PCI Rev2.0 0x00 => ------------- Snippet ---------------- U-Boot 1.2.0-g94cb3de4-dirty (Jun 28 2007 - 13:27:22) MPC83XX CPU: e300c2, MPC8323E, Rev: 10 at 264 MHz, CSB: 132 MHz Board: Freescale MPC832XEMDS RCWLR: 0x62040083 RCWHR: 0xa4600000 I2C: ready DRAM: DDR RAM: 128 MB FLASH: 16 MB PCI clock is 66MHz PCI 32bit bus on PMC2 & PMC3 ------------- lspci dump ------------- /proc # lspci 00:0a.0 Class 8000: Gammagraphx, Inc.: Unknown device 8000 (rev 08) 00:0b.0 Non-VGA unclassified device: Unknown device 0800:0000 (rev 08) 00:0c.0 Non-VGA unclassified device: LSI Logic / Symbios Logic: Unknown device 0000 (rev 08) 00:0d.0 Non-VGA unclassified device: Smart Link Ltd.: Unknown device 0000 (rev 08) 00:0e.0 Non-VGA unclassified device: Unknown device 4000:0000 (rev 08) 00:0f.0 Non-VGA unclassified device: Unknown device 8000:0000 (rev 08) 00:10.0 VGA compatible unclassified device: Gammagraphx, Inc.: Unknown device 0001 (rev 08) 00:11.0 Network controller [0002]: Gammagraphx, Inc.: Unknown device 0002 (rev 08) 00:17.0 Class 0080: Gammagraphx, Inc.: Unknown device 0080 (rev 08) 00:17.1 Class 0080: Ncipher Corp Ltd: Unknown device 0080 (rev 08) 00:17.2 Class 0080: Unknown device 0200:0080 (rev 08) 00:17.3 Class 0080: Unknown device 0300:0080 (rev 08) 00:17.4 Class 0080: Unknown device 0400:0080 (rev 08) 00:17.5 Class 0080: Unknown device 0500:0080 (rev 08) 00:17.6 Class 0080: Unknown device 0600:0080 (rev 08) 00:17.7 Class 0080: Unknown device 0700:0080 (rev 08) 00:18.0 SCSI storage controller: Gammagraphx, Inc.: Unknown device 0100 (rev 08) 00:19.0 Ethernet controller: Gammagraphx, Inc.: Unknown device 0200 (rev 08) 00:1a.0 Multimedia video controller: Gammagraphx, Inc.: Unknown device 0400 (rev 08) 00:1b.0 PIC: Gammagraphx, Inc.: Unknown device 0800 (rev 08) 00:1c.0 Network and computing encryption device: Gammagraphx, Inc.: Unknown device 1000 (rev 08) 00:1d.0 Class 2000: Gammagraphx, Inc.: Unknown device 2000 (rev 08) 00:1e.0 Class 4000: Gammagraphx, Inc.: Unknown device 4000 (rev 08) /proc # ls ------------------------ Linux Boot ----------------- ## Booting image at 00400000 ... Image Name: Linux-2.6.22-rc1 Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 1384763 Bytes = 1.3 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ## Loading RAMDisk Image at 01000000 ... Image Name: uboot ext2 ramdisk rootfs Image Type: PowerPC Linux RAMDisk Image (gzip compressed) Data Size: 3330218 Bytes = 3.2 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Booting using flat device tree at 0x300000 Loading Ramdisk to 07c7b000, end 07fa80aa ... OK Using MPC832x MDS machine description Linux version 2.6.22-rc1 (root(a)localhost.localdomain) (gcc version 3.4.3) #16 Thu Jun 28 14:00:42 BST 2007 Found initrd at 0xc7c7b000:0xc7fa80aa setup_arch: bootmem mpc832x_sys_setup_arch() Found MPC83xx PCI host bridge at 0x00000000e0008500. Firmware bus number: 0->0 arch: exit Zone PFN ranges: DMA 0 -> 32768 Normal 32768 -> 32768 early_node_map[1] active PFN ranges 0: 0 -> 32768 Built 1 zonelists. Total pages: 32512 Kernel command line: root=/dev/ram rw console=ttyS0,115200 lastbus=10 IPIC (128 IRQ sources) at fddf3700 QEIC (64 IRQ sources) at fddf2080 PID hash table entries: 512 (order: 9, 2048 bytes) Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) Memory: 123544k/131072k available (2720k kernel code, 7364k reserved, 112k data, 98k bss, 140k init) Mount-cache hash table entries: 512 NET: Registered protocol family 16 PCI: Probing PCI hardware... PCI: 0000:00:10.0: class 1 doesn't match header type 01. Ignoring class. PCI: 0000:00:11.0: class 2 doesn't match header type 02. Ignoring class. PCI: device 0000:00:12.0 has unknown header type 04, ignoring. PCI: device 0000:00:13.0 has unknown header type 08, ignoring. PCI: device 0000:00:14.0 has unknown header type 10, ignoring. PCI: device 0000:00:15.0 has unknown header type 20, ignoring. PCI: device 0000:00:16.0 has unknown header type 40, ignoring. PCI: Bus 0000:00 already known PCI: 5 PCI Busses PCI: Remapping PCI: PCI Bios Fixup PCI: Allocating Resources PCI: Cannot allocate resource region 1 of device 0000:00:0a.0 PCI: Cannot allocate resource region 3 of device 0000:00:0a.0 PCI: Cannot allocate resource region 5 of device 0000:00:0a.0 PCI: Cannot allocate resource region 1 of device 0000:00:0b.0 PCI: Cannot allocate resource region 3 of device 0000:00:0b.0 PCI: Cannot allocate resource region 5 of device 0000:00:0b.0 PCI: Cannot allocate resource region 1 of device 0000:00:0c.0 PCI: Cannot allocate resource region 3 of device 0000:00:0c.0 PCI: Cannot allocate resource region 5 of device 0000:00:0c.0 PCI: Cannot allocate resource region 1 of device 0000:00:0d.0 PCI: Cannot allocate resource region 3 of device 0000:00:0d.0 PCI: Cannot allocate resource region 5 of device 0000:00:0d.0 PCI: Cannot allocate resource region 1 of device 0000:00:0e.0 PCI: Cannot allocate resource region 3 of device 0000:00:0e.0 PCI: Cannot allocate resource region 5 of device 0000:00:0e.0 PCI: Cannot allocate resource region 1 of device 0000:00:0f.0 PCI: Cannot allocate resource region 3 of device 0000:00:0f.0 PCI: Cannot allocate resource region 5 of device 0000:00:0f.0 PCI: Cannot allocate resource region 1 of device 0000:00:17.0 PCI: Cannot allocate resource region 3 of device 0000:00:17.0 PCI: Cannot allocate resource region 5 of device 0000:00:17.0 PCI: Cannot allocate resource region 1 of device 0000:00:17.1 PCI: Cannot allocate resource region 3 of device 0000:00:17.1 PCI: Cannot allocate resource region 5 of device 0000:00:17.1 PCI: Cannot allocate resource region 1 of device 0000:00:17.2 PCI: Cannot allocate resource region 3 of device 0000:00:17.2 PCI: Cannot allocate resource region 5 of device 0000:00:17.2 PCI: Cannot allocate resource region 1 of device 0000:00:17.3 PCI: Cannot allocate resource region 3 of device 0000:00:17.3 PCI: Cannot allocate resource region 5 of device 0000:00:17.3 PCI: Cannot allocate resource region 1 of device 0000:00:17.4 PCI: Cannot allocate resource region 3 of device 0000:00:17.4 PCI: Cannot allocate resource region 5 of device 0000:00:17.4 PCI: Cannot allocate resource region 1 of device 0000:00:17.5 PCI: Cannot allocate resource region 3 of device 0000:00:17.5 PCI: Cannot allocate resource region 5 of device 0000:00:17.5 PCI: Cannot allocate resource region 1 of device 0000:00:17.6 PCI: Cannot allocate resource region 3 of device 0000:00:17.6 PCI: Cannot allocate resource region 5 of device 0000:00:17.6 PCI: Cannot allocate resource region 1 of device 0000:00:17.7 PCI: Cannot allocate resource region 3 of device 0000:00:17.7 PCI: Cannot allocate resource region 5 of device 0000:00:17.7 PCI: Cannot allocate resource region 1 of device 0000:00:18.0 PCI: Cannot allocate resource region 3 of device 0000:00:18.0 PCI: Cannot allocate resource region 5 of device 0000:00:18.0 PCI: Cannot allocate resource region 1 of device 0000:00:19.0 PCI: Cannot allocate resource region 3 of device 0000:00:19.0 PCI: Cannot allocate resource region 5 of device 0000:00:19.0 PCI: Cannot allocate resource region 1 of device 0000:00:1a.0 PCI: Cannot allocate resource region 3 of device 0000:00:1a.0 PCI: Cannot allocate resource region 5 of device 0000:00:1a.0 PCI: Cannot allocate resource region 1 of device 0000:00:1b.0 PCI: Cannot allocate resource region 3 of device 0000:00:1b.0 PCI: Cannot allocate resource region 5 of device 0000:00:1b.0 PCI: Cannot allocate resource region 1 of device 0000:00:1c.0 PCI: Cannot allocate resource region 3 of device 0000:00:1c.0 PCI: Cannot allocate resource region 5 of device 0000:00:1c.0 PCI: Cannot allocate resource region 1 of device 0000:00:1d.0 PCI: Cannot allocate resource region 3 of device 0000:00:1d.0 PCI: Cannot allocate resource region 5 of device 0000:00:1d.0 PCI: Cannot allocate resource region 1 of device 0000:00:1e.0 PCI: Cannot allocate resource region 3 of device 0000:00:1e.0 PCI: Cannot allocate resource region 5 of device 0000:00:1e.0 Generic PHY: Registered new driver SCSI subsystem initialized NET: Registered protocol family 2 IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 4096 (order: 3, 32768 bytes) TCP bind hash table entries: 4096 (order: 2, 16384 bytes) TCP: Hash tables configured (established 4096 bind 4096) TCP reno registered checking if image is initramfs...it isn't (no cpio magic); looks like an initrd Freeing initrd memory: 3252k freed io scheduler noop registered io scheduler anticipatory registered (default) io scheduler deadline registered io scheduler cfq registered pci_hotplug: PCI Hot Plug PCI Core version: 0.5 Generic RTC Driver v1.07 WDT driver for MPC83xx initialized. mode:reset timeout=65535 (32 seconds) Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled serial8250.0: ttyS0 at MMIO 0xe0004500 (irq = 16) is a 16550A console handover: boot [udbg0] -> real [ttyS0] serial8250.0: ttyS1 at MMIO 0xe0004600 (irq = 17) is a 16550A RAMDISK driver initialized: 16 RAM disks of 32768K size 1024 blocksize loop: module loaded UCC Ethernet Controller MII Bus: probed ucc_geth: QE UCC Gigabit Ethernet Controller ucc_geth: UCC3 at 0xe0102200 (irq = 34) ucc_geth: UCC4 at 0xe0103000 (irq = 35) Davicom DM9161E: Registered new driver Davicom DM9161A: Registered new driver Davicom DM9131: Registered new driver i2c /dev entries driver TCP cubic registered NET: Registered protocol family 1 NET: Registered protocol family 17 RAMDISK: Compressed image found at block 0 VFS: Mounted root (ext2 filesystem). Freeing unused kernel memory: 140k init Setting the hostname to freescale Mounting filesystems mount: Mounting usbfs on /proc/bus/usb failed: No such file or directory Running depmod Setting up networking on loopback device: Setting up networking on eth0: Adding static route for default gateway to 192.168.0.1: route: SIOC[ADD|DEL]RT: Network is unreachable Setting nameserver to 192.168.0.1 in /etc/resolv.conf: Starting inetd: Welcome to Freescale Semiconductor Embedded Linux Environment ------------------------------------------------------------------------------ Cambridge Broadband Networks opens new African regional headquarters <http://www.cambridgebroadband.com/mi30may07.htm> Cambridge Broadband appoints telecoms industry veteran John Cronin as chairman <<http://www.cambridgebroadband.com/mi20feb07.htm> ------------------------------------------------------------------------------ Cambridge Broadband Networks Limited Registered in England and Wales under company number: 03879840 Registered office: Selwyn House, Cambridge Business Park, Cowley Road, Cambridge CB4 0WZ, UK. VAT number: GB 741 0186 64 This email and any attachments are private and confidential. If you believe you have received this email in error please inform the sender and delete it from your mailbox or any other storage mechanism. Cambridge Broadband Networks Limited cannot accept liability for any statements made which are clearly the individual sender's own and not expressly made on behalf of Cambridge Broadband Networks Limited.

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