December 2006 - U-Boot

[U-Boot-Users] AMCC440SPe & PCI Express
by Patil, Pankaj P. 26 Nov '07

26 Nov '07

Hi, I have been using u-boot-1.1.5 on my custom 440SPe based board. I am able to establish a link on PCIE0. However, I am having trouble accessing outbound Memory on PCIE0. My memory map seetings for Outbound PCIE memory are the default U-boot Settings. I was curious if anybody's tried accessing PCIE Outbound memory with the default settings. I seem to get a bus error when I try to access that region. Thanks Pankaj

3 3

Re: [U-Boot-Users] adding support to new board
by Jeff Mann 26 Sep '07

26 Sep '07

See http://www.freescale.com/files/32bit/doc/app_note/AN3220.pdf -JM -----Original Message----- From: u-boot-users-bounces(a)lists.sourceforge.net [mailto:u-boot-users-bounces@lists.sourceforge.net] On Behalf Of Maximus Sent: Saturday, July 15, 2006 5:31 AM To: U-Boot-Users(a)lists.sourceforge.net Subject: [U-Boot-Users] adding support to new board Hi, Is there any document (step by step) approach on how to add u-boot support to a new board? any advices, Regards, jo ------------------------------------------------------------------------ - Using Tomcat but need to do more? Need to support web services, security? Get stuff done quickly with pre-integrated technology to make your job easier Download IBM WebSphere Application Server v.1.0.1 based on Apache Geronimo http://sel.as-us.falkag.net/sel?cmd=lnk&kid=120709&bid=263057&dat=121642 _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

4 3

[U-Boot-Users] helloworld app from flash?
by Ram 08 Sep '07

08 Sep '07

Hi, im trying to run the helloworld application 1st Option: download the hello_world.bin to some location on RAM and execute it OMAP5912OSK: tftpboot 0x10000000 hello_world.bin OMAP5912OSK: go 0x10000004 This works fine. no problem 2nd Option: I want to burn the hello_world.bin into flash. During startup i want u-boot to launch it after booting - just like the way it boots the kernel. It does not work for me, this is what i did. $ ../tools/mkimage -A arm -O linux -T kernel -C gzip -a 0x10000000 -e 0x10000004 -n 'Hello Image' -d hello_world.bin.gz hello.img I downloaded the hello.img and burnt it to 0x40000 I did: setenv bootcmd bootm 0x40000 Now when i restarted the boot i get the following:- Example expects ABI version 2 Actual U-Boot ABI version 2 Hello World argc = 0 data abort pc : [<10000058>] lr : [<10000048>] sp : 1103fc10 ip : ffffffff fp : 00000001 r10: 110996d8 r9 : 1103fca4 r8 : 1103ffdc r7 : 110996d8 r6 : 00000203 r5 : 00000000 r4 : 00000000 r3 : 00000020 r2 : 00000001 r1 : 0000000a r0 : 00000000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... All i am doing in the hello world example is to read a line and print the line entered. I am using readline function for doing that. The programs works fine if i download it to RAM and say go. but if i flash it it does not work?. Am i missing something?. Regards, sriram

4 6

[U-Boot-Users] u-boot for MPC8548
by Rupesh S 07 Jun '07

07 Jun '07

Hi Does u-boot support any evaluation boards based on the MPC8548 processor ? Thanks in advance -- Rupesh S

2 1

[U-Boot-Users] PCI OHCI / testing-USB branch
by Matthias Fuchs 07 Jun '07

07 Jun '07

Hi, is someone currently working on the testing-USB branch? Does it contain the most up to date USB code? I have to add support for a PCI OHCI controller on a 405 board. This will result in some modifications (endianess + bus offsets) of drivers/usb_ohci.c. Is someone else using a PCI OHCI controller on a board that I might have missed to check? Matthias

4 6

[U-Boot-Users] [PATCH 1/1] Support for National DP83848 Ethernet Phy
by kim M 22 May '07

22 May '07

Hi all If anyone interested, this is a patch which adds support for the National DP83848 Ethernet Phy. It allows derivatives of the at91rm9200dk board to use this Phy. You will have to edit your at91rm9200.c to use this Phy instead of the default dm9161. I think it makes sense to include it in the main branch, since it is a free feature and it does not occupy space unless used. BR Kim

2 1

[U-Boot-Users] POST
by Maximus 09 May '07

09 May '07

Hi, My hardware has an sd/mmc card. I need to write a few tests to check if the card is connected and working before loading linux. any ideas how one should go abt it?. are there any basic tests for mmc card?. any pointers?. Regards, Jo

3 2

[U-Boot-Users] [PATCH] simplify silent console
by Ladislav Michl 24 Apr '07

24 Apr '07

Wolfgang, silent console output is currently implemented by assigning nulldev as output device. This is a bit overcomplicated, since there is also GD_FLG_SILENT flag. Patch bellow tries to simplify silencing console by honouring GD_FLG_SILENT in console output functions, so there is no need to mess with output device. Comments? Best regards, ladis Signed-off-by: Ladislav Michl <ladis(a)linux-mips.org> CHANGELOG * Silent console code simplification. Patch by Ladislav Michl, 25 Jul 2006 diff --git a/common/console.c b/common/console.c index e9f23be..d8a0cb6 100644 --- a/common/console.c +++ b/common/console.c @@ -494,13 +494,7 @@ #ifdef CONFIG_SPLASH_SCREEN /* suppress all output if splash screen is enabled and we have a bmp to display */ if (getenv("splashimage") != NULL) - outputdev = search_device (DEV_FLAGS_OUTPUT, "nulldev"); -#endif - -#ifdef CONFIG_SILENT_CONSOLE - /* Suppress all output if "silent" mode requested */ - if (gd->flags & GD_FLG_SILENT) - outputdev = search_device (DEV_FLAGS_OUTPUT, "nulldev"); + gd->flags |= GD_FLG_SILENT; #endif /* Scan devices looking for input and output devices */ diff --git a/common/main.c b/common/main.c index ef28b3f..1ff3296 100644 --- a/common/main.c +++ b/common/main.c @@ -113,15 +113,17 @@ static __inline__ int abortboot(int boot u_int i; #ifdef CONFIG_SILENT_CONSOLE + int silent = 0; + if (gd->flags & GD_FLG_SILENT) { - /* Restore serial console */ - console_assign (stdout, "serial"); - console_assign (stderr, "serial"); + /* Restore console */ + gd->flags &= ~GD_FLG_SILENT; + silent = 1; } #endif # ifdef CONFIG_AUTOBOOT_PROMPT - printf (CONFIG_AUTOBOOT_PROMPT, bootdelay); + serial_printf (CONFIG_AUTOBOOT_PROMPT, bootdelay); # endif # ifdef CONFIG_AUTOBOOT_DELAY_STR @@ -199,14 +201,8 @@ # if DEBUG_BOOTKEYS # endif #ifdef CONFIG_SILENT_CONSOLE - if (abort) { - /* permanently enable normal console output */ - gd->flags &= ~(GD_FLG_SILENT); - } else if (gd->flags & GD_FLG_SILENT) { - /* Restore silent console */ - console_assign (stdout, "nulldev"); - console_assign (stderr, "nulldev"); - } + if (!abort && silent) + gd->flags |= GD_FLG_SILENT; #endif return abort; @@ -223,10 +219,12 @@ static __inline__ int abortboot(int boot int abort = 0; #ifdef CONFIG_SILENT_CONSOLE + int silent = 0; + if (gd->flags & GD_FLG_SILENT) { - /* Restore serial console */ - console_assign (stdout, "serial"); - console_assign (stderr, "serial"); + /* Restore output */ + silent = 1; + gd->flags &= ~GD_FLG_SILENT; } #endif @@ -275,14 +273,8 @@ # endif putc ('\n'); #ifdef CONFIG_SILENT_CONSOLE - if (abort) { - /* permanently enable normal console output */ - gd->flags &= ~(GD_FLG_SILENT); - } else if (gd->flags & GD_FLG_SILENT) { - /* Restore silent console */ - console_assign (stdout, "nulldev"); - console_assign (stderr, "nulldev"); - } + if (!abort && silent) + gd->flags |= GD_FLG_SILENT; #endif return abort;

4 4

[U-Boot-Users] [PATCH 00/07 v2]: Add mpc7448hpc2 (Taiga) board support
by Zang Roy-r61911 19 Apr '07

19 Apr '07

This series of patches add mpc7448hpc2 board support. Mpc7448hpc2 (taiga) board is a high-performance PowerPC server reference design. This is the second version for this board support according to the feedback from mailing list. Roy Signed-off-by: Roy Zang <tie-fei.zang(a)freescale.com> --- doc/README.mpc7448hpc2 | 181 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 181 insertions(+), 0 deletions(-) diff --git a/doc/README.mpc7448hpc2 b/doc/README.mpc7448hpc2 new file mode 100644 index 0000000..00fda4e --- /dev/null +++ b/doc/README.mpc7448hpc2 @@ -0,0 +1,181 @@ +Freescale MPC7448hpc2 (Taiga) board +-------------------------- +MPC7448hpc2 (Taiga) board is a high-performance PowerPC server reference +design, which is optimized for high speed throughput between the processor and +the memory, disk drive and Ethernet port subsystems. + +MPC7448hpc2(Taiga) is designed to the micro-ATX chassis, allowing it to be +used in 1U or 2U rack-mount chassis', as well as in standard ATX/Micro-ATX +chassis. + + +Memory Map +---------- + +The memory map is setup for Linux to operate properly. + +The mapping is: + + Range Start Range End Definition Size + + 0x0000_0000 0x7fff_ffff DDR 2G + 0xe000_0000 0xe7ff_ffff PCI Memory 128M + 0xfa00_0000 0xfaff_ffff PCI IO 16M + 0xfb00_0000 0xfbff_ffff PCI Config 16M + 0xfc00_0000 0xfc0f_ffff NVRAM/CADMUS 1M + 0xfe00_0000 0xfeff_ffff PromJet 16M + 0xff00_0000 0xff80_0000 FLASH (boot flash) 8M + 0xff80_0000 0xffff_ffff FLASH (second half flash) 8M + + +Using Flash +----------- + +The MPC7448hpc2 board has two "banks" of flash, each 8MB in size +(2^23 = 0x00800000). + +Note: the "bank" here refers to half of the flash. In fact, there is only one +bank of flash, which is divided into low and high half. Each is controlled by +the most significant bit of the address bus. The so called "bank" is only for +convenience. + +There is a switch which allows the "bank" to be selected. The switch +settings for updating flash are given below. + +The u-boot commands for copying the boot-bank into the secondary bank are +as follows: + + erase ff800000 ff880000 + cp.b ff000000 ff800000 80000 + +U-boot commands for downloading an image via tftp and flashing +it into the secondary bank: + + tftp 10000 <u-boot.bin.image> + erase ff000000 ff080000 + cp.b 10000 ff000000 80000 + + +After copying the image into the second bank of flash, be sure to toggle +SW3[4] on board before resetting the board in order to set the +secondary bank as the boot-bank. + + +Board Switches +---------------------- + + +Most switches on the board should not be changed. The most frequent +user-settable switches on the board are used to configure +the flash banks and determining the PCI frequency. + +SW1[1-5]: Processor core voltage + + 12345 Core Voltage + ----- + SW1=01111 1.000V. + SW1=01101 1.100V. + SW1=01011 1.200V. + SW1=01001 1.300V only for MPC7447A. + + +SW2[1-6]: CPU core frequency + + CPU Core Frequency (MHz) + Bus Frequency + 123456 100 133 167 200 Ratio + + ------ + SW2=101100 500 667 833 1000 5x + SW2=100100 550 733 917 1100 5.5x + SW2=110100 600 800 1000 1200 6x + SW2=010100 650 866 1083 1300 6.5x + SW2=001000 700 930 1167 1400 7x + SW2=000100 750 1000 1250 1500 7.5x + SW2=110000 800 1066 1333 1600 8x + SW2=011000 850 1333 1417 1700 8.5x only for MPC7447A + SW2=011110 900 1200 1500 1800 9x + +This table shows only a subset of available frequency options; see the CPU +hardware specifications for more information. + + +SW2[7-8]: Bus Protocol and CPU Reset Option + + 7 + - + SW2=0 System bus uses MPX bus protocol + SW2=1 System bus uses 60x bus protocol + + 8 + - + SW2=0 TSI108 can cause CPU reset + SW2=1 TSI108 can not cause CPU reset + + +SW3[1-8] system options + + 123 + --- + SW3=xxx Connected to GPIO[0:2] on TSI108 + + 4 + - + SW3=0 CPU boots from low half of flash + SW3=1 CPU boots from high half of flash + + 5 + - + SW3=0 SATA and slot2 connected to PCI bus + SW3=1 Only slot1 connected to PCI bus + + 6 + - + SW3=0 USB connected to PCI bus + SW3=1 USB disconnected from PCI bus + + 7 + - + SW3=0 Flash is write protected + SW3=1 Flash is NOT write protected + + 8 + - + SW3=0 CPU will boot from flash + SW3=1 CPU will boot from PromJet + +SW4[1-3]: System bus frequency + + Bus Frequency (MHz) + --- + SW4=010 183 + SW4=011 100 + SW4=100 133 + SW4=101 166 only for MPC7447A + SW4=110 200 only for MPC7448 + others reserved + + +SW4[4-6]: DDR2 SDRAM frequency + + Bus Frequency (MHz) + --- + SW4=000 external clock + SW4=011 system clock + SW4=100 133 + SW4=101 166 + SW4=110 200 + others reserved + + +SW4[7-8]: PCI/PCI-X frequency control + 7 + - + SW4=0 PCI/PCI-X bus operates normally + SW4=1 PCI bus forced to PCI-33 mode + + 8 + - + SW4=0 PCI-X mode at 133 MHz allowed + SW4=1 PCI-X mode limited to 100 MHz + -- 1.4.0

3 39

[U-Boot-Users] [PATCH] Fix: Bug in MIPS linker scripts
by Robert Deliën 11 Apr '07

11 Apr '07

Hi, This patch fixes the possible alignment error between _gp and __got_start in the linker scripts of all MIPS targets. This problem has been previously reported under the title '_gp and __got_start alignment problem in u-boot.lds. Thanks for your comment Andrew! With kind regards, Robert.

2 1