June 2005 - U-Boot

[U-Boot-Users] More dtc changes
by David Gibson 17 Jun '05

17 Jun '05

I now have a git tree for the device tree compiler up at http://www.ozlabs.org/~dgibson/dtc/dtc.git Notable changes since the last tarball release: - Elementary support for labels. Labels can go on nodes or properties in the source tree and are exported to assembler output as usable symbols - phandle reference support. Cell data (< .. >) can include references of the form &/path/to/some/node and will be replaced in the output tree with the output node's phandle. A phandle will be generated for the target node if it doesn't already have one. There's a tarball release as well http://www.ozlabs.org/~dgibson/dtc/dtc.tar.gz -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/people/dgibson

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[U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode?
by KokHow Teh 16 Jun '05

16 Jun '05

Hi; I am having trouble with my PQ2FADS-ZU board with a PQ2 8280 processor that when the localbus is put into PCI mode with LBPC = 01, all accesses to 60x bus SDRAM fails. Uboot failed in get_ram_size() routine. The selection of localbus operation mode is done by SW9. Switch the jumper back to localbus SDRAM mode, U-boot boots to the prompt and access to 60x SDRAM is fine. Does anybody have similar experience? Any insight is appreciated. Regards, TEH

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[U-Boot-Users] Trouble in cfi_flash, help please!
by Yusuf Ibrahim Ozkok 16 Jun '05

16 Jun '05

Hi, I'm still in trouble with cfi_flash. My previous posts on the subject can be reached by the following links; 1. http://sourceforge.net/mailarchive/forum.php?thread_id=7456151&forum_id=128… 2. http://sourceforge.net/mailarchive/forum.php?thread_id=7463406&forum_id=128… Every thing works well if I use command prompt of u-boot ( using mw.l and md commands as Yuli suggested.) mw.l ff000000 60606060 mw.l ff000000 d0d0d0d0 md ff000000 But somehow protect command which calls flash_real_protect insists on not to work :-( (Actually everything seems to be alright, but why it doesn't work!!!) I have modified flash_real_protect() as follows, to see what is going on. I can read status register first of all by sending the cmd 0x70. But whenever I send the command to unprotect a block I get a status of 0xb0 which indicates a failure! Below in the modified function, after sending cmd_protect I send a reset and clear status commands, because after calling protect off command at the command prompt, sending a 0x60 results with b0 on the status register. Then sending cmd_protect and clear_status and 0x60 results with 0x80(which is expected to) on the status register (returns from failure condition). So I tried that sequence in flash_real_protect(). int flash_real_protect (flash_info_t * info, long sector, int prot) { int retcode = 0; /*yio: flash_print_StatusBits(info, sector);*/ flash_write_cmd (info, sector, 0, 0x70); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", 0x70, info->start[sector], *(unsigned long *)(info->start[sector])); flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_CLEAR_STATUS, info->start[sector], *(unsigned long *)(info->start[sector])); udelay(10000); /*not needed but maybe I need to wait*/ flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); udelay(10000); /*not needed but maybe I need to wait*/ printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_PROTECT, info->start[sector], *(unsigned long *)(info->start[sector])); flash_write_cmd (info, sector, 0, FLASH_CMD_RESET); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_RESET, info->start[sector], *(unsigned long *)(info->start[sector])); flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_CLEAR_STATUS, info->start[sector], *(unsigned long *)(info->start[sector])); flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_PROTECT, info->start[sector], *(unsigned long *)(info->start[sector])); if (prot) flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); else { flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_PROTECT_CLEAR, info->start[sector], *(unsigned long *)(info->start[sector])); } if ((retcode = flash_full_status_check (info, sector, info->erase_blk_tout, prot ? "protect" : "unprotect")) == 0) { info->protect[sector] = prot; /* Intel's unprotect unprotects all locking *yio/ if (prot == 0) { flash_sect_t i; printf("yio: entering for loop in flash_real_protect\n"); for (i = 0; i < info->sector_count; i++) { if (info->protect[i]) flash_real_protect (info, i, 1); } } ~yio*/ } printf("yio: flash_real_protect retcode=%d\n", retcode); return retcode; } Debug messages are below; => protect off ff000000 ff03ffff fwrite addr ff000000 cmd 70 0070007000700070 64 bit x 16 bit yio: after 0x70 addr=0xff000000 databus: 0x800080 fwrite addr ff000000 cmd 50 0050005000500050 64 bit x 16 bit yio: after 0x50 addr=0xff000000 databus: 0x27051956 fwrite addr ff000000 cmd 60 0060006000600060 64 bit x 16 bit yio: after 0x60 addr=0xff000000 databus: 0xb000b0 fwrite addr ff000000 cmd ff 00ff00ff00ff00ff 64 bit x 16 bit yio: after 0xff addr=0xff000000 databus: 0x27051956 fwrite addr ff000000 cmd 50 0050005000500050 64 bit x 16 bit yio: after 0x50 addr=0xff000000 databus: 0x27051956 fwrite addr ff000000 cmd 60 0060006000600060 64 bit x 16 bit yio: after 0x60 addr=0xff000000 databus: 0xb000b0 fwrite addr ff000000 cmd d0 00d000d000d000d0 64 bit x 16 bit yio: after 0xd0 addr=0xff000000 databus: 0x27051956 yio: in flash_isset flash_is_busy: 1 yio: in flash_isset flash_is_busy: 1 yio: in flash_isset flash_is_busy: 1 yio: in flash_isset flash_is_busy: 1 yio: in flash_isset flash_is_busy: 1 yio: in flash_isset flash_is_busy: 1 long addr is at ff000000 info->portwidth = 8 addr[0] = 0x27 addr[1] = 0x5 addr[2] = 0x19 addr[3] = 0x56 addr[4] = 0x55 addr[5] = 0x2d addr[6] = 0x42 addr[7] = 0x6f addr[8] = 0x6f addr[9] = 0x74 addr[a] = 0x20 addr[b] = 0x31 addr[c] = 0x2e addr[d] = 0x31 addr[e] = 0x2e addr[f] = 0x32 addr[10] = 0x20 addr[11] = 0x28 addr[12] = 0x4a addr[13] = 0x75 addr[14] = 0x6e addr[15] = 0x20 addr[16] = 0x20 addr[17] = 0x37 addr[18] = 0x20 addr[19] = 0x32 addr[1a] = 0x30 addr[1b] = 0x30 addr[1c] = 0x35 addr[1d] = 0x20 addr[1e] = 0x2d addr[1f] = 0x20 Flash unprotect timeout at address ff000000 data 326f2037 fwrite addr ff000000 cmd ff 00ff00ff00ff00ff 64 bit x 16 bit is= cmd 80(?) addr ff000000 is= 27051956552d426f 0080008000800080 Flash unprotect error at address ff000000 yio: in flash_isset yio: in flash_isset yio: in flash_isset yio: in flash_isset yio: in flash_isset fwrite addr ff000000 cmd ff 00ff00ff00ff00ff 64 bit x 16 bit yio: flash_real_protect retcode=8 .Un-Protected 1 sectors => Thank you very much Yusuf Ibrahim Ozkok. ###################################################################### Dikkat: Bu elektronik posta mesaji kisisel ve ozeldir. Eger size gonderilmediyse lutfen gondericiyi bilgilendirip mesaji siliniz. Firmamiza gelen ve giden mesajlar virus taramasindan gecirilmekte, guvenlik nedeni ile kontrol edilerek saklanmaktadir. Mesajdaki gorusler ve bakis acisi gondericiye ait olup Aselsan A.S. resmi gorusu olmak zorunda degildir. ###################################################################### Attention: This e-mail message is privileged and confidential. If you are not the intended recipient please delete the message and notify the sender. E-mails to and from the company are monitored for operational reasons and in accordance with lawful business practices. Any views or opinions presented are solely those of the author and do not necessarily represent the views of the company. ######################################################################

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[U-Boot-Users] OT: Linux kernel booting problem (help me!!)
by eagle keeper 16 Jun '05

16 Jun '05

Hi all, i' m hanged with this problem since 2 weeks ago... i wonder if anyone of you have any idea for resolve this matter... This is the output I have: -------------- ## Booting image at 00100000 ... Image Name: mercurio --- 10001 - Thu Jun Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 490783 Bytes = 479.3 kB Load Address: 00200000 Entry Point: 00200000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK Memory BAT mapping: BAT2=16Mb, BAT3=0Mb, residual: 0Mb Linux version 2.4.25 (root@mercurio) (gcc version 3.3.3 (DENX ELDK 3.1.1 3.3.3-9 )) #2 Thu Jun 16 11:49:57 CEST 2005 On node 0 totalpages: 4096 zone(0): 4096 pages. zone(1): 0 pages. zone(2): 0 pages. Kernel command line: root=/dev/nfs rw nfsroot=141.137.67.254:/provaFS ip=141.137 .67.253:141.137.67.254:141.137.67.100:255.255.255.0:priscilla::off Warning: real time clock seems stuck! Calibrating delay loop... 79.87 BogoMIPS Memory: 15012k available (848k kernel code, 280k data, 40k init, 0k highmem) Dentry cache hash table entries: 2048 (order: 2, 16384 bytes) Inode cache hash table entries: 1024 (order: 1, 8192 bytes) Mount cache hash table entries: 512 (order: 0, 4096 bytes) Buffer cache hash table entries: 1024 (order: 0, 4096 bytes) Page-cache hash table entries: 4096 (order: 2, 16384 bytes) POSIX conformance testing by UNIFIX Linux NET4.0 for Linux 2.4 Based upon Swansea University Computer Society NET3.039 Initializing RT netlink socket Starting kswapd CPM UART driver version 0.01 ttyS0 on SCC1 at 0x8000, BRG7 ttyS1 on SCC2 at 0x8100, BRG1 Serial driver version 5.05c (2001-07-08) with no serial options enabled Oops: kernel access of bad area, sig: 11 NIP: C007150C XER: 00000000 LR: C0075CAC SP: C0173E90 REGS: c0173de0 TRAP: 0300 Not tainted MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11 DAR: 000003F9, DSISR: 20000000 TASK = c0172000[1] 'swapper' Last syscall: 120 last math 00000000 last altivec 00000000 GPR00: 00000000 C0173E90 C0172000 C0173EA0 00000001 00000008 C00D622C 000003F8 GPR08: 00000000 000003F8 00000000 10000000 0000000D 7FFFFFFF 00FF5000 007FFF7D GPR16: 00200000 007FFF00 00FF8A30 00000000 003FF000 00000001 00BC3588 00FFF25C GPR24: 00000000 00123238 C0100000 C0173EA0 00000001 C01137C4 00000000 C00EF414 Call backtrace: 00123238 C00FD5F8 C00F75CC C00039D0 C0007FD8 Kernel panic: Attempted to kill init! <0>Rebooting in 180 seconds..Machine check in kernel mode. sCaubed fy ( rom1SRR0=41:00) ------------- did you ever verified somewhat like this? Any help/suggestion will be appreciated. Thanks in advance, Lele

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[U-Boot-Users] PQ2FADS-ZU: PCI IDE
by KokHow Teh 16 Jun '05

16 Jun '05

Hi; I have ITE PCI IDE plugin card on my PQ2FADS-ZU and there is a device timeout when u-boot boots and try to read from the IDE drive. Any insight is appreciated. <whole bunch of ide_inb debug messages...> .ide_inb (dev= 0, port= 0x1c) : @ 0x8400001c -> 0x84 ** Timeout ** Hit any key to stop autoboot: 0 ## Booting image at fff80000 ... Bad Magic Number u-boot> printenv bootargs=root=/dev/mtdblock2 bootcmd=bootm fff80000 bootdelay=10 baudrate=115200 ethaddr=08:00:3E:33:44:56 ipaddr=147.128.28.44 serverip=147.128.28.42 gatewayip=147.128.28.1 netmask=255.255.254.0 hostname=PQ2FADS-ZU stdin=serial stdout=serial stderr=serial ethact=FCC2 ETHERNET Environment size: 278/262140 bytes u-boot> ide Usage: ide - IDE sub-system u-boot> ? ide ide reset - reset IDE controller ide info - show available IDE devices ide device [dev] - show or set current device ide part [dev] - print partition table of one or all IDE devices ide read addr blk# cnt ide write addr blk# cnt - read/write `cnt' blocks starting at block `blk#' to/from memory address `addr' u-boot> ide info u-boot> ide device no IDE devices available u-boot> pci Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1057 0x18c0 Bridge device 0x00 00.16.00 0x1283 0x8212 Mass storage controller 0x04 u-boot> ide device 0 IDE device 0: not available u-boot> Regards, TEH

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[U-Boot-Users] bootloader on s3c2410(boot from NAND)
by zhuzhenhua 16 Jun '05

16 Jun '05

I have a board of s3c2410, with a 64M nand flash(k9f1208uom-ycb0), two 32M sdram( hy57v561620ct-h). I want to port uboot on this board, and now i get a uboot modified by someone,it can run to the command line like SMDK2410#. And i want to it autoboot the linux and rootfs.I have the linux kernel and rootfs.cramfs which run well on vivi.So i only make uimage with mkimage and then modify boot args in /include/configs/s3c2410.h. the code is as follow, but it can't boot and also the memory content in 0x32000000 is not the uimage. so i hope someone having experiences in the situation be nice to give some info or advices. thanks all best regards ./include/configs/s3c2410.h ................ #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTARGS "initrd=0x30800000,0x200000 root=/dev/ram init=/linuxrc console=ttyS0,115200" #define CONFIG_LOAD_BOOT_FILE_NAME "vmlinux" #define CFG_LOAD_ADDR 0x32000000 #define CONFIG_LOAD_INITRD_FILE_NAME "ramdisk" #define CONFIG_LOAD_INITRD_FILE_ADDR 0x30800000 #define CONFIG_BOOTCOMMAND "nand read 32000000 80000 120000; nand read 30800000 300000 200000" .......... it's the start info U-Boot 1.0.2 (Jun 16 2005 - 12:21:47) U-Boot code: 33F00000 -> 33F388B4 BSS: -> 33F7B104 RAM Configuration: Bank #0: 30000000 64 MB start....## Unknown FLASH on Bank 0: ID 0xffff, Size = 0x00000000 = 0 MB Flash: 0 kB NAND: 64 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Hit any key to stop autoboot: 0 NAND read: device 0 offset 524288, size 1179648 ... 1179648 bytes read: OK NAND read: device 0 offset 3145728, size 2097152 ... 2097152 bytes read: OK ## Booting image at 32000000 ... Bad Magic Number SMDK2410 # zzh 2005/6/16

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[U-Boot-Users] "need help in mkfs.jffs2"
by nreddy＠netenrich.com 16 Jun '05

16 Jun '05

Hi Friends, This question may not be suitable for this group ,but still i have some home to get some clue on this issue. I have four files : 1)uImage(Linux Kernel) 2)initrd(File system) 3)Application_1 (Custom Alllication binary) 4)Application_1 (Custom Alllication binary) I have used mkfs.jffs2 tool to create "runImg" which is being loaded into my embedded system. I have loaded this file and this is working fine. Here the size of the "runImg" is less than the sum of all above 4 files. Now we need to put some more applications into the system. To achieve this i have zipped "Application_1 binary" and then created "runImg". This file also working fine,but the size of "runImg" is bigger than the sum of all above 4 files now(here Application_1 is zipped one). So i could not save any space after zipping one of the application. Can anyone help me in finding: why the mkfs.jffs2 is increasing file size when there are any zipped files? I have tried all the options of mkfs.jffs2,but could not succeded.. Thanks in Advance, Nagi Reddy

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Re: [U-Boot-Users] Patch to cpu/mpc8260/speed.c
by KokHow Teh 16 Jun '05

16 Jun '05

Hi; Sorry it was the MPC8280RMAD document that I was referring to. Regards, TEH "KokHow Teh" <KokHow.Teh(a)marconi.com>@lists.sourceforge.net on 06/16/2005 02:46:21 PM Sent by: u-boot-users-admin(a)lists.sourceforge.net To: u-boot-users(a)lists.sourceforge.net cc: Subject: [U-Boot-Users] Patch to cpu/mpc8260/speed.c Hi; I am using u-boot-1.1.2 and I am sending this minor patch to the cpu/mpc8260/speed.c file in view of MPC8280EC document which lays down how the PCIDF is calculated but not reflected correctly in the file. Index: cpu/mpc8260/speed.c =================================================================== RCS file: /usr/cvsroot/u-boot/cpu/mpc8260/speed.c,v retrieving revision 1.2 diff -u -b -B -r1.2 speed.c --- cpu/mpc8260/speed.c 28 Apr 2005 07:01:04 -0000 1.2 +++ cpu/mpc8260/speed.c 16 Jun 2005 04:35:12 -0000 @@ -202,11 +202,12 @@ volatile immap_t *immap = (immap_t *) CFG_IMMR; ulong sccr, dfbrg; - ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf; + ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf, pcidf; corecnf_t *cp; sccr = immap->im_clkrst.car_sccr; dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT; + pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; scmr = immap->im_clkrst.car_scmr; corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT; @@ -243,8 +244,8 @@ cp->vco_div, cp->freq_60x, cp->freq_core); printf (" - dfbrg %ld, corecnf 0x%02lx, busdf %ld, cpmdf %ld, " - "plldf %ld, pllmf %ld\n", dfbrg, corecnf, busdf, cpmdf, plldf, - pllmf); + "plldf %ld, pllmf %ld, pcidf %ld\n", dfbrg, corecnf, busdf, cpmdf, plldf, + pllmf, pcidf); printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n", gd->vco_out, gd->scc_clk, gd->brg_clk); @@ -253,10 +254,18 @@ gd->cpu_clk, gd->cpm_clk, gd->bus_clk); if (sccr & SCCR_PCI_MODE) { - uint pci_div; + uint pci_div, pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; - pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) * - ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1); + if (sccr & SCCR_PCI_MODCK) { + pci_div = 2; + if (pcidf == 9) + pci_div *= 5; + else if (pcidf == 0xB) + pci_div *= 6; + else + pci_div *= (pcidf + 1); + } else + pci_div = pcidf + 1; printf (" - pci_clk %10ld\n", (gd->cpm_clk * 2) / pci_div); } Regards, TEH ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. Find simple to follow Roadmaps, straightforward articles, informative Webcasts and more! Get everything you need to get up to speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode?
by KokHow Teh 16 Jun '05

16 Jun '05

Oops, sorry it should be "0" PCI_MODCK = 0 : PCICLK = MODCK PCI_MODCK = 1: PCICLK = MODCK / 2 "KokHow Teh" <KokHow.Teh(a)marconi.com>@lists.sourceforge.net on 06/16/2005 01:01:43 PM Sent by: u-boot-users-admin(a)lists.sourceforge.net To: "Yuli Barcohen <yuli" <yuli(a)arabellasw.com>, u-boot-users(a)lists.sourceforge.net cc: Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode? Hi; I have got the PCI interface of the board to run at 66.7 MHz by setting PCIMODCK to "1" at SW6. Regards, TEH "KokHow Teh" <KokHow.Teh(a)marconi.com>@lists.sourceforge.net on 06/16/2005 11:43:25 AM Sent by: u-boot-users-admin(a)lists.sourceforge.net To: "Yuli Barcohen <yuli" <yuli(a)arabellasw.com>, u-boot-users(a)lists.sourceforge.net cc: Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode? Hi; I have managed to boot up the board into PCI mode after looking at the various clock configuration modes laid down in MPC8280EC document. However, I have tried with some values but I can't get PCI to run at 66.7 MHz. In addition, the PCIDF read from SCCR does not seem to match the values laid down in the document with the MODCK values configured at SW6. Please advise if anyone has managed to get the PCI interface of PQ2FADS-ZU to run at 66.7 MHz. Thanks. /* CONFIG_PCI : 1010_010 - 1010_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10) MPC8260 Reset Status: External Soft, External Hard MPC8260 Clock Configuration - Bus-to-Core Mult 4x, VCO Div -1, 60x Bus Freq 25-75 , Core Freq 100-300 - dfbrg 1, corecnf 0x0a, busdf 3, cpmdf 1, plldf 0, pllmf 3, pcidf 5 - vco_out 400000000, scc_clk 100000000, brg_clk 25000000 - cpu_clk 400000000, cpm_clk 200000000, bus_clk 100000000 - pci_clk 33333333 CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 400 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot> /* CONFIG_PCI : 1101_000 - 1101_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10) MPC8260 Reset Status: External Soft, External Hard MPC8260 Clock Configuration - Bus-to-Core Mult 3x, VCO Div -1, 60x Bus Freq 16-50 , Core Freq 50-150 - dfbrg 1, corecnf 0x10, busdf 4, cpmdf 1, plldf 0, pllmf 4, pcidf 9 - vco_out 500000000, scc_clk 125000000, brg_clk 31250000 - cpu_clk 300000000, cpm_clk 250000000, bus_clk 100000000 - pci_clk 25000000 CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 300 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot> Regards, TEH Yuli Barcohen <yuli(a)arabellasw.com> on 06/15/2005 11:18:46 PM To: "KokHow Teh" <KokHow.Teh(a)marconi.com> cc: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode? >>>>> KokHow Teh writes: Teh> I am having trouble with my PQ2FADS-ZU board with a PQ2 8280 Teh> processor that when the localbus is put into PCI mode with LBPC Teh> = 01, all accesses to 60x bus SDRAM fails. Uboot failed in Teh> get_ram_size() routine. The selection of localbus operation Teh> mode is done by SW9. Switch the jumper back to localbus SDRAM Teh> mode, U-boot boots to the prompt and access to 60x SDRAM is Teh> fine. Does anybody have similar experience? Any insight is Teh> appreciated. Such a configuration works OK for me. There are some things to check. You don't write what HRCW you use: from BCSR or from flash. If the latter, you have to change pin assignment bits and MODCKH accordingly. Also, clocks are calculated differently in PCI and local bus modes. Check the MODCK/MODCKH values (SW6). Valid local bus mode values can be invalid in PCI mode. -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ======================================================================== ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. Find simple to follow Roadmaps, straightforward articles, informative Webcasts and more! Get everything you need to get up to speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. Find simple to follow Roadmaps, straightforward articles, informative Webcasts and more! Get everything you need to get up to speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode?
by KokHow Teh 16 Jun '05

16 Jun '05

Hi; I have got the PCI interface of the board to run at 66.7 MHz by setting PCIMODCK to "1" at SW6. Regards, TEH "KokHow Teh" <KokHow.Teh(a)marconi.com>@lists.sourceforge.net on 06/16/2005 11:43:25 AM Sent by: u-boot-users-admin(a)lists.sourceforge.net To: "Yuli Barcohen <yuli" <yuli(a)arabellasw.com>, u-boot-users(a)lists.sourceforge.net cc: Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode? Hi; I have managed to boot up the board into PCI mode after looking at the various clock configuration modes laid down in MPC8280EC document. However, I have tried with some values but I can't get PCI to run at 66.7 MHz. In addition, the PCIDF read from SCCR does not seem to match the values laid down in the document with the MODCK values configured at SW6. Please advise if anyone has managed to get the PCI interface of PQ2FADS-ZU to run at 66.7 MHz. Thanks. /* CONFIG_PCI : 1010_010 - 1010_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10) MPC8260 Reset Status: External Soft, External Hard MPC8260 Clock Configuration - Bus-to-Core Mult 4x, VCO Div -1, 60x Bus Freq 25-75 , Core Freq 100-300 - dfbrg 1, corecnf 0x0a, busdf 3, cpmdf 1, plldf 0, pllmf 3, pcidf 5 - vco_out 400000000, scc_clk 100000000, brg_clk 25000000 - cpu_clk 400000000, cpm_clk 200000000, bus_clk 100000000 - pci_clk 33333333 CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 400 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot> /* CONFIG_PCI : 1101_000 - 1101_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10) MPC8260 Reset Status: External Soft, External Hard MPC8260 Clock Configuration - Bus-to-Core Mult 3x, VCO Div -1, 60x Bus Freq 16-50 , Core Freq 50-150 - dfbrg 1, corecnf 0x10, busdf 4, cpmdf 1, plldf 0, pllmf 4, pcidf 9 - vco_out 500000000, scc_clk 125000000, brg_clk 31250000 - cpu_clk 300000000, cpm_clk 250000000, bus_clk 100000000 - pci_clk 25000000 CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 300 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot> Regards, TEH Yuli Barcohen <yuli(a)arabellasw.com> on 06/15/2005 11:18:46 PM To: "KokHow Teh" <KokHow.Teh(a)marconi.com> cc: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode? >>>>> KokHow Teh writes: Teh> I am having trouble with my PQ2FADS-ZU board with a PQ2 8280 Teh> processor that when the localbus is put into PCI mode with LBPC Teh> = 01, all accesses to 60x bus SDRAM fails. Uboot failed in Teh> get_ram_size() routine. The selection of localbus operation Teh> mode is done by SW9. Switch the jumper back to localbus SDRAM Teh> mode, U-boot boots to the prompt and access to 60x SDRAM is Teh> fine. Does anybody have similar experience? Any insight is Teh> appreciated. Such a configuration works OK for me. There are some things to check. You don't write what HRCW you use: from BCSR or from flash. If the latter, you have to change pin assignment bits and MODCKH accordingly. Also, clocks are calculated differently in PCI and local bus modes. Check the MODCK/MODCKH values (SW6). Valid local bus mode values can be invalid in PCI mode. -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ======================================================================== ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. Find simple to follow Roadmaps, straightforward articles, informative Webcasts and more! Get everything you need to get up to speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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