[U-Boot] [PATCH 1/3] omap3_spi: Undo CONFIG_AM33XX D0/D1 change
At some point the am335x evm hardware was updated to previosly used in all other designs layout, so remove the now incorrect code.
Signed-off-by: Tom Rini trini@ti.com --- drivers/spi/omap3_spi.c | 10 ---------- 1 file changed, 10 deletions(-)
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index e40a632..47f9e56 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -173,18 +173,8 @@ int spi_claim_bus(struct spi_slave *slave) /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS * REVISIT: this controller could support SPI_3WIRE mode. */ -#ifdef CONFIG_AM33XX - /* - * The reference design on AM33xx has D0 and D1 wired up opposite - * of how it has been done on previous platforms. We assume that - * custom hardware will also follow this convention. - */ - conf &= OMAP3_MCSPI_CHCONF_DPE0; - conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); -#else conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); conf |= OMAP3_MCSPI_CHCONF_DPE0; -#endif
/* wordlength */ conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK;
Add MLO.byteswap as a target to spl/Makefile and un-guard the first MLO rule so we don't have to duplicate it.
Signed-off-by: Tom Rini trini@ti.com --- spl/Makefile | 9 ++---- tools/omapimage.c | 83 +++++++++++++++++++++++++++++++++++++++++------------ 2 files changed, 68 insertions(+), 24 deletions(-)
diff --git a/spl/Makefile b/spl/Makefile index e9d0ec4..000cafa 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -110,16 +110,13 @@ LDPPFLAGS += \ $(shell $(LD) --version | \ sed -ne 's/GNU ld version ([0-9][0-9]*).([0-9][0-9]*).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
-ifdef CONFIG_OMAP $(OBJTREE)/MLO: $(obj)u-boot-spl.bin $(OBJTREE)/tools/mkimage -T omapimage \ -a $(CONFIG_SPL_TEXT_BASE) -d $< $@ -endif -ifdef CONFIG_AM33XX -$(OBJTREE)/MLO: $(obj)u-boot-spl.bin - $(OBJTREE)/tools/mkimage -T omapimage \ + +$(OBJTREE)/MLO.byteswap: $(obj)u-boot-spl.bin + $(OBJTREE)/tools/mkimage -T omapimage -n byteswap \ -a $(CONFIG_SPL_TEXT_BASE) -d $< $@ -endif
ALL-y += $(obj)u-boot-spl.bin
diff --git a/tools/omapimage.c b/tools/omapimage.c index 5e739ac..d242cca 100644 --- a/tools/omapimage.c +++ b/tools/omapimage.c @@ -42,6 +42,18 @@ #define OMAP_GP_HDR_SIZE (sizeof(struct gp_header)) #define OMAP_FILE_HDR_SIZE (OMAP_CH_HDR_SIZE+OMAP_GP_HDR_SIZE)
+static int do_swap32 = 0; + +static uint32_t omapimage_swap32(uint32_t data) +{ + uint32_t result = 0; + result = (data & 0xFF000000) >> 24; + result |= (data & 0x00FF0000) >> 8; + result |= (data & 0x0000FF00) << 8; + result |= (data & 0x000000FF) << 24; + return result; +} + static uint8_t omapimage_header[OMAP_FILE_HDR_SIZE];
static int omapimage_check_image_types(uint8_t type) @@ -80,12 +92,17 @@ static int omapimage_verify_header(unsigned char *ptr, int image_size, { struct ch_toc *toc = (struct ch_toc *)ptr; struct gp_header *gph = (struct gp_header *)(ptr+OMAP_CH_HDR_SIZE); - uint32_t offset, size; + uint32_t offset, size, gph_size, gph_load_addr;
while (toc->section_offset != 0xffffffff && toc->section_size != 0xffffffff) { - offset = toc->section_offset; - size = toc->section_size; + if (do_swap32) { + offset = omapimage_swap32(toc->section_offset); + size = omapimage_swap32(toc->section_size); + } else { + offset = toc->section_offset; + size = toc->section_size; + } if (!offset || !size) return -1; if (offset >= OMAP_CH_HDR_SIZE || @@ -93,9 +110,18 @@ static int omapimage_verify_header(unsigned char *ptr, int image_size, return -1; toc++; } - if (!valid_gph_size(gph->size)) + + if (do_swap32) { + gph_size = omapimage_swap32(gph->size); + gph_load_addr = omapimage_swap32(gph->load_addr); + } else { + gph_size = gph->size; + gph_load_addr = gph->load_addr; + } + + if (!valid_gph_size(gph_size)) return -1; - if (!valid_gph_load_addr(gph->load_addr)) + if (!valid_gph_load_addr(gph_load_addr)) return -1;
return 0; @@ -128,12 +154,17 @@ static void omapimage_print_header(const void *ptr) const struct ch_toc *toc = (struct ch_toc *)ptr; const struct gp_header *gph = (struct gp_header *)(ptr+OMAP_CH_HDR_SIZE); - uint32_t offset, size; + uint32_t offset, size, gph_size, gph_load_addr;
while (toc->section_offset != 0xffffffff && toc->section_size != 0xffffffff) { - offset = toc->section_offset; - size = toc->section_size; + if (do_swap32) { + offset = omapimage_swap32(toc->section_offset); + size = omapimage_swap32(toc->section_size); + } else { + offset = toc->section_offset; + size = toc->section_size; + }
if (offset >= OMAP_CH_HDR_SIZE || offset+size >= OMAP_CH_HDR_SIZE) @@ -148,22 +179,26 @@ static void omapimage_print_header(const void *ptr) toc++; }
- if (!valid_gph_size(gph->size)) { - fprintf(stderr, - "Error: invalid image size %x\n", - gph->size); + if (do_swap32) { + gph_size = omapimage_swap32(gph->size); + gph_load_addr = omapimage_swap32(gph->load_addr); + } else { + gph_size = gph->size; + gph_load_addr = gph->load_addr; + } + + if (!valid_gph_size(gph_size)) { + fprintf(stderr, "Error: invalid image size %x\n", gph_size); exit(EXIT_FAILURE); }
- if (!valid_gph_load_addr(gph->load_addr)) { - fprintf(stderr, - "Error: invalid image load address %x\n", - gph->size); + if (!valid_gph_load_addr(gph_load_addr)) { + fprintf(stderr, "Error: invalid image load address %x\n", + gph_load_addr); exit(EXIT_FAILURE); }
- printf("GP Header: Size %x LoadAddr %x\n", - gph->size, gph->load_addr); + printf("GP Header: Size %x LoadAddr %x\n", gph_size, gph_load_addr); }
static int toc_offset(void *hdr, void *member) @@ -194,6 +229,18 @@ static void omapimage_set_header(void *ptr, struct stat *sbuf, int ifd,
gph->size = sbuf->st_size - OMAP_FILE_HDR_SIZE; gph->load_addr = params->addr; + + if (strncmp(params->imagename, "byteswap", 8) == 0) { + do_swap32 = 1; + int swapped = 0; + uint32_t *data = (uint32_t *)ptr; + + while (swapped <= (sbuf->st_size / sizeof(uint32_t))) { + *data = omapimage_swap32(*data); + swapped++; + data++; + } + } }
int omapimage_check_params(struct mkimage_params *params)
Add the required config.mk logic for this SoC as well as the BOOT_DEVICE define. Finally, enable the options on the am335x_evm.
Signed-off-by: Tom Rini trini@ti.com --- arch/arm/cpu/armv7/am33xx/config.mk | 1 + arch/arm/include/asm/arch-am33xx/spl.h | 1 + include/configs/am335x_evm.h | 7 +++++++ 3 files changed, 9 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/config.mk b/arch/arm/cpu/armv7/am33xx/config.mk index 5750bbd..babf0eb 100644 --- a/arch/arm/cpu/armv7/am33xx/config.mk +++ b/arch/arm/cpu/armv7/am33xx/config.mk @@ -13,6 +13,7 @@ # ifdef CONFIG_SPL_BUILD ALL-y += $(OBJTREE)/MLO +ALL-$(CONFIG_SPL_SPI_SUPPORT) += $(OBJTREE)/MLO.byteswap else ALL-y += $(obj)u-boot.img endif diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h index 63ed10b..644ff35 100644 --- a/arch/arm/include/asm/arch-am33xx/spl.h +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -27,6 +27,7 @@ #define BOOT_DEVICE_NAND 5 #define BOOT_DEVICE_MMC1 8 #define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */ +#define BOOT_DEVICE_SPI 11 #define BOOT_DEVICE_UART 65 #define BOOT_DEVICE_CPGMAC 70 #define BOOT_DEVICE_MMC2_2 0xFF diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 9d80739..58d62d0 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -218,6 +218,13 @@ #define CONFIG_SPL_NET_SUPPORT #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" #define CONFIG_SPL_ETH_SUPPORT +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
/*
"Tom" == Tom Rini trini@ti.com writes:
Tom> Add the required config.mk logic for this SoC as well as the BOOT_DEVICE Tom> define. Finally, enable the options on the am335x_evm.
Tom> Signed-off-by: Tom Rini trini@ti.com Tom> --- Tom> arch/arm/cpu/armv7/am33xx/config.mk | 1 + Tom> arch/arm/include/asm/arch-am33xx/spl.h | 1 + Tom> include/configs/am335x_evm.h | 7 +++++++ Tom> 3 files changed, 9 insertions(+)
Tom> diff --git a/arch/arm/cpu/armv7/am33xx/config.mk b/arch/arm/cpu/armv7/am33xx/config.mk Tom> index 5750bbd..babf0eb 100644 Tom> --- a/arch/arm/cpu/armv7/am33xx/config.mk Tom> +++ b/arch/arm/cpu/armv7/am33xx/config.mk Tom> @@ -13,6 +13,7 @@ Tom> # Tom> ifdef CONFIG_SPL_BUILD Tom> ALL-y += $(OBJTREE)/MLO Tom> +ALL-$(CONFIG_SPL_SPI_SUPPORT) += $(OBJTREE)/MLO.byteswap Tom> else Tom> ALL-y += $(obj)u-boot.img Tom> endif Tom> diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h Tom> index 63ed10b..644ff35 100644 Tom> --- a/arch/arm/include/asm/arch-am33xx/spl.h Tom> +++ b/arch/arm/include/asm/arch-am33xx/spl.h Tom> @@ -27,6 +27,7 @@ Tom> #define BOOT_DEVICE_NAND 5 Tom> #define BOOT_DEVICE_MMC1 8 Tom> #define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */ Tom> +#define BOOT_DEVICE_SPI 11
11? According to the TRM (spuh73f, pg4295) spi is 21.
On Wed, Oct 17, 2012 at 08:47:57AM +0200, Peter Korsgaard wrote:
"Tom" == Tom Rini trini@ti.com writes:
Tom> Add the required config.mk logic for this SoC as well as the BOOT_DEVICE Tom> define. Finally, enable the options on the am335x_evm.
Tom> Signed-off-by: Tom Rini trini@ti.com Tom> --- Tom> arch/arm/cpu/armv7/am33xx/config.mk | 1 + Tom> arch/arm/include/asm/arch-am33xx/spl.h | 1 + Tom> include/configs/am335x_evm.h | 7 +++++++ Tom> 3 files changed, 9 insertions(+)
Tom> diff --git a/arch/arm/cpu/armv7/am33xx/config.mk b/arch/arm/cpu/armv7/am33xx/config.mk Tom> index 5750bbd..babf0eb 100644 Tom> --- a/arch/arm/cpu/armv7/am33xx/config.mk Tom> +++ b/arch/arm/cpu/armv7/am33xx/config.mk Tom> @@ -13,6 +13,7 @@ Tom> # Tom> ifdef CONFIG_SPL_BUILD Tom> ALL-y += $(OBJTREE)/MLO Tom> +ALL-$(CONFIG_SPL_SPI_SUPPORT) += $(OBJTREE)/MLO.byteswap Tom> else Tom> ALL-y += $(obj)u-boot.img Tom> endif Tom> diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h Tom> index 63ed10b..644ff35 100644 Tom> --- a/arch/arm/include/asm/arch-am33xx/spl.h Tom> +++ b/arch/arm/include/asm/arch-am33xx/spl.h Tom> @@ -27,6 +27,7 @@ Tom> #define BOOT_DEVICE_NAND 5 Tom> #define BOOT_DEVICE_MMC1 8 Tom> #define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */ Tom> +#define BOOT_DEVICE_SPI 11
11? According to the TRM (spuh73f, pg4295) spi is 21.
Correct. I hadn't seen the table before and all of those numbers come from run-time testing. I'm filing a bug against the TRM now, thanks!
"Tom" == Tom Rini trini@ti.com writes:
Tom> At some point the am335x evm hardware was updated to previosly Tom> used in all other designs layout, so remove the now incorrect Tom> code.
Could we please just put it under a different symbol, E.G. CONFIG_OMAP3_SPI_SWAPPED? The board I'm working on uses the same wiring as the old evm (E.G. transmit on D0 and receive on D1).
Tom> Signed-off-by: Tom Rini trini@ti.com Tom> --- Tom> drivers/spi/omap3_spi.c | 10 ---------- Tom> 1 file changed, 10 deletions(-)
Tom> diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c Tom> index e40a632..47f9e56 100644 Tom> --- a/drivers/spi/omap3_spi.c Tom> +++ b/drivers/spi/omap3_spi.c Tom> @@ -173,18 +173,8 @@ int spi_claim_bus(struct spi_slave *slave) Tom> /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS Tom> * REVISIT: this controller could support SPI_3WIRE mode. Tom> */ Tom> -#ifdef CONFIG_AM33XX Tom> - /* Tom> - * The reference design on AM33xx has D0 and D1 wired up opposite Tom> - * of how it has been done on previous platforms. We assume that Tom> - * custom hardware will also follow this convention. Tom> - */ Tom> - conf &= OMAP3_MCSPI_CHCONF_DPE0; Tom> - conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
The inversion seems wrong. DPE0 should be cleared and IS|DPE1 set.
Tom> -#else Tom> conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); Tom> conf |= OMAP3_MCSPI_CHCONF_DPE0; Tom> -#endif
Tom> /* wordlength */ Tom> conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK; Tom> -- Tom> 1.7.9.5
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 10/17/12 00:05, Peter Korsgaard wrote:
"Tom" == Tom Rini trini@ti.com writes:
Tom> At some point the am335x evm hardware was updated to previosly Tom> used in all other designs layout, so remove the now incorrect Tom> code.
Could we please just put it under a different symbol, E.G. CONFIG_OMAP3_SPI_SWAPPED? The board I'm working on uses the same wiring as the old evm (E.G. transmit on D0 and receive on D1).
Tom> Signed-off-by: Tom Rini trini@ti.com Tom> --- Tom> drivers/spi/omap3_spi.c | 10 ---------- Tom> 1 file changed, 10 deletions(-)
Tom> diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c Tom> index e40a632..47f9e56 100644 Tom> --- a/drivers/spi/omap3_spi.c Tom> +++ b/drivers/spi/omap3_spi.c Tom> @@ -173,18 +173,8 @@ int spi_claim_bus(struct spi_slave *slave) Tom> /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS Tom> * REVISIT: this controller could support SPI_3WIRE mode. Tom> */ Tom> -#ifdef CONFIG_AM33XX Tom> - /* Tom> - * The reference design on AM33xx has D0 and D1 wired up opposite Tom> - * of how it has been done on previous platforms. We assume that Tom> - * custom hardware will also follow this convention. Tom> - */ Tom> - conf &= OMAP3_MCSPI_CHCONF_DPE0; Tom>
- conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
The inversion seems wrong. DPE0 should be cleared and IS|DPE1 set.
Tom> -#else Tom> conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); Tom> conf |= OMAP3_MCSPI_CHCONF_DPE0; Tom> -#endif
Tom> /* wordlength */ Tom> conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK;
Alright, can you post a patch that works for you? Thanks!
- -- Tom
participants (2)
-
Peter Korsgaard -
Tom Rini