[U-Boot] [PATCH 0/6] EXYNOS: Add support for Exynos4x10
This patch series adds Register base addresses, clock, gpio, power and system structures for Exynos4x10.
Piotr Wilczek (6): Exynos: Exynos4x10: Add base addresses for Exynos4x10 Exynos: Exynos4x10: Add clock structure for exynos4x10 Exynos: Exynos4x10: Add gpio structure for Exynos4X10 Exynos: Exynos4x10: add power structure for Exynos4x10 Exynos: Exynos4x10: add sysreg structure for exynos4x10 arm: trats: Use exynos4x10 structures on Trats board
arch/arm/include/asm/arch-exynos/clock.h | 236 +++++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/cpu.h | 43 +++++- arch/arm/include/asm/arch-exynos/gpio.h | 47 ++++++ arch/arm/include/asm/arch-exynos/power.h | 201 ++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/system.h | 9 + board/samsung/trats/trats.c | 40 +++--- 6 files changed, 551 insertions(+), 25 deletions(-)
This patch add base addresses for Exynos4x10 registers.
Signed-off-by: Piotr Wilczek p.wilczek@samsung.com Signed-off-by: Kyungmin Park kyungmin.park@samsung.com CC: Minkyu Kang mk7.kang@samsung.com --- Depends on 1349171443-13624-1-git-send-email-chander.kashyap@linaro.org
arch/arm/include/asm/arch-exynos/cpu.h | 43 ++++++++++++++++++++++++++++--- 1 files changed, 38 insertions(+), 5 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 3ecb7d5..76ee668 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -60,6 +60,36 @@ #define EXYNOS4_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4_DP_BASE DEVICE_NOT_AVAILABLE
+/* EXYNOS4X10 */ +#define EXYNOS4X10_GPIO_PART3_BASE 0x03860000 +#define EXYNOS4X10_PRO_ID 0x10000000 +#define EXYNOS4X10_SYSREG_BASE 0x10010000 +#define EXYNOS4X10_POWER_BASE 0x10020000 +#define EXYNOS4X10_SWRESET 0x10020400 +#define EXYNOS4X10_CLOCK_BASE 0x10030000 +#define EXYNOS4X10_SYSTIMER_BASE 0x10050000 +#define EXYNOS4X10_WATCHDOG_BASE 0x10060000 +#define EXYNOS4X10_MIU_BASE 0x10600000 +#define EXYNOS4X10_DMC0_BASE 0x10400000 +#define EXYNOS4X10_DMC1_BASE 0x10410000 +#define EXYNOS4X10_GPIO_PART2_BASE 0x11000000 +#define EXYNOS4X10_GPIO_PART1_BASE 0x11400000 +#define EXYNOS4X10_FIMD_BASE 0x11C00000 +#define EXYNOS4X10_MIPI_DSIM_BASE 0x11C80000 +#define EXYNOS4X10_USBOTG_BASE 0x12480000 +#define EXYNOS4X10_MMC_BASE 0x12510000 +#define EXYNOS4X10_SROMC_BASE 0x12570000 +#define EXYNOS4X10_USB_HOST_EHCI_BASE 0x12580000 +#define EXYNOS4X10_USBPHY_BASE 0x125B0000 +#define EXYNOS4X10_UART_BASE 0x13800000 +#define EXYNOS4X10_I2C_BASE 0x13860000 +#define EXYNOS4X10_ADC_BASE 0x13910000 +#define EXYNOS4X10_PWMTIMER_BASE 0x139D0000 +#define EXYNOS4X10_MODEM_BASE 0x13A00000 + +#define EXYNOS4X10_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X10_DP_BASE DEVICE_NOT_AVAILABLE + /* EXYNOS5 */ #define EXYNOS5_I2C_SPACING 0x10000
@@ -153,12 +183,15 @@ IS_EXYNOS_TYPE(exynos5250, 0x5250) #define SAMSUNG_BASE(device, base) \ static inline unsigned int samsung_get_base_##device(void) \ { \ - if (cpu_is_exynos4()) \ - return EXYNOS4_##base; \ - else if (cpu_is_exynos5()) \ + if (cpu_is_exynos4()) { \ + if (proid_is_exynos4210()) \ + return EXYNOS4X10_##base; \ + else \ + return EXYNOS4_##base; \ + } else if (cpu_is_exynos5()) { \ return EXYNOS5_##base; \ - else \ - return 0; \ + } \ + return 0; \ }
SAMSUNG_BASE(adc, ADC_BASE)
This patch adds clock structure for Exynos4x10.
Signed-off-by: Piotr Wilczek p.wilczek@samsung.com Signed-off-by: Kyungmin Park kyungmin.park@samsung.com CC: Minkyu Kang mk7.kang@samsung.com --- arch/arm/include/asm/arch-exynos/clock.h | 236 ++++++++++++++++++++++++++++++ 1 files changed, 236 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/clock.h b/arch/arm/include/asm/arch-exynos/clock.h index fce38ef..1b5c48c 100644 --- a/arch/arm/include/asm/arch-exynos/clock.h +++ b/arch/arm/include/asm/arch-exynos/clock.h @@ -251,6 +251,242 @@ struct exynos4_clock { unsigned int div_iem_l1; };
+struct exynos4x10_clock { + unsigned char res1[0x4200]; + unsigned int src_leftbus; + unsigned char res2[0x1fc]; + unsigned int mux_stat_leftbus; + unsigned char res4[0xfc]; + unsigned int div_leftbus; + unsigned char res5[0xfc]; + unsigned int div_stat_leftbus; + unsigned char res6[0x1fc]; + unsigned int gate_ip_leftbus; + unsigned char res7[0x1fc]; + unsigned int clkout_leftbus; + unsigned int clkout_leftbus_div_stat; + unsigned char res8[0x37f8]; + unsigned int src_rightbus; + unsigned char res9[0x1fc]; + unsigned int mux_stat_rightbus; + unsigned char res10[0xfc]; + unsigned int div_rightbus; + unsigned char res11[0xfc]; + unsigned int div_stat_rightbus; + unsigned char res12[0x1fc]; + unsigned int gate_ip_rightbus; + unsigned char res13[0x1fc]; + unsigned int clkout_rightbus; + unsigned int clkout_rightbus_div_stat; + unsigned char res14[0x3608]; + unsigned int epll_lock; + unsigned char res15[0xc]; + unsigned int vpll_lock; + unsigned char res16[0xec]; + unsigned int epll_con0; + unsigned int epll_con1; + unsigned char res17[0x8]; + unsigned int vpll_con0; + unsigned int vpll_con1; + unsigned char res18[0xe8]; + unsigned int src_top0; + unsigned int src_top1; + unsigned char res19[0x8]; + unsigned int src_cam; + unsigned int src_tv; + unsigned int src_mfc; + unsigned int src_g3d; + unsigned int src_image; + unsigned int src_lcd0; + unsigned int src_lcd1; + unsigned int src_maudio; + unsigned int src_fsys; + unsigned char res20[0xc]; + unsigned int src_peril0; + unsigned int src_peril1; + unsigned char res21[0xb8]; + unsigned int src_mask_top; + unsigned char res22[0xc]; + unsigned int src_mask_cam; + unsigned int src_mask_tv; + unsigned char res23[0xc]; + unsigned int src_mask_lcd0; + unsigned int src_mask_lcd1; + unsigned int src_mask_maudio; + unsigned int src_mask_fsys; + unsigned char res24[0xc]; + unsigned int src_mask_peril0; + unsigned int src_mask_peril1; + unsigned char res25[0xb8]; + unsigned int mux_stat_top; + unsigned char res26[0x14]; + unsigned int mux_stat_mfc; + unsigned int mux_stat_g3d; + unsigned int mux_stat_image; + unsigned char res27[0xdc]; + unsigned int div_top; + unsigned char res28[0xc]; + unsigned int div_cam; + unsigned int div_tv; + unsigned int div_mfc; + unsigned int div_g3d; + unsigned int div_image; + unsigned int div_lcd0; + unsigned int div_lcd1; + unsigned int div_maudio; + unsigned int div_fsys0; + unsigned int div_fsys1; + unsigned int div_fsys2; + unsigned int div_fsys3; + unsigned int div_peril0; + unsigned int div_peril1; + unsigned int div_peril2; + unsigned int div_peril3; + unsigned int div_peril4; + unsigned int div_peril5; + unsigned char res29[0x18]; + unsigned int div2_ratio; + unsigned char res30[0x8c]; + unsigned int div_stat_top; + unsigned char res31[0xc]; + unsigned int div_stat_cam; + unsigned int div_stat_tv; + unsigned int div_stat_mfc; + unsigned int div_stat_g3d; + unsigned int div_stat_image; + unsigned int div_stat_lcd0; + unsigned int div_stat_lcd1; + unsigned int div_stat_maudio; + unsigned int div_stat_fsys0; + unsigned int div_stat_fsys1; + unsigned int div_stat_fsys2; + unsigned int div_stat_fsys3; + unsigned int div_stat_peril0; + unsigned int div_stat_peril1; + unsigned int div_stat_peril2; + unsigned int div_stat_peril3; + unsigned int div_stat_peril4; + unsigned int div_stat_peril5; + unsigned char res32[0x18]; + unsigned int div2_stat; + unsigned char res33[0x19c]; + unsigned int gate_sclk_cam; + unsigned char res34[0x0fc]; + unsigned int gate_ip_cam; + unsigned int gate_ip_tv; + unsigned int gate_ip_mfc; + unsigned int gate_ip_g3d; + unsigned int gate_ip_image; + unsigned int gate_ip_lcd0; + unsigned int gate_ip_lcd1; + unsigned char res35[0x4]; + unsigned int gate_ip_fsys; + unsigned char res36[0x8]; + unsigned int gate_ip_gps; + unsigned int gate_ip_peril; + unsigned char res37[0xc]; + unsigned int gate_ip_perir; + unsigned char res38[0xc]; + unsigned int gate_block; + unsigned char res39[0x8c]; + unsigned int clkout_cmu_top; + unsigned int clkout_cmu_top_div_stat; + unsigned char res40[0x37f8]; + unsigned int src_dmc; + unsigned char res41[0xfc]; + unsigned int src_mask_dmc; + unsigned char res42[0xfc]; + unsigned int mux_stat_dmc; + unsigned char res43[0xfc]; + unsigned int div_dmc0; + unsigned int div_dmc1; + unsigned char res44[0xf8]; + unsigned int div_stat_dmc0; + unsigned int div_stat_dmc1; + unsigned char res45[0x2f8]; + unsigned int gate_ip_dmc; + unsigned char res46[0xfc]; + unsigned int clkout_cmu_dmc; + unsigned int clkout_cmu_dmc_div_stat; + unsigned char res47[0x5f8]; + unsigned int dcgidx_map0; + unsigned int dcgidx_map1; + unsigned int dcgidx_map2; + unsigned char res48[0x14]; + unsigned int dcgperf_map0; + unsigned int dcgperf_map1; + unsigned char res49[0x18]; + unsigned int dvcidx_map; + unsigned char res50[0x1c]; + unsigned int freq_cpu; + unsigned int freq_dpm; + unsigned char res51[0x18]; + unsigned int dvsemclk_en; + unsigned int maxperf; + unsigned char res52[0x2f78]; + unsigned int apll_lock; + unsigned char res53[0x4]; + unsigned int mpll_lock; + unsigned char res54[0xf4]; + unsigned int apll_con0; + unsigned int apll_con1; + unsigned int mpll_con0; + unsigned int mpll_con1; + unsigned char res55[0xf0]; + unsigned int src_cpu; + unsigned char res56[0x1fc]; + unsigned int mux_stat_cpu; + unsigned char res57[0xfc]; + unsigned int div_cpu0; + unsigned int div_cpu1; + unsigned char res58[0xf8]; + unsigned int div_stat_cpu0; + unsigned int div_stat_cpu1; + unsigned char res59[0x1f8]; + unsigned int gate_sclk_cpu; + unsigned char res60[0x0fc]; + unsigned int gate_ip_cpu; + unsigned char res61[0x0fc]; + unsigned int clkout_cmu_cpu; + unsigned int clkout_cmu_cpu_div_stat; + unsigned char res62[0x5f8]; + unsigned int armclk_stopctrl; + unsigned int atclk_stopctrl; + unsigned char res63[0x8]; + unsigned int parityfail_status; + unsigned int parityfail_clear; + unsigned char res64[0x8]; + unsigned int pwr_ctrl; + unsigned char res65[0xdc]; + unsigned int apll_con0_l8; + unsigned int apll_con0_l7; + unsigned int apll_con0_l6; + unsigned int apll_con0_l5; + unsigned int apll_con0_l4; + unsigned int apll_con0_l3; + unsigned int apll_con0_l2; + unsigned int apll_con0_l1; + unsigned int iem_control; + unsigned char res66[0xdc]; + unsigned int apll_con1_l8; + unsigned int apll_con1_l7; + unsigned int apll_con1_l6; + unsigned int apll_con1_l5; + unsigned int apll_con1_l4; + unsigned int apll_con1_l3; + unsigned int apll_con1_l2; + unsigned int apll_con1_l1; + unsigned char res67[0xe0]; + unsigned int div_iem_l8; + unsigned int div_iem_l7; + unsigned int div_iem_l6; + unsigned int div_iem_l5; + unsigned int div_iem_l4; + unsigned int div_iem_l3; + unsigned int div_iem_l2; + unsigned int div_iem_l1; +}; + struct exynos5_clock { unsigned int apll_lock; unsigned char res1[0xfc];
This patch adds gpio structure for Exynos4x10.
Signed-off-by: Piotr Wilczek p.wilczek@samsung.com Signed-off-by: Kyungmin Park kyungmin.park@samsung.com CC: Minkyu Kang mk7.kang@samsung.com --- arch/arm/include/asm/arch-exynos/gpio.h | 47 +++++++++++++++++++++++++++++++ 1 files changed, 47 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h index 97be4ea..923802a 100644 --- a/arch/arm/include/asm/arch-exynos/gpio.h +++ b/arch/arm/include/asm/arch-exynos/gpio.h @@ -79,6 +79,53 @@ struct exynos4_gpio_part3 { struct s5p_gpio_bank z; };
+struct exynos4x10_gpio_part1 { + struct s5p_gpio_bank a0; + struct s5p_gpio_bank a1; + struct s5p_gpio_bank b; + struct s5p_gpio_bank c0; + struct s5p_gpio_bank c1; + struct s5p_gpio_bank d0; + struct s5p_gpio_bank d1; + struct s5p_gpio_bank e0; + struct s5p_gpio_bank e1; + struct s5p_gpio_bank e2; + struct s5p_gpio_bank e3; + struct s5p_gpio_bank e4; + struct s5p_gpio_bank f0; + struct s5p_gpio_bank f1; + struct s5p_gpio_bank f2; + struct s5p_gpio_bank f3; +}; + +struct exynos4x10_gpio_part2 { + struct s5p_gpio_bank j0; + struct s5p_gpio_bank j1; + struct s5p_gpio_bank k0; + struct s5p_gpio_bank k1; + struct s5p_gpio_bank k2; + struct s5p_gpio_bank k3; + struct s5p_gpio_bank l0; + struct s5p_gpio_bank l1; + struct s5p_gpio_bank l2; + struct s5p_gpio_bank y0; + struct s5p_gpio_bank y1; + struct s5p_gpio_bank y2; + struct s5p_gpio_bank y3; + struct s5p_gpio_bank y4; + struct s5p_gpio_bank y5; + struct s5p_gpio_bank y6; + struct s5p_gpio_bank res1[80]; + struct s5p_gpio_bank x0; + struct s5p_gpio_bank x1; + struct s5p_gpio_bank x2; + struct s5p_gpio_bank x3; +}; + +struct exynos4x10_gpio_part3 { + struct s5p_gpio_bank z; +}; + struct exynos5_gpio_part1 { struct s5p_gpio_bank a0; struct s5p_gpio_bank a1;
This patch adds power structure for Exynos4x10.
Signed-off-by: Piotr Wilczek p.wilczek@samsung.com Signed-off-by: Kyungmin Park kyungmin.park@samsung.com CC: Minkyu Kang mk7.kang@samsung.com --- arch/arm/include/asm/arch-exynos/power.h | 201 ++++++++++++++++++++++++++++++ 1 files changed, 201 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h index d2fdb59..4eba96c 100644 --- a/arch/arm/include/asm/arch-exynos/power.h +++ b/arch/arm/include/asm/arch-exynos/power.h @@ -226,6 +226,207 @@ struct exynos4_power { unsigned int gps_alive_option; };
+struct exynos4x10_power { + unsigned int om_stat; + unsigned char res1[0x8]; + unsigned int rtc_clko_sel; + unsigned int gnss_rtc_out_ctrl; + unsigned char res2[0x1ec]; + unsigned int system_power_down_ctrl; + unsigned char res3[0x1]; + unsigned int system_power_down_option; + unsigned char res4[0x1f4]; + unsigned int swreset; + unsigned int rst_stat; + unsigned char res5[0x1f8]; + unsigned int wakeup_stat; + unsigned int eint_wakeup_mask; + unsigned int wakeup_mask; + unsigned char res6[0xf4]; + unsigned int hdmi_phy_control; + unsigned int usbdevice_phy_control; + unsigned int usbhost_phy_control; + unsigned int dac_phy_control; + unsigned int mipi_phy0_control; + unsigned int mipi_phy1_control; + unsigned int adc_phy_control; + unsigned int pcie_phy_control; + unsigned int sata_phy_control; + unsigned char res7[0xdc]; + unsigned int inform0; + unsigned int inform1; + unsigned int inform2; + unsigned int inform3; + unsigned int inform4; + unsigned int inform5; + unsigned int inform6; + unsigned int inform7; + unsigned char res8[0x1e0]; + unsigned int pmu_debug; + unsigned char res9[0x5fc]; + unsigned int arm_core0_sys_pwr_reg; + unsigned char res10[0xc]; + unsigned int arm_core1_sys_pwr_reg; + unsigned char res11[0x6c]; + unsigned int arm_common_sys_pwr_reg; + unsigned char res12[0x3c]; + unsigned int arm_cpu_l2_0_sys_pwr_reg; + unsigned int arm_cpu_l2_1_sys_pwr_reg; + unsigned char res13[0x38]; + unsigned int cmu_aclkstop_sys_pwr_reg; + unsigned int cmu_sclkstop_sys_pwr_reg; + unsigned char res14[0x4]; + unsigned int cmu_reset_sys_pwr_reg; + unsigned char res15[0x10]; + unsigned int apll_sysclk_sys_pwr_reg; + unsigned int mpll_sysclk_sys_pwr_reg; + unsigned int vpll_sysclk_sys_pwr_reg; + unsigned int epll_sysclk_sys_pwr_reg; + unsigned char res16[0x8]; + unsigned int cmu_clkstop_gps_alive_sys_pwr_reg; + unsigned int cmu_reset_gps_alive_sys_pwr_reg; + unsigned int cmu_clkstop_cam_sys_pwr_reg; + unsigned int cmu_clkstop_tv_sys_pwr_reg; + unsigned int cmu_clkstop_mfc_sys_pwr_reg; + unsigned int cmu_clkstop_g3d_sys_pwr_reg; + unsigned int cmu_clkstop_lcd0_sys_pwr_reg; + unsigned int cmu_clkstop_lcd1_sys_pwr_reg; + unsigned int cmu_clkstop_maudio_sys_pwr_reg; + unsigned int cmu_clkstop_gps_sys_pwr_reg; + unsigned int cmu_reset_cam_sys_pwr_reg; + unsigned int cmu_reset_tv_sys_pwr_reg; + unsigned int cmu_reset_mfc_sys_pwr_reg; + unsigned int cmu_reset_g3d_sys_pwr_reg; + unsigned int cmu_reset_lcd0_sys_pwr_reg; + unsigned int cmu_reset_lcd1_sys_pwr_reg; + unsigned int cmu_reset_maudio_sys_pwr_reg; + unsigned int cmu_reset_gps_sys_pwr_reg; + unsigned int top_bus_sys_pwr_reg; + unsigned int top_retention_sys_pwr_reg; + unsigned int top_pwr_sys_pwr_reg; + unsigned char res17[0x1c]; + unsigned int logic_reset_sys_pwr_reg; + unsigned char res18[0x14]; + unsigned int onenandxl_mem_sys_pwr_reg; + unsigned int modemif_mem_sys_pwr_reg; + unsigned char res19[0x4]; + unsigned int usbdevice_mem_sys_pwr_reg; + unsigned int sdmmc_mem_sys_pwr_reg; + unsigned int cssys_mem_sys_pwr_reg; + unsigned int secss_mem_sys_pwr_reg; + unsigned char res20[0x4]; + unsigned int pcie_mem_sys_pwr_reg; + unsigned int sata_mem_sys_pwr_reg; + unsigned char res21[0x18]; + unsigned int pad_retention_dram_sys_pwr_reg; + unsigned int pad_retention_maudio_sys_pwr_reg; + unsigned char res22[0x18]; + unsigned int pad_retention_gpio_sys_pwr_reg; + unsigned int pad_retention_uart_sys_pwr_reg; + unsigned int pad_retention_mmca_sys_pwr_reg; + unsigned int pad_retention_mmcb_sys_pwr_reg; + unsigned int pad_retention_ebia_sys_pwr_reg; + unsigned int pad_retention_ebib_sys_pwr_reg; + unsigned char res23[0x8]; + unsigned int pad_isolation_sys_pwr_reg; + unsigned char res24[0x1c]; + unsigned int pad_alv_sel_sys_pwr_reg; + unsigned char res25[0x1c]; + unsigned int xusbxti_sys_pwr_reg; + unsigned int xxti_sys_pwr_reg; + unsigned char res26[0x38]; + unsigned int ext_regulator_sys_pwr_reg; + unsigned char res27[0x3c]; + unsigned int gpio_mode_sys_pwr_reg; + unsigned char res28[0x3c]; + unsigned int gpio_mode_maudio_sys_pwr_reg; + unsigned char res29[0x3c]; + unsigned int cam_sys_pwr_reg; + unsigned int tv_sys_pwr_reg; + unsigned int mfc_sys_pwr_reg; + unsigned int g3d_sys_pwr_reg; + unsigned int lcd0_sys_pwr_reg; + unsigned int lcd1_sys_pwr_reg; + unsigned int maudio_sys_pwr_reg; + unsigned int gps_sys_pwr_reg; + unsigned int gps_alive_sys_pwr_reg; + unsigned char res30[0xc5c]; + unsigned int arm_core0_configuration; + unsigned int arm_core0_status; + unsigned int arm_core0_option; + unsigned char res31[0x74]; + unsigned int arm_core1_configuration; + unsigned int arm_core1_status; + unsigned int arm_core1_option; + unsigned char res32[0x37c]; + unsigned int arm_common_option; + unsigned char res33[0x1f4]; + unsigned int arm_cpu_l2_0_configuration; + unsigned int arm_cpu_l2_0_status; + unsigned char res34[0x18]; + unsigned int arm_cpu_l2_1_configuration; + unsigned int arm_cpu_l2_1_status; + unsigned char res35[0xa00]; + unsigned int pad_retention_maudio_option; + unsigned char res36[0xdc]; + unsigned int pad_retention_gpio_option; + unsigned char res37[0x1c]; + unsigned int pad_retention_uart_option; + unsigned char res38[0x1c]; + unsigned int pad_retention_mmca_option; + unsigned char res39[0x1c]; + unsigned int pad_retention_mmcb_option; + unsigned char res40[0x1c]; + unsigned int pad_retention_ebia_option; + unsigned char res41[0x1c]; + unsigned int pad_retention_ebib_option; + unsigned char res42[0x160]; + unsigned int ps_hold_control; + unsigned char res43[0xf0]; + unsigned int xusbxti_configuration; + unsigned int xusbxti_status; + unsigned char res44[0x14]; + unsigned int xusbxti_duration; + unsigned int xxti_configuration; + unsigned int xxti_status; + unsigned char res45[0x14]; + unsigned int xxti_duration; + unsigned char res46[0x1dc]; + unsigned int ext_regulator_duration; + unsigned char res47[0x5e0]; + unsigned int cam_configuration; + unsigned int cam_status; + unsigned int cam_option; + unsigned char res48[0x14]; + unsigned int tv_configuration; + unsigned int tv_status; + unsigned int tv_option; + unsigned char res49[0x14]; + unsigned int mfc_configuration; + unsigned int mfc_status; + unsigned int mfc_option; + unsigned char res50[0x14]; + unsigned int g3d_configuration; + unsigned int g3d_status; + unsigned int g3d_option; + unsigned char res51[0x14]; + unsigned int lcd0_configuration; + unsigned int lcd0_status; + unsigned int lcd0_option; + unsigned char res52[0x14]; + unsigned int lcd1_configuration; + unsigned int lcd1_status; + unsigned int lcd1_option; + unsigned char res53[0x34]; + unsigned int gps_configuration; + unsigned int gps_status; + unsigned int gps_option; + unsigned char res54[0x14]; + unsigned int gps_alive_configuration; + unsigned int gps_alive_status; + unsigned int gps_alive_option; +}; + struct exynos5_power { unsigned int om_stat; unsigned char res1[0x18];
This patch adds sysreg structure for Exynos4x10.
Signed-off-by: Piotr Wilczek p.wilczek@samsung.com Signed-off-by: Kyungmin Park kyungmin.park@samsung.com CC: Minkyu Kang mk7.kang@samsung.com --- arch/arm/include/asm/arch-exynos/system.h | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/system.h b/arch/arm/include/asm/arch-exynos/system.h index 42e1d21..1c93b6b 100644 --- a/arch/arm/include/asm/arch-exynos/system.h +++ b/arch/arm/include/asm/arch-exynos/system.h @@ -32,6 +32,15 @@ struct exynos4_sysreg { unsigned int jtag_con; };
+struct exynos4x10_sysreg { + unsigned char res1[0x210]; + unsigned int display_ctrl; + unsigned int display_ctrl2; + unsigned int camera_control; + unsigned int audio_endian; + unsigned int jtag_con; +}; + struct exynos5_sysreg { unsigned char res1[0x214]; unsigned int disp1blk_cfg;
This patch use exynos4x10 structures on Trats board.
Signed-off-by: Piotr Wilczek p.wilczek@samsung.com Signed-off-by: Kyungmin Park kyungmin.park@samsung.com CC: Minkyu Kang mk7.kang@samsung.com --- board/samsung/trats/trats.c | 40 ++++++++++++++++++++-------------------- 1 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index d5c681c..3fb3d2a 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -78,10 +78,10 @@ int board_init(void)
void i2c_init_board(void) { - struct exynos4_gpio_part1 *gpio1 = - (struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1(); - struct exynos4_gpio_part2 *gpio2 = - (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); + struct exynos4x10_gpio_part1 *gpio1 = + (struct exynos4x10_gpio_part1 *)samsung_get_base_gpio_part1(); + struct exynos4x10_gpio_part2 *gpio2 = + (struct exynos4x10_gpio_part2 *)samsung_get_base_gpio_part2();
/* I2C_5 -> PMIC */ s5p_gpio_direction_output(&gpio1->b, 7, 1); @@ -115,8 +115,8 @@ void dram_init_banksize(void)
static unsigned int get_hw_revision(void) { - struct exynos4_gpio_part1 *gpio = - (struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1(); + struct exynos4x10_gpio_part1 *gpio = + (struct exynos4x10_gpio_part1 *)samsung_get_base_gpio_part1(); int hwrev = 0; int i;
@@ -156,8 +156,8 @@ int checkboard(void) #ifdef CONFIG_GENERIC_MMC int board_mmc_init(bd_t *bis) { - struct exynos4_gpio_part2 *gpio = - (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); + struct exynos4x10_gpio_part2 *gpio = + (struct exynos4x10_gpio_part2 *)samsung_get_base_gpio_part2(); int err;
/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */ @@ -248,8 +248,8 @@ void board_usb_init(void)
static void pmic_reset(void) { - struct exynos4_gpio_part2 *gpio = - (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); + struct exynos4x10_gpio_part2 *gpio = + (struct exynos4x10_gpio_part2 *)samsung_get_base_gpio_part2();
s5p_gpio_direction_output(&gpio->x0, 7, 1); s5p_gpio_set_pull(&gpio->x2, 7, GPIO_PULL_NONE); @@ -257,8 +257,8 @@ static void pmic_reset(void)
static void board_clock_init(void) { - struct exynos4_clock *clk = - (struct exynos4_clock *)samsung_get_base_clock(); + struct exynos4x10_clock *clk = + (struct exynos4x10_clock *)samsung_get_base_clock();
writel(CLK_SRC_CPU_VAL, (unsigned int)&clk->src_cpu); writel(CLK_SRC_TOP0_VAL, (unsigned int)&clk->src_top0); @@ -307,8 +307,8 @@ static void board_clock_init(void)
static void board_power_init(void) { - struct exynos4_power *pwr = - (struct exynos4_power *)samsung_get_base_power(); + struct exynos4x10_power *pwr = + (struct exynos4x10_power *)samsung_get_base_power();
/* PS HOLD */ writel(EXYNOS4_PS_HOLD_CON_VAL, (unsigned int)&pwr->ps_hold_control); @@ -329,10 +329,10 @@ static void board_power_init(void)
static void board_uart_init(void) { - struct exynos4_gpio_part1 *gpio1 = - (struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1(); - struct exynos4_gpio_part2 *gpio2 = - (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); + struct exynos4x10_gpio_part1 *gpio1 = + (struct exynos4x10_gpio_part1 *)samsung_get_base_gpio_part1(); + struct exynos4x10_gpio_part2 *gpio2 = + (struct exynos4x10_gpio_part2 *)samsung_get_base_gpio_part2(); int i;
/* @@ -366,8 +366,8 @@ int board_early_init_f(void)
static void lcd_reset(void) { - struct exynos4_gpio_part2 *gpio2 = - (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); + struct exynos4x10_gpio_part2 *gpio2 = + (struct exynos4x10_gpio_part2 *)samsung_get_base_gpio_part2();
s5p_gpio_direction_output(&gpio2->y4, 5, 1); udelay(10000);
Dear Piotr,
On 13 October 2012 00:08, Piotr Wilczek p.wilczek@samsung.com wrote:
This patch series adds Register base addresses, clock, gpio, power and system structures for Exynos4x10.
Piotr Wilczek (6): Exynos: Exynos4x10: Add base addresses for Exynos4x10 Exynos: Exynos4x10: Add clock structure for exynos4x10 Exynos: Exynos4x10: Add gpio structure for Exynos4X10 Exynos: Exynos4x10: add power structure for Exynos4x10 Exynos: Exynos4x10: add sysreg structure for exynos4x10 arm: trats: Use exynos4x10 structures on Trats board
arch/arm/include/asm/arch-exynos/clock.h | 236 +++++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/cpu.h | 43 +++++- arch/arm/include/asm/arch-exynos/gpio.h | 47 ++++++ arch/arm/include/asm/arch-exynos/power.h | 201 ++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/system.h | 9 + board/samsung/trats/trats.c | 40 +++--- 6 files changed, 551 insertions(+), 25 deletions(-)
Did you check Chander's patchset?
http://patchwork.ozlabs.org/patch/188437/ http://patchwork.ozlabs.org/patch/188438/ http://patchwork.ozlabs.org/patch/188511/ http://patchwork.ozlabs.org/patch/188512/ http://patchwork.ozlabs.org/patch/188513/ http://patchwork.ozlabs.org/patch/189809/
Thanks. Minkyu Kang.
Dear Minkyu,
Yes, I checked these patches. Actually I do the same, just for Exynos 4x10. My patches depend on Chander's first patch.
Best regards, Piotr Wilczek
-----Original Message----- From: Minkyu Kang [mailto:promsoft@gmail.com] Sent: Friday, October 12, 2012 6:15 PM To: Piotr Wilczek Cc: u-boot@lists.denx.de; Kyungmin Park; Chander Kashyap Subject: Re: [U-Boot] [PATCH 0/6] EXYNOS: Add support for Exynos4x10
Dear Piotr,
On 13 October 2012 00:08, Piotr Wilczek p.wilczek@samsung.com wrote:
This patch series adds Register base addresses, clock, gpio, power
and
system structures for Exynos4x10.
Piotr Wilczek (6): Exynos: Exynos4x10: Add base addresses for Exynos4x10 Exynos: Exynos4x10: Add clock structure for exynos4x10 Exynos: Exynos4x10: Add gpio structure for Exynos4X10 Exynos: Exynos4x10: add power structure for Exynos4x10 Exynos: Exynos4x10: add sysreg structure for exynos4x10 arm: trats: Use exynos4x10 structures on Trats board
arch/arm/include/asm/arch-exynos/clock.h | 236
+++++++++++++++++++++++++++++
arch/arm/include/asm/arch-exynos/cpu.h | 43 +++++- arch/arm/include/asm/arch-exynos/gpio.h | 47 ++++++ arch/arm/include/asm/arch-exynos/power.h | 201
++++++++++++++++++++++++
arch/arm/include/asm/arch-exynos/system.h | 9 + board/samsung/trats/trats.c | 40 +++--- 6 files changed, 551 insertions(+), 25 deletions(-)
Did you check Chander's patchset?
http://patchwork.ozlabs.org/patch/188437/ http://patchwork.ozlabs.org/patch/188438/ http://patchwork.ozlabs.org/patch/188511/ http://patchwork.ozlabs.org/patch/188512/ http://patchwork.ozlabs.org/patch/188513/ http://patchwork.ozlabs.org/patch/189809/
Thanks. Minkyu Kang. -- from. prom. www.promsoft.net
2012년 10월 13일 토요일에 Piotr Wilczek님이 작성:
This patch series adds Register base addresses, clock, gpio, power and system structures for Exynos4x10.
Piotr Wilczek (6): Exynos: Exynos4x10: Add base addresses for Exynos4x10 Exynos: Exynos4x10: Add clock structure for exynos4x10 Exynos: Exynos4x10: Add gpio structure for Exynos4X10 Exynos: Exynos4x10: add power structure for Exynos4x10 Exynos: Exynos4x10: add sysreg structure for exynos4x10 arm: trats: Use exynos4x10 structures on Trats board
arch/arm/include/asm/arch-exynos/clock.h | 236 +++++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/cpu.h | 43 +++++- arch/arm/include/asm/arch-exynos/gpio.h | 47 ++++++ arch/arm/include/asm/arch-exynos/power.h | 201 ++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/system.h | 9 + board/samsung/trats/trats.c | 40 +++--- 6 files changed, 551 insertions(+), 25 deletions(-)
I've rechecked this patch. Why we need to add exynos4x10? exynos4x10 is same with exynos4.
Thanks. Minkyu Kang.
Dear Minkyu,
The idea was to have Exynos4x10 and Exynos4x12 separately instead of Exynos4.
As for now, when we use ex. exynos4_gpio_part1 it is not obvious which Exynos we refer to.
Best regards,
Piotr Wilczek
From: Minkyu Kang [mailto:promsoft@gmail.com] Sent: Friday, December 07, 2012 10:57 AM To: Piotr Wilczek Cc: u-boot@lists.denx.de; Kyungmin Park Subject: Re: [U-Boot] [PATCH 0/6] EXYNOS: Add support for Exynos4x10
2012년 10월 13일 토요일에 Piotr Wilczek님이 작성:
This patch series adds Register base addresses, clock, gpio, power and system structures for Exynos4x10.
Piotr Wilczek (6): Exynos: Exynos4x10: Add base addresses for Exynos4x10 Exynos: Exynos4x10: Add clock structure for exynos4x10 Exynos: Exynos4x10: Add gpio structure for Exynos4X10 Exynos: Exynos4x10: add power structure for Exynos4x10 Exynos: Exynos4x10: add sysreg structure for exynos4x10 arm: trats: Use exynos4x10 structures on Trats board
arch/arm/include/asm/arch-exynos/clock.h | 236 +++++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/cpu.h | 43 +++++- arch/arm/include/asm/arch-exynos/gpio.h | 47 ++++++ arch/arm/include/asm/arch-exynos/power.h | 201 ++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/system.h | 9 + board/samsung/trats/trats.c | 40 +++--- 6 files changed, 551 insertions(+), 25 deletions(-)
I've rechecked this patch.
Why we need to add exynos4x10?
exynos4x10 is same with exynos4.
Thanks.
Minkyu Kang.
participants (2)
-
Minkyu Kang -
Piotr Wilczek