[PATCH next 0/3] rockchip: px30: add IO domain driver

This adds the IO domain driver for PX30 by importing the appropriate bits from the Linux kernel driver, similarly to what's been done for RK3399 in the past.
However for this driver to probe, syscon_px30 driver needs to be fixed to probe children of its syscon DT nodes, so this is fixed as well.
Finally, enable this on PX30 Ringneck.
Signed-off-by: Quentin Schulz quentin.schulz@cherry.de --- Quentin Schulz (3): rockchip: px30: bind sub-nodes for GRF (syscon) rockchip: io-domain: add support for PX30 rockchip: ringneck-px30: enable IO domain
arch/arm/mach-rockchip/px30/syscon_px30.c | 3 ++ configs/ringneck-px30_defconfig | 1 + drivers/misc/rockchip-io-domain.c | 66 +++++++++++++++++++++++++++++++ 3 files changed, 70 insertions(+) --- base-commit: 0f4e1025ad2ff19095b754229ffec4527380dae1 change-id: 20240614-px30-io-domain-0963eb8d4031
Best regards,

From: Quentin Schulz quentin.schulz@cherry.de
There are some sub-nodes under the grf DT nodes, so add bind callback function in syscon_px30 driver to scan them recursively.
Fixes: e9ccb2f526ed ("rockchip: add px30 architecture core") Signed-off-by: Quentin Schulz quentin.schulz@cherry.de --- arch/arm/mach-rockchip/px30/syscon_px30.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c index c9de57493d8..893a5234baa 100644 --- a/arch/arm/mach-rockchip/px30/syscon_px30.c +++ b/arch/arm/mach-rockchip/px30/syscon_px30.c @@ -18,6 +18,9 @@ static const struct udevice_id px30_syscon_ids[] = { U_BOOT_DRIVER(syscon_px30) = { .id = UCLASS_SYSCON, .name = "px30_syscon", +#if CONFIG_IS_ENABLED(OF_REAL) + .bind = dm_scan_fdt_dev, +#endif .of_match = px30_syscon_ids, };

On 2024/6/15 00:54, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@cherry.de
There are some sub-nodes under the grf DT nodes, so add bind callback function in syscon_px30 driver to scan them recursively.
Fixes: e9ccb2f526ed ("rockchip: add px30 architecture core") Signed-off-by: Quentin Schulz quentin.schulz@cherry.de
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/mach-rockchip/px30/syscon_px30.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c index c9de57493d8..893a5234baa 100644 --- a/arch/arm/mach-rockchip/px30/syscon_px30.c +++ b/arch/arm/mach-rockchip/px30/syscon_px30.c @@ -18,6 +18,9 @@ static const struct udevice_id px30_syscon_ids[] = { U_BOOT_DRIVER(syscon_px30) = { .id = UCLASS_SYSCON, .name = "px30_syscon", +#if CONFIG_IS_ENABLED(OF_REAL)
- .bind = dm_scan_fdt_dev,
+#endif .of_match = px30_syscon_ids, };

From: Quentin Schulz quentin.schulz@cherry.de
Port the PX30 part of the Rockchip IO Domain driver from Linux.
This differs from linux version in that the io iodomain bit is enabled in the write ops instead of in an init ops as in linux, this way we can avoid keeping a full state of all supplies that have been configured.
Signed-off-by: Quentin Schulz quentin.schulz@cherry.de --- drivers/misc/rockchip-io-domain.c | 66 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+)
diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c index 04d4d07c412..cf4f7c3984c 100644 --- a/drivers/misc/rockchip-io-domain.c +++ b/drivers/misc/rockchip-io-domain.c @@ -27,6 +27,10 @@ #define MAX_VOLTAGE_1_8 1980000 #define MAX_VOLTAGE_3_3 3600000
+#define PX30_IO_VSEL 0x180 +#define PX30_IO_VSEL_VCCIO6_SRC BIT(0) +#define PX30_IO_VSEL_VCCIO6_SUPPLY_NUM 1 + #define RK3328_SOC_CON4 0x410 #define RK3328_SOC_CON4_VCCIO2 BIT(7) #define RK3328_SOC_VCCIO2_SUPPLY_NUM 1 @@ -99,6 +103,22 @@ static int rockchip_iodomain_write(struct regmap *grf, uint offset, int idx, int return regmap_write(grf, offset, val); }
+static int px30_iodomain_write(struct regmap *grf, uint offset, int idx, int uV) +{ + int ret = rockchip_iodomain_write(grf, offset, idx, uV); + + if (!ret && idx == PX30_IO_VSEL_VCCIO6_SUPPLY_NUM) { + /* + * set vccio6 iodomain to also use this framework + * instead of a special gpio. + */ + u32 val = PX30_IO_VSEL_VCCIO6_SRC | (PX30_IO_VSEL_VCCIO6_SRC << 16); + ret = regmap_write(grf, PX30_IO_VSEL, val); + } + + return ret; +} + static int rk3328_iodomain_write(struct regmap *grf, uint offset, int idx, int uV) { int ret = rockchip_iodomain_write(grf, offset, idx, uV); @@ -131,6 +151,44 @@ static int rk3399_pmu_iodomain_write(struct regmap *grf, uint offset, int idx, i return ret; }
+static const struct rockchip_iodomain_soc_data soc_data_px30 = { + .grf_offset = 0x180, + .supply_names = { + NULL, + "vccio6-supply", + "vccio1-supply", + "vccio2-supply", + "vccio3-supply", + "vccio4-supply", + "vccio5-supply", + "vccio-oscgpi-supply", + }, + .write = px30_iodomain_write, +}; + +static const struct rockchip_iodomain_soc_data soc_data_px30_pmu = { + .grf_offset = 0x100, + .supply_names = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + "pmuio1-supply", + "pmuio2-supply", + }, + .write = rockchip_iodomain_write, +}; + static const struct rockchip_iodomain_soc_data soc_data_rk3328 = { .grf_offset = 0x410, .supply_names = { @@ -190,6 +248,14 @@ static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = { };
static const struct udevice_id rockchip_iodomain_ids[] = { + { + .compatible = "rockchip,px30-io-voltage-domain", + .data = (ulong)&soc_data_px30, + }, + { + .compatible = "rockchip,px30-pmu-io-voltage-domain", + .data = (ulong)&soc_data_px30_pmu, + }, { .compatible = "rockchip,rk3328-io-voltage-domain", .data = (ulong)&soc_data_rk3328,

On 2024/6/15 00:54, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@cherry.de
Port the PX30 part of the Rockchip IO Domain driver from Linux.
This differs from linux version in that the io iodomain bit is enabled in the write ops instead of in an init ops as in linux, this way we can avoid keeping a full state of all supplies that have been configured.
Signed-off-by: Quentin Schulz quentin.schulz@cherry.de
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
drivers/misc/rockchip-io-domain.c | 66 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+)
diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c index 04d4d07c412..cf4f7c3984c 100644 --- a/drivers/misc/rockchip-io-domain.c +++ b/drivers/misc/rockchip-io-domain.c @@ -27,6 +27,10 @@ #define MAX_VOLTAGE_1_8 1980000 #define MAX_VOLTAGE_3_3 3600000
+#define PX30_IO_VSEL 0x180 +#define PX30_IO_VSEL_VCCIO6_SRC BIT(0) +#define PX30_IO_VSEL_VCCIO6_SUPPLY_NUM 1
- #define RK3328_SOC_CON4 0x410 #define RK3328_SOC_CON4_VCCIO2 BIT(7) #define RK3328_SOC_VCCIO2_SUPPLY_NUM 1
@@ -99,6 +103,22 @@ static int rockchip_iodomain_write(struct regmap *grf, uint offset, int idx, int return regmap_write(grf, offset, val); }
+static int px30_iodomain_write(struct regmap *grf, uint offset, int idx, int uV) +{
- int ret = rockchip_iodomain_write(grf, offset, idx, uV);
- if (!ret && idx == PX30_IO_VSEL_VCCIO6_SUPPLY_NUM) {
/*
* set vccio6 iodomain to also use this framework
* instead of a special gpio.
*/
u32 val = PX30_IO_VSEL_VCCIO6_SRC | (PX30_IO_VSEL_VCCIO6_SRC << 16);
ret = regmap_write(grf, PX30_IO_VSEL, val);
- }
- return ret;
+}
- static int rk3328_iodomain_write(struct regmap *grf, uint offset, int idx, int uV) { int ret = rockchip_iodomain_write(grf, offset, idx, uV);
@@ -131,6 +151,44 @@ static int rk3399_pmu_iodomain_write(struct regmap *grf, uint offset, int idx, i return ret; }
+static const struct rockchip_iodomain_soc_data soc_data_px30 = {
- .grf_offset = 0x180,
- .supply_names = {
NULL,
"vccio6-supply",
"vccio1-supply",
"vccio2-supply",
"vccio3-supply",
"vccio4-supply",
"vccio5-supply",
"vccio-oscgpi-supply",
- },
- .write = px30_iodomain_write,
+};
+static const struct rockchip_iodomain_soc_data soc_data_px30_pmu = {
- .grf_offset = 0x100,
- .supply_names = {
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
"pmuio1-supply",
"pmuio2-supply",
- },
- .write = rockchip_iodomain_write,
+};
- static const struct rockchip_iodomain_soc_data soc_data_rk3328 = { .grf_offset = 0x410, .supply_names = {
@@ -190,6 +248,14 @@ static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = { };
static const struct udevice_id rockchip_iodomain_ids[] = {
- {
.compatible = "rockchip,px30-io-voltage-domain",
.data = (ulong)&soc_data_px30,
- },
- {
.compatible = "rockchip,px30-pmu-io-voltage-domain",
.data = (ulong)&soc_data_px30_pmu,
- }, { .compatible = "rockchip,rk3328-io-voltage-domain", .data = (ulong)&soc_data_rk3328,

From: Quentin Schulz quentin.schulz@cherry.de
Enable the IO domain on Ringneck. Based on the current HW design, this should do nothing else than making sure vccio6 iodomain is controlled by the GRF and not GPIO0B6.
Signed-off-by: Quentin Schulz quentin.schulz@cherry.de --- configs/ringneck-px30_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig index e7594b7a67b..52a4c9710a9 100644 --- a/configs/ringneck-px30_defconfig +++ b/configs/ringneck-px30_defconfig @@ -80,6 +80,7 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_ROCKCHIP_OTP=y +CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y

On 2024/6/15 00:54, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@cherry.de
Enable the IO domain on Ringneck. Based on the current HW design, this should do nothing else than making sure vccio6 iodomain is controlled by the GRF and not GPIO0B6.
Signed-off-by: Quentin Schulz quentin.schulz@cherry.de
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
configs/ringneck-px30_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig index e7594b7a67b..52a4c9710a9 100644 --- a/configs/ringneck-px30_defconfig +++ b/configs/ringneck-px30_defconfig @@ -80,6 +80,7 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_ROCKCHIP_OTP=y +CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y
participants (2)
-
Kever Yang
-
Quentin Schulz