[U-Boot] [PATCH v1 0/3] ARM: omap: add support for GPMC and ELM controllers on OMAP4 and OMAP5 platforms
This patch series intends to: - Add support for GPMC and ELM controllers for OMAP4 and OMAP5 platform devices by moving all generic arch specific code shared between arch/AM33xx, arch/OMAP4 and arch/OMAP5 into arch/omap-common/ - Separate out arch specific header for future scalability - Remove redundant code
Pekon Gupta (3): ARM: omap4: add platform specific info for GPMC and ELM controllers ARM: omap5: add platform specific info for GPMC and ELM controllers ARM: omap: merge GPMC initialization code for all platform
arch/arm/cpu/armv7/am33xx/Makefile | 1 - arch/arm/cpu/armv7/omap-common/Makefile | 4 - .../{am33xx/mem.c => omap-common/mem-common.c} | 39 ++++++ arch/arm/cpu/armv7/omap3/Makefile | 1 - arch/arm/cpu/armv7/omap3/mem.c | 139 --------------------- arch/arm/include/asm/arch-omap4/cpu.h | 5 +- arch/arm/include/asm/arch-omap4/hardware.h | 26 ++++ arch/arm/include/asm/arch-omap4/mem.h | 62 +++++++++ arch/arm/include/asm/arch-omap4/omap.h | 3 - arch/arm/include/asm/arch-omap5/cpu.h | 5 +- arch/arm/include/asm/arch-omap5/hardware.h | 26 ++++ arch/arm/include/asm/arch-omap5/mem.h | 62 +++++++++ arch/arm/include/asm/arch-omap5/omap.h | 3 - 13 files changed, 219 insertions(+), 157 deletions(-) rename arch/arm/cpu/armv7/{am33xx/mem.c => omap-common/mem-common.c} (68%) delete mode 100644 arch/arm/cpu/armv7/omap3/mem.c create mode 100644 arch/arm/include/asm/arch-omap4/hardware.h create mode 100644 arch/arm/include/asm/arch-omap4/mem.h create mode 100644 arch/arm/include/asm/arch-omap5/hardware.h create mode 100644 arch/arm/include/asm/arch-omap5/mem.h
This patch moves platform specific information for GPMC and ELM controller into separate header files, so that any derivative devices do not mess other header files.
Platform specific information added into arch-xx/../hardware.h - CPU related platform specific details like base-address of GPMC and ELM
Platform specific information added into arch-xx/../mem.h - Generic configs for GPMC and ELM initialization. - Hardware parameters or constrains specific to GPMC and ELM IP like; number of max number of chip-selects available
Signed-off-by: Pekon Gupta pekon@ti.com --- arch/arm/include/asm/arch-omap4/cpu.h | 5 +-- arch/arm/include/asm/arch-omap4/hardware.h | 26 +++++++++++++ arch/arm/include/asm/arch-omap4/mem.h | 62 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-omap4/omap.h | 3 -- 4 files changed, 90 insertions(+), 6 deletions(-) create mode 100644 arch/arm/include/asm/arch-omap4/hardware.h create mode 100644 arch/arm/include/asm/arch-omap4/mem.h
diff --git a/arch/arm/include/asm/arch-omap4/cpu.h b/arch/arm/include/asm/arch-omap4/cpu.h index c21fb54..f7595ae 100644 --- a/arch/arm/include/asm/arch-omap4/cpu.h +++ b/arch/arm/include/asm/arch-omap4/cpu.h @@ -12,6 +12,8 @@ #include <asm/types.h> #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
+#include <asm/arch/hardware.h> + #ifndef __KERNEL_STRICT_NAMES #ifndef __ASSEMBLY__ struct gptimer { @@ -57,9 +59,6 @@ struct watchdog { #define TCLR_AR (0x1 << 1) #define TCLR_PRE (0x1 << 5)
-/* GPMC BASE */ -#define GPMC_BASE (OMAP44XX_GPMC_BASE) - /* I2C base */ #define I2C_BASE1 (OMAP44XX_L4_PER_BASE + 0x70000) #define I2C_BASE2 (OMAP44XX_L4_PER_BASE + 0x72000) diff --git a/arch/arm/include/asm/arch-omap4/hardware.h b/arch/arm/include/asm/arch-omap4/hardware.h new file mode 100644 index 0000000..f7011b4 --- /dev/null +++ b/arch/arm/include/asm/arch-omap4/hardware.h @@ -0,0 +1,26 @@ +/* + * hardware.h + * + * hardware specific header + * + * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __OMAP_HARDWARE_H +#define __OMAP_HARDWARE_H + +#include <asm/arch/omap.h> + +/* + * Common hardware definitions + */ + +/* BCH Error Location Module */ +#define ELM_BASE 0x48078000 + +/* GPMC Base address */ +#define GPMC_BASE 0x50000000 + +#endif diff --git a/arch/arm/include/asm/arch-omap4/mem.h b/arch/arm/include/asm/arch-omap4/mem.h new file mode 100644 index 0000000..d2e708b --- /dev/null +++ b/arch/arm/include/asm/arch-omap4/mem.h @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2006-2008 + * Texas Instruments, <www.ti.com> + * + * Author + * Mansoor Ahamed mansoor.ahamed@ti.com + * + * Initial Code from: + * Richard Woodruff r-woodruff2@ti.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _MEM_H_ +#define _MEM_H_ + +/* + * GPMC settings - + * Definitions is as per the following format + * #define <PART>_GPMC_CONFIG<x> <value> + * Where: + * PART is the part name e.g. STNOR - Intel Strata Flash + * x is GPMC config registers from 1 to 6 (there will be 6 macros) + * Value is corresponding value + * + * For every valid PRCM configuration there should be only one definition of + * the same. if values are independent of the board, this definition will be + * present in this file if values are dependent on the board, then this should + * go into corresponding mem-boardName.h file + * + * Currently valid part Names are (PART): + * M_NAND - Micron NAND + * STNOR - STMicrolelctronics M29W128GL + */ +#define GPMC_SIZE_256M 0x0 +#define GPMC_SIZE_128M 0x8 +#define GPMC_SIZE_64M 0xC +#define GPMC_SIZE_32M 0xE +#define GPMC_SIZE_16M 0xF + +#define M_NAND_GPMC_CONFIG1 0x00000800 +#define M_NAND_GPMC_CONFIG2 0x001e1e00 +#define M_NAND_GPMC_CONFIG3 0x001e1e00 +#define M_NAND_GPMC_CONFIG4 0x16051807 +#define M_NAND_GPMC_CONFIG5 0x00151e1e +#define M_NAND_GPMC_CONFIG6 0x16000f80 +#define M_NAND_GPMC_CONFIG7 0x00000008 + +#define STNOR_GPMC_CONFIG1 0x00001200 +#define STNOR_GPMC_CONFIG2 0x00101000 +#define STNOR_GPMC_CONFIG3 0x00030301 +#define STNOR_GPMC_CONFIG4 0x10041004 +#define STNOR_GPMC_CONFIG5 0x000C1010 +#define STNOR_GPMC_CONFIG6 0x08070280 +#define STNOR_GPMC_CONFIG7 0x00000F48 + +/* max number of GPMC Chip Selects */ +#define GPMC_MAX_CS 8 +/* max number of GPMC regs */ +#define GPMC_MAX_REG 7 + +#endif /* endif _MEM_H_ */ diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h index f66da0d..d43dc26 100644 --- a/arch/arm/include/asm/arch-omap4/omap.h +++ b/arch/arm/include/asm/arch-omap4/omap.h @@ -60,9 +60,6 @@ /* Watchdog Timer2 - MPU watchdog */ #define WDT2_BASE (OMAP44XX_L4_WKUP_BASE + 0x14000)
-/* GPMC */ -#define OMAP44XX_GPMC_BASE 0x50000000 - /* * Hardware Register Details */
On Thu, May 08, 2014 at 09:43:45PM +0530, pekon gupta wrote:
This patch moves platform specific information for GPMC and ELM controller into separate header files, so that any derivative devices do not mess other header files.
Platform specific information added into arch-xx/../hardware.h
- CPU related platform specific details like base-address of GPMC and ELM
Platform specific information added into arch-xx/../mem.h
- Generic configs for GPMC and ELM initialization.
- Hardware parameters or constrains specific to GPMC and ELM IP like; number of max number of chip-selects available
Signed-off-by: Pekon Gupta pekon@ti.com
Applied to u-boot-ti/master, thanks!
This patch moves platform specific information for GPMC and ELM controller into separate header files, so that any derivative devices do not mess other header files.
Platform specific information added into arch-xx/../hardware.h - CPU related platform specific details like base-address of GPMC and ELM
Platform specific information added into arch-xx/../mem.h - Generic configs for GPMC and ELM initialization. - Hardware parameters or constrains specific to GPMC and ELM IP like; number of max number of chip-selects available
Signed-off-by: Pekon Gupta pekon@ti.com --- arch/arm/include/asm/arch-omap5/cpu.h | 5 +-- arch/arm/include/asm/arch-omap5/hardware.h | 26 +++++++++++++ arch/arm/include/asm/arch-omap5/mem.h | 62 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-omap5/omap.h | 3 -- 4 files changed, 90 insertions(+), 6 deletions(-) create mode 100644 arch/arm/include/asm/arch-omap5/hardware.h create mode 100644 arch/arm/include/asm/arch-omap5/mem.h
diff --git a/arch/arm/include/asm/arch-omap5/cpu.h b/arch/arm/include/asm/arch-omap5/cpu.h index 5f1d745..6109b92 100644 --- a/arch/arm/include/asm/arch-omap5/cpu.h +++ b/arch/arm/include/asm/arch-omap5/cpu.h @@ -14,6 +14,8 @@ #include <asm/types.h> #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
+#include <asm/arch/hardware.h> + #ifndef __KERNEL_STRICT_NAMES #ifndef __ASSEMBLY__ struct gptimer { @@ -63,9 +65,6 @@ struct watchdog { #define TCLR_AR (0x1 << 1) #define TCLR_PRE (0x1 << 5)
-/* GPMC BASE */ -#define GPMC_BASE (OMAP54XX_GPMC_BASE) - /* I2C base */ #define I2C_BASE1 (OMAP54XX_L4_PER_BASE + 0x70000) #define I2C_BASE2 (OMAP54XX_L4_PER_BASE + 0x72000) diff --git a/arch/arm/include/asm/arch-omap5/hardware.h b/arch/arm/include/asm/arch-omap5/hardware.h new file mode 100644 index 0000000..f7011b4 --- /dev/null +++ b/arch/arm/include/asm/arch-omap5/hardware.h @@ -0,0 +1,26 @@ +/* + * hardware.h + * + * hardware specific header + * + * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __OMAP_HARDWARE_H +#define __OMAP_HARDWARE_H + +#include <asm/arch/omap.h> + +/* + * Common hardware definitions + */ + +/* BCH Error Location Module */ +#define ELM_BASE 0x48078000 + +/* GPMC Base address */ +#define GPMC_BASE 0x50000000 + +#endif diff --git a/arch/arm/include/asm/arch-omap5/mem.h b/arch/arm/include/asm/arch-omap5/mem.h new file mode 100644 index 0000000..d2e708b --- /dev/null +++ b/arch/arm/include/asm/arch-omap5/mem.h @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2006-2008 + * Texas Instruments, <www.ti.com> + * + * Author + * Mansoor Ahamed mansoor.ahamed@ti.com + * + * Initial Code from: + * Richard Woodruff r-woodruff2@ti.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _MEM_H_ +#define _MEM_H_ + +/* + * GPMC settings - + * Definitions is as per the following format + * #define <PART>_GPMC_CONFIG<x> <value> + * Where: + * PART is the part name e.g. STNOR - Intel Strata Flash + * x is GPMC config registers from 1 to 6 (there will be 6 macros) + * Value is corresponding value + * + * For every valid PRCM configuration there should be only one definition of + * the same. if values are independent of the board, this definition will be + * present in this file if values are dependent on the board, then this should + * go into corresponding mem-boardName.h file + * + * Currently valid part Names are (PART): + * M_NAND - Micron NAND + * STNOR - STMicrolelctronics M29W128GL + */ +#define GPMC_SIZE_256M 0x0 +#define GPMC_SIZE_128M 0x8 +#define GPMC_SIZE_64M 0xC +#define GPMC_SIZE_32M 0xE +#define GPMC_SIZE_16M 0xF + +#define M_NAND_GPMC_CONFIG1 0x00000800 +#define M_NAND_GPMC_CONFIG2 0x001e1e00 +#define M_NAND_GPMC_CONFIG3 0x001e1e00 +#define M_NAND_GPMC_CONFIG4 0x16051807 +#define M_NAND_GPMC_CONFIG5 0x00151e1e +#define M_NAND_GPMC_CONFIG6 0x16000f80 +#define M_NAND_GPMC_CONFIG7 0x00000008 + +#define STNOR_GPMC_CONFIG1 0x00001200 +#define STNOR_GPMC_CONFIG2 0x00101000 +#define STNOR_GPMC_CONFIG3 0x00030301 +#define STNOR_GPMC_CONFIG4 0x10041004 +#define STNOR_GPMC_CONFIG5 0x000C1010 +#define STNOR_GPMC_CONFIG6 0x08070280 +#define STNOR_GPMC_CONFIG7 0x00000F48 + +/* max number of GPMC Chip Selects */ +#define GPMC_MAX_CS 8 +/* max number of GPMC regs */ +#define GPMC_MAX_REG 7 + +#endif /* endif _MEM_H_ */ diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 19fdece..cf17e2d 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -59,9 +59,6 @@ /* Watchdog Timer2 - MPU watchdog */ #define WDT2_BASE (OMAP54XX_L4_WKUP_BASE + 0x14000)
-/* GPMC */ -#define OMAP54XX_GPMC_BASE 0x50000000 - /* QSPI */ #define QSPI_BASE 0x4B300000
On Thu, May 08, 2014 at 09:43:46PM +0530, pekon gupta wrote:
This patch moves platform specific information for GPMC and ELM controller into separate header files, so that any derivative devices do not mess other header files.
Platform specific information added into arch-xx/../hardware.h
- CPU related platform specific details like base-address of GPMC and ELM
Platform specific information added into arch-xx/../mem.h
- Generic configs for GPMC and ELM initialization.
- Hardware parameters or constrains specific to GPMC and ELM IP like; number of max number of chip-selects available
Signed-off-by: Pekon Gupta pekon@ti.com
Applied to u-boot-ti/master, thanks!
GPMC controller on TI's OMAP SoC is general purpose controller to interface with different types of external devices like; - parallel NOR flash - parallel NAND flash - OneNand flash - SDR RAM - Ethernet Devices like LAN9220
Though GPMC configurations may be different for each platform depending on clock-frequency and external device interfacing with controller. But initialization sequence remains common across all platfoms.
Thus this patch merges gpmc_init() scattered in different arch-xx/mem.c files into single omap-common/mem-common.c
However, actual platforms specific register config values are still sourced from corresponding platform specific headers like; AM33xx: arch/arm/include/asm/arch-am33xx/mem.h OMAP3: arch/arm/include/asm/arch-omap3/mem.h OMAP4: arch/arm/include/asm/arch-omap4/mem.h OMAP4: arch/arm/include/asm/arch-omap5/mem.h
Also, CONFIG_xx passed by board-profile decide config for which set of macros need to be used for initialization CONFIG_NAND: initialize GPMC for NAND device CONFIG_NOR: initialize GPMC for NOR device CONFIG_ONENAND: initialize GPMC for ONENAND device
Signed-off-by: Pekon Gupta pekon@ti.com --- arch/arm/cpu/armv7/am33xx/Makefile | 1 - arch/arm/cpu/armv7/omap-common/Makefile | 4 - .../{am33xx/mem.c => omap-common/mem-common.c} | 39 ++++++ arch/arm/cpu/armv7/omap3/Makefile | 1 - arch/arm/cpu/armv7/omap3/mem.c | 139 --------------------- 5 files changed, 39 insertions(+), 145 deletions(-) rename arch/arm/cpu/armv7/{am33xx/mem.c => omap-common/mem-common.c} (68%) delete mode 100644 arch/arm/cpu/armv7/omap3/mem.c
diff --git a/arch/arm/cpu/armv7/am33xx/Makefile b/arch/arm/cpu/armv7/am33xx/Makefile index 5566310..aae3f09 100644 --- a/arch/arm/cpu/armv7/am33xx/Makefile +++ b/arch/arm/cpu/armv7/am33xx/Makefile @@ -14,7 +14,6 @@ endif
obj-$(CONFIG_TI816X) += clock_ti816x.o obj-y += sys_info.o -obj-y += mem.o obj-y += ddr.o obj-y += emif4.o obj-y += board.o diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile index 59f5352..5f5132f 100644 --- a/arch/arm/cpu/armv7/omap-common/Makefile +++ b/arch/arm/cpu/armv7/omap-common/Makefile @@ -27,8 +27,4 @@ obj-y += boot-common.o obj-y += lowlevel_init.o endif
-ifndef CONFIG_SPL_BUILD -ifneq ($(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) obj-y += mem-common.o -endif -endif diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/omap-common/mem-common.c similarity index 68% rename from arch/arm/cpu/armv7/am33xx/mem.c rename to arch/arm/cpu/armv7/omap-common/mem-common.c index 56c9e7d..944ef84 100644 --- a/arch/arm/cpu/armv7/am33xx/mem.c +++ b/arch/arm/cpu/armv7/omap-common/mem-common.c @@ -19,9 +19,36 @@ #include <asm/arch/mem.h> #include <asm/arch/sys_proto.h> #include <command.h> +#include <linux/mtd/omap_gpmc.h>
struct gpmc *gpmc_cfg;
+#if defined(CONFIG_OMAP34XX) +/******************************************************** + * mem_ok() - test used to see if timings are correct + * for a part. Helps in guessing which part + * we are currently using. + *******************************************************/ +u32 mem_ok(u32 cs) +{ + u32 val1, val2, addr; + u32 pattern = 0x12345678; + + addr = OMAP34XX_SDRC_CS0 + get_sdr_cs_offset(cs); + + writel(0x0, addr + 0x400); /* clear pos A */ + writel(pattern, addr); /* pattern to pos B */ + writel(0x0, addr + 4); /* remove pattern off the bus */ + val1 = readl(addr + 0x400); /* get pos A value */ + val2 = readl(addr); /* get val2 */ + writel(0x0, addr + 0x400); /* clear pos A */ + + if ((val1 != 0) || (val2 != pattern)) /* see if pos A val changed */ + return 0; + else + return 1; +} +#endif
void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, u32 size) @@ -74,6 +101,17 @@ void gpmc_init(void) }; u32 size = GPMC_SIZE_256M; u32 base = CONFIG_SYS_NAND_BASE; +#elif defined(CONFIG_CMD_ONENAND) + const u32 gpmc_regs[GPMC_MAX_REG] = { ONENAND_GPMC_CONFIG1, + ONENAND_GPMC_CONFIG2, + ONENAND_GPMC_CONFIG3, + ONENAND_GPMC_CONFIG4, + ONENAND_GPMC_CONFIG5, + ONENAND_GPMC_CONFIG6, + 0 + }; + u32 base = PISMO1_ONEN_BASE; + u32 size = PISMO1_ONEN_SIZE; #else const u32 gpmc_regs[GPMC_MAX_REG] = { 0, 0, 0, 0, 0, 0, 0 }; u32 size = 0; @@ -83,6 +121,7 @@ void gpmc_init(void) writel(0x00000008, &gpmc_cfg->sysconfig); writel(0x00000000, &gpmc_cfg->irqstatus); writel(0x00000000, &gpmc_cfg->irqenable); + writel(0x00000000, &gpmc_cfg->timeout_control); #ifdef CONFIG_NOR writel(0x00000200, &gpmc_cfg->config); #else diff --git a/arch/arm/cpu/armv7/omap3/Makefile b/arch/arm/cpu/armv7/omap3/Makefile index 39ff257..cf86046 100644 --- a/arch/arm/cpu/armv7/omap3/Makefile +++ b/arch/arm/cpu/armv7/omap3/Makefile @@ -9,7 +9,6 @@ obj-y := lowlevel_init.o
obj-y += board.o obj-y += clock.o -obj-y += mem.o obj-y += sys_info.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_OMAP3_ID_NAND) += spl_id_nand.o diff --git a/arch/arm/cpu/armv7/omap3/mem.c b/arch/arm/cpu/armv7/omap3/mem.c deleted file mode 100644 index 1832aff..0000000
On Thu, May 08, 2014 at 09:43:47PM +0530, pekon gupta wrote:
GPMC controller on TI's OMAP SoC is general purpose controller to interface with different types of external devices like;
- parallel NOR flash
- parallel NAND flash
- OneNand flash
- SDR RAM
- Ethernet Devices like LAN9220
Though GPMC configurations may be different for each platform depending on clock-frequency and external device interfacing with controller. But initialization sequence remains common across all platfoms.
Thus this patch merges gpmc_init() scattered in different arch-xx/mem.c files into single omap-common/mem-common.c
However, actual platforms specific register config values are still sourced from corresponding platform specific headers like; AM33xx: arch/arm/include/asm/arch-am33xx/mem.h OMAP3: arch/arm/include/asm/arch-omap3/mem.h OMAP4: arch/arm/include/asm/arch-omap4/mem.h OMAP4: arch/arm/include/asm/arch-omap5/mem.h
Also, CONFIG_xx passed by board-profile decide config for which set of macros need to be used for initialization CONFIG_NAND: initialize GPMC for NAND device CONFIG_NOR: initialize GPMC for NOR device CONFIG_ONENAND: initialize GPMC for ONENAND device
Signed-off-by: Pekon Gupta pekon@ti.com
After adding GPMC_SIZE_256M to omap3/mem.h, applied to u-boot-ti/master, thanks!
And note that git detect renames got a bit too agressive here so I had to apply it kinda by hand, but I think I did everything right.
From: Tom Rini [mailto:tom.rini@gmail.com] On Behalf Of Rini, Tom On Thu, May 08, 2014 at 09:43:47PM +0530, pekon gupta wrote:
GPMC controller on TI's OMAP SoC is general purpose controller to interface with different types of external devices like;
- parallel NOR flash
- parallel NAND flash
- OneNand flash
- SDR RAM
- Ethernet Devices like LAN9220
Though GPMC configurations may be different for each platform depending on clock-frequency and external device interfacing with controller. But initialization sequence remains common across all platfoms.
Thus this patch merges gpmc_init() scattered in different arch-xx/mem.c files into single omap-common/mem-common.c
However, actual platforms specific register config values are still sourced from corresponding platform specific headers like; AM33xx: arch/arm/include/asm/arch-am33xx/mem.h OMAP3: arch/arm/include/asm/arch-omap3/mem.h OMAP4: arch/arm/include/asm/arch-omap4/mem.h OMAP4: arch/arm/include/asm/arch-omap5/mem.h
Also, CONFIG_xx passed by board-profile decide config for which set of macros need to be used for initialization CONFIG_NAND: initialize GPMC for NAND device CONFIG_NOR: initialize GPMC for NOR device CONFIG_ONENAND: initialize GPMC for ONENAND device
Signed-off-by: Pekon Gupta pekon@ti.com
After adding GPMC_SIZE_256M to omap3/mem.h, applied to u-boot-ti/master, thanks!
And note that git detect renames got a bit too agressive here so I had to apply it kinda by hand, but I think I did everything right.
Thanks much .. I'll review the changes.
with regards, pekon
Hi,
I'm actually seeing some breakage from this commit (a0a37183bd75e74608bc78c8d0e2a34454f95a91). When booting the DuoVero board (no NAND/NOR/ONENAND but a network card on GPMC), it hangs as it enters the kernel.
These lines in gpmc_init() in arch/arm/cpu/armv7/omap-common/mem-common.c ... writel(0, &gpmc_cfg->cs[0].config7); sdelay(1000); /* enable chip-select specific configurations */ enable_gpmc_cs_config(gpmc_regs, &gpmc_cfg->cs[0], base, size); ... seem to be the source of the issue. Even though we have nothing connected on CS0, the last line of enable_gpmc_cs_config() enables the interface despite it being disabled right before in writel(0, &gpmc_cfg->cs[0].config7);
--Ash
On Mon, May 26, 2014 at 9:47 PM, Gupta, Pekon pekon@ti.com wrote:
From: Tom Rini [mailto:tom.rini@gmail.com] On Behalf Of Rini, Tom On Thu, May 08, 2014 at 09:43:47PM +0530, pekon gupta wrote:
GPMC controller on TI's OMAP SoC is general purpose controller to interface with different types of external devices like;
- parallel NOR flash
- parallel NAND flash
- OneNand flash
- SDR RAM
- Ethernet Devices like LAN9220
Though GPMC configurations may be different for each platform depending on clock-frequency and external device interfacing with controller. But initialization sequence remains common across all platfoms.
Thus this patch merges gpmc_init() scattered in different arch-xx/mem.c files into single omap-common/mem-common.c
However, actual platforms specific register config values are still sourced from corresponding platform specific headers like; AM33xx: arch/arm/include/asm/arch-am33xx/mem.h OMAP3: arch/arm/include/asm/arch-omap3/mem.h OMAP4: arch/arm/include/asm/arch-omap4/mem.h OMAP4: arch/arm/include/asm/arch-omap5/mem.h
Also, CONFIG_xx passed by board-profile decide config for which set of macros need to be used for initialization CONFIG_NAND: initialize GPMC for NAND device CONFIG_NOR: initialize GPMC for NOR device CONFIG_ONENAND: initialize GPMC for ONENAND device
Signed-off-by: Pekon Gupta pekon@ti.com
After adding GPMC_SIZE_256M to omap3/mem.h, applied to u-boot-ti/master, thanks!
And note that git detect renames got a bit too agressive here so I had to apply it kinda by hand, but I think I did everything right.
Thanks much .. I'll review the changes.
with regards, pekon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
If CONFIG_(NAND|NOR|ONENAND) is not defined, no configuration is set for GPMC on chip select #0---size is 0. In this case, the GPMC configuration should be reset but not enabled. Enabling causes the Gumstix DuoVero board to hang when entering Linux.
Signed-off-by: Ash Charles ashcharles@gmail.com --- arch/arm/cpu/armv7/omap-common/mem-common.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap-common/mem-common.c b/arch/arm/cpu/armv7/omap-common/mem-common.c index 944ef84..f3aa268 100644 --- a/arch/arm/cpu/armv7/omap-common/mem-common.c +++ b/arch/arm/cpu/armv7/omap-common/mem-common.c @@ -133,5 +133,6 @@ void gpmc_init(void) writel(0, &gpmc_cfg->cs[0].config7); sdelay(1000); /* enable chip-select specific configurations */ - enable_gpmc_cs_config(gpmc_regs, &gpmc_cfg->cs[0], base, size); + if (size != 0) + enable_gpmc_cs_config(gpmc_regs, &gpmc_cfg->cs[0], base, size); }
On Fri, Jun 06, 2014 at 11:27:28AM -0700, Ash Charles wrote:
If CONFIG_(NAND|NOR|ONENAND) is not defined, no configuration is set for GPMC on chip select #0---size is 0. In this case, the GPMC configuration should be reset but not enabled. Enabling causes the Gumstix DuoVero board to hang when entering Linux.
Signed-off-by: Ash Charles ashcharles@gmail.com
After changing the test to be on 'base' not 'size' (as GPMC_SIZE_256M is 0x0), applied to u-boot-ti/master, thanks!
Thanks for the correction Tom. --Ash
On Thu, Jun 19, 2014 at 3:01 PM, Tom Rini trini@ti.com wrote:
On Fri, Jun 06, 2014 at 11:27:28AM -0700, Ash Charles wrote:
If CONFIG_(NAND|NOR|ONENAND) is not defined, no configuration is set for GPMC on chip select #0---size is 0. In this case, the GPMC configuration should be reset but not enabled. Enabling causes the Gumstix DuoVero board to hang when entering Linux.
Signed-off-by: Ash Charles ashcharles@gmail.com
After changing the test to be on 'base' not 'size' (as GPMC_SIZE_256M is 0x0), applied to u-boot-ti/master, thanks!
-- Tom
Hi Ash,
From: ashcharles@gmail.com Hi,
I'm actually seeing some breakage from this commit (a0a37183bd75e74608bc78c8d0e2a34454f95a91). When booting the DuoVero board (no NAND/NOR/ONENAND but a network card on GPMC), it hangs as it enters the kernel.
These lines in gpmc_init() in arch/arm/cpu/armv7/omap-common/mem-common.c ... writel(0, &gpmc_cfg->cs[0].config7); sdelay(1000); /* enable chip-select specific configurations */ enable_gpmc_cs_config(gpmc_regs, &gpmc_cfg->cs[0], base, size); ... seem to be the source of the issue. Even though we have nothing connected on CS0, the last line of enable_gpmc_cs_config() enables the interface despite it being disabled right before in writel(0, &gpmc_cfg->cs[0].config7);
Sorry seeing this bit late. Were you able to root cause the issue ? All Ethernet related GPMC configurations are defined by following macros File: $U-BOOT/arch/arm/include/asm/arch-omap3/mem.h #define NET_GPMC_CONFIG1 0x00001000 #define NET_GPMC_CONFIG2 0x001e1e01 #define NET_GPMC_CONFIG3 0x00080300 #define NET_GPMC_CONFIG4 0x1c091c09 #define NET_GPMC_CONFIG5 0x04181f1f #define NET_GPMC_CONFIG6 0x00000FCF #define NET_GPMC_CONFIG7 0x00000f6c OR /* GPMC CS configuration for an SMSC LAN9221 ethernet controller */ #define NET_LAN9221_GPMC_CONFIG1 0x00001000 #define NET_LAN9221_GPMC_CONFIG2 0x00060700 #define NET_LAN9221_GPMC_CONFIG3 0x00020201 #define NET_LAN9221_GPMC_CONFIG4 0x06000700 #define NET_LAN9221_GPMC_CONFIG5 0x0006090A #define NET_LAN9221_GPMC_CONFIG6 0x87030000 #define NET_LAN9221_GPMC_CONFIG7 0x00000f6c
I havn't touched these values, except for moving some of them from one header-file to other.
Also, the change in u-boot, should not affect the kernel. That means kernel's GPMC driver was depending on some pre-configured value, which is wrong. There were couple of fixes for SMSC controller pushed in 3.16 kernel, Are following in your tree ? fb677ef tony@atomide.com ARM: OMAP2+: Fix GPMC remap for devices using an offset efe8072 tony@atomide.com ARM: OMAP2+: Fix oops for GPMC free
with regards, pekon
Hi Pekon, On Mon, Jul 7, 2014 at 11:19 PM, Gupta, Pekon pekon@ti.com wrote:
Sorry seeing this bit late. Were you able to root cause the issue ?
Did you see http://patchwork.ozlabs.org/patch/356984/ ? This resolves the issue for me but I'd welcome any feedback you have on this fix. ...
Also, the change in u-boot, should not affect the kernel. That means kernel's GPMC driver was depending on some pre-configured value, which is wrong. There were couple of fixes for SMSC controller pushed in 3.16 kernel, Are following in your tree ? fb677ef tony@atomide.com ARM: OMAP2+: Fix GPMC remap for devices using an offset efe8072 tony@atomide.com ARM: OMAP2+: Fix oops for GPMC free
Okay---I'd seen the breakage on both the standard 3.5 kernel for my board (overo) as well as on the then-mainline version 3.15+ which is why I dived into u-boot to find a fix. I was likely missing these two commits though!
Thanks, Ash
From: ashcharles@gmail.com
On Mon, Jul 7, 2014 at 11:19 PM, Gupta, Pekon pekon@ti.com wrote: Sorry seeing this bit late. Were you able to root cause the issue ?
Did you see http://patchwork.ozlabs.org/patch/356984/ ? This resolves the issue for me but I'd welcome any feedback you have on this fix.
Thanks for the fix. Though I don't know why GPMC initialization without any device connected should cause a hang, that too on kernel side.
with regards, pekon
From: Gupta, Pekon
This patch series intends to:
- Add support for GPMC and ELM controllers for OMAP4 and OMAP5 platform devices
by moving all generic arch specific code shared between arch/AM33xx, arch/OMAP4 and arch/OMAP5 into arch/omap-common/
- Separate out arch specific header for future scalability
- Remove redundant code
Pekon Gupta (3): ARM: omap4: add platform specific info for GPMC and ELM controllers ARM: omap5: add platform specific info for GPMC and ELM controllers ARM: omap: merge GPMC initialization code for all platform
arch/arm/cpu/armv7/am33xx/Makefile | 1 - arch/arm/cpu/armv7/omap-common/Makefile | 4 - .../{am33xx/mem.c => omap-common/mem-common.c} | 39 ++++++ arch/arm/cpu/armv7/omap3/Makefile | 1 - arch/arm/cpu/armv7/omap3/mem.c | 139 --------------------- arch/arm/include/asm/arch-omap4/cpu.h | 5 +- arch/arm/include/asm/arch-omap4/hardware.h | 26 ++++ arch/arm/include/asm/arch-omap4/mem.h | 62 +++++++++ arch/arm/include/asm/arch-omap4/omap.h | 3 - arch/arm/include/asm/arch-omap5/cpu.h | 5 +- arch/arm/include/asm/arch-omap5/hardware.h | 26 ++++ arch/arm/include/asm/arch-omap5/mem.h | 62 +++++++++ arch/arm/include/asm/arch-omap5/omap.h | 3 - 13 files changed, 219 insertions(+), 157 deletions(-) rename arch/arm/cpu/armv7/{am33xx/mem.c => omap-common/mem-common.c} (68%) delete mode 100644 arch/arm/cpu/armv7/omap3/mem.c create mode 100644 arch/arm/include/asm/arch-omap4/hardware.h create mode 100644 arch/arm/include/asm/arch-omap4/mem.h create mode 100644 arch/arm/include/asm/arch-omap5/hardware.h create mode 100644 arch/arm/include/asm/arch-omap5/mem.h
-- 1.8.5.1.163.gd7aced9
Missed adding Reported-by: Gregoire Gentil gregoire@gentil.com
with regards, pekon
participants (5)
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Ash Charles -
Ash Charles -
Gupta, Pekon -
Pekon Gupta
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Tom Rini