On 02/10/2017 09:51 AM, york.sun@nxp.com wrote:

On 02/10/2017 09:34 AM, Stephen Warren wrote:

...

Still, I looked at all the "struct mm_region" tables in U-Boot and couldn't find any that set PXN/UXN for normal memory, and I don't believe this function will be called for anything other than normal memory. As such, this change should be fine in practice. However, I'm still a bit hesitant about this change. Can updating PXN/UXN be made optional? Related: Why would we need to change PXN/UXN at run-time; shouldn't the base struct mm_region table be set up correctly from the start?

I forgot to add here. If the DDR mapping is created _before_ DDR is initialized, it has to be device memory, not normal memory to avoid speculative access. I got from ARM support that the PXN/UXN must be set for device memory, otherwise it is architecturally undefined. I would like to skipping the mapping for DDR to begin with and add it back later. However, current code counts the highest address in predefined mapping and decides the TCR. So I have to have something for my highest mapping to hold the place. The only safe way is to map it as device memory with PXN/UXN to avoid hitting the speculative access issue.

Now you see why I have to update the PXN/UXN bits.

One more point, I have to avoid using the backup MMU table as current mmu_set_region_dcache_behaviour() does. For my early MMU table (long story why I have to use MMU early, in short, for performance on emulators), the space is very limited and I cannot afford extra space. I will follow ARM's suggestion to do break-before-make to update MMU.

York